From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Core_A/html/unionCNTP__CTL__Type.html | 279 +++++++++++++++++++++++++++++ 1 file changed, 279 insertions(+) create mode 100644 docs/Core_A/html/unionCNTP__CTL__Type.html (limited to 'docs/Core_A/html/unionCNTP__CTL__Type.html') diff --git a/docs/Core_A/html/unionCNTP__CTL__Type.html b/docs/Core_A/html/unionCNTP__CTL__Type.html new file mode 100644 index 0000000..481325a --- /dev/null +++ b/docs/Core_A/html/unionCNTP__CTL__Type.html @@ -0,0 +1,279 @@ + + + + + +CNTP_CTL_Type Union Reference +CMSIS-Core (Cortex-A): CNTP_CTL_Type Union Reference + + + + + + + + + + + + + + +
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CMSIS-Core (Cortex-A) +  Version 1.1.2 +
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CMSIS-Core support for Cortex-A processor-based devices
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CNTP_CTL_Type Union Reference
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Physical Timer Control register. +

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struct {
   uint32_t   ENABLE:1
 bit: 0 Enables the timer. More...
 
   uint32_t   IMASK:1
 bit: 1 Timer output signal mask bit. More...
 
   uint32_t   ISTATUS:1
 bit: 2 The status of the timer. More...
 
   uint32_t   _reserved0:29
 bit: 3..31 Reserved More...
 
b
 Structure used for bit access. More...
 
uint32_t w
 Type used for word access. More...
 
struct {
   uint32_t   ENABLE:1
 bit: 0 Enables the timer. More...
 
   uint32_t   IMASK:1
 bit: 1 Timer output signal mask bit. More...
 
   uint32_t   ISTATUS:1
 bit: 2 The status of the timer. More...
 
b
 Structure used for bit access. More...
 
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Field Documentation

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uint32_t CNTP_CTL_Type::_reserved0
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struct { ... } CNTP_CTL_Type::b
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struct { ... } CNTP_CTL_Type::b
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uint32_t CNTP_CTL_Type::ENABLE
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Enables the timer.

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Permitted values are:

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  • 0 - Timer disabled.
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  • 1 - Timer enabled.
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uint32_t CNTP_CTL_Type::IMASK
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Timer output signal mask bit.

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Permitted values are:

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  • 0 - Timer output signal is not masked.
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  • 1 - Timer output signal is masked.
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uint32_t CNTP_CTL_Type::ISTATUS
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The status of the timer.

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This bit indicates whether the timer condition is asserted:

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  • 0 - Timer condition is not asserted.
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  • 1 - Timer condition is asserted.
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uint32_t CNTP_CTL_Type::w
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