From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001
From: Ali Labbene <ali.labbene@st.com>
Date: Wed, 11 Dec 2019 08:59:21 +0100
Subject: Official ARM version: v5.4.0

    Add CMSIS V5.4.0, please refer to index.html available under \docs folder.

    Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure
         used in existing projects, and thus avoid projects mass update
    Note: the following components have been removed from ARM original delivery (as not used in ST packages)
        - CMSIS_EW2018.pdf
        - .gitattributes
        - .gitignore
        - \Device
        - \CMSIS
           - \CoreValidation
		   - \DAP
           - \Documentation
           - \DoxyGen
           - \Driver
           - \Pack
           - \RTOS\CMSIS_RTOS_Tutorial.pdf
           - \RTOS\RTX
           - \RTOS\Template
           - \RTOS2\RTX
           - \Utilities
           - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2

Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3
---
 docs/Core_A/html/search/all_15.js | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 docs/Core_A/html/search/all_15.js

(limited to 'docs/Core_A/html/search/all_15.js')

diff --git a/docs/Core_A/html/search/all_15.js b/docs/Core_A/html/search/all_15.js
new file mode 100644
index 0000000..6777e9b
--- /dev/null
+++ b/docs/Core_A/html/search/all_15.js
@@ -0,0 +1,16 @@
+var searchData=
+[
+  ['u',['U',['../unionSCTLR__Type.html#a1ca6569db52bca6250afbbd565d05449',1,'SCTLR_Type']]],
+  ['uart0_5firqn',['UART0_IRQn',['../ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8ae9122b85b58f7c24033a8515615a7b74',1,'ARMCA9.h']]],
+  ['uart1_5firqn',['UART1_IRQn',['../ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8a9650ab92e46bc16f333d4c63ad0459b4',1,'ARMCA9.h']]],
+  ['uart2_5firqn',['UART2_IRQn',['../ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8ab051fac6b15b88454713bb36d96e5dd5',1,'ARMCA9.h']]],
+  ['uart3_5firqn',['UART3_IRQn',['../ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8a11614a227a56dc01859bf803013e6358',1,'ARMCA9.h']]],
+  ['und_5fmode',['UND_MODE',['../startup__ARMCA9_8c.html#a050eda1514ebd401d55cd61d2f7f78d7',1,'startup_ARMCA9.c']]],
+  ['unlock_5fall_5fby_5fway',['UNLOCK_ALL_BY_WAY',['../structL2C__310__TypeDef.html#acb39f337a421d0640f39092dc992ef1a',1,'L2C_310_TypeDef']]],
+  ['user_5ft',['user_t',['../structmmu__region__attributes__Type.html#a6b32b61a1ee042a22ae0c8a2bd7de544',1,'mmu_region_attributes_Type']]],
+  ['using_2etxt',['Using.txt',['../Using_8txt.html',1,'']]],
+  ['using_20cmsis_20with_20generic_20arm_20processors',['Using CMSIS with generic Arm Processors',['../using_ARM_pg.html',1,'using_pg']]],
+  ['using_20cmsis_20in_20embedded_20applications',['Using CMSIS in Embedded Applications',['../using_pg.html',1,'']]],
+  ['usr_5fmode',['USR_MODE',['../startup__ARMCA9_8c.html#ac4c70ccf71cc9a2b8bd39c85675760ae',1,'startup_ARMCA9.c']]],
+  ['uwxn',['UWXN',['../unionSCTLR__Type.html#a32873e90e6814c3a2fc1b1c79c0bc8c8',1,'SCTLR_Type']]]
+];
-- 
cgit