From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001
From: Ali Labbene <ali.labbene@st.com>
Date: Wed, 11 Dec 2019 08:59:21 +0100
Subject: Official ARM version: v5.4.0

    Add CMSIS V5.4.0, please refer to index.html available under \docs folder.

    Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure
         used in existing projects, and thus avoid projects mass update
    Note: the following components have been removed from ARM original delivery (as not used in ST packages)
        - CMSIS_EW2018.pdf
        - .gitattributes
        - .gitignore
        - \Device
        - \CMSIS
           - \CoreValidation
		   - \DAP
           - \Documentation
           - \DoxyGen
           - \Driver
           - \Pack
           - \RTOS\CMSIS_RTOS_Tutorial.pdf
           - \RTOS\RTX
           - \RTOS\Template
           - \RTOS2\RTX
           - \Utilities
           - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2

Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3
---
 docs/Core_A/html/modules.js | 11 +++++++++++
 1 file changed, 11 insertions(+)
 create mode 100644 docs/Core_A/html/modules.js

(limited to 'docs/Core_A/html/modules.js')

diff --git a/docs/Core_A/html/modules.js b/docs/Core_A/html/modules.js
new file mode 100644
index 0000000..372d5a1
--- /dev/null
+++ b/docs/Core_A/html/modules.js
@@ -0,0 +1,11 @@
+var modules =
+[
+    [ "System and Clock Configuration", "group__system__init__gr.html", "group__system__init__gr" ],
+    [ "Core Register Access", "group__CMSIS__core__register.html", "group__CMSIS__core__register" ],
+    [ "Peripheral Access", "group__peripheral__gr.html", "group__peripheral__gr" ],
+    [ "Version Control", "group__version__ctrl.html", "group__version__ctrl" ],
+    [ "Core Peripherals", "group__CMSIS__Core__FunctionInterface.html", "group__CMSIS__Core__FunctionInterface" ],
+    [ "Compiler Control", "group__comp__cntrl__gr.html", "group__comp__cntrl__gr" ],
+    [ "Intrinsic Functions", "group__CMSIS__Core__InstructionInterface.html", "group__CMSIS__Core__InstructionInterface" ],
+    [ "Interrupts and Exceptions", "group__irq__ctrl__gr.html", "group__irq__ctrl__gr" ]
+];
\ No newline at end of file
-- 
cgit