From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Core_A/html/mem__ARMCA9_8h.html | 353 +++++++++++++++++++++++++++++++++++ 1 file changed, 353 insertions(+) create mode 100644 docs/Core_A/html/mem__ARMCA9_8h.html (limited to 'docs/Core_A/html/mem__ARMCA9_8h.html') diff --git a/docs/Core_A/html/mem__ARMCA9_8h.html b/docs/Core_A/html/mem__ARMCA9_8h.html new file mode 100644 index 0000000..6aea5a9 --- /dev/null +++ b/docs/Core_A/html/mem__ARMCA9_8h.html @@ -0,0 +1,353 @@ + + + + + +mem_ARMCA9.h File Reference +CMSIS-Core (Cortex-A): mem_ARMCA9.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Core (Cortex-A) +  Version 1.1.2 +
+
CMSIS-Core support for Cortex-A processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+ +
+
mem_ARMCA9.h File Reference
+
+
+ +

Memory base and size definitions (used in scatter file) +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define __ROM_BASE   0x80000000
 
#define __ROM_SIZE   0x00200000
 
#define __RAM_BASE   0x80200000
 
#define __RAM_SIZE   0x00200000
 
#define __RW_DATA_SIZE   0x00100000
 
#define __ZI_DATA_SIZE   0x000F0000
 
#define __STACK_SIZE   0x00001000
 
#define __HEAP_SIZE   0x00008000
 
#define __UND_STACK_SIZE   0x00000100
 
#define __ABT_STACK_SIZE   0x00000100
 
#define __SVC_STACK_SIZE   0x00000100
 
#define __IRQ_STACK_SIZE   0x00000100
 
#define __FIQ_STACK_SIZE   0x00000100
 
#define __TTB_BASE   0x80500000
 
#define __TTB_SIZE   0x00004000
 
+

Description

+
Version
V1.00
+
Date
10. January 2018
+
Note
+

Macro Definition Documentation

+ +
+
+ + + + +
#define __ABT_STACK_SIZE   0x00000100
+
+ +
+
+ +
+
+ + + + +
#define __FIQ_STACK_SIZE   0x00000100
+
+ +
+
+ +
+
+ + + + +
#define __HEAP_SIZE   0x00008000
+
+ +
+
+ +
+
+ + + + +
#define __IRQ_STACK_SIZE   0x00000100
+
+ +
+
+ +
+
+ + + + +
#define __RAM_BASE   0x80200000
+
+ +
+
+ +
+
+ + + + +
#define __RAM_SIZE   0x00200000
+
+ +
+
+ +
+
+ + + + +
#define __ROM_BASE   0x80000000
+
+ +
+
+ +
+
+ + + + +
#define __ROM_SIZE   0x00200000
+
+ +
+
+ +
+
+ + + + +
#define __RW_DATA_SIZE   0x00100000
+
+ +
+
+ +
+
+ + + + +
#define __STACK_SIZE   0x00001000
+
+ +
+
+ +
+
+ + + + +
#define __SVC_STACK_SIZE   0x00000100
+
+ +
+
+ +
+
+ + + + +
#define __TTB_BASE   0x80500000
+
+ +
+
+ +
+
+ + + + +
#define __TTB_SIZE   0x00004000
+
+ +
+
+ +
+
+ + + + +
#define __UND_STACK_SIZE   0x00000100
+
+ +
+
+ +
+
+ + + + +
#define __ZI_DATA_SIZE   0x000F0000
+
+ +
+
+
+
+ + + + -- cgit