From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Core_A/html/group__CMSIS__CPACR__BITS.html | 267 ++++++++++++++++++++++++ 1 file changed, 267 insertions(+) create mode 100644 docs/Core_A/html/group__CMSIS__CPACR__BITS.html (limited to 'docs/Core_A/html/group__CMSIS__CPACR__BITS.html') diff --git a/docs/Core_A/html/group__CMSIS__CPACR__BITS.html b/docs/Core_A/html/group__CMSIS__CPACR__BITS.html new file mode 100644 index 0000000..72a0e50 --- /dev/null +++ b/docs/Core_A/html/group__CMSIS__CPACR__BITS.html @@ -0,0 +1,267 @@ + + + + + +CPACR Bits +CMSIS-Core (Cortex-A): CPACR Bits + + + + + + + + + + + + + + +
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CMSIS-Core (Cortex-A) +  Version 1.1.2 +
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CMSIS-Core support for Cortex-A processor-based devices
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+Macros
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CPACR Bits
Coprocessor Access Control Register (CPACR)
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Bit position and mask macros. +More...

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+Macros

#define CPACR_ASEDIS_Pos   31U
 CPACR: ASEDIS Position. More...
 
#define CPACR_ASEDIS_Msk   (1UL << CPACR_ASEDIS_Pos)
 CPACR: ASEDIS Mask. More...
 
#define CPACR_D32DIS_Pos   30U
 CPACR: D32DIS Position. More...
 
#define CPACR_D32DIS_Msk   (1UL << CPACR_D32DIS_Pos)
 CPACR: D32DIS Mask. More...
 
#define CPACR_TRCDIS_Pos   28U
 CPACR: D32DIS Position. More...
 
#define CPACR_TRCDIS_Msk   (1UL << CPACR_D32DIS_Pos)
 CPACR: D32DIS Mask. More...
 
#define CPACR_CP_Pos_(n)   (n*2U)
 CPACR: CPn Position. More...
 
#define CPACR_CP_Msk_(n)   (3UL << CPACR_CP_Pos_(n))
 CPACR: CPn Mask. More...
 
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Description

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Macro Definition Documentation

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#define CPACR_ASEDIS_Msk   (1UL << CPACR_ASEDIS_Pos)
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#define CPACR_ASEDIS_Pos   31U
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#define CPACR_CP_Msk_( n)   (3UL << CPACR_CP_Pos_(n))
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#define CPACR_CP_Pos_( n)   (n*2U)
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#define CPACR_D32DIS_Msk   (1UL << CPACR_D32DIS_Pos)
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#define CPACR_D32DIS_Pos   30U
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#define CPACR_TRCDIS_Msk   (1UL << CPACR_D32DIS_Pos)
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#define CPACR_TRCDIS_Pos   28U
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