From 96d6da4e252b06dcfdc041e7df23e86161c33007 Mon Sep 17 00:00:00 2001 From: rihab kouki Date: Tue, 28 Jul 2020 11:24:49 +0100 Subject: Official ARM version: v5.6.0 --- docs/Core_A/html/deprecated.html | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) (limited to 'docs/Core_A/html/deprecated.html') diff --git a/docs/Core_A/html/deprecated.html b/docs/Core_A/html/deprecated.html index 756826d..aab7c0c 100644 --- a/docs/Core_A/html/deprecated.html +++ b/docs/Core_A/html/deprecated.html @@ -32,7 +32,7 @@ Logo
CMSIS-Core (Cortex-A) -  Version 1.1.2 +  Version 1.1.4
CMSIS-Core support for Cortex-A processor-based devices
@@ -112,17 +112,21 @@ $(document).ready(function(){initNavTree('deprecated.html','');});
-
Global __L1C_CleanInvalidateCache (uint32_t op)
+
Global __L1C_CleanInvalidateCache (uint32_t op)
Use generic L1C_CleanInvalidateCache instead.
-
Global __set_CCSIDR (uint32_t value)
-
CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead.
+
Global __set_CCSIDR (uint32_t value)
+
CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead.
+
Global __UNALIGNED_UINT32
+

Do not use this macro. It has been superseded by __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE and will be removed in the future.

+

+