From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Core/html/using_ARM_pg.html | 169 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 169 insertions(+) create mode 100644 docs/Core/html/using_ARM_pg.html (limited to 'docs/Core/html/using_ARM_pg.html') diff --git a/docs/Core/html/using_ARM_pg.html b/docs/Core/html/using_ARM_pg.html new file mode 100644 index 0000000..551b056 --- /dev/null +++ b/docs/Core/html/using_ARM_pg.html @@ -0,0 +1,169 @@ + + + + + +Using CMSIS with generic Arm Processors +CMSIS-Core (Cortex-M): Using CMSIS with generic Arm Processors + + + + + + + + + + + + + + +
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CMSIS-Core (Cortex-M) +  Version 5.1.2 +
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CMSIS-Core support for Cortex-M processor-based devices
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Using CMSIS with generic Arm Processors
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Arm provides CMSIS-Core (Cortex-M) files for the supported Arm Processors and for various compiler vendors. These files can be used when standard Arm processors should be used in a project. The table below lists the folder and device names of the Arm processors.

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Folder Processor Description
".\Device\ARM\ARMCM0" Cortex-M0 Contains Include and Source template files configured for the Cortex-M0 processor. The device name is ARMCM0 and the name of the Device Header File <device.h> is <ARMCM0.h>.
".\Device\ARM\ARMCM0plus" Cortex-M0+ Contains Include and Source template files configured for the Cortex-M0+ processor. The device name is ARMCM0plus and the name of the Device Header File <device.h> is <ARMCM0plus.h>.
".\Device\ARM\ARMCM3" Cortex-M3 Contains Include and Source template files configured for the Cortex-M3 processor. The device name is ARMCM3 and the name of the Device Header File <device.h> is <ARMCM3.h>.
".\Device\ARM\ARMCM4" Cortex-M4 Contains Include and Source template files configured for the Cortex-M4 processor. The device name is ARMCM4 and the name of the Device Header File <device.h> is <ARMCM4.h>.
".\Device\ARM\ARMCM7" Cortex-M7 Contains Include and Source template files configured for the Cortex-M7 processor. The device name is ARMCM7 and the name of the Device Header File <device.h> is <ARMCM7.h>.
".\Device\ARM\ARMSC000" SecurCore SC000 Contains Include and Source template files configured for the SecurCore SC000 processor. The device name is ARMSC000 and the name of the Device Header File <device.h> is <ARMSC000.h>.
".\Device\ARM\ARMSC300" SecurCore SC300 Contains Include and Source template files configured for the SecurCore SC300 processor. The device name is ARMSC300 and the name of the Device Header File <device.h> is <ARMSC300.h>.
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+Create generic Libraries with CMSIS

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The CMSIS Processor and Core Peripheral files allow also to create generic libraries. The CMSIS-DSP Libraries are an example for such a generic library.

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To build a generic Library set the define __CMSIS_GENERIC and include the relevant core_<cpu>.h CMSIS CPU & Core Access header file for the processor. The define __CMSIS_GENERIC disables device-dependent features such as the SysTick timer and the Interrupt System. Refer to Configuration of the Processor and Core Peripherals for a list of the available core_<cpu>.h header files.

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Example:

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The following code section shows the usage of the core_<cpu>.h header files to build a generic library for Cortex-M0, Cortex-M3, Cortex-M4, or Cortex-M7. To select the processor, the source code uses the define CORTEX_M7, CORTEX_M4, CORTEX_M3, CORTEX_M0, or CORTEX_M0PLUS. One of these defines needs to be provided on the compiler command line. By using this header file, the source code can access the functions for Core Register Access, Intrinsic Functions for CPU Instructions, Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7], and Debug Access.

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#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
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#if defined (CORTEX_M7)
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#include "core_cm7.h"
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#elif defined (CORTEX_M4)
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#include "core_cm4.h"
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#elif defined (CORTEX_M3)
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#include "core_cm3.h"
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#elif defined (CORTEX_M0)
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#include "core_cm0.h"
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#elif defined (CORTEX_M0PLUS)
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#include "core_cm0plus.h"
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#else
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#error "Processor not specified or unsupported."
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#endif
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+ + + + -- cgit