From 96d6da4e252b06dcfdc041e7df23e86161c33007 Mon Sep 17 00:00:00 2001 From: rihab kouki Date: Tue, 28 Jul 2020 11:24:49 +0100 Subject: Official ARM version: v5.6.0 --- docs/Core/html/globals_defs.html | 77 ++++++++++++++++++++++++++++++++++------ 1 file changed, 66 insertions(+), 11 deletions(-) (limited to 'docs/Core/html/globals_defs.html') diff --git a/docs/Core/html/globals_defs.html b/docs/Core/html/globals_defs.html index 4b98298..2bfb79c 100644 --- a/docs/Core/html/globals_defs.html +++ b/docs/Core/html/globals_defs.html @@ -32,7 +32,7 @@ Logo
CMSIS-Core (Cortex-M) -  Version 5.1.2 +  Version 5.3.0
CMSIS-Core support for Cortex-M processor-based devices
@@ -157,12 +157,18 @@ $(document).ready(function(){initNavTree('globals_defs.html','');});
  • __CM_CMSIS_VERSION_SUB : Ref_VersionControl.txt
    • +
  • __COMPILER_BARRIER +: Ref_CompilerControl.txt +
  • __CORTEX_M : Ref_VersionControl.txt
  • __CORTEX_SC : Ref_VersionControl.txt
    • +
  • __INITIAL_SP +: Ref_CompilerControl.txt +
  • __INLINE : Ref_CompilerControl.txt
    • @@ -175,6 +181,18 @@ $(document).ready(function(){initNavTree('globals_defs.html','');});
  • __PACKED_STRUCT : Ref_CompilerControl.txt
    • +
  • __PROGRAM_START +: Ref_CompilerControl.txt +
    • +
  • __RESTRICT +: Ref_CompilerControl.txt +
    • +
  • __STACK_LIMIT +: Ref_CompilerControl.txt +
    • +
  • __STATIC_FORCEINLINE +: Ref_CompilerControl.txt +
  • __STATIC_INLINE : Ref_CompilerControl.txt
    • @@ -196,17 +214,14 @@ $(document).ready(function(){initNavTree('globals_defs.html','');});
  • __USED : Ref_CompilerControl.txt
    • -
  • __WEAK -: Ref_CompilerControl.txt -
    • -
  • __XXX_CMSIS_VERSION -: Ref_VersionControl.txt +
  • __VECTOR_TABLE +: Ref_CompilerControl.txt
    • -
  • __XXX_CMSIS_VERSION_MAIN -: Ref_VersionControl.txt +
  • __VECTOR_TABLE_ATTRIBUTE +: Ref_CompilerControl.txt
    • -
  • __XXX_CMSIS_VERSION_SUB -: Ref_VersionControl.txt +
  • __WEAK +: Ref_CompilerControl.txt
  • _FLD2VAL : Ref_Peripheral.txt @@ -221,9 +236,36 @@ $(document).ready(function(){initNavTree('globals_defs.html','');});
  • ARM_MPU_ACCESS_xxx : Ref_MPU.txt
    • +
  • ARM_MPU_AP_ +: Ref_MPU8.txt +
  • ARM_MPU_AP_xxx : Ref_MPU.txt
    • +
  • ARM_MPU_ATTR +: Ref_MPU8.txt +
    • +
  • ARM_MPU_ATTR_DEVICE +: Ref_MPU8.txt +
    • +
  • ARM_MPU_ATTR_DEVICE_GRE +: Ref_MPU8.txt +
    • +
  • ARM_MPU_ATTR_DEVICE_nGnRE +: Ref_MPU8.txt +
    • +
  • ARM_MPU_ATTR_DEVICE_nGnRnE +: Ref_MPU8.txt +
    • +
  • ARM_MPU_ATTR_DEVICE_nGRE +: Ref_MPU8.txt +
    • +
  • ARM_MPU_ATTR_MEMORY_ +: Ref_MPU8.txt +
    • +
  • ARM_MPU_ATTR_NON_CACHEABLE +: Ref_MPU8.txt +
  • ARM_MPU_CACHEP_xxx : Ref_MPU.txt
    • @@ -235,10 +277,23 @@ $(document).ready(function(){initNavTree('globals_defs.html','');});
  • ARM_MPU_RBAR : Ref_MPU.txt +, Ref_MPU8.txt
  • ARM_MPU_REGION_SIZE_xxx : Ref_MPU.txt
    • +
  • ARM_MPU_RLAR +: Ref_MPU8.txt +
    • +
  • ARM_MPU_SH_INNER +: Ref_MPU8.txt +
    • +
  • ARM_MPU_SH_NON +: Ref_MPU8.txt +
    • +
  • ARM_MPU_SH_OUTER +: Ref_MPU8.txt +
    • @@ -255,7 +310,7 @@ $(document).ready(function(){initNavTree('globals_defs.html','');});