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b/Documentation/Core/html/_c_o_r_e__m_i_s_r_a__exceptions_pg.html @@ -0,0 +1,167 @@ + + + + + +MISRA-C:2004 Compliance Exceptions +CMSIS-CORE: MISRA-C:2004 Compliance Exceptions + + + + + + + + + + + + + + + +
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CMSIS-CORE +  Version 4.30 +
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CMSIS-CORE support for Cortex-M processor-based devices
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MISRA-C:2004 Compliance Exceptions
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+
+

CMSIS-CORE uses the common coding rules for CMSIS components that are documented under Introduction.

+

CMSIS-CORE violates the following MISRA-C:2004 rules:

+
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  • Required Rule 8.5, object/function definition in header file.
    + Violated since function definitions in header files are used for function inlining'.
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  • Advisory Rule 12.4, Side effects on right hand side of logical operator.
    + Violated because volatile is used for core register definitions.
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  • Advisory Rule 14.7, Return statement before end of function.
    + Violated to simplify code logic.
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  • Required Rule 18.4, declaration of union type or object of union type: '{...}'.
    + Violated since unions are used for effective representation of core registers.
    • +
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  • Advisory Rule 19.4, Disallowed definition for macro.
    + Violated since macros are used for assembler keywords.
    • +
+
    +
  • Advisory Rule 19.7, Function-like macro defined.
    + Violated since function-like macros are used to generate more efficient code.
    • +
+
    +
  • Advisory Rule 19.16, all preprocessing directives must be valid.
    + Violated to set default settings for macros.
    • +
+

<device>.h files generated by SVDConv.exe violate the following MISRA-C:2004 rules:

+
    +
  • Advisory Rule 20.2, Re-use of C90 identifier pattern.
    + Violated since CMSIS macros begin with '__'. Since CMSIS is developed and verified with various compilers this approach is acceptable and avoids conflicts with user symbols.
    • +
+
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  • Advisory Rule 19.1, Declaration before #include.
    + Violated since Interrupt Number Definition Type (IRQn_Type) must be defined before including the core header file.
    • +
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+ + + + diff --git a/Documentation/Core/html/_reg_map_pg.html b/Documentation/Core/html/_reg_map_pg.html new file mode 100644 index 0000000..64d9ec3 --- /dev/null +++ b/Documentation/Core/html/_reg_map_pg.html @@ -0,0 +1,303 @@ + + + + + +Register Mapping +CMSIS-CORE: Register Mapping + + + + + + + + + + + + + + + +
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+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
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Register Mapping
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+

The table below associates some common register names used in CMSIS to the register names used in Technical Reference Manuals.

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CMSIS Register Name Cortex-M3, Cortex-M4, and Cortex-M7 Cortex-M0 and Cortex-M0+ Register Name
Nested Vectored Interrupt Controller (NVIC) Register Access
NVIC->ISER[] NVIC_ISER0..7 ISER Interrupt Set-Enable Registers
NVIC->ICER[] NVIC_ICER0..7 ICER Interrupt Clear-Enable Registers
NVIC->ISPR[] NVIC_ISPR0..7 ISPR Interrupt Set-Pending Registers
NVIC->ICPR[] NVIC_ICPR0..7 ICPR Interrupt Clear-Pending Registers
NVIC->IABR[] NVIC_IABR0..7 - Interrupt Active Bit Register
NVIC->IP[] NVIC_IPR0..59 IPR0..7 Interrupt Priority Register
NVIC->STIR STIR - Software Triggered Interrupt Register
System Control Block (SCB) Register Access
SCB->CPUID CPUID CPUID CPUID Base Register
SCB->ICSR ICSR ICSR Interrupt Control and State Register
SCB->VTOR VTOR - Vector Table Offset Register
SCB->AIRCR AIRCR AIRCR Application Interrupt and Reset Control Register
SCB->SCR SCR SCR System Control Register
SCB->CCR CCR CCR Configuration and Control Register
SCB->SHP[] SHPR1..3 SHPR2..3 System Handler Priority Registers
SCB->SHCSR SHCSR SHCSR System Handler Control and State Register
SCB->CFSR CFSR - Configurable Fault Status Registers
SCB->HFSR HFSR - HardFault Status Register
SCB->DFSR DFSR - Debug Fault Status Register
SCB->MMFAR MMFAR - MemManage Fault Address Register
SCB->BFAR BFAR - BusFault Address Register
SCB->AFSR AFSR - Auxiliary Fault Status Register
SCB->PFR[] ID_PFR0..1 - Processor Feature Registers
SCB->DFR ID_DFR0 - Debug Feature Register
SCB->ADR ID_AFR0 - Auxiliary Feature Register
SCB->MMFR[] ID_MMFR0..3 - Memory Model Feature Registers
SCB->ISAR[] ID_ISAR0..4 - Instruction Set Attributes Registers
SCB->CPACR CPACR - Coprocessor Access Control Register
System Control and ID Registers not in the SCB (SCnSCB) Register Access
SCnSCB->ICTR ICTR - Interrupt Controller Type Register
SCnSCB->ACTLR ACTLR - Auxiliary Control Register
System Timer (SysTick) Control and Status Register Access
SysTick->CTRL STCSR SYST_CSR SysTick Control and Status Register
SysTick->LOAD STRVR SYST_RVR SysTick Reload Value Register
SysTick->VAL STCVR SYST_CVR SysTick Current Value Register
SysTick->CALIB STCR SYST_CALIB SysTick Calibaration Value Register
Data Watchpoint and Trace (DWT) Register Access
DWT->CTRL DWT_CTRL - Control Register
DWT->CYCCNT DWT_CYCCNT - Cycle Count Register
DWT->CPICNT DWT_CPICNT - CPI Count Register
DWT->EXCCNT DWT_EXCCNT - Exception Overhead Count Register
DWT->SLEEPCNT DWT_SLEEPCNT - Sleep Count Register
DWT->LSUCNT DWT_LSUCNT - LSU Count Register
DWT->FOLDCNT DWT_FOLDCNT - Folded-instruction Count Register
DWT->PCSR DWT_PCSR - Program Counter Sample Register
DWT->COMP0..3 DWT_COMP0..3 - Comparator Register 0..3
DWT->MASK0..3 DWT_MASK0..3 - Mask Register 0..3
DWT->FUNCTION0..3 DWT_FUNCTION0..3 - Function Register 0..3
Instrumentation Trace Macrocell (ITM) Register Access
ITM->PORT[] ITM_STIM0..31 - Stimulus Port Registers
ITM->TER ITM_TER - Trace Enable Register
ITM->TPR ITM_TPR - ITM Trace Privilege Register
ITM->TCR ITM_TCR - Trace Control Register
Trace Port Interface (TPIU) Register Access
TPI->SSPSR TPIU_SSPR - Supported Parallel Port Size Register
TPI->CSPSR TPIU_CSPSR - Current Parallel Port Size Register
TPI->ACPR TPIU_ACPR - Asynchronous Clock Prescaler Register
TPI->SPPR TPIU_SPPR - Selected Pin Protocol Register
TPI->FFSR TPIU_FFSR - Formatter and Flush Status Register
TPI->FFCR TPIU_FFCR - Formatter and Flush Control Register
TPI->FSCR TPIU_FSCR - Formatter Synchronization Counter Register
TPI->TRIGGER TRIGGER - TRIGGER
TPI->FIFO0 FIFO data 0 - Integration ETM Data
TPI->ITATBCTR2 ITATBCTR2 - ITATBCTR2
TPI->ITATBCTR0 ITATBCTR0 - ITATBCTR0
TPI->FIFO1 FIFO data 1 - Integration ITM Data
TPI->ITCTRL TPIU_ITCTRL - Integration Mode Control
TPI->CLAIMSET CLAIMSET - Claim tag set
TPI->CLAIMCLR CLAIMCLR - Claim tag clear
TPI->DEVID TPIU_DEVID - TPIU_DEVID
TPI->DEVTYPE TPIU_DEVTYPE - TPIU_DEVTYPE
Memory Protection Unit (MPU) Register Access
MPU->TYPE MPU_TYPE - MPU Type Register
MPU->CTRL MPU_CTRL - MPU Control Register
MPU->RNR MPU_RNR - MPU Region Number Register
MPU->RBAR MPU_RBAR - MPU Region Base Address Register
MPU->RASR MPU_RASR - MPU Region Attribute and Size Register
MPU->RBAR_A1..3 MPU_RBAR_A1..3 - MPU alias Register
MPU->RSAR_A1..3 MPU_RSAR_A1..3 - MPU alias Register
Floating Point Unit (FPU) Register Access [only Cortex-M4 and Cortex-M7 both with FPU]
FPU->FPCCR FPCCR - FP Context Control Register
FPU->FPCAR FPCAR - FP Context Address Register
FPU->FPDSCR FPDSCR - FP Default Status Control Register
FPU->MVFR0..1 MVFR0..1 - Media and VFP Feature Registers
+
+
+ + + + diff --git a/Documentation/Core/html/_templates_pg.html b/Documentation/Core/html/_templates_pg.html new file mode 100644 index 0000000..b5bc0e9 --- /dev/null +++ b/Documentation/Core/html/_templates_pg.html @@ -0,0 +1,212 @@ + + + + + +Template Files +CMSIS-CORE: Template Files + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Template Files
+
+
+

ARM supplies CMSIS-CORE template files for the all supported Cortex-M processors and various compiler vendors. Refer to the list of Tested and Verified Toolchains for compliance. These template files include the following:

+
    +
  • Register names of the Core Peripherals and names of the Core Exception Vectors.
    • +
  • Functions to access core peripherals, special CPU instructions and SIMD instructions (for Cortex-M4 and Cortex-M7)
    • +
  • Generic startup code and system configuration code.
    • +
+

The detailed file structure of the CMSIS-CORE is shown in the following picture.

+
+CMSIS_CORE_Files.png +
+CMSIS-CORE File Structure
+

+Template Files

+

The CMSIS-CORE template files should be extended by the silicon vendor to reflect the actual device and device peripherals. Silicon vendors add in this context the:

+
    +
  • Device Peripheral Access Layer that provides definitions for device-specific peripherals.
    • +
  • Access Functions for Peripherals (optional) that provides additional helper functions to access device-specific peripherals.
    • +
  • Interrupt vectors in the startup file that are device specific.
    • +
+ + + + + + + + + + + + + + + +
Template File Description
.\Device\_Template_Vendor\Vendor\Device\Source\ARM\startup_Device.s Startup file template for ARM C/C++ Compiler.
.\Device\_Template_Vendor\Vendor\Device\Source\GCC\startup_Device.s Startup file template for GNU GCC ARM Embedded Compiler.
.\Device\_Template_Vendor\Vendor\Device\Source\IAR\startup_Device.s Startup file template for IAR C/C++ Compiler.
.\Device\_Template_Vendor\Vendor\Device\Source\system_Device.c Generic system_Device.c file for system configuration (i.e. processor clock and memory bus system).
.\Device\_Template_Vendor\Vendor\Device\Include\Device.h Generic device header file. Needs to be extended with the device-specific peripheral registers. Optionally functions that access the peripherals can be part of that file.
.\Device\_Template_Vendor\Vendor\Device\Include\system_Device.h Generic system device configuration include file.
+

In addition ARM provides the following core header files that do not need any modifications.

+ + + + + + + + + + + +
Core Header Files Description
core_<cpu>.h Defines the core peripherals and provides helper functions that access the core registers. This file is available for all supported processors:
    +
  • core_cm0.h: for the Cortex-M0 processor
    • +
  • core_cm0plus.h: for the Cortex-M0+ processor
    • +
  • core_cm3.h: for the Cortex-M3 processor
    • +
  • core_cm4.h: for the Cortex-M4 processor
    • +
  • core_cm7.h: for the Cortex-M7 processor
    • +
  • core_sc000.h: for the SecurCore SC000 processor
    • +
  • core_sc300.h: for the SecurCore SC300 processor
    • +
+
core_cmInstr.h Defines intrinsic functions to access special Cortex-M instructions.
core_cmFunc.h Defines functions to access the Cortex-M core peripherals.
core_cm4_simd.h Defines intrinsic functions to access the SIMD instructions for Cortex-M4 and Cortex-M7.
+

+Adaption of Template Files to Devices

+

Copy the complete folder including files and replace:

+
    +
  • folder name 'Vendor' with the abbreviation for the device vendor e.g.: NXP.
    • +
  • folder name 'Device' with the specific device name e.g.: LPC17xx.
    • +
  • in the filenames 'Device' with the specific device name e.g.: LPC17xx.
    • +
+

Each template file contains comments that start with ToDo: that describe a required modification. The template files contain placeholders:

+ + + + + + + + + + + +
Placeholder Replaced with
<Device> the specific device name or device family name; i.e. LPC17xx.
<DeviceInterrupt> a specific interrupt name of the device; i.e. TIM1 for Timer 1.
<DeviceAbbreviation> short name or abbreviation of the device family; i.e. LPC.
Cortex-M# the specific Cortex-M processor name; i.e. Cortex-M3.
+

The adaption of the template files is described in detail on the following pages:

+ +
+
+ + + + diff --git a/Documentation/Core/html/_templates_pg.js b/Documentation/Core/html/_templates_pg.js new file mode 100644 index 0000000..972e1a1 --- /dev/null +++ b/Documentation/Core/html/_templates_pg.js @@ -0,0 +1,19 @@ +var _templates_pg = +[ + [ "Template Files", "_templates_pg.html#template_files_sec", null ], + [ "Adaption of Template Files to Devices", "_templates_pg.html#adapt_template_files_sec", null ], + [ "Startup File startup_.s", "startup_s_pg.html", [ + [ "startup_Device.s Template File", "startup_s_pg.html#startup_s_sec", null ] + ] ], + [ "System Configuration Files system_.c and system_.h", "system_c_pg.html", [ + [ "system_Device.c Template File", "system_c_pg.html#system_Device_sec", null ], + [ "system_Device.h Template File", "system_c_pg.html#system_Device_h_sec", null ] + ] ], + [ "Device Header File ", "device_h_pg.html", [ + [ "Interrupt Number Definition", "device_h_pg.html#interrupt_number_sec", null ], + [ "Configuration of the Processor and Core Peripherals", "device_h_pg.html#core_config_sect", null ], + [ "CMSIS Version and Processor Information", "device_h_pg.html#core_version_sect", null ], + [ "Device Peripheral Access Layer", "device_h_pg.html#device_access", null ], + [ "Device.h Template File", "device_h_pg.html#device_h_sec", null ] + ] ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/_using__a_r_m_pg.html b/Documentation/Core/html/_using__a_r_m_pg.html new file mode 100644 index 0000000..b8b2a16 --- /dev/null +++ b/Documentation/Core/html/_using__a_r_m_pg.html @@ -0,0 +1,169 @@ + + + + + +Using CMSIS with generic ARM Processors +CMSIS-CORE: Using CMSIS with generic ARM Processors + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Using CMSIS with generic ARM Processors
+
+
+

ARM provides CMSIS-CORE files for the supported ARM Processors and for various compiler vendors. These files can be used when standard ARM processors should be used in a project. The table below lists the folder and device names of the ARM processors.

+ + + + + + + + + + + + + + + + + +
Folder Processor Description
".\Device\ARM\ARMCM0" Cortex-M0 Contains Include and Source template files configured for the Cortex-M0 processor. The device name is ARMCM0 and the name of the Device Header File <device.h> is <ARMCM0.h>.
".\Device\ARM\ARMCM0plus" Cortex-M0+ Contains Include and Source template files configured for the Cortex-M0+ processor. The device name is ARMCM0plus and the name of the Device Header File <device.h> is <ARMCM0plus.h>.
".\Device\ARM\ARMCM3" Cortex-M3 Contains Include and Source template files configured for the Cortex-M3 processor. The device name is ARMCM3 and the name of the Device Header File <device.h> is <ARMCM3.h>.
".\Device\ARM\ARMCM4" Cortex-M4 Contains Include and Source template files configured for the Cortex-M4 processor. The device name is ARMCM4 and the name of the Device Header File <device.h> is <ARMCM4.h>.
".\Device\ARM\ARMCM7" Cortex-M7 Contains Include and Source template files configured for the Cortex-M7 processor. The device name is ARMCM7 and the name of the Device Header File <device.h> is <ARMCM7.h>.
".\Device\ARM\ARMSC000" SecurCore SC000 Contains Include and Source template files configured for the SecurCore SC000 processor. The device name is ARMSC000 and the name of the Device Header File <device.h> is <ARMSC000.h>.
".\Device\ARM\ARMSC300" SecurCore SC300 Contains Include and Source template files configured for the SecurCore SC300 processor. The device name is ARMSC300 and the name of the Device Header File <device.h> is <ARMSC300.h>.
+

+Create generic Libraries with CMSIS

+

The CMSIS Processor and Core Peripheral files allow also to create generic libraries. The CMSIS-DSP Libraries are an example for such a generic library.

+

To build a generic Library set the define CMSIS_GENERIC and include the relevant core_<cpu>.h CMSIS CPU & Core Access header file for the processor. The define CMSIS_GENERIC disables device-dependent features such as the SysTick timer and the Interrupt System. Refer to Configuration of the Processor and Core Peripherals for a list of the available core_<cpu>.h header files.

+

Example:

+

The following code section shows the usage of the core_<cpu>.h header files to build a generic library for Cortex-M0, Cortex-M3, Cortex-M4, or Cortex-M7. To select the processor, the source code uses the define CORTEX_M7, CORTEX_M4, CORTEX_M3, CORTEX_M0, or CORTEX_M0PLUS. By using this header file, the source code can access the functions for Core Register Access, Intrinsic Functions for CPU Instructions, Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7], and Debug Access.

+
#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
+
+
#if defined (CORTEX_M7)
+
#include "core_cm7.h"
+
#if defined (CORTEX_M4)
+
#include "core_cm4.h"
+
#elif defined (CORTEX_M3)
+
#include "core_cm3.h"
+
#elif defined (CORTEX_M0)
+
#include "core_cm0.h"
+
#elif defined (CORTEX_M0PLUS)
+
#include "core_cm0plus.h"
+
#else
+
#error "Processor not specified or unsupported."
+
#endif
+
+
+ + + + diff --git a/Documentation/Core/html/_using__c_m_s_i_s.html b/Documentation/Core/html/_using__c_m_s_i_s.html new file mode 100644 index 0000000..6c17a2e --- /dev/null +++ b/Documentation/Core/html/_using__c_m_s_i_s.html @@ -0,0 +1,177 @@ + + + + + +Basic CMSIS Example +CMSIS-CORE: Basic CMSIS Example + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Basic CMSIS Example
+
+
+

A typical example for using the CMSIS layer is provided below. The example is based on a STM32F10x Device.

+
#include <stm32f10x.h> // File name depends on device used
+
+
uint32_t volatile msTicks; // Counter for millisecond Interval
+
+
void SysTick_Handler (void) { // SysTick Interrupt Handler
+
msTicks++; // Increment Counter
+
}
+
+
void WaitForTick (void) {
+
uint32_t curTicks;
+
+
curTicks = msTicks; // Save Current SysTick Value
+
while (msTicks == curTicks) { // Wait for next SysTick Interrupt
+
__WFE (); // Power-Down until next Event/Interrupt
+
}
+
}
+
+
void TIM1_UP_IRQHandler (void) { // Timer Interrupt Handler
+
; // Add user code here
+
}
+
+
void timer1_init(int frequency) { // Set up Timer (device specific)
+
NVIC_SetPriority (TIM1_UP_IRQn, 1); // Set Timer priority
+
NVIC_EnableIRQ (TIM1_UP_IRQn); // Enable Timer Interrupt
+
}
+
+
+
void Device_Initialization (void) { // Configure & Initialize MCU
+
if (SysTick_Config (SystemCoreClock / 1000)) { // SysTick 1mSec
+
: // Handle Error
+
}
+
timer1_init (); // setup device-specific timer
+
}
+
+
+
// The processor clock is initialized by CMSIS startup + system file
+
void main (void) { // user application starts here
+
Device_Initialization (); // Configure & Initialize MCU
+
while (1) { // Endless Loop (the Super-Loop)
+
__disable_irq (); // Disable all interrupts
+
Get_InputValues (); // Read Values
+
__enable_irq (); // Enable all interrupts
+
Calculation_Response (); // Calculate Results
+
Output_Response (); // Output Results
+
WaitForTick (); // Synchronize to SysTick Timer
+
}
+
}
+
+
+ + + + diff --git a/Documentation/Core/html/_using__v_t_o_r_pg.html b/Documentation/Core/html/_using__v_t_o_r_pg.html new file mode 100644 index 0000000..ec02a35 --- /dev/null +++ b/Documentation/Core/html/_using__v_t_o_r_pg.html @@ -0,0 +1,181 @@ + + + + + +Using Interrupt Vector Remap +CMSIS-CORE: Using Interrupt Vector Remap + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Using Interrupt Vector Remap
+
+
+

Most Cortex-M processors provide VTOR register for remapping interrupt vectors. The following example shows a typical use case where the interrupt vectors are copied to RAM and the SysTick_Handler is replaced.

+
#include "ARMCM3.h" // Device header
+
+
/* externals from startup_ARMCM3.s */
+
extern uint32_t __Vectors[]; /* vector table ROM */
+
+
#define VECTORTABLE_SIZE (256) /* size Cortex-M3 vector table */
+
#define VECTORTABLE_ALIGNMENT (0x100ul) /* 16 Cortex + 32 ARMCM3 = 48 words */
+
/* next power of 2 = 256 */
+
+
/* new vector table in RAM */
+
uint32_t vectorTable_RAM[VECTORTABLE_SIZE] __attribute__(( aligned (VECTORTABLE_ALIGNMENT) ));
+
+
/*----------------------------------------------------------------------------
+
SysTick_Handler
+
*----------------------------------------------------------------------------*/
+
volatile uint32_t msTicks = 0; /* counts 1ms timeTicks */
+
void SysTick_Handler(void) {
+
msTicks++; /* increment counter */
+
}
+
+
/*----------------------------------------------------------------------------
+
SysTick_Handler (RAM)
+
*----------------------------------------------------------------------------*/
+
volatile uint32_t msTicks_RAM = 0; /* counts 1ms timeTicks */
+
void SysTick_Handler_RAM(void) {
+
msTicks_RAM++; /* increment counter */
+
}
+
+
/*----------------------------------------------------------------------------
+
MAIN function
+
*----------------------------------------------------------------------------*/
+
int main (void) {
+
uint32_t i;
+
+
for (i = 0; i < VECTORTABLE_SIZE; i++) {
+
vectorTable_RAM[i] = __Vectors[i]; /* copy vector table to RAM */
+
}
+
/* replace SysTick Handler */
+
vectorTable_RAM[SysTick_IRQn + 16] = (uint32_t)SysTick_Handler_RAM;
+
+
/* relocate vector table */
+
__disable_irq();
+
SCB->VTOR = (uint32_t)&vectorTable_RAM;
+
__DSB();
+
__enable_irq();
+
+
SystemCoreClockUpdate(); /* Get Core Clock Frequency */
+
SysTick_Config(SystemCoreClock / 1000ul); /* Setup SysTick Timer for 1 msec */
+
+
while(1);
+
}
+
+
+ + + + diff --git a/Documentation/Core/html/_using_pg.html b/Documentation/Core/html/_using_pg.html new file mode 100644 index 0000000..591e7bc --- /dev/null +++ b/Documentation/Core/html/_using_pg.html @@ -0,0 +1,172 @@ + + + + + +Using CMSIS in Embedded Applications +CMSIS-CORE: Using CMSIS in Embedded Applications + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Using CMSIS in Embedded Applications
+
+
+

To use the CMSIS-CORE the following files are added to the embedded application:

+ +
Note
The files Startup File startup_<device>.s and System Configuration Files system_<device>.c and system_<device>.h may require application specific adaptations and therefore should be copied into the application project folder prior configuration. The Device Header File <device.h> is included in all source files that need device access and can be stored on a central include folder that is generic for all projects.
+

The Startup File startup_<device>.s is executed after reset and calls SystemInit. After the system initialization control is transferred to the C/C++ run-time library which performs initialization and calls the main function in the user code. In addition the Startup File startup_<device>.s contains all exception and interrupt vectors and implements a default function for every interrupt. It may also contain stack and heap configurations for the user application.

+

The System Configuration Files system_<device>.c and system_<device>.h performs the setup for the processor clock. The variable SystemCoreClock indicates the CPU clock speed. System and Clock Configuration describes the minimum feature set. In addition the file may contain functions for the memory BUS setup and clock re-configuration.

+

The Device Header File <device.h> is the central include file that the application programmer is using in the C source code. It provides the following features:

+ +
+CMSIS_CORE_Files_user.png +
+CMSIS-CORE User Files
+

The CMSIS-CORE are device specific. In addition, the Startup File startup_<device>.s is also compiler vendor specific. The various compiler vendor tool chains may provide folders that contain the CMSIS files for each supported device.

+

For example, the following files are provided in MDK-ARM to support the STM32F10x Connectivity Line device variants:

+ + + + + + + + + + + +
File Description
".\ARM\Startup\ST\STM32F10x\startup_stm32f10x_cl.s" Startup File startup_<device>.s for the STM32F10x Connectivity Line device variants.
".\ARM\Startup\ST\STM32F10x\system_stmf10x.c" System Configuration Files system_<device>.c and system_<device>.h for the STM32F10x device families.
".\ARM\INC\ST\STM32F10x\stm32f10x.h" Device Header File <device.h> for the STM32F10x device families.
".\ARM\INC\ST\STM32F10x\system_stm32f10x.h" system_Device.h Template File for the STM32F10x device families.
+
Note
The silicon vendors create these device-specific CMSIS-CORE files based on Template Files provide by ARM.
+

Thereafter, the functions described under Reference can be used in the application.

+

Examples

+ +
+
+ + + + diff --git a/Documentation/Core/html/_using_pg.js b/Documentation/Core/html/_using_pg.js new file mode 100644 index 0000000..69ebae1 --- /dev/null +++ b/Documentation/Core/html/_using_pg.js @@ -0,0 +1,8 @@ +var _using_pg = +[ + [ "Basic CMSIS Example", "_using__c_m_s_i_s.html", null ], + [ "Using Interrupt Vector Remap", "_using__v_t_o_r_pg.html", null ], + [ "Using CMSIS with generic ARM Processors", "_using__a_r_m_pg.html", [ + [ "Create generic Libraries with CMSIS", "_using__a_r_m_pg.html#Using_ARM_Lib_sec", null ] + ] ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/annotated.html b/Documentation/Core/html/annotated.html new file mode 100644 index 0000000..9459e29 --- /dev/null +++ b/Documentation/Core/html/annotated.html @@ -0,0 +1,152 @@ + + + + + +Data Structures +CMSIS-CORE: Data Structures + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Data Structures
+
+
+
Here are the data structures with brief descriptions:
+ + + + + + + + + + + + + + + +
oCAPSR_TypeUnion type to access the Application Program Status Register (APSR)
oCCONTROL_TypeUnion type to access the Control Registers (CONTROL)
oCCoreDebug_TypeStructure type to access the Core Debug Register (CoreDebug)
oCDWT_TypeStructure type to access the Data Watchpoint and Trace Register (DWT)
oCFPU_TypeStructure type to access the Floating Point Unit (FPU)
oCIPSR_TypeUnion type to access the Interrupt Program Status Register (IPSR)
oCITM_TypeStructure type to access the Instrumentation Trace Macrocell Register (ITM)
oCMPU_TypeStructure type to access the Memory Protection Unit (MPU)
oCNVIC_TypeStructure type to access the Nested Vectored Interrupt Controller (NVIC)
oCSCB_TypeStructure type to access the System Control Block (SCB)
oCSCnSCB_TypeStructure type to access the System Control and ID Register not in the SCB
oCSysTick_TypeStructure type to access the System Timer (SysTick)
oCTPI_TypeStructure type to access the Trace Port Interface Register (TPI)
\CxPSR_TypeUnion type to access the Special-Purpose Program Status Registers (xPSR)
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+ + + + diff --git a/Documentation/Core/html/annotated.js b/Documentation/Core/html/annotated.js new file mode 100644 index 0000000..fa4ad87 --- /dev/null +++ b/Documentation/Core/html/annotated.js @@ -0,0 +1,17 @@ +var annotated = +[ + [ "APSR_Type", "union_a_p_s_r___type.html", "union_a_p_s_r___type" ], + [ "CONTROL_Type", "union_c_o_n_t_r_o_l___type.html", "union_c_o_n_t_r_o_l___type" ], + [ "CoreDebug_Type", "struct_core_debug___type.html", "struct_core_debug___type" ], + [ "DWT_Type", "struct_d_w_t___type.html", "struct_d_w_t___type" ], + [ "FPU_Type", "struct_f_p_u___type.html", "struct_f_p_u___type" ], + [ "IPSR_Type", "union_i_p_s_r___type.html", "union_i_p_s_r___type" ], + [ "ITM_Type", "struct_i_t_m___type.html", "struct_i_t_m___type" ], + [ "MPU_Type", "struct_m_p_u___type.html", "struct_m_p_u___type" ], + [ "NVIC_Type", "struct_n_v_i_c___type.html", "struct_n_v_i_c___type" ], + [ "SCB_Type", "struct_s_c_b___type.html", "struct_s_c_b___type" ], + [ "SCnSCB_Type", "struct_s_cn_s_c_b___type.html", "struct_s_cn_s_c_b___type" ], + [ "SysTick_Type", "struct_sys_tick___type.html", "struct_sys_tick___type" ], + [ "TPI_Type", "struct_t_p_i___type.html", "struct_t_p_i___type" ], + [ "xPSR_Type", "unionx_p_s_r___type.html", "unionx_p_s_r___type" ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/bc_s.png b/Documentation/Core/html/bc_s.png new file mode 100644 index 0000000..66f8e9a Binary files /dev/null and b/Documentation/Core/html/bc_s.png differ diff --git a/Documentation/Core/html/bdwn.png b/Documentation/Core/html/bdwn.png new file mode 100644 index 0000000..d400769 Binary files /dev/null and b/Documentation/Core/html/bdwn.png differ diff --git a/Documentation/Core/html/check.png b/Documentation/Core/html/check.png new file mode 100644 index 0000000..094e59c Binary files /dev/null and b/Documentation/Core/html/check.png differ diff --git a/Documentation/Core/html/classes.html b/Documentation/Core/html/classes.html new file mode 100644 index 0000000..2773f85 --- /dev/null +++ b/Documentation/Core/html/classes.html @@ -0,0 +1,158 @@ + + + + + +Data Structure Index +CMSIS-CORE: Data Structure Index + + + + + + + + + + + + + + + +
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CMSIS-CORE +  Version 4.30 +
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CMSIS-CORE support for Cortex-M processor-based devices
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Data Structure Index
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A | C | D | F | I | M | N | S | T | X
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  A  
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  D  
+		ITM_Type   
  S  
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  X  
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  M  
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APSR_Type   DWT_Type   SCB_Type   xPSR_Type   
  C  
+
  F  
+		MPU_Type   SCnSCB_Type   
  N  
+		SysTick_Type   
CONTROL_Type   FPU_Type   
  T  
+
CoreDebug_Type   
  I  
+		NVIC_Type   
TPI_Type   
IPSR_Type   
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A | C | D | F | I | M | N | S | T | X
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+ + + + diff --git a/Documentation/Core/html/closed.png b/Documentation/Core/html/closed.png new file mode 100644 index 0000000..ccbcf62 Binary files /dev/null and b/Documentation/Core/html/closed.png differ diff --git a/Documentation/Core/html/cmsis.css b/Documentation/Core/html/cmsis.css new file mode 100644 index 0000000..293d0d0 --- /dev/null +++ b/Documentation/Core/html/cmsis.css @@ -0,0 +1,1269 @@ +/* The standard CSS for doxygen */ + +body, table, div, p, dl { + font-family: Lucida Grande, Verdana, Geneva, Arial, sans-serif; + font-size: 13px; + line-height: 1.3; +} + +/* CMSIS styles */ + +.style1 { + text-align: center; +} +.style2 { + color: #0000FF; + font-weight: normal; +} +.style3 { + text-align: left; +} +.style4 { + color: #008000; +} +.style5 { + color: #0000FF; +} +.style6 { + color: #000000; + font-style:italic; +} +.mand { + color: #0000FF; +} +.opt { + color: #008000; +} +.cond { + color: #990000; +} + +.choice +{ + background-color:#F7F9D0; +} +.seq +{ + background-color:#C9DECB; +} +.group1 +{ + background-color:#F8F1F1; +} +.group2 +{ + background-color:#DCEDEA; +} + + +ul ul { + list-style-type: disc; +} + +ul ul ul { + list-style-type: disc; +} + +ul.hierarchy { + color: green; +} + +em { + color: #000000; + font-style:italic; +} + + + +/* CMSIS Tables */ +table.cmtab1 { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; + text-align: justify; + width:70%; +} + +th.cmtab1 { + background: #EBEFF6; + font-weight: bold; + height: 28px; +} + +td.cmtab1 { + padding:1px; + text-align: left; +} + +table.cmtable { + border-collapse:collapse; + text-align: justify; +} + +table.cmtable td, table.cmtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.cmtable th { + background-color: #EBEFF6; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; +} + +td.MonoTxt { + font-family:"Arial monospaced for SAP"; +} + +td.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.h2 +{ + font-size: 120%; + font-weight: bold; +} + + + +/* @group Heading Levels */ + +h1 { + font-size: 150%; +} + +.title { + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2 { + font-size: 120%; +} + +h3 { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd, p.starttd { + margin-top: 2px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3A568E; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4464A5; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9AAED5; + color: #ffffff; + border: 1px double #849CCC; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C3CFE6; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; +} + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C3CFE6; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C3CFE6; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EDF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9AAED5; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A2B4D8; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4769AD; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memItemLeft, .memItemRight, .memTemplParams { + border-top: 1px solid #C3CFE6; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4464A5; + white-space: nowrap; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4464A5; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 0px 6px 0px; + color: #233456; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #708CC4; + border-top:1px solid #5072B7; + border-left:1px solid #5072B7; + border-right:1px solid #C3CFE6; + border-bottom:1px solid #C3CFE6; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3A568E; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #293C63; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2B4069; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #EBEFF6; + color: #000000; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A7B8DA; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A7B8DA; + border-bottom: 1px solid #A7B8DA; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A7B8DA; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + font-size: 90%; + color: #233456; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A7B8DA; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + height:30px; + line-height:30px; + color:#889FCE; + border:solid 1px #C1CDE5; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#344D7E; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; +} + +.navpath li.navelem a:hover +{ + color:#6583BF; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#344D7E; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + margin-left: 5px; + font-size: 8pt; + padding-left: 5px; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C3CFE6; +} + +div.headertitle +{ + padding: 5px 5px 5px 7px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5072B7; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #8EA4D0; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#314877; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D7DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4464A5; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/Documentation/Core/html/core_revision_history.html b/Documentation/Core/html/core_revision_history.html new file mode 100644 index 0000000..cf554d5 --- /dev/null +++ b/Documentation/Core/html/core_revision_history.html @@ -0,0 +1,206 @@ + + + + + +Revision History of CMSIS-CORE +CMSIS-CORE: Revision History of CMSIS-CORE + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Revision History of CMSIS-CORE
+
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Version Description
V4.30 Corrected: DoxyGen function parameter comments.
+ Corrected: IAR toolchain: removed for NVIC_SystemReset the attribute(noreturn).
+ Corrected: GCC toolchain: supressed irrelevant compiler warnings.
+ Added: Support files for ARM Compiler v6 (cmsis_armcc_v6.h).
V4.20 Corrected: MISRA-C:2004 violations.
+ Corrected: predefined macro for TI CCS Compiler.
+ Corrected: function __SHADD16 in arm_math.h.
+ Updated: cache functions for Cortex-M7.
+ Added: macros _VAL2FLD, _FLD2VAL to core_*.h.
+ Updated: functions __QASX, __QSAX, __SHASX, __SHSAX.
+ Corrected: potential bug in function __SHADD16.
V4.10 Corrected: MISRA-C:2004 violations.
+ Corrected: intrinsic functions __DSB, __DMB, __ISB.
+ Corrected: register definitions for ITCMCR register.
+ Corrected: register definitions for CONTROL_Type register.
+ Added: functions SCB_GetFPUType, SCB_InvalidateDCache_by_Addr to core_cm7.h.
+ Added: register definitions for APSR_Type, IPSR_Type, xPSR_Type register.
+ Added: __set_BASEPRI_MAX function to core_cmFunc.h.
+ Added: intrinsic functions __RBIT, __CLZ for Cortex-M0/CortexM0+.
+
V4.00 Added: Cortex-M7 support.
+ Added: intrinsic functions for __RRX, __LDRBT, __LDRHT, __LDRT, __STRBT, __STRHT, and __STRT
+
V3.40 Corrected: C++ include guard settings.
+
V3.30 Added: COSMIC tool chain support.
+ Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4.
+ Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4.
+ Corrected: GCC/CLang warnings.
+
V3.20 Added: __BKPT instruction intrinsic.
+ Added: __SMMLA instruction intrinsic for Cortex-M4.
+ Corrected: ITM_SendChar.
+ Corrected: __enable_irq, __disable_irq and inline assembly for GCC Compiler.
+ Corrected: NVIC_GetPriority and VTOR_TBLOFF for Cortex-M0/M0+, SC000. Corrected: rework of in-line assembly functions to remove potential compiler warnings.
+
V3.01 Added support for Cortex-M0+ processor.
+
V3.00 Added support for GNU GCC ARM Embedded Compiler.
+ Added function __ROR.
+ Added Register Mapping for TPIU, DWT.
+ Added support for SC000 and SC300 processors.
+ Corrected ITM_SendChar function.
+ Corrected the functions __STREXB, __STREXH, __STREXW for the GNU GCC compiler section.
+ Documentation restructured.
V2.10 Updated documentation.
+ Updated CMSIS core include files.
+ Changed CMSIS/Device folder structure.
+ Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library.
+ Reworked CMSIS DSP library examples.
V2.00 Added support for Cortex-M4 processor.
V1.30 Reworked Startup Concept.
+ Added additional Debug Functionality.
+ Changed folder structure.
+ Added doxygen comments.
+ Added definitions for bit.
V1.01 Added support for Cortex-M0 processor.
V1.01 Added intrinsic functions for __LDREXB, __LDREXH, __LDREXW, __STREXB, __STREXH, __STREXW, and __CLREX
V1.00 Initial Release for Cortex-M3 processor.
+
+
+ + + + diff --git a/Documentation/Core/html/device_h_pg.html b/Documentation/Core/html/device_h_pg.html new file mode 100644 index 0000000..0d6f05d --- /dev/null +++ b/Documentation/Core/html/device_h_pg.html @@ -0,0 +1,570 @@ + + + + + +Device Header File <device.h> +CMSIS-CORE: Device Header File <device.h> + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Device Header File <device.h>
+
+
+

The Device Header File <device.h> contains the following sections that are device specific:

+
    +
  • Interrupt Number Definition provides interrupt numbers (IRQn) for all exceptions and interrupts of the device.
    • +
  • Configuration of the Processor and Core Peripherals reflect the features of the device.
    • +
  • Device Peripheral Access Layer provides definitions for the Peripheral Access to all device peripherals. It contains all data structures and the address mapping for device-specific peripherals.
    • +
  • Access Functions for Peripherals (optional) provide additional helper functions for peripherals that are useful for programming of these peripherals. Access Functions may be provided as inline functions or can be extern references to a device-specific library provided by the silicon vendor.
    • +
+

Reference describes the standard features and functions of the Device Header File <device.h> in detail.

+

+Interrupt Number Definition

+

Device Header File <device.h> contains the enumeration IRQn_Type that defines all exceptions and interrupts of the device.

+
    +
  • Negative IRQn values represent processor core exceptions (internal interrupts).
    • +
  • Positive IRQn values represent device-specific exceptions (external interrupts). The first device-specific interrupt has the IRQn value 0. The IRQn values needs extension to reflect the device-specific interrupt vector table in the Startup File startup_<device>.s.
    • +
+

Example:

+

The following example shows the extension of the interrupt vector table for the LPC1100 device family.

+
typedef enum IRQn
+
{
+
/****** Cortex-M0 Processor Exceptions Numbers ***************************************************/
+
NonMaskableInt_IRQn = -14,
+
HardFault_IRQn = -13,
+
SVCall_IRQn = -5,
+
PendSV_IRQn = -2,
+
SysTick_IRQn = -1,
+
/****** LPC11xx/LPC11Cxx Specific Interrupt Numbers **********************************************/
+
WAKEUP0_IRQn = 0,
+
WAKEUP1_IRQn = 1,
+
WAKEUP2_IRQn = 2,
+
: :
+
: :
+
EINT1_IRQn = 30,
+
EINT0_IRQn = 31,
+
} IRQn_Type;
+

+Configuration of the Processor and Core Peripherals

+

The Device Header File <device.h> configures the Cortex-M or SecurCore processor and the core peripherals with #defines that are set prior to including the file core_<cpu>.h.

+

The following tables list the #defines along with the possible values for each processor core. If these #defines are missing default values are used.

+

core_cm0.h

+ + + + + + + + + +
#define Value Range Default Description
__CM0_REV 0x0000 0x0000 Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS 2 2 Number of priority bits implemented in the NVIC (device specific)
__Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
+

core_cm0plus.h

+ + + + + + + + + +
#define Value Range Default Description
__CM0PLUS_REV 0x0000 0x0000 Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS 2 2 Number of priority bits implemented in the NVIC (device specific)
__Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
+

core_cm3.h

+ + + + + + + + + + + +
#define Value Range Default Description
__CM3_REV 0x0101 | 0x0200 0x0200 Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS 2 .. 8 4 Number of priority bits implemented in the NVIC (device specific)
__MPU_PRESENT 0 .. 1 0 Defines if a MPU is present or not
__Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
+

core_cm4.h

+ + + + + + + + + + + + + +
#define Value Range Default Description
__CM4_REV 0x0000 0x0000 Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS 2 .. 8 4 Number of priority bits implemented in the NVIC (device specific)
__MPU_PRESENT 0 .. 1 0 Defines if a MPU is present or not
__FPU_PRESENT 0 .. 1 0 Defines if a FPU is present or not
__Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
+

core_cm7.h

+ + + + + + + + + + + + + + + + + + + + + +
#define Value Range Default Description
__CM7_REV 0x0000 0x0000 Core revision number ([15:8] revision number, [7:0] patch number)
__MPU_PRESENT 0 .. 1 0 Defines if a MPU is present or not
__NVIC_PRIO_BITS 2 .. 8 4 Number of priority bits implemented in the NVIC (device specific)
__Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
__FPU_PRESENT 0 .. 1 0 Defines if a FPU is present or not. See __FPU_DP description below.
__FPU_DP 0 .. 1 0 The combination of the defines __FPU_PRESENT and __FPU_DP determine the whether the FPU is with single or double precision as shown in the table below.
+
+ + + + + + + + + +
__FPU_PRESENT __FPU_DP Description
0 ignored Processor has no FPU. The value set for __FPU_DP has no influence.
1 0 Processor with FPU with single precision. The file ARMCM7_SP.h has preconfigured settings for this combination.
1 1 Processor with FPU with double precision. The file ARMCM7_DP.h has preconfigured settings for this combination.
+
__ICACHE_PRESENT 0 .. 1 1 Instruction Chache present or not
__DCACHE_PRESENT 0 .. 1 1 Data Chache present or not
__DTCM_PRESENT 0 .. 1 1

Data Tightly Coupled Memory is present or not

+

+
+

core_sc000.h

+ + + + + + + + + + + +
#define Value Range Default Description
__SC000_REV 0x0000 0x0000 Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS 2 2 Number of priority bits implemented in the NVIC (device specific)
__MPU_PRESENT 0 .. 1 0 Defines if a MPU is present or not
__Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
+

core_sc300.h

+ + + + + + + + + + + +
#define Value Range Default Description
__SC300_REV 0x0000 0x0000 Core revision number ([15:8] revision number, [7:0] patch number)
__NVIC_PRIO_BITS 2 .. 8 4 Number of priority bits implemented in the NVIC (device specific)
__MPU_PRESENT 0 .. 1 0 Defines if a MPU is present or not
__Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
+

Example

+

The following code exemplifies the configuration of the Cortex-M4 Processor and Core Peripherals.

+
#define __CM4_REV 0x0001 /* Core revision r0p1 */
+
#define __MPU_PRESENT 1 /* MPU present or not */
+
#define __NVIC_PRIO_BITS 3 /* Number of Bits used for Priority Levels */
+
#define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */
+
#define __FPU_PRESENT 1 /* FPU present or not */
+
.
+
.
+
#include <core_cm4.h> /* Cortex-M4 processor and core peripherals */
+

+CMSIS Version and Processor Information

+

Defines in the core_cpu.h file identify the version of the CMSIS-CORE and the processor used. The following shows the defines in the various core_cpu.h files that may be used in the Device Header File <device.h> to verify a minimum version or ensure that the right processor core is used.

+

core_cm0.h

+
#define __CM0_CMSIS_VERSION_MAIN (0x03) /* [31:16] CMSIS HAL main version */
+
#define __CM0_CMSIS_VERSION_SUB (0x00) /* [15:0] CMSIS HAL sub version */
+
#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16) | \
+
__CM0_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
+
...
+
#define __CORTEX_M (0x00) /* Cortex-M Core */
+

core_cm0plus.h

+
#define __CM0PLUS_CMSIS_VERSION_MAIN (0x03) /* [31:16] CMSIS HAL main version */
+
#define __CM0PLUS_CMSIS_VERSION_SUB (0x00) /* [15:0] CMSIS HAL sub version */
+
#define __CM0PLUS_CMSIS_VERSION ((__CM0P_CMSIS_VERSION_MAIN << 16) | \
+
__CM0P_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
+
...
+
#define __CORTEX_M (0x00) /* Cortex-M Core */
+

core_cm3.h

+
#define __CM3_CMSIS_VERSION_MAIN (0x03) /* [31:16] CMSIS HAL main version */
+
#define __CM3_CMSIS_VERSION_SUB (0x00) /* [15:0] CMSIS HAL sub version */
+
#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | \
+
__CM3_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
+
...
+
#define __CORTEX_M (0x03) /* Cortex-M Core */
+

core_cm4.h

+
#define __CM4_CMSIS_VERSION_MAIN (0x04) /* [31:16] CMSIS HAL main version */
+
#define __CM4_CMSIS_VERSION_SUB (0x00) /* [15:0] CMSIS HAL sub version */
+
#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16) | \
+
__CM4_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
+
...
+
#define __CORTEX_M (0x04) /* Cortex-M Core */
+

core_cm7.h

+
#define __CM7_CMSIS_VERSION_MAIN (0x04)
+
#define __CM7_CMSIS_VERSION_SUB (0x00)
+
#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16) | \
+
__CM7_CMSIS_VERSION_SUB )
+
#define __CORTEX_M (0x07)
+

core_sc000.h

+
#define __SC000_CMSIS_VERSION_MAIN (0x04) /* [31:16] CMSIS HAL main version */
+
#define __SC000_CMSIS_VERSION_SUB (0x00) /* [15:0] CMSIS HAL sub version */
+
#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16) | \
+
__SC000_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
+
...
+
#define __CORTEX_SC (000) /* Cortex secure core */
+

core_sc300.h

+
#define __SC300_CMSIS_VERSION_MAIN (0x04) /* [31:16] CMSIS HAL main version */
+
#define __SC300_CMSIS_VERSION_SUB (0x00) /* [15:0] CMSIS HAL sub version */
+
#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16) | \
+
__SC300_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
+
...
+
#define __CORTEX_SC (300) /* Cortex secure core */
+

+Device Peripheral Access Layer

+

The Device Header File <device.h> contains for each peripheral:

+
    +
  • Register Layout Typedef
    • +
  • Base Address
    • +
  • Access Definitions
    • +
+

The section Peripheral Access shows examples for peripheral definitions.

+

+Device.h Template File

+

The silicon vendor needs to extend the Device.h template file with the CMSIS features described above. In addition the Device Header File <device.h> may contain functions to access device-specific peripherals. The system_Device.h Template File which is provided as part of the CMSIS specification is shown below.

+
/**************************************************************************//**
+ * @file     <Device>.h
+ * @brief    CMSIS Cortex-M# Core Peripheral Access Layer Header File for
+ *           Device <Device>
+ * @version  V3.10
+ * @date     23. November 2012
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2012 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef <Device>_H      /* ToDo: replace '<Device>' with your device name */
+#define <Device>_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* ToDo: replace '<Device>' with your device name; add your doxyGen comment   */
+/** @addtogroup <Device>_Definitions <Device> Definitions
+  This file defines all structures and symbols for <Device>:
+    - registers and bitfields
+    - peripheral base address
+    - peripheral ID
+    - Peripheral definitions
+  @{
+*/
+
+
+/******************************************************************************/
+/*                Processor and Core Peripherals                              */
+/******************************************************************************/
+/** @addtogroup <Device>_CMSIS Device CMSIS Definitions
+  Configuration of the Cortex-M# Processor and Core Peripherals
+  @{
+*/
+
+/*
+ * ==========================================================================
+ * ---------- Interrupt Number Definition -----------------------------------
+ * ==========================================================================
+ */
+
+typedef enum IRQn
+{
+/******  Cortex-M# Processor Exceptions Numbers ***************************************************/
+
+/* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M0 device                   */
+  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt                        */
+  HardFault_IRQn                = -13,      /*!<  3 Hard Fault Interrupt                          */
+  SVCall_IRQn                   = -5,       /*!< 11 SV Call Interrupt                             */
+  PendSV_IRQn                   = -2,       /*!< 14 Pend SV Interrupt                             */
+  SysTick_IRQn                  = -1,       /*!< 15 System Tick Interrupt                         */
+
+/* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M3 / Cortex-M4 device       */
+  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt                        */
+  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt                   */
+  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt                           */
+  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt                         */
+  SVCall_IRQn                   = -5,       /*!< 11 SV Call Interrupt                             */
+  DebugMonitor_IRQn             = -4,       /*!< 12 Debug Monitor Interrupt                       */
+  PendSV_IRQn                   = -2,       /*!< 14 Pend SV Interrupt                             */
+  SysTick_IRQn                  = -1,       /*!< 15 System Tick Interrupt                         */
+
+/******  Device Specific Interrupt Numbers ********************************************************/
+/* ToDo: add here your device specific external interrupt numbers
+         according the interrupt handlers defined in startup_Device.s
+         eg.: Interrupt for Timer#1       TIM1_IRQHandler   ->   TIM1_IRQn                        */
+  <DeviceInterrupt>_IRQn        = 0,        /*!< Device Interrupt                                 */
+} IRQn_Type;
+
+
+/*
+ * ==========================================================================
+ * ----------- Processor and Core Peripheral Section ------------------------
+ * ==========================================================================
+ */
+
+/* Configuration of the Cortex-M# Processor and Core Peripherals */
+/* ToDo: set the defines according your Device                                                    */
+/* ToDo: define the correct core revision
+         __CM0_REV if your device is a CORTEX-M0 device
+         __CM3_REV if your device is a CORTEX-M3 device
+         __CM4_REV if your device is a CORTEX-M4 device                                           */
+#define __CM#_REV                 0x0201    /*!< Core Revision r2p1                               */
+#define __NVIC_PRIO_BITS          2         /*!< Number of Bits used for Priority Levels          */
+#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used     */
+#define __MPU_PRESENT             0         /*!< MPU present or not                               */
+/* ToDo: define __FPU_PRESENT if your devise is a CORTEX-M4                                       */
+#define __FPU_PRESENT             0        /*!< FPU present or not                                */
+
+/*@}*/ /* end of group <Device>_CMSIS */
+
+
+/* ToDo: include the correct core_cm#.h file
+         core_cm0.h if your device is a CORTEX-M0 device
+         core_cm3.h if your device is a CORTEX-M3 device
+         core_cm4.h if your device is a CORTEX-M4 device                                          */
+#include <core_cm#.h>                       /* Cortex-M# processor and core peripherals           */
+/* ToDo: include your system_<Device>.h file
+         replace '<Device>' with your device name                                                 */
+#include "system_<Device>.h"                /* <Device> System  include file                      */
+
+
+/******************************************************************************/
+/*                Device Specific Peripheral registers structures             */
+/******************************************************************************/
+/** @addtogroup <Device>_Peripherals <Device> Peripherals
+  <Device> Device Specific Peripheral registers structures
+  @{
+*/
+
+#if defined ( __CC_ARM   )
+#pragma anon_unions
+#endif
+
+/* ToDo: add here your device specific peripheral access structure typedefs
+         following is an example for a timer                                  */
+
+/*------------- 16-bit Timer/Event Counter (TMR) -----------------------------*/
+/** @addtogroup <Device>_TMR <Device> 16-bit Timer/Event Counter (TMR)
+  @{
+*/
+typedef struct
+{
+  __IO uint32_t EN;                         /*!< Offset: 0x0000   Timer Enable Register           */
+  __IO uint32_t RUN;                        /*!< Offset: 0x0004   Timer RUN Register              */
+  __IO uint32_t CR;                         /*!< Offset: 0x0008   Timer Control Register          */
+  __IO uint32_t MOD;                        /*!< Offset: 0x000C   Timer Mode Register             */
+       uint32_t RESERVED0[1];
+  __IO uint32_t ST;                         /*!< Offset: 0x0014   Timer Status Register           */
+  __IO uint32_t IM;                         /*!< Offset: 0x0018   Interrupt Mask Register         */
+  __IO uint32_t UC;                         /*!< Offset: 0x001C   Timer Up Counter Register       */
+  __IO uint32_t RG0                         /*!< Offset: 0x0020   Timer Register                  */
+       uint32_t RESERVED1[2];
+  __IO uint32_t CP;                         /*!< Offset: 0x002C   Capture register                */
+} <DeviceAbbreviation>_TMR_TypeDef;
+/*@}*/ /* end of group <Device>_TMR */
+
+
+#if defined ( __CC_ARM   )
+#pragma no_anon_unions
+#endif
+
+/*@}*/ /* end of group <Device>_Peripherals */
+
+
+/******************************************************************************/
+/*                         Peripheral memory map                              */
+/******************************************************************************/
+/* ToDo: add here your device peripherals base addresses
+         following is an example for timer                                    */
+/** @addtogroup <Device>_MemoryMap <Device> Memory Mapping
+  @{
+*/
+
+/* Peripheral and SRAM base address */
+#define <DeviceAbbreviation>_FLASH_BASE       (0x00000000UL)                              /*!< (FLASH     ) Base Address */
+#define <DeviceAbbreviation>_SRAM_BASE        (0x20000000UL)                              /*!< (SRAM      ) Base Address */
+#define <DeviceAbbreviation>_PERIPH_BASE      (0x40000000UL)                              /*!< (Peripheral) Base Address */
+
+/* Peripheral memory map */
+#define <DeviceAbbreviation>TIM0_BASE         (<DeviceAbbreviation>_PERIPH_BASE)          /*!< (Timer0    ) Base Address */
+#define <DeviceAbbreviation>TIM1_BASE         (<DeviceAbbreviation>_PERIPH_BASE + 0x0800) /*!< (Timer1    ) Base Address */
+#define <DeviceAbbreviation>TIM2_BASE         (<DeviceAbbreviation>_PERIPH_BASE + 0x1000) /*!< (Timer2    ) Base Address */
+/*@}*/ /* end of group <Device>_MemoryMap */
+
+
+/******************************************************************************/
+/*                         Peripheral declaration                             */
+/******************************************************************************/
+/* ToDo: add here your device peripherals pointer definitions
+         following is an example for timer                                    */
+
+/** @addtogroup <Device>_PeripheralDecl <Device> Peripheral Declaration
+  @{
+*/
+
+#define <DeviceAbbreviation>_TIM0        ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE)
+#define <DeviceAbbreviation>_TIM1        ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE)
+#define <DeviceAbbreviation>_TIM2        ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE)
+/*@}*/ /* end of group <Device>_PeripheralDecl */
+
+/*@}*/ /* end of group <Device>_Definitions */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* <Device>_H */
+
+
+ + + + diff --git a/Documentation/Core/html/doxygen.css b/Documentation/Core/html/doxygen.css new file mode 100644 index 0000000..0fa08d5 --- /dev/null +++ b/Documentation/Core/html/doxygen.css @@ -0,0 +1,1172 @@ +/* The standard CSS for doxygen */ + +body, table, div, p, dl { + font: 400 14px/19px Roboto,sans-serif; +} + +/* @group Heading Levels */ + +h1.groupheader { + font-size: 150%; +} + +.title { + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2.groupheader { + border-bottom: 1px solid #859DCD; + color: #334C7D; + font-size: 150%; + font-weight: normal; + margin-top: 1.75em; + padding-top: 8px; + padding-bottom: 4px; + width: 100%; +} + +h3.groupheader { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd, p.starttd { + margin-top: 2px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3A568E; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4464A5; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9AAED5; + color: #ffffff; + border: 1px double #849CCC; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C3CFE6; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + min-height: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C3CFE6; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C3CFE6; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EDF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9AAED5; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A2B4D8; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4769AD; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td, .fieldtable tr { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow, .fieldtable tr.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4464A5; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4464A5; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 0px 6px 0px; + color: #233456; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #708CC4; + border-top:1px solid #5072B7; + border-left:1px solid #5072B7; + border-right:1px solid #C3CFE6; + border-bottom:1px solid #C3CFE6; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3A568E; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #293C63; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2B4069; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #354E81; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A7B8DA; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A7B8DA; + border-bottom: 1px solid #A7B8DA; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A7B8DA; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + font-size: 90%; + color: #233456; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A7B8DA; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#889FCE; + border:solid 1px #C1CDE5; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#344D7E; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #27395E; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); 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+Functions
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Core Register Access
+
+
+ +

Functions to access the Cortex-M core registers. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

uint32_t __get_CONTROL (void)
 Read the CONTROL register.
 
void __set_CONTROL (uint32_t control)
 Set the CONTROL Register.
 
uint32_t __get_IPSR (void)
 Read the IPSR register.
 
uint32_t __get_APSR (void)
 Read the APSR register.
 
uint32_t __get_xPSR (void)
 Read the xPSR register.
 
uint32_t __get_PSP (void)
 Read the PSP register.
 
void __set_PSP (uint32_t topOfProcStack)
 Set the PSP register.
 
uint32_t __get_MSP (void)
 Read the MSP register.
 
void __set_MSP (uint32_t topOfMainStack)
 Set the MSP register.
 
uint32_t __get_PRIMASK (void)
 Read the PRIMASK register bit.
 
void __set_PRIMASK (uint32_t priMask)
 Set the Priority Mask bit.
 
uint32_t __get_BASEPRI (void)
 Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].
 
void __set_BASEPRI (uint32_t basePri)
 Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].
 
void __set_BASEPRI_MAX (uint32_t basePri)
 Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __get_FAULTMASK (void)
 Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].
 
void __set_FAULTMASK (uint32_t faultMask)
 Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __get_FPSCR (void)
 Read the FPSCR register [only Cortex-M4 and Cortex-M7].
 
void __set_FPSCR (uint32_t fpscr)
 Set the FPSC register [only for Cortex-M4 and Cortex-M7].
 
void __enable_irq (void)
 Globally enables interrupts and configurable fault handlers.
 
void __disable_irq (void)
 Globally disables interrupts and configurable fault handlers.
 
void __enable_fault_irq (void)
 Enables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000].
 
void __disable_fault_irq (void)
 Disables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000].
 
+

Description

+

The following functions provide access to Cortex-M core registers.

+

Function Documentation

+ +
+
+ + + + + + + + +
void __disable_fault_irq (void )
+
+

The function disables interrupts and all fault handlers by setting FAULTMASK. The function uses the instruction CPSID f.

+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • Can be executed in privileged mode only.
    • +
  • An interrupt can enter pending state even if it is disabled. Disabling an interrupt only prevents the processor from taking that interrupt.
    • +
+
+
See Also
+
+ +
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+ +
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+ + + + + + + + +
void __disable_irq (void )
+
+

The function disables interrupts and all configurable fault handlers by setting PRIMASK. The function uses the instruction CPSID i.

+
Remarks
    +
  • Can be executed in privileged mode only.
    • +
  • An interrupt can enter pending state even if it is disabled. Disabling an interrupt only prevents the processor from taking that interrupt.
    • +
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+
See Also
+
+ +
+
+ +
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+ + + + + + + + +
void __enable_fault_irq (void )
+
+

The function enables interrupts and all fault handlers by clearing FAULTMASK. The function uses the instruction CPSIE f.

+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • Can be executed in privileged mode only.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __enable_irq (void )
+
+

The function enables interrupts and all configurable fault handlers by clearing PRIMASK. The function uses the instruction CPSIE i.

+
Remarks
    +
  • Can be executed in privileged mode only.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_APSR (void )
+
+

The function reads the Application Program Status Register (APSR) using the instruction MRS.
+
+ The APSR contains the current state of the condition flags from instructions executed previously. The APSR is essential for controlling conditional branches. The following flags are used:

+
    +
  • N (APSR[31]) (Negative flag)
      +
    • =1 The instruction result has a negative value (when interpreted as signed integer).
      • +
    • =0 The instruction result has a positive value or equal zero.
      +
      +
      • +
    +
    • +
  • Z (APSR[30]) (Zero flag)
      +
    • =1 The instruction result is zero. Or, after a compare instruction, when the two values are the same.
      +
      +
      • +
    +
    • +
  • C (APSR[29]) (Carry or borrow flag)
      +
    • =1 For unsigned additions, if an unsigned overflow occurred.
      • +
    • =inverse of borrow output status For unsigned subtract operations.
      +
      +
      • +
    +
    • +
  • V (APSR[28]) (Overflow flag)
      +
    • =1 A signed overflow occurred (for signed additions or subtractions).
      +
      +
      • +
    +
    • +
  • Q (APSR[27]) (DSP overflow or saturation flag) [not Cortex-M0]
      +
    • This flag is a sticky flag. Saturating and certain mutliplying instructions can set the flag, but cannot clear it.
      • +
    • =1 When saturation or an overflow occurred.
      +
      +
      • +
    +
    • +
  • GE (APSR[19:16]) (Greater than or Equal flags) [not Cortex-M0]
      +
    • Can be set by the parallel add and subtract instructions.
      • +
    • Are used by the SEL instruction to perform byte-based selection from two registers.
      • +
    +
    • +
+
Returns
APSR register value
+
Remarks
    +
  • Some instructions update all flags; some instructions update a subset of the flags.
    • +
  • If a flag is not updated, the original value is preserved.
    • +
  • Conditional instructions that are not executed have no effect on the flags.
    • +
  • The CMSIS does not provide a function to update this register.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_BASEPRI (void )
+
+

The function returns the Base Priority Mask register (BASEPRI) using the instruction MRS.
+
+ BASEPRI defines the minimum priority for exception processing. When BASEPRI is set to a non-zero value, it prevents the activation of all exceptions with the same or lower priority level as the BASEPRI value.

+
Returns
BASEPRI register value
+
Remarks
    +
  • Not for Cortex-M0, Cortex-M0+, or SC000.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_CONTROL (void )
+
+

The function reads the CONTROL register value using the instruction MRS.
+
+ The CONTROL register controls the stack used and the privilege level for software execution when the processor is in thread mode and, if implemented, indicates whether the FPU state is active. This register uses the following bits:
+

+
    +
  • CONTROL[2] [only Cortex-M4 and Cortex-M7]
      +
    • =0 FPU not active
      • +
    • =1 FPU active
      +
      +
      • +
    +
    • +
  • CONTROL[1]
      +
    • =0 In handler mode - MSP is selected. No alternate stack possible for handler mode.
      • +
    • =0 In thread mode - Default stack pointer MSP is used.
      • +
    • =1 In thread mode - Alternate stack pointer PSP is used.
      +
      +
      • +
    +
    • +
  • CONTROL[0] [not Cortex-M0]
      +
    • =0 In thread mode and privileged state.
      • +
    • =1 In thread mode and user state.
      • +
    +
    • +
+
Returns
CONTROL register value
+
Remarks
    +
  • The processor can be in user state or privileged state when running in thread mode.
    • +
  • Exception handlers always run in privileged state.
    • +
  • On reset, the processor is in thread mode with privileged access rights.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_FAULTMASK (void )
+
+

The function reads the Fault Mask register (FAULTMASK) value using the instruction MRS.
+
+ FAULTMASK prevents activation of all exceptions except for the Non-Maskable Interrupt (NMI).

+
Returns
FAULTMASK register value
+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • Is cleared automatically upon exiting the exception handler, except when returning from the NMI handler.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_FPSCR (void )
+
+

The function reads the Floating-Point Status Control Register (FPSCR) value.
+
+ FPSCR provides all necessary User level controls of the floating-point system.

+
Returns
    +
  • FPSCR register value, when __FPU_PRESENT=1
    • +
  • =0, when __FPU_PRESENT=0
    • +
+
+
Remarks
    +
  • Only for Cortex-M4 and Cortex-M7.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_IPSR (void )
+
+

The function reads the Interrupt Program Status Register (IPSR) using the instruction MRS.
+
+ The ISPR contains the exception type number of the current Interrupt Service Routine (ISR). Each exception has an assocciated unique IRQn number. The following bits are used:

+
    +
  • ISR_NUMBER (IPSR[8:0])
      +
    • =0 Thread mode
      • +
    • =1 Reserved
      • +
    • =2 NMI
      • +
    • =3 HardFault
      • +
    • =4 MemManage
      • +
    • =5 BusFault
      • +
    • =6 UsageFault
      • +
    • =7-10 Reserved
      • +
    • =11 SVCall
      • +
    • =12 Reserved for Debug
      • +
    • =13 Reserved
      • +
    • =14 PendSV
      • +
    • =15 SysTick
      • +
    • =16 IRQ0
      • +
    • ...
      • +
    • =n+15 IRQ(n-1)
      • +
    +
    • +
+
Returns
ISPR register value
+
Remarks
    +
  • This register is read-only.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_MSP (void )
+
+

The function reads the Main Status Pointer (MSP) value using the instruction MRS.
+
+ Physically two different stack pointers (SP) exist:

+
    +
  • The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).
    • +
  • The Process Stack Pointer (PSP), which can be used only in thread mode.
    • +
+

Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:

+
    +
  • =0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.
    • +
  • =1 PSP is the current stack pointer. The initial value is undefined.
    • +
+
Returns
MSP Register value
+
Remarks
    +
  • Only one of the two SPs is visible at a time.
    • +
  • For many applications, the system can completely rely on the MSP.
    • +
  • The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_PRIMASK (void )
+
+

The function reads the Priority Mask register (PRIMASK) value using the instruction MRS.
+
+ PRIMASK is a 1-bit-wide interrupt mask register. When set, it blocks all interrupts apart from the non-maskable interrupt (NMI) and the hard fault exception. The PRIMASK prevents activation of all exceptions with configurable priority.

+
Returns
PRIMASK register value
    +
  • =0 no effect
    • +
  • =1 prevents the activation of all exceptions with configurable priority
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_PSP (void )
+
+

The function reads the Program Status Pointer (PSP) value using the instruction MRS.
+
+ Physically two different stack pointers (SP) exist:

+
    +
  • The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).
    • +
  • The Process Stack Pointer (PSP), which can be used only in thread mode.
    • +
+

Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:

+
    +
  • =0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.
    • +
  • =1 PSP is the current stack pointer. The initial value is undefined.
    • +
+
Returns
PSP register value
+
Remarks
    +
  • Only one of the two SPs is visible at a time.
    • +
  • For many applications, the system can completely rely on the MSP.
    • +
  • The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __get_xPSR (void )
+
+

The function reads the combined Program Status Register (xPSR) using the instruction MRS.
+
+ xPSR provides information about program execution and the APSR flags. It consists of the following PSRs:

+
    +
  • Application Program Status Register (APSR)
    • +
  • Interrupt Program Status Register (IPSR)
    • +
  • Execution Program Status Register (EPSR)
    • +
+

In addition to the flags described in __get_APSR and __get_IPSR, the register provides the following flags:

+
    +
  • IT (xPSR[26:25]) (If-Then condition instruction)
      +
    • Contains up to four instructions following an IT instruction.
      • +
    • Each instruction in the block is conditional.
      • +
    • The conditions for the instructions are either all the same, or some can be the inverse of others.
      +
      +
      • +
    +
    • +
  • T (xPSR[24]) (Thumb bit)
      +
    • =1 Indicates that that the processor is in Thumb state.
      • +
    • =0 Attempting to execute instructions when the T bit is 0 results in a fault or lockup.
      • +
    • The conditions for the instructions are either all the same, or some can be the inverse of others.
      • +
    +
    • +
+
Returns
xPSR register value
+
Remarks
    +
  • The CMSIS does not provide functions that access EPSR.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_BASEPRI (uint32_t basePri)
+
+

The function sets the Base Priority Mask register (BASEPRI) value using the instruction MSR.
+
+ BASEPRI defines the minimum priority for exception processing. When BASEPRI is set to a non-zero value, it prevents the activation of all exceptions with the same or lower priority level as the BASEPRI value.

+
Parameters
+ + +
[in]basePriBASEPRI value to set
+
+
+
Remarks
    +
  • Not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • Cannot be set in user state.
    • +
  • Useful for changing the masking level or disabling the masking.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_BASEPRI_MAX (uint32_t basePri)
+
+

The function only increases the Base Priority Mask register (BASEPRI) value using the instruction MSR. The value is set only if BASEPRI masking is disabled, or the new value increases the BASEPRI priority level.
+
+ BASEPRI defines the minimum priority for exception processing.

+
Parameters
+ + +
[in]basePriBASEPRI value to set
+
+
+
Remarks
    +
  • Not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • Cannot be set in user state.
    • +
  • Useful for increasing the masking level.
    • +
  • Has no effect when basePri is lower than the current value of BASEPRI.
    • +
  • Use __set_BASEPRI to lower the Base Priority Mask register.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_CONTROL (uint32_t control)
+
+

The function sets the CONTROL register value using the instruction MSR.
+
+ The CONTROL register controls the stack used and the privilege level for software execution when the processor is in thread mode and, if implemented, indicates whether the FPU state is active. This register uses the following bits:
+

+
    +
  • CONTROL[2] [only Cortex-M4 and Cortex-M7]
      +
    • =0 FPU not active
      • +
    • =1 FPU active
      +
      +
      • +
    +
    • +
  • CONTROL[1]
      +
    • Writeable only when the processor is in thread mode and privileged state (CONTROL[0]=0).
      • +
    • =0 In handler mode - MSP is selected. No alternate stack pointer possible for handler mode.
      • +
    • =0 In thread mode - Default stack pointer MSP is used.
      • +
    • =1 In thread mode - Alternate stack pointer PSP is used.
      +
      +
      • +
    +
    • +
  • CONTROL[0] [not writeable for Cortex-M0]
      +
    • Writeable only when the processor is in privileged state.
      • +
    • Can be used to switch the processor to user state (thread mode).
      • +
    • Once in user state, trigger an interrupt and change the state to privileged in the exception handler (the only way).
      • +
    • =0 In thread mode and privileged state.
      • +
    • =1 In thread mode and user state.
      • +
    +
    • +
+
Parameters
+ + +
[in]controlCONTROL register value to set
+
+
+
Remarks
    +
  • The processor can be in user state or privileged state when running in thread mode.
    • +
  • Exception handlers always run in privileged state.
    • +
  • On reset, the processor is in thread mode with privileged access rights.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_FAULTMASK (uint32_t faultMask)
+
+

The function sets the Fault Mask register (FAULTMASK) value using the instruction MSR.
+
+ FAULTMASK prevents activation of all exceptions except for Non-Maskable Interrupt (NMI). FAULTMASK can be used to escalate a configurable fault handler (BusFault, usage fault, or memory management fault) to hard fault level without invoking a hard fault. This allows the fault handler to pretend to be the hard fault handler, whith the ability to:

+
    +
  1. Mask BusFault by setting the BFHFNMIGN in the Configuration Control register. It can be used to test the bus system without causing a lockup.
    2. +
  2. Bypass the MPU, allowing accessing the MPU protected memory location without reprogramming the MPU to just carry out a few transfers for fixing faults.
    3. +
+
Parameters
+ + +
[in]faultMaskFAULTMASK register value to set
+
+
+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • Is cleared automatically upon exiting the exception handler, except when returning from the NMI handler.
    • +
  • When set, it changes the effective current priority level to -1, so that even the hard fault handler is blocked.
    • +
  • Can be used by fault handlers to change their priority to -1 to have access to some features for hard fault exceptions (see above).
    • +
  • When set, lockups can still be caused by incorrect or undefined instructions, or by using SVC in the wrong priority level.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_FPSCR (uint32_t fpscr)
+
+

The function sets the Floating-Point Status Control Register (FPSCR) value.
+
+ FPSCR provides all necessary User level control of the floating-point system.
+

+
    +
  • N (FPSC[31]) (Negative flag)
      +
    • =1 The instruction result has a negative value (when interpreted as signed integer).
      • +
    • =0 The instruction result has a positive value or equal zero.
      +
      +
      • +
    +
    • +
  • Z (FPSC[30]) (Zero flag)
      +
    • =1 The instruction result is zero. Or, after a compare instruction, when the two values are the same.
      +
      +
      • +
    +
    • +
  • C (FPSC[29]) (Carry or borrow flag)
      +
    • =1 For unsigned additions, if an unsigned overflow occurred.
      • +
    • =inverse of borrow output status For unsigned subtract operations.
      +
      +
      • +
    +
    • +
  • V (FPSC[28]) (Overflow flag)
      +
    • =1 A signed overflow occurred (for signed additions or subtractions).
      +
      +
      • +
    +
    • +
  • AHP (FPSC[26]) (Alternative half-precision flag)
      +
    • =1 Alternative half-precision format selected.
      • +
    • =0 IEEE half-precision format selected.
      +
      +
      • +
    +
    • +
  • DN (FPSC[25]) (Default NaN mode control flag)
      +
    • =1 Any operation involving one or more NaNs returns the Default NaN.
      • +
    • =0 NaN operands propagate through to the output of a floating-point operation.
      +
      +
      • +
    +
    • +
  • FZ (FPSC[24]) (Flush-to-zero mode control flag)
      +
    • =1 Flush-to-zero mode enabled.
      • +
    • =0 Flush-to-zero mode disabled. Behavior of the floating-point system is fully compliant with the IEEE 754 standard.
      +
      +
      • +
    +
    • +
  • RMode (FPSC[23:22]) (Rounding Mode control flags)
      +
    • =0b00 Round to Nearest (RN) mode.
      • +
    • =0b01 Round towards Plus Infinity (RP) mode.
      • +
    • =0b10 Round towards Minus Infinity (RM) mode.
      • +
    • =0b11 Round towards Zero (RZ) mode.
      • +
    • The specified rounding mode is used by almost all floating-point instructions.
      +
      +
      • +
    +
    • +
  • IDC (FPSC[7]) (Input Denormal cumulative exception flags)
      +
    • See Cumulative exception bits (FPSC[4:0]).
      +
      +
      • +
    +
    • +
  • IXC (FPSC[4]) (Inexact cumulative exception flag)
      +
    • =1 Exception occurred.
      • +
    • =0 Value has to be set explicitly.
      • +
    • Flag is not cleared automatically.
      +
      +
      • +
    +
    • +
  • UFC (FPSC[3]) (Underflow cumulative exception flag)
      +
    • =1 Exception occurred.
      • +
    • =0 Value has to be set explicitly.
      • +
    • Flag is not cleared automatically.
      +
      +
      • +
    +
    • +
  • OFC (FPSC[2]) (Overflow cumulative exception flag)
      +
    • =1 Exception occurred.
      • +
    • =0 Value has to be set explicitly.
      • +
    • Flag is not cleared automatically.
      +
      +
      • +
    +
    • +
  • DZC (FPSC[1]) (Division by Zero cumulative exception flag)
      +
    • =1 Exception occurred.
      • +
    • =0 Value has to be set explicitly.
      • +
    • Flag is not cleared automatically.
      +
      +
      • +
    +
    • +
  • IOC (FPSC[0]) (Invalid Operation cumulative exception flag)
      +
    • =1 Exception occurred.
      • +
    • =0 Value has to be set explicitly.
      • +
    • Flag is not cleared automatically.
      • +
    +
    • +
+
Parameters
+ + +
[in]fpscrFPSCR value to set
+
+
+
Remarks
    +
  • Only for Cortex-M4 and Cortex-M7.
    • +
  • The variable __FPU_PRESENT has to be set to 1.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_MSP (uint32_t topOfMainStack)
+
+

The function sets the Main Status Pointer (MSP) value using the instruction MSR.
+
+ Physically two different stack pointers (SP) exist:

+
    +
  • The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).
    • +
  • The Process Stack Pointer (PSP), which can be used only in thread mode.
    • +
+

Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:

+
    +
  • =0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.
    • +
  • =1 PSP is the current stack pointer. The initial value is undefined.
    • +
+
Parameters
+ + +
[in]topOfMainStackMSP value to set
+
+
+
Remarks
    +
  • Only one of the two SPs is visible at a time.
    • +
  • For many applications, the system can completely rely on the MSP.
    • +
  • The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_PRIMASK (uint32_t priMask)
+
+

The function sets the Priority Mask register (PRIMASK) value using the instruction MSR.
+
+ PRIMASK is a 1-bit-wide interrupt mask register. When set, it blocks all interrupts apart from the non-maskable interrupt (NMI) and the hard fault exception. The PRIMASK prevents activation of all exceptions with configurable priority.

+
Parameters
+ + +
[in]priMaskPriority Mask
    +
  • =0 no effect
    • +
  • =1 prevents the activation of all exceptions with configurable priority
    • +
+
+
+
+
Remarks
    +
  • When set, PRIMASK effectively changes the current priority level to 0. This is the highest programmable level.
    • +
  • When set and a fault occurs, the hard fault handler will be executed.
    • +
  • Useful for temprorarily disabling all interrupts for timing critical tasks.
    • +
  • Does not have the ability to mask BusFault or bypass MPU.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void __set_PSP (uint32_t topOfProcStack)
+
+

The function sets the Program Status Pointer (PSP) value using the instruction MSR.
+
+ Physically two different stack pointers (SP) exist:

+
    +
  • The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).
    • +
  • The Process Stack Pointer (PSP), which can be used only in thread mode.
    • +
+

Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:

+
    +
  • =0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.
    • +
  • =1 PSP is the current stack pointer. The initial value is undefined.
    • +
+
Parameters
+ + +
[in]topOfProcStackPSP value to set
+
+
+
Remarks
    +
  • Only one of the two SPs is visible at a time.
    • +
  • For many applications, the system can completely rely on the MSP.
    • +
  • The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.
    • +
+
+
See Also
+
+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group___core___register__gr.js b/Documentation/Core/html/group___core___register__gr.js new file mode 100644 index 0000000..9bdcfdb --- /dev/null +++ b/Documentation/Core/html/group___core___register__gr.js @@ -0,0 +1,25 @@ +var group___core___register__gr = +[ + [ "__disable_fault_irq", "group___core___register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939", null ], + [ "__disable_irq", "group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013", null ], + [ "__enable_fault_irq", "group___core___register__gr.html#ga6575d37863cec5d334864f93b5b783bf", null ], + [ "__enable_irq", "group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27", null ], + [ "__get_APSR", "group___core___register__gr.html#ga811c0012221ee918a75111ca84c4d5e7", null ], + [ "__get_BASEPRI", "group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667", null ], + [ "__get_CONTROL", "group___core___register__gr.html#ga963cf236b73219ce78e965deb01b81a7", null ], + [ "__get_FAULTMASK", "group___core___register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8", null ], + [ "__get_FPSCR", "group___core___register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905", null ], + [ "__get_IPSR", "group___core___register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8", null ], + [ "__get_MSP", "group___core___register__gr.html#gab898559392ba027814e5bbb5a98b38d2", null ], + [ "__get_PRIMASK", "group___core___register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02", null ], + [ "__get_PSP", "group___core___register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9", null ], + [ "__get_xPSR", "group___core___register__gr.html#ga732e08184154f44a617963cc65ff95bd", null ], + [ "__set_BASEPRI", "group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882", null ], + [ "__set_BASEPRI_MAX", "group___core___register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9", null ], + [ "__set_CONTROL", "group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c", null ], + [ "__set_FAULTMASK", "group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a", null ], + [ "__set_FPSCR", "group___core___register__gr.html#ga6f26bd75ca7e3247f27b272acc10536b", null ], + [ "__set_MSP", "group___core___register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4", null ], + [ "__set_PRIMASK", "group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f", null ], + [ "__set_PSP", "group___core___register__gr.html#ga48e5853f417e17a8a65080f6a605b743", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group___dcache__functions__m7.html b/Documentation/Core/html/group___dcache__functions__m7.html new file mode 100644 index 0000000..8d2c5bb --- /dev/null +++ b/Documentation/Core/html/group___dcache__functions__m7.html @@ -0,0 +1,356 @@ + + + + + +D-Cache Functions +CMSIS-CORE: D-Cache Functions + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
D-Cache Functions
+
Cache Functions (only Cortex-M7)
+
+ +

Functions for the data cache. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

__STATIC_INLINE void SCB_EnableDCache (void)
 Enable D-Cache.
 
__STATIC_INLINE void SCB_DisableDCache (void)
 Disable D-Cache.
 
__STATIC_INLINE void SCB_InvalidateDCache (void)
 Invalidate D-Cache.
 
__STATIC_INLINE void SCB_CleanDCache (void)
 Clean D-Cache.
 
__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
 Clean & Invalidate D-Cache.
 
__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
 D-Cache Invalidate by address.
 
__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
 D-Cache Clean by address.
 
__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
 D-Cache Clean and Invalidate by address.
 
+

Description

+

// close ICache functions

+

Function Documentation

+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_CleanDCache (void )
+
+

The function cleans the entire data cache.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t * addr,
int32_t dsize 
)
+
+
Parameters
+ + + +
[in]addraddress (aligned to 32-byte boundary)
[in]dsizesize of memory block (in number of bytes)
+
+
+

The function cleans a memory block of size dsize [bytes] starting at address address. The address is aligned to 32-byte boundry.

+ +
+
+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_CleanInvalidateDCache (void )
+
+

The function cleans and invalidates the entire data cache.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t * addr,
int32_t dsize 
)
+
+
Parameters
+ + + +
[in]addraddress (aligned to 32-byte boundary)
[in]dsizesize of memory block (in number of bytes)
+
+
+

The function invalidates and cleans a memory block of size dsize [bytes] starting at address address. The address is aligned to 32-byte boundry.

+ +
+
+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_DisableDCache (void )
+
+

The function turns off the entire data cache.

+
Note
When disabling the data cache, you must clean (SCB_CleanDCache) the entire cache to ensure that any dirty data is flushed to external memory.
+ +
+
+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_EnableDCache (void )
+
+

The function turns on the entire data cache.

+
Note
Before enabling the data cache, you must invalidate the entire data cache (SCB_InvalidateDCache), because external memory might have changed from when the cache was disabled.
+
+After reset, you must invalidate (SCB_InvalidateDCache) each cache before enabling it.
+ +
+
+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_InvalidateDCache (void )
+
+

The function invalidates the entire data cache.

+
Note
After reset, you must invalidate each cache before enabling (SCB_EnableDCache) it.
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t * addr,
int32_t dsize 
)
+
+
Parameters
+ + + +
[in]addraddress (aligned to 32-byte boundary)
[in]dsizesize of memory block (in number of bytes)
+
+
+

The function invalidates a memory block of size dsize [bytes] starting at address address. The address is aligned to 32-byte boundry.

+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group___dcache__functions__m7.js b/Documentation/Core/html/group___dcache__functions__m7.js new file mode 100644 index 0000000..c789ca5 --- /dev/null +++ b/Documentation/Core/html/group___dcache__functions__m7.js @@ -0,0 +1,11 @@ +var group___dcache__functions__m7 = +[ + [ "SCB_CleanDCache", "group___dcache__functions__m7.html#ga55583e3065c6eabca204b8b89b121c4c", null ], + [ "SCB_CleanDCache_by_Addr", "group___dcache__functions__m7.html#ga696fadbf7b9cc71dad42fab61873a40d", null ], + [ "SCB_CleanInvalidateDCache", "group___dcache__functions__m7.html#ga1b741def9e3b2ca97dc9ea49b8ce505c", null ], + [ "SCB_CleanInvalidateDCache_by_Addr", "group___dcache__functions__m7.html#ga630131b2572eaa16b569ed364dfc895e", null ], + [ "SCB_DisableDCache", "group___dcache__functions__m7.html#ga6468170f90d270caab8116e7a4f0b5fe", null ], + [ "SCB_EnableDCache", "group___dcache__functions__m7.html#ga63aa640d9006021a796a5dcf9c7180b6", null ], + [ "SCB_InvalidateDCache", "group___dcache__functions__m7.html#gace2d30db08887d0bdb818b8a785a5ce6", null ], + [ "SCB_InvalidateDCache_by_Addr", "group___dcache__functions__m7.html#ga503ef7ef58c0773defd15a82f6336c09", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group___i_t_m___debug__gr.html b/Documentation/Core/html/group___i_t_m___debug__gr.html new file mode 100644 index 0000000..5c40fd2 --- /dev/null +++ b/Documentation/Core/html/group___i_t_m___debug__gr.html @@ -0,0 +1,280 @@ + + + + + +Debug Access +CMSIS-CORE: Debug Access + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions | +Variables
+
+
Debug Access
+
+
+ +

Debug Access to the Instrumented Trace Macrocell (ITM) +More...

+ + + + + + + + + + + +

+Functions

uint32_t ITM_SendChar (uint32_t ch)
 Transmits a character via channel 0.
 
int32_t ITM_ReceiveChar (void)
 ITM Receive Character.
 
int32_t ITM_CheckChar (void)
 ITM Check Character.
 
+ + + + +

+Variables

volatile int32_t ITM_RxBuffer
 external variable to receive characters
 
+

Description

+

CMSIS provides additional debug functions to enlarge the Debug Access. Data can be transmitted via a certain global buffer variable towards the target system.

+

The Cortex-M3 / Cortex-M4 / Cortex-M7 incorporates the Instrumented Trace Macrocell (ITM) that provides together with the Serial Viewer Output (SVO) trace capabilities for the microcontroller system. The ITM has 32 communication channels; two ITM communication channels are used by CMSIS to output the following information:

+
    +
  • ITM Channel 0: implements the ITM_SendChar function which can be used for printf-style output via the debug interface.
    • +
+
    +
  • ITM Channel 31: is reserved for the RTOS kernel and can be used for kernel awareness debugging.
    • +
+
Remarks
    +
  • ITM channels have 4 groups with 8 channels each, whereby each group can be configured for access rights in the Unprivileged level.
    • +
  • The ITM channel 0 can be enabled for the user task.
    • +
  • ITM channel 31 can be accessed only in Privileged mode from the RTOS kernel itself. The ITM channel 31 has been selected for the RTOS kernel because some kernels may use the Privileged level for program execution.
    • +
+
+
+

+ITM Debugger Support

+

A debugger may support a Debug (printf) Viewer window to display data.

+

Direction: Microcontroller –> Debugger:

+
    +
  • Characters received via ITM communication channel 0 are written in a printf-style to the Debug (printf) Viewer window.
    • +
+

Direction: Debugger –> Microcontroller:

+
    +
  • Check if ITM_RxBuffer variable is available (only performed once).
    • +
  • Read the character from the Debug (printf) Viewer window.
    • +
  • If ITM_RxBuffer is empty, write character to ITM_RxBuffer.
    • +
+
Note
The current solution does not use a buffer mechanism for transmitting the characters.
+
+

+Example:

+

Example for the usage of the ITM Channel 31 for RTOS Kernels:

+
// check if debugger connected and ITM channel enabled for tracing
+
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
+
(ITM->TCR & ITM_TCR_ITMENA) &&
+
(ITM->TER & (1UL >> 31))) {
+
+
// transmit trace data
+
while (ITM->PORT31_U32 == 0);
+
ITM->PORT[31].u8 = task_id; // id of next task
+
while (ITM->PORT[31].u32 == 0);
+
ITM->PORT[31].u32 = task_status; // status information
+
}
+

Function Documentation

+ +
+
+ + + + + + + + +
int32_t ITM_CheckChar (void )
+
+

This function reads the external variable ITM_RxBuffer and checks whether a character is available or not.

+
Returns
    +
  • =0 - No character available
    • +
  • =1 - Character available
    • +
+
+ +
+
+ +
+
+ + + + + + + + +
int32_t ITM_ReceiveChar (void )
+
+

This function inputs a character via the external variable ITM_RxBuffer. It returns when no debugger is connected that has booked the output. It is blocking when a debugger is connected, but the previously sent character has not been transmitted.

+
Returns
    +
  • Received character
    • +
  • =1 - No character received
    • +
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t ITM_SendChar (uint32_t ch)
+
+

This function transmits a character via the ITM channel 0. It returns when no debugger is connected that has booked the output. It is blocking when a debugger is connected, but the previously sent character has not been transmitted.

+
Parameters
+ + +
[in]chCharacter to transmit
+
+
+
Returns
Character to transmit
+ +
+
+

Variable Documentation

+ +
+
+ + + + +
volatile int32_t ITM_RxBuffer
+
+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group___i_t_m___debug__gr.js b/Documentation/Core/html/group___i_t_m___debug__gr.js new file mode 100644 index 0000000..eb22977 --- /dev/null +++ b/Documentation/Core/html/group___i_t_m___debug__gr.js @@ -0,0 +1,7 @@ +var group___i_t_m___debug__gr = +[ + [ "ITM_CheckChar", "group___i_t_m___debug__gr.html#ga7f9bbabd9756d1a7eafb2d9bf27e0535", null ], + [ "ITM_ReceiveChar", "group___i_t_m___debug__gr.html#ga37b8f41cae703b5ff6947e271065558c", null ], + [ "ITM_SendChar", "group___i_t_m___debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1", null ], + [ "ITM_RxBuffer", "group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group___icache__functions__m7.html b/Documentation/Core/html/group___icache__functions__m7.html new file mode 100644 index 0000000..1a1377c --- /dev/null +++ b/Documentation/Core/html/group___icache__functions__m7.html @@ -0,0 +1,203 @@ + + + + + +I-Cache Functions +CMSIS-CORE: I-Cache Functions + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
I-Cache Functions
+
Cache Functions (only Cortex-M7)
+
+ +

Functions for the instruction cache. +More...

+ + + + + + + + + + + +

+Functions

__STATIC_INLINE void SCB_EnableICache (void)
 Enable I-Cache.
 
__STATIC_INLINE void SCB_DisableICache (void)
 Disable I-Cache.
 
__STATIC_INLINE void SCB_InvalidateICache (void)
 Invalidate I-Cache.
 
+

Description

+

Function Documentation

+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_DisableICache (void )
+
+

The function turns off the instruction cache.

+ +
+
+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_EnableICache (void )
+
+

The function turns on the instruction cache.

+
Note
Before enabling the instruction cache, you must invalidate (SCB_InvalidateICache) the entire instruction cache if external memory might have changed since the cache was disabled.
+
+After reset, you must invalidate (SCB_InvalidateICache) each cache before enabling it.
+ +
+
+ +
+
+ + + + + + + + +
__STATIC_INLINE void SCB_InvalidateICache (void )
+
+

The function invalidates the instruction cache. The instruction cache is never dirty so cache RAM errors are always recoverable by invalidating the cache and retrying the instruction.

+
Note
After reset, you must invalidate each cache before enabling (SCB_EnableICache) it.
+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group___icache__functions__m7.js b/Documentation/Core/html/group___icache__functions__m7.js new file mode 100644 index 0000000..e9c58ef --- /dev/null +++ b/Documentation/Core/html/group___icache__functions__m7.js @@ -0,0 +1,6 @@ +var group___icache__functions__m7 = +[ + [ "SCB_DisableICache", "group___icache__functions__m7.html#gaba757390852f95b3ac2d8638c717d8d8", null ], + [ "SCB_EnableICache", "group___icache__functions__m7.html#gaf9e7c6c8e16ada1f95e5bf5a03505b68", null ], + [ "SCB_InvalidateICache", "group___icache__functions__m7.html#ga50d373a785edd782c5de5a3b55e30ff3", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group___n_v_i_c__gr.html b/Documentation/Core/html/group___n_v_i_c__gr.html new file mode 100644 index 0000000..2a8031c --- /dev/null +++ b/Documentation/Core/html/group___n_v_i_c__gr.html @@ -0,0 +1,1061 @@ + + + + + +Interrupts and Exceptions (NVIC) +CMSIS-CORE: Interrupts and Exceptions (NVIC) + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Enumerations | +Functions
+
+
Interrupts and Exceptions (NVIC)
+
+
+ +

Explains how to use interrupts and exceptions and access functions for the Nested Vector Interrupt Controller (NVIC). +More...

+ + + + + +

+Enumerations

enum  IRQn_Type {
+  NonMaskableInt_IRQn = -14, +
+  HardFault_IRQn = -13, +
+  MemoryManagement_IRQn = -12, +
+  BusFault_IRQn = -11, +
+  UsageFault_IRQn = -10, +
+  SVCall_IRQn = -5, +
+  DebugMonitor_IRQn = -4, +
+  PendSV_IRQn = -2, +
+  SysTick_IRQn = -1, +
+  WWDG_STM_IRQn = 0, +
+  PVD_STM_IRQn = 1 +
+ }
 Definition of IRQn numbers. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

void NVIC_SetPriorityGrouping (uint32_t PriorityGroup)
 Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t NVIC_GetPriorityGrouping (void)
 Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].
 
void NVIC_EnableIRQ (IRQn_Type IRQn)
 Enable an external interrupt.
 
void NVIC_DisableIRQ (IRQn_Type IRQn)
 Disable an external interrupt.
 
uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn)
 Get the pending interrupt.
 
void NVIC_SetPendingIRQ (IRQn_Type IRQn)
 Set an interrupt to pending.
 
void NVIC_ClearPendingIRQ (IRQn_Type IRQn)
 Clear an interrupt from pending.
 
uint32_t NVIC_GetActive (IRQn_Type IRQn)
 Get the interrupt active status [not for Cortex-M0, Cortex-M0+, or SC000].
 
void NVIC_SetPriority (IRQn_Type IRQn, uint32_t priority)
 Set the priority for an interrupt.
 
uint32_t NVIC_GetPriority (IRQn_Type IRQn)
 Get the priority of an interrupt.
 
uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 Encodes Priority [not for Cortex-M0, Cortex-M0+, or SC000].
 
void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
 Decode the interrupt priority [not for Cortex-M0, Cortex-M0+, or SC000].
 
void NVIC_SystemReset (void)
 Reset the system.
 
+

Description

+

ARM provides a template file startup_device for each supported compiler. The file must be adapted by the silicon vendor to include interrupt vectors for all device-specific interrupt handlers. Each interrupt handler is defined as a weak function to an dummy handler. These interrupt handlers can be used directly in application software without being adapted by the programmer.

+

The table below describes the core exception names and their availability in various Cortex-M cores.

+ + + + + + + + + + + + + + + + + + + + + +
Core Exception Name IRQn Value M0 M0+ M3 M4 M7 SC000 SC300 Description
NonMaskableInt_IRQn -14
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+ 		Non Maskable Interrupt
HardFault_IRQn -13
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+ 		Hard Fault Interrupt
MemoryManagement_IRQn -12    
+available +
+
+available +
+
+available +
+ 		 
+available +
+ 		Memory Management Interrupt
BusFault_IRQn -11    
+available +
+
+available +
+
+available +
+ 		 
+available +
+ 		Bus Fault Interrupt
UsageFault_IRQn -10    
+available +
+
+available +
+
+available +
+ 		 
+available +
+ 		Usage Fault Interrupt
SVCall_IRQn -5
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+ 		SV Call Interrupt
DebugMonitor_IRQn -4    
+available +
+
+available +
+
+available +
+ 		 
+available +
+ 		Debug Monitor Interrupt
PendSV_IRQn -2
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+ 		Pend SV Interrupt
SysTick_IRQn -1
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+
+available +
+ 		System Tick Interrupt
+

+For Cortex-M0, Cortex-M0+, or SC000

+

The following exception names are fixed and define the start of the vector table for Cortex-M0, Cortex-M0+, or SC000:

+
__Vectors DCD __initial_sp ; Top of Stack
+
DCD Reset_Handler ; Reset Handler
+
DCD NMI_Handler ; NMI Handler
+
DCD HardFault_Handler ; Hard Fault Handler
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD SVC_Handler ; SVCall Handler
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD PendSV_Handler ; PendSV Handler
+
DCD SysTick_Handler ; SysTick Handler
+

+For Cortex-M3

+

The following exception names are fixed and define the start of the vector table for a Cortex-M3:

+
__Vectors DCD __initial_sp ; Top of Stack
+
DCD Reset_Handler ; Reset Handler
+
DCD NMI_Handler ; NMI Handler
+
DCD HardFault_Handler ; Hard Fault Handler
+
DCD MemManage_Handler ; MPU Fault Handler
+
DCD BusFault_Handler ; Bus Fault Handler
+
DCD UsageFault_Handler ; Usage Fault Handler
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD 0 ; Reserved
+
DCD SVC_Handler ; SVCall Handler
+
DCD DebugMon_Handler ; Debug Monitor Handler
+
DCD 0 ; Reserved
+
DCD PendSV_Handler ; PendSV Handler
+
DCD SysTick_Handler ; SysTick Handler
+

+Example

+

The following is an examples for device-specific interrupts:

+
; External Interrupts
+
DCD WWDG_IRQHandler ; Window Watchdog
+
DCD PVD_IRQHandler ; PVD through EXTI Line detect
+
DCD TAMPER_IRQHandler ; Tamper
+

Device-specific interrupts must have a dummy function that can be overwritten in user code. Below is an example for this dummy function.

+
Default_Handler PROC
+
EXPORT WWDG_IRQHandler [WEAK]
+
EXPORT PVD_IRQHandler [WEAK]
+
EXPORT TAMPER_IRQHandler [WEAK]
+
:
+
:
+
WWDG_IRQHandler
+
PVD_IRQHandler
+
TAMPER_IRQHandler
+
:
+
:
+
B .
+
ENDP
+

The user application may simply define an interrupt handler function by using the handler name as shown below.

+
void WWDG_IRQHandler(void)
+
{
+
...
+
}
+

+Code Example 1

+

The code below shows the usage of the CMSIS NVIC functions NVIC_SetPriorityGrouping(), NVIC_GetPriorityGrouping(), NVIC_SetPriority(), NVIC_GetPriority(), NVIC_EncodePriority(), and NVIC_DecodePriority() with an LPC1700.

+
#include "LPC17xx.h"
+
+
uint32_t priorityGroup; /* Variables to store priority group and priority */
+
uint32_t priority;
+
uint32_t preemptPriority;
+
uint32_t subPriority;
+
+
+
int main (void) {
+
+
NVIC_SetPriorityGrouping(5); /* Set priority group to 5:
+
Bit[7..6] preempt priority Bits,
+
Bit[5..3] subpriority Bits
+
(valid for five priority bits) */
+
+
priorityGroup = NVIC_GetPriorityGrouping(); /* Get used priority grouping */
+
+
priority = NVIC_EncodePriority(priorityGroup, 1, 6); /* Encode priority with 6 for subpriority and 1 for preempt priority
+
Note: priority depends on the used priority grouping */
+
+
NVIC_SetPriority(UART0_IRQn, priority); /* Set new priority */
+
+
priority = NVIC_GetPriority(UART0_IRQn); /* Retrieve priority again */
+
+
NVIC_DecodePriority(priority, priorityGroup, &preemptPriority, &subPriority);
+
+
while(1);
+
}
+

+Code Example 2

+

The code below shows the usage of the CMSIS NVIC functions NVIC_EnableIRQ(), NVIC_GetActive() with an LPC1700.

+
#include "LPC17xx.h"
+
+
uint32_t active; /* Variable to store interrupt active state */
+
+
+
void TIMER0_IRQHandler(void) { /* Timer 0 interrupt handler */
+
+
if (LPC_TIM0->IR & (1 << 0)) { /* Check if interrupt for match channel 0 occured */
+
LPC_TIM0->IR |= (1 << 0); /* Acknowledge interrupt for match channel 0 occured */
+
}
+
active = NVIC_GetActive(TIMER0_IRQn); /* Get interrupt active state of timer 0 */
+
}
+
+
+
int main (void) {
+
/* Set match channel register MR0 to 1 millisecond */
+
LPC_TIM0->MR0 = (((SystemCoreClock / 1000) / 4) - 1); /* 1 ms? */
+
+
LPC_TIM0->MCR = (3 << 0); /* Enable interrupt and reset for match channel MR0 */
+
+
NVIC_EnableIRQ(TIMER0_IRQn); /* Enable NVIC interrupt for timer 0 */
+
+
LPC_TIM0->TCR = (1 << 0); /* Enable timer 0 */
+
+
while(1);
+
}
+

Enumeration Type Documentation

+ +
+
+ + + + +
enum IRQn_Type
+
+

The core exception enumeration names for IRQn values are defined in the file device.h.

+
Negative IRQn values represent processor core exceptions (internal interrupts).
+Positive IRQn values represent device-specific exceptions (external interrupts). 
+The first device-specific interrupt has the IRQn value 0.
+

The table below describes the core exception names and their availability in various Cortex-M cores.

+
Enumerator:
+ + + + + + + + + + + +
NonMaskableInt_IRQn  +

Exception 2: Non Maskable Interrupt.

+
HardFault_IRQn  +

Exception 3: Hard Fault Interrupt.

+
MemoryManagement_IRQn  +

Exception 4: Memory Management Interrupt [not on Cortex-M0 variants].

+
BusFault_IRQn  +

Exception 5: Bus Fault Interrupt [not on Cortex-M0 variants].

+
UsageFault_IRQn  +

Exception 6: Usage Fault Interrupt [not on Cortex-M0 variants].

+
SVCall_IRQn  +

Exception 11: SV Call Interrupt.

+
DebugMonitor_IRQn  +

Exception 12: Debug Monitor Interrupt [not on Cortex-M0 variants].

+
PendSV_IRQn  +

Exception 14: Pend SV Interrupt [not on Cortex-M0 variants].

+
SysTick_IRQn  +

Exception 15: System Tick Interrupt.

+
WWDG_STM_IRQn  +

Device Interrupt 0: Window WatchDog Interrupt.

+
PVD_STM_IRQn  +

Device Interrupt 1: PVD through EXTI Line detection Interrupt.

+
+
+
+ +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
void NVIC_ClearPendingIRQ (IRQn_Type IRQn)
+
+

This function removes the pending state of the specified interrupt IRQn. IRQn cannot be a negative number.

+
Parameters
+ + +
[in]IRQnInterrupt number
+
+
+
Remarks
    +
  • The registers that control the status of interrupts are called SETPEND and CLRPEND.
    • +
  • An interrupt can have the status pending though it is not active.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
void NVIC_DecodePriority (uint32_t Priority,
uint32_t PriorityGroup,
uint32_t * pPreemptPriority,
uint32_t * pSubPriority 
)
+
+

This function decodes an interrupt priority value with the priority group PriorityGroup to preemptive priority value pPreemptPriority and subpriority value pSubPriority. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.

+
Parameters
+ + + + + +
[in]PriorityPriority
[in]PriorityGroupPriority group
[out]*pPreemptPriorityPreemptive priority value (starting from 0)
[out]*pSubPrioritySubpriority value (starting from 0)
+
+
+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void NVIC_DisableIRQ (IRQn_Type IRQn)
+
+

This function disables the specified device-specific interrupt IRQn. IRQn cannot be a negative value.

+
Parameters
+ + +
[in]IRQnNumber of the external interrupt to disable
+
+
+
Remarks
    +
  • The registers that control the enabling and disabling of interrupts are called SETENA and CLRENA.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void NVIC_EnableIRQ (IRQn_Type IRQn)
+
+

This function enables the specified device-specific interrupt IRQn. IRQn cannot be a negative value.

+
Parameters
+ + +
[in]IRQnInterrupt number
+
+
+
Remarks
    +
  • The registers that control the enabling and disabling of interrupts are called SETENA and CLRENA.
    • +
  • The number of supported interrupts depends on the implementation of the chip designer and can be read form the Interrupt Controller Type Register (ICTR) in granularities of 32:
    + ICTR[4:0]
      +
    • =0 - 32 interrupts supported
      • +
    • =1 - 64 interrupts supported
      • +
    • ...
      • +
    +
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t NVIC_EncodePriority (uint32_t PriorityGroup,
uint32_t PreemptPriority,
uint32_t SubPriority 
)
+
+

This function encodes the priority for an interrupt with the priority group PriorityGroup, preemptive priority value PreemptPriority, and subpriority value SubPriority. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.

+
Parameters
+ + + + +
[in]PriorityGroupPriority group
[in]PreemptPriorityPreemptive priority value (starting from 0)
[in]SubPrioritySubpriority value (starting from 0)
+
+
+
Returns
Encoded priority for the interrupt
+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t NVIC_GetActive (IRQn_Type IRQn)
+
+

This function reads the Interrupt Active Register (NVIC_IABR0-NVIC_IABR7) in NVIC and returns the active bit of the interrupt IRQn.

+
Parameters
+ + +
[in]IRQnInterrupt number
+
+
+
Returns
    +
  • =0 Interrupt is not active
    • +
  • =1 Interrupt is active, or active and pending
    • +
+
+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • Each external interrupt has an active status bit. When the processor starts the interrupt handler the bit is set to 1 and cleared when the interrupt return is executed.
    • +
  • When an ISR is preempted and the processor executes anohter interrupt handler, the previous interrupt is still defined as active.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t NVIC_GetPendingIRQ (IRQn_Type IRQn)
+
+

This function returns the pending status of the specified interrupt IRQn.

+
Parameters
+ + +
[in]IRQnInterrupt number
+
+
+
Returns
    +
  • =0 Interrupt is not pending
    • +
  • =1 Interrupt is pending
    • +
+
+
Remarks
    +
  • The registers that control the status of interrupts are called SETPEND and CLRPEND.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t NVIC_GetPriority (IRQn_Type IRQn)
+
+

This function reads the priority for the specified interrupt IRQn. IRQn can can specify any device-specific (external) interrupt, or core (internal) interrupt.

+

The returned priority value is automatically aligned to the implemented priority bits of the microcontroller.

+
Parameters
+ + +
[in]IRQnInterrupt number
+
+
+
Returns
Interrupt priority
+
Remarks
    +
  • Each external interrupt has an associated priority-level register.
    • +
  • Unimplemented bits are read as zero.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t NVIC_GetPriorityGrouping (void )
+
+

This functuion returns the priority grouping (flag PRIGROUP in AIRCR[10:8]).

+
Returns
Priority grouping field
+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • By default, priority group setting is zero.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void NVIC_SetPendingIRQ (IRQn_Type IRQn)
+
+

This function sets the pending bit for the specified interrupt IRQn. IRQn cannot be a negative value.

+
Parameters
+ + +
[in]IRQnInterrupt number
+
+
+
Remarks
    +
  • The registers that control the status of interrupts are called SETPEND and CLRPEND.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void NVIC_SetPriority (IRQn_Type IRQn,
uint32_t priority 
)
+
+

Sets the priority for the interrupt specified by IRQn.IRQn can can specify any device-specific (external) interrupt, or core (internal) interrupt. The priority specifies the interrupt priority value, whereby lower values indicate a higher priority. The default priority is 0 for every interrupt. This is the highest possible priority.

+

The priority cannot be set for every core interrupt. HardFault and NMI have a fixed (negative) priority that is higher than any configurable exception or interrupt.

+
Parameters
+ + + +
[in]IRQnInterrupt Number
[in]priorityPriority to set
+
+
+
Remarks
    +
  • The number of priority levels is configurable and depends on the implementation of the chip designer. To determine the number of bits implemented for interrupt priority-level registers, write 0xFF to one of the priority-level register, then read back the value. For example, if the minimum number of 3 bits have been implemented, the read-back value is 0xE0.
    • +
  • Writes to unimplemented bits are ignored.
    • +
  • For Cortex-M0:
      +
    • Dynamic switching of interrupt priority levels is not supported. The priority level of an interrupt should not be changed after it has been enabled.
      • +
    • Supports 0 to 192 priority levels.
      • +
    • Priority-level registers are 2 bit wide, occupying the two MSBs. Each Interrupt Priority Level Register is 1-byte wide.
      • +
    +
    • +
  • For Cortex-M3, Cortex-M4, and Cortex-M7:
      +
    • Dynamic switching of interrupt priority levels is supported.
      • +
    • Supports 0 to 255 priority levels.
      • +
    • Priority-level registers have a maximum width of 8 bits and a minumum of 3 bits. Each register can be further devided into preempt priority level and subpriority level.
      • +
    +
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void NVIC_SetPriorityGrouping (uint32_t PriorityGroup)
+
+

The function sets the priority grouping PriorityGroup using the required unlock sequence. PriorityGroup is assigned to the field PRIGROUP (register AIRCR[10:8]). This field determines the split of group priority from subpriority. Only values from 0..7 are used. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.

+
Parameters
+ + +
[in]PriorityGroupPriority group
+
+
+
Remarks
    +
  • not for Cortex-M0, Cortex-M0+, or SC000.
    • +
  • By default, priority group setting is zero.
    • +
+
+
See Also
+
+ +
+
+ +
+
+ + + + + + + + +
void NVIC_SystemReset (void )
+
+

This function requests a system reset by setting the SYSRESETREQ flag in the AIRCR register.

+
Remarks
    +
  • In most microcontroller designs, setting the SYSRESETREQ flag resets the processor and most parts of the system, but should not affect the debug system.
    • +
+
+
See Also
+
+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group___n_v_i_c__gr.js b/Documentation/Core/html/group___n_v_i_c__gr.js new file mode 100644 index 0000000..e7db41e --- /dev/null +++ b/Documentation/Core/html/group___n_v_i_c__gr.js @@ -0,0 +1,29 @@ +var group___n_v_i_c__gr = +[ + [ "IRQn_Type", "group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8", [ + [ "NonMaskableInt_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30", null ], + [ "HardFault_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85", null ], + [ "MemoryManagement_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa", null ], + [ "BusFault_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af", null ], + [ "UsageFault_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf", null ], + [ "SVCall_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237", null ], + [ "DebugMonitor_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c", null ], + [ "PendSV_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2", null ], + [ "SysTick_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7", null ], + [ "WWDG_STM_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2", null ], + [ "PVD_STM_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86", null ] + ] ], + [ "NVIC_ClearPendingIRQ", "group___n_v_i_c__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a", null ], + [ "NVIC_DecodePriority", "group___n_v_i_c__gr.html#gad3cbca1be7a4726afa9448a9acd89377", null ], + [ "NVIC_DisableIRQ", "group___n_v_i_c__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c", null ], + [ "NVIC_EnableIRQ", "group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f", null ], + [ "NVIC_EncodePriority", "group___n_v_i_c__gr.html#ga0688c59605b119c53c71b2505ab23eb5", null ], + [ "NVIC_GetActive", "group___n_v_i_c__gr.html#gadf4252e600661fd762cfc0d1a9f5b892", null ], + [ "NVIC_GetPendingIRQ", "group___n_v_i_c__gr.html#ga95a8329a680b051ecf3ee8f516acc662", null ], + [ "NVIC_GetPriority", "group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395", null ], + [ "NVIC_GetPriorityGrouping", "group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78", null ], + [ "NVIC_SetPendingIRQ", "group___n_v_i_c__gr.html#ga3b885147ef9965ecede49614de8df9d2", null ], + [ "NVIC_SetPriority", "group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798", null ], + [ "NVIC_SetPriorityGrouping", "group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354", null ], + [ "NVIC_SystemReset", "group___n_v_i_c__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group___sys_tick__gr.html b/Documentation/Core/html/group___sys_tick__gr.html new file mode 100644 index 0000000..6966d61 --- /dev/null +++ b/Documentation/Core/html/group___sys_tick__gr.html @@ -0,0 +1,197 @@ + + + + + +Systick Timer (SYSTICK) +CMSIS-CORE: Systick Timer (SYSTICK) + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Systick Timer (SYSTICK)
+
+
+ +

Initialize and start the SysTick timer. +More...

+ + + + + +

+Functions

uint32_t SysTick_Config (uint32_t ticks)
 System Tick Timer Configuration.
 
+

Description

+
The System Tick Time (SysTick) generates interrupt requests on a regular basis.
+This allows an OS to carry out context switching to support multiple tasking. For applications
+that do not require an OS, the SysTick can be used for time keeping, time measurement, or as an 
+interrupt source for tasks that need to be executed regularly.
+

+Code Example

+

The code below shows the usage of the function SysTick_Config() with an LPC1700.

+
#include "LPC17xx.h"
+
+
uint32_t msTicks = 0; /* Variable to store millisecond ticks */
+
+
+
void SysTick_Handler(void) { /* SysTick interrupt Handler.
+
msTicks++; See startup file startup_LPC17xx.s for SysTick vector */
+
}
+
+
+
int main (void) {
+
uint32_t returnCode;
+
+
returnCode = SysTick_Config(SystemCoreClock / 1000); /* Configure SysTick to generate an interrupt every millisecond */
+
+
if (returnCode != 0) { /* Check return code for errors */
+
// Error Handling
+
}
+
+
while(1);
+
}
+

Function Documentation

+ +
+
+ + + + + + + + +
uint32_t SysTick_Config (uint32_t ticks)
+
+

Initialises and starts the System Tick Timer and its interrupt. After this call, the SysTick timer creates interrupts with the specified time interval. Counter is in free running mode to generate periodical interrupts.

+
Parameters
+ + +
[in]ticksNumber of ticks between two interrupts
+
+
+
Returns
0 - success
+
+1 - failure
+
Note
When #define __Vendor_SysTickConfig is set to 1, the standard function SysTick_Config is excluded. In this case, the file device.h must contain a vendor specific implementation of this function.
+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group___sys_tick__gr.js b/Documentation/Core/html/group___sys_tick__gr.js new file mode 100644 index 0000000..99c5304 --- /dev/null +++ b/Documentation/Core/html/group___sys_tick__gr.js @@ -0,0 +1,4 @@ +var group___sys_tick__gr = +[ + [ "SysTick_Config", "group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group__cache__functions__m7.html b/Documentation/Core/html/group__cache__functions__m7.html new file mode 100644 index 0000000..7ba5f9a --- /dev/null +++ b/Documentation/Core/html/group__cache__functions__m7.html @@ -0,0 +1,152 @@ + + + + + +Cache Functions (only Cortex-M7) +CMSIS-CORE: Cache Functions (only Cortex-M7) + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
Cache Functions (only Cortex-M7)
+
+
+ +

Functions for Instruction and Data Cache. +More...

+ + + + + + + + +

+Content

 I-Cache Functions
 Functions for the instruction cache.
 
 D-Cache Functions
 Functions for the data cache.
 
+

Description

+

Cortex-M7 processors include a memory system, which includes an optional MPU and Harvard data and instruction cache with ECC. The optional CPU cache has an instruction and data cache with sizes of [0;4;8;16;32;64]KB. Both instruction and data cache RAM can be configured at implementation time to have Error Correcting Code (ECC) to protect the data stored in the memory from errors.

+

All cache maintenance operations are executed by writing to registers in the memory mapped System Control Space (SCS) region of the internal PPB memory space.

+
Note
After reset, you must invalidate each cache before enabling it.
+

The functions are grouped for:

+ +
+
+ + + + diff --git a/Documentation/Core/html/group__cache__functions__m7.js b/Documentation/Core/html/group__cache__functions__m7.js new file mode 100644 index 0000000..4db2220 --- /dev/null +++ b/Documentation/Core/html/group__cache__functions__m7.js @@ -0,0 +1,5 @@ +var group__cache__functions__m7 = +[ + [ "I-Cache Functions", "group___icache__functions__m7.html", "group___icache__functions__m7" ], + [ "D-Cache Functions", "group___dcache__functions__m7.html", "group___dcache__functions__m7" ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group__fpu__functions__m7.html b/Documentation/Core/html/group__fpu__functions__m7.html new file mode 100644 index 0000000..a30c139 --- /dev/null +++ b/Documentation/Core/html/group__fpu__functions__m7.html @@ -0,0 +1,166 @@ + + + + + +FPU Functions (only Cortex-M7) +CMSIS-CORE: FPU Functions (only Cortex-M7) + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
FPU Functions (only Cortex-M7)
+
+
+ +

Functions that relate to the Floating-Point Arithmetic Unit. +More...

+ + + + + +

+Functions

__STATIC_INLINE uint32_t SCB_GetFPUType (void)
 Get the FPU type.
 
+

Description

+

The Cortex-M7 processor includes optional floating-point arithmetic functionality, with support for single and double-precision arithmetic. The Cortex-M7 processor with FPU is an implementation of the single-precision and double-precision variant of the ARMv7-M Architecture with Floating-Point Extension (FPv5).

+

Function Documentation

+ +
+
+ + + + + + + + +
__STATIC_INLINE uint32_t SCB_GetFPUType (void )
+
+
Returns
    +
  • 0: No FPU
    • +
  • 1: Single precision FPU
    • +
  • 2: Double + Single precision FPU
    • +
+
+

The function returns the implemented FPU type.

+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group__fpu__functions__m7.js b/Documentation/Core/html/group__fpu__functions__m7.js new file mode 100644 index 0000000..d77dd8b --- /dev/null +++ b/Documentation/Core/html/group__fpu__functions__m7.js @@ -0,0 +1,4 @@ +var group__fpu__functions__m7 = +[ + [ "SCB_GetFPUType", "group__fpu__functions__m7.html#ga6bcad99ce80a0e7e4ddc6f2379081756", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group__intrinsic___c_p_u__gr.html b/Documentation/Core/html/group__intrinsic___c_p_u__gr.html new file mode 100644 index 0000000..85ecf96 --- /dev/null +++ b/Documentation/Core/html/group__intrinsic___c_p_u__gr.html @@ -0,0 +1,1013 @@ + + + + + +Intrinsic Functions for CPU Instructions +CMSIS-CORE: Intrinsic Functions for CPU Instructions + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Intrinsic Functions for CPU Instructions
+
+
+ +

Functions that generate specific Cortex-M CPU Instructions. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

void __NOP (void)
 No Operation.
 
void __WFI (void)
 Wait For Interrupt.
 
void __WFE (void)
 Wait For Event.
 
void __SEV (void)
 Send Event.
 
void __BKPT (uint8_t value)
 Set Breakpoint.
 
void __ISB (void)
 Instruction Synchronization Barrier.
 
void __DSB (void)
 Data Synchronization Barrier.
 
void __DMB (void)
 Data Memory Barrier.
 
uint32_t __REV (uint32_t value)
 Reverse byte order (32 bit)
 
uint32_t __REV16 (uint32_t value)
 Reverse byte order (16 bit)
 
int32_t __REVSH (int32_t value)
 Reverse byte order in signed short value.
 
uint32_t __RBIT (uint32_t value)
 Reverse bit order of value [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __ROR (uint32_t value, uint32_t shift)
 Rotate a value right by a number of bits.
 
uint8_t __LDREXB (volatile uint8_t *addr)
 LDR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint16_t __LDREXH (volatile uint16_t *addr)
 LDR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __LDREXW (volatile uint32_t *addr)
 LDR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __STREXB (uint8_t value, volatile uint8_t *addr)
 STR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __STREXH (uint16_t value, volatile uint16_t *addr)
 STR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __STREXW (uint32_t value, volatile uint32_t *addr)
 STR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
void __CLREX (void)
 Remove the exclusive lock [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __SSAT (unint32_t value, uint32_t sat)
 Signed Saturate [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __USAT (uint32_t value, uint32_t sat)
 Unsigned Saturate [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint8_t __CLZ (uint32_t value)
 Count leading zeros [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __RRX (uint32_t value)
 Rotate Right with Extend (32 bit)
 
uint8_t __LDRBT (uint8_t ptr)
 LDRT Unprivileged (8 bit)
 
uint16_t __LDRHT (uint16_t ptr)
 LDRT Unprivileged (16 bit)
 
uint32_t __LDRT (uint32_t ptr)
 LDRT Unprivileged (32 bit)
 
void __STRBT (uint8_t value, uint8_t ptr)
 STRT Unprivileged (8 bit)
 
void __STRHT (uint16_t value, uint16_t ptr)
 STRT Unprivileged (16 bit)
 
void __STRT (uint32_t value, uint32_t ptr)
 STRT Unprivileged (32 bit)
 
+

Description

+

The following functions generate specific Cortex-M instructions that cannot be directly accessed by the C/C++ Compiler. Refer to the Cortex-M Reference Manuals for detailed information about these Cortex-M instructions.

+
Note
When using the ARM Compiler Toolchain the following Intrinsic Functions for CPU Instructions are implemented using the Embedded Assembler: __RRX, <Bruno: add more...>. The usage of the Embedded Assembler can be disabled by with define __NO_EMBEDDED_ASM. This avoids potential side effects of the Embedded Assembler. Refer to Compiler User Guide - Using the Inline and Embedded Assemblers of the ARM Compiler for more information.
+

Function Documentation

+ +
+
+ + + + + + + + +
void __BKPT (uint8_t value)
+
+

This function causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

+
Parameters
+ + +
[in]valueis ignored by the processor. If required, a debugger can use it to obtain additional information about the breakpoint.
+
+
+ +
+
+ +
+
+ + + + + + + + +
void __CLREX (void )
+
+

This function removes the exclusive lock which is created by LDREX [not for Cortex-M0, Cortex-M0+, or SC000].

+ +
+
+ +
+
+ + + + + + + + +
uint8_t __CLZ (uint32_t value)
+
+

This function counts the number of leading zeros of a data value [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + +
[in]valueValue to count the leading zeros
+
+
+
Returns
number of leading zeros in value
+ +
+
+ +
+
+ + + + + + + + +
void __DMB (void )
+
+

This function ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

+ +
+
+ +
+
+ + + + + + + + +
void __DSB (void )
+
+

This function acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

+ +
+
+ +
+
+ + + + + + + + +
void __ISB (void )
+
+

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

+ +
+
+ +
+
+ + + + + + + + +
uint8_t __LDRBT (uint8_t ptr)
+
+

This function executed an Unprivileged LDRT command for 8 bit value.

+
Parameters
+ + +
[in]ptrPointer to data
+
+
+
Returns
value of type uint8_t at (*ptr)
+ +
+
+ +
+
+ + + + + + + + +
uint8_t __LDREXB (volatile uint8_t * addr)
+
+

This function executed an exclusive LDR command for 8 bit value [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + +
[in]*addrPointer to data
+
+
+
Returns
value of type uint8_t at (*addr)
+ +
+
+ +
+
+ + + + + + + + +
uint16_t __LDREXH (volatile uint16_t * addr)
+
+

This function executed an exclusive LDR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + +
[in]*addrPointer to data
+
+
+
Returns
value of type uint16_t at (*addr)
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __LDREXW (volatile uint32_t * addr)
+
+

This function executed an exclusive LDR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + +
[in]*addrPointer to data
+
+
+
Returns
value of type uint32_t at (*addr)
+ +
+
+ +
+
+ + + + + + + + +
uint16_t __LDRHT (uint16_t ptr)
+
+

This function executed an Unprivileged LDRT command for 16 bit values.

+
Parameters
+ + +
[in]ptrPointer to data
+
+
+
Returns
value of type uint16_t at (*ptr)
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __LDRT (uint32_t ptr)
+
+

This function executed an Unprivileged LDRT command for 32 bit values.

+
Parameters
+ + +
[in]ptrPointer to data
+
+
+
Returns
value of type uint32_t at (*ptr)
+ +
+
+ +
+
+ + + + + + + + +
void __NOP (void )
+
+

This function does nothing. This instruction can be used for code alignment purposes.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t __RBIT (uint32_t value)
+
+

This function reverses the bit order of the given value [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + +
[in]valueValue to reverse
+
+
+
Returns
Reversed value
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __REV (uint32_t value)
+
+

This function reverses the byte order in integer value.

+
Parameters
+ + +
[in]valueValue to reverse
+
+
+
Returns
Reversed value
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __REV16 (uint32_t value)
+
+

This function reverses the byte order in two unsigned short values.

+
Parameters
+ + +
[in]valueValue to reverse
+
+
+
Returns
Reversed value
+ +
+
+ +
+
+ + + + + + + + +
int32_t __REVSH (int32_t value)
+
+

This function reverses the byte order in a signed short value with sign extension to integer.

+
Parameters
+ + +
[in]valueValue to reverse
+
+
+
Returns
Reversed value
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __ROR (uint32_t value,
uint32_t shift 
)
+
+

This function rotates a value right by a specified number of bits.

+
Parameters
+ + + +
[in]valueValue to be shifted right
[in]shiftNumber of bits in the range [1..31]
+
+
+
Returns
Rotated value
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __RRX (uint32_t value)
+
+

This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.

+
Parameters
+ + +
[in]valueValue to rotate
+
+
+
Returns
Rotated value
+ +
+
+ +
+
+ + + + + + + + +
void __SEV (void )
+
+

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SSAT (unint32_t value,
uint32_t sat 
)
+
+

This function saturates a signed value [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + + +
[in]valueValue to be saturated
[in]satBit position to saturate to [1..32]
+
+
+
Returns
Saturated value
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void __STRBT (uint8_t value,
uint8_t ptr 
)
+
+

This function executed an Unprivileged STRT command for 8 bit values.

+
Parameters
+ + + +
[in]valueValue to store
[in]ptrPointer to location
+
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __STREXB (uint8_t value,
volatile uint8_t * addr 
)
+
+

This function executed an exclusive STR command for 8 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + + +
[in]valueValue to store
[in]*addrPointer to location
+
+
+
Returns
0 Function succeeded
+
+1 Function failed
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __STREXH (uint16_t value,
volatile uint16_t * addr 
)
+
+

This function executed an exclusive STR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + + +
[in]valueValue to store
[in]*addrPointer to location
+
+
+
Returns
0 Function succeeded
+
+1 Function failed
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __STREXW (uint32_t value,
volatile uint32_t * addr 
)
+
+

This function executed an exclusive STR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + + +
[in]valueValue to store
[in]*addrPointer to location
+
+
+
Returns
0 Function succeeded
+
+1 Function failed
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void __STRHT (uint16_t value,
uint16_t ptr 
)
+
+

This function executed an Unprivileged STRT command for 16 bit values.

+
Parameters
+ + + +
[in]valueValue to store
[in]ptrPointer to location
+
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void __STRT (uint32_t value,
uint32_t ptr 
)
+
+

This function executed an Unprivileged STRT command for 32 bit values.

+
Parameters
+ + + +
[in]valueValue to store
[in]ptrPointer to location
+
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __USAT (uint32_t value,
uint32_t sat 
)
+
+

This function saturates an unsigned value [not for Cortex-M0, Cortex-M0+, or SC000].

+
Parameters
+ + + +
[in]valueValue to be saturated
[in]satBit position to saturate to [0..31]
+
+
+
Returns
Saturated value
+ +
+
+ +
+
+ + + + + + + + +
void __WFE (void )
+
+

Wait For Event is a hint instruction that permits the processor to enter a low-power state until an events occurs:

+
    +
  • If the event register is 0, then WFE suspends execution until one of the following events occurs:
      +
    • An exception, unless masked by the exception mask registers or the current priority level.
      • +
    • An exception enters the Pending state, if SEVONPEND in the System Control Register is set.
      • +
    • A Debug Entry request, if Debug is enabled.
      • +
    • An event signaled by a peripheral or another processor in a multiprocessor system using the SEV instruction.
      • +
    +
    • +
+
    +
  • If the event register is 1, then WFE clears it to 0 and returns immediately.
    • +
+ +
+
+ +
+
+ + + + + + + + +
void __WFI (void )
+
+

WFI is a hint instruction that suspends execution until one of the following events occurs:

+
    +
  • A non-masked interrupt occurs and is taken.
    • +
  • An interrupt masked by PRIMASK becomes pending.
    • +
  • A Debug Entry request.
    • +
+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group__intrinsic___c_p_u__gr.js b/Documentation/Core/html/group__intrinsic___c_p_u__gr.js new file mode 100644 index 0000000..1621c07 --- /dev/null +++ b/Documentation/Core/html/group__intrinsic___c_p_u__gr.js @@ -0,0 +1,33 @@ +var group__intrinsic___c_p_u__gr = +[ + [ "__BKPT", "group__intrinsic___c_p_u__gr.html#ga92f5621626711931da71eaa8bf301af7", null ], + [ "__CLREX", "group__intrinsic___c_p_u__gr.html#ga354c5ac8870cc3dfb823367af9c4b412", null ], + [ "__CLZ", "group__intrinsic___c_p_u__gr.html#ga90884c591ac5d73d6069334eba9d6c02", null ], + [ "__DMB", "group__intrinsic___c_p_u__gr.html#gab1c9b393641dc2d397b3408fdbe72b96", null ], + [ "__DSB", "group__intrinsic___c_p_u__gr.html#gacb2a8ca6eae1ba4b31161578b720c199", null ], + [ "__ISB", "group__intrinsic___c_p_u__gr.html#ga93c09b4709394d81977300d5f84950e5", null ], + [ "__LDRBT", "group__intrinsic___c_p_u__gr.html#ga9464d75db32846aa8295c3c3adfacb41", null ], + [ "__LDREXB", "group__intrinsic___c_p_u__gr.html#ga9e3ac13d8dcf4331176b624cf6234a7e", null ], + [ "__LDREXH", "group__intrinsic___c_p_u__gr.html#ga9feffc093d6f68b120d592a7a0d45a15", null ], + [ "__LDREXW", "group__intrinsic___c_p_u__gr.html#gabd78840a0f2464905b7cec791ebc6a4c", null ], + [ "__LDRHT", "group__intrinsic___c_p_u__gr.html#gaa762b8bc5634ce38cb14d62a6b2aee32", null ], + [ "__LDRT", "group__intrinsic___c_p_u__gr.html#ga616504f5da979ba8a073d428d6e8d5c7", null ], + [ "__NOP", "group__intrinsic___c_p_u__gr.html#gac71fad9f0a91980fecafcb450ee0a63e", null ], + [ "__RBIT", "group__intrinsic___c_p_u__gr.html#gad6f9f297f6b91a995ee199fbc796b863", null ], + [ "__REV", "group__intrinsic___c_p_u__gr.html#ga4717abc17af5ba29b1e4c055e0a0d9b8", null ], + [ "__REV16", "group__intrinsic___c_p_u__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26", null ], + [ "__REVSH", "group__intrinsic___c_p_u__gr.html#ga1ec006e6d79063363cb0c2a2e0b3adbe", null ], + [ "__ROR", "group__intrinsic___c_p_u__gr.html#gaf66beb577bb9d90424c3d1d7f684c024", null ], + [ "__RRX", "group__intrinsic___c_p_u__gr.html#gac09134f1bf9c49db07282001afcc9380", null ], + [ "__SEV", "group__intrinsic___c_p_u__gr.html#ga3c34da7eb16496ae2668a5b95fa441e7", null ], + [ "__SSAT", "group__intrinsic___c_p_u__gr.html#ga7d9dddda18805abbf51ac21c639845e1", null ], + [ "__STRBT", "group__intrinsic___c_p_u__gr.html#gad41aa59c92c0a165b7f98428d3320cd5", null ], + [ "__STREXB", "group__intrinsic___c_p_u__gr.html#gaab6482d1f59f59e2b6b7efc1af391c99", null ], + [ "__STREXH", "group__intrinsic___c_p_u__gr.html#ga0a354bdf71caa52f081a4a54e84c8d2a", null ], + [ "__STREXW", "group__intrinsic___c_p_u__gr.html#ga335deaaa7991490e1450cb7d1e4c5197", null ], + [ "__STRHT", "group__intrinsic___c_p_u__gr.html#ga2b5d93b8e461755b1072a03df3f1722e", null ], + [ "__STRT", "group__intrinsic___c_p_u__gr.html#ga625bc4ac0b1d50de9bcd13d9f050030e", null ], + [ "__USAT", "group__intrinsic___c_p_u__gr.html#ga76bbe4374a5912362866cdc1ded4064a", null ], + [ "__WFE", "group__intrinsic___c_p_u__gr.html#gad3efec76c3bfa2b8528ded530386c563", null ], + [ "__WFI", "group__intrinsic___c_p_u__gr.html#gaed91dfbf3d7d7b7fba8d912fcbeaad88", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group__intrinsic___s_i_m_d__gr.html b/Documentation/Core/html/group__intrinsic___s_i_m_d__gr.html new file mode 100644 index 0000000..f5c03c7 --- /dev/null +++ b/Documentation/Core/html/group__intrinsic___s_i_m_d__gr.html @@ -0,0 +1,3126 @@ + + + + + +Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7] +CMSIS-CORE: Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7] + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]
+
+
+ +

Access to dedicated SIMD instructions. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

uint32_t __SADD8 (uint32_t val1, uint32_t val2)
 GE setting quad 8-bit signed addition.
 
uint32_t __QADD8 (uint32_t val1, uint32_t val2)
 Q setting quad 8-bit saturating addition.
 
uint32_t __SHADD8 (uint32_t val1, uint32_t val2)
 Quad 8-bit signed addition with halved results.
 
uint32_t __UADD8 (uint32_t val1, uint32_t val2)
 GE setting quad 8-bit unsigned addition.
 
uint32_t __UQADD8 (uint32_t val1, uint32_t val2)
 Quad 8-bit unsigned saturating addition.
 
uint32_t __UHADD8 (uint32_t val1, uint32_t val2)
 Quad 8-bit unsigned addition with halved results.
 
uint32_t __SSUB8 (uint32_t val1, uint32_t val2)
 GE setting quad 8-bit signed subtraction.
 
uint32_t __QSUB8 (uint32_t val1, uint32_t val2)
 Q setting quad 8-bit saturating subtract.
 
uint32_t __SHSUB8 (uint32_t val1, uint32_t val2)
 Quad 8-bit signed subtraction with halved results.
 
uint32_t __USUB8 (uint32_t val1, uint32_t val2)
 GE setting quad 8-bit unsigned subtract.
 
uint32_t __UQSUB8 (uint32_t val1, uint32_t val2)
 Quad 8-bit unsigned saturating subtraction.
 
uint32_t __UHSUB8 (uint32_t val1, uint32_t val2)
 Quad 8-bit unsigned subtraction with halved results.
 
uint32_t __SADD16 (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit signed addition.
 
uint32_t __QADD16 (uint32_t val1, uint32_t val2)
 Q setting dual 16-bit saturating addition.
 
uint32_t __SHADD16 (uint32_t val1, uint32_t val2)
 Dual 16-bit signed addition with halved results.
 
uint32_t __UADD16 (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit unsigned addition.
 
uint32_t __UQADD16 (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned saturating addition.
 
uint32_t __UHADD16 (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned addition with halved results.
 
uint32_t __SSUB16 (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit signed subtraction.
 
uint32_t __QSUB16 (uint32_t val1, uint32_t val2)
 Q setting dual 16-bit saturating subtract.
 
uint32_t __SHSUB16 (uint32_t val1, uint32_t val2)
 Dual 16-bit signed subtraction with halved results.
 
uint32_t __USUB16 (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit unsigned subtract.
 
uint32_t __UQSUB16 (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned saturating subtraction.
 
uint32_t __UHSUB16 (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned subtraction with halved results.
 
uint32_t __SASX (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit addition and subtraction with exchange.
 
uint32_t __QASX (uint32_t val1, uint32_t val2)
 Q setting dual 16-bit add and subtract with exchange.
 
uint32_t __SHASX (uint32_t val1, uint32_t val2)
 Dual 16-bit signed addition and subtraction with halved results.
 
uint32_t __UASX (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit unsigned addition and subtraction with exchange.
 
uint32_t __UQASX (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned saturating addition and subtraction with exchange.
 
uint32_t __UHASX (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned addition and subtraction with halved results and exchange.
 
uint32_t __SSAX (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit signed subtraction and addition with exchange.
 
uint32_t __QSAX (uint32_t val1, uint32_t val2)
 Q setting dual 16-bit subtract and add with exchange.
 
uint32_t __SHSAX (uint32_t val1, uint32_t val2)
 Dual 16-bit signed subtraction and addition with halved results.
 
uint32_t __USAX (uint32_t val1, uint32_t val2)
 GE setting dual 16-bit unsigned subtract and add with exchange.
 
uint32_t __UQSAX (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned saturating subtraction and addition with exchange.
 
uint32_t __UHSAX (uint32_t val1, uint32_t val2)
 Dual 16-bit unsigned subtraction and addition with halved results and exchange.
 
uint32_t __USAD8 (uint32_t val1, uint32_t val2)
 Unsigned sum of quad 8-bit unsigned absolute difference.
 
uint32_t __USADA8 (uint32_t val1, uint32_t val2, uint32_t val3)
 Unsigned sum of quad 8-bit unsigned absolute difference with 32-bit accumulate.
 
uint32_t __SSAT16 (uint32_t val1, const uint32_t val2)
 Q setting dual 16-bit saturate.
 
uint32_t __USAT16 (uint32_t val1, const uint32_t val2)
 Q setting dual 16-bit unsigned saturate.
 
uint32_t __UXTB16 (uint32_t val)
 Dual extract 8-bits and zero-extend to 16-bits.
 
uint32_t __UXTAB16 (uint32_t val1, uint32_t val2)
 Extracted 16-bit to 32-bit unsigned addition.
 
uint32_t __SXTB16 (uint32_t val)
 Dual extract 8-bits and sign extend each to 16-bits.
 
uint32_t __SXTAB16 (uint32_t val1, uint32_t val2)
 Dual extracted 8-bit to 16-bit signed addition.
 
uint32_t __SMUAD (uint32_t val1, uint32_t val2)
 Q setting sum of dual 16-bit signed multiply.
 
uint32_t __SMUADX (uint32_t val1, uint32_t val2)
 Q setting sum of dual 16-bit signed multiply with exchange.
 
uint32_t __SMMLA (int32_t val1, int32_t val2, int32_t val3)
 32-bit signed multiply with 32-bit truncated accumulator.
 
uint32_t __SMLAD (uint32_t val1, uint32_t val2, uint32_t val3)
 Q setting dual 16-bit signed multiply with single 32-bit accumulator.
 
uint32_t __SMLADX (uint32_t val1, uint32_t val2, uint32_t val3)
 Q setting pre-exchanged dual 16-bit signed multiply with single 32-bit accumulator.
 
uint64_t __SMLALD (uint32_t val1, uint32_t val2, uint64_t val3)
 Dual 16-bit signed multiply with single 64-bit accumulator.
 
unsigned long long __SMLALDX (uint32_t val1, uint32_t val2, unsigned long long val3)
 Dual 16-bit signed multiply with exchange with single 64-bit accumulator.
 
uint32_t __SMUSD (uint32_t val1, uint32_t val2)
 Dual 16-bit signed multiply returning difference.
 
uint32_t __SMUSDX (uint32_t val1, uint32_t val2)
 Dual 16-bit signed multiply with exchange returning difference.
 
uint32_t __SMLSD (uint32_t val1, uint32_t val2, uint32_t val3)
 Q setting dual 16-bit signed multiply subtract with 32-bit accumulate.
 
uint32_t __SMLSDX (uint32_t val1, uint32_t val2, uint32_t val3)
 Q setting dual 16-bit signed multiply with exchange subtract with 32-bit accumulate.
 
uint64_t __SMLSLD (uint32_t val1, uint32_t val2, uint64_t val3)
 Q setting dual 16-bit signed multiply subtract with 64-bit accumulate.
 
unsigned long long __SMLSLDX (uint32_t val1, uint32_t val2, unsigned long long val3)
 Q setting dual 16-bit signed multiply with exchange subtract with 64-bit accumulate.
 
uint32_t __SEL (uint32_t val1, uint32_t val2)
 Select bytes based on GE bits.
 
uint32_t __QADD (uint32_t val1, uint32_t val2)
 Q setting saturating add.
 
uint32_t __QSUB (uint32_t val1, uint32_t val2)
 Q setting saturating subtract.
 
uint32_t __PKHBT (uint32_t val1, uint32_t val2, uint32_t val3)
 Halfword packing instruction. Combines bits[15:0] of val1 with bits[31:16] of val2 levitated with the val3.
 
uint32_t __PKHTB (uint32_t val1, uint32_t val2, uint32_t val3)
 Halfword packing instruction. Combines bits[31:16] of val1 with bits[15:0] of val2 right-shifted with the val3.
 
+

Description

+

Single Instruction Multiple Data (SIMD) extensions are provided only for Cortex-M4 and Cortex-M7 cores to simplify development of application software. SIMD extensions increase the processing capability without materially increasing the power consumption. The SIMD extensions are completely transparent to the operating system (OS), allowing existing OS ports to be used.

+

SIMD Features:

+
    +
  • Simultaneous computation of 2x16-bit or 4x8-bit operands
    • +
  • Fractional arithmetic
    • +
  • User definable saturation modes (arbitrary word-width)
    • +
  • Dual 16x16 multiply-add/subtract 32x32 fractional MAC
    • +
  • Simultaneous 8/16-bit select operations
    • +
  • Performance up to 3.2 GOPS at 800MHz
    • +
  • Performance is achieved with a "near zero" increase in power consumption on a typical implementation
    • +
+

Examples:

+

Addition: Add two values using SIMD function

+
uint32_t add_halfwords(uint32_t val1, uint32_t val2)
+
{
+
return __SADD16(val1, val2);
+
}
+

Subtraction: Subtract two values using SIMD function

+
uint32_t sub_halfwords(uint32_t val1, uint32_t val2)
+
{
+
return __SSUB16(val1, val2);
+
}
+

Multiplication: Performing a multiplication using SIMD function

+
uint32_t dual_mul_add_products(uint32_t val1, uint32_t val2)
+
{
+
return __SMUAD(val1, val2);
+
}
+

Function Documentation

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __PKHBT (uint32_t val1,
uint32_t val2,
uint32_t val3 
)
+
+

Combine a halfword from one register with a halfword from another register. The second argument can be left-shifted before extraction of the halfword. The registers PC and SP are not allowed as arguments. This instruction does not change the flags.

+
Parameters
+ + + + +
val1first 16-bit operands
val2second 16-bit operands
val3value for left-shifting val2. Value range [0..31].
+
+
+
Returns
the combination of halfwords.
+
Operation:
res[15:0] = val1[15:0]
+
res[31:16] = val2[31:16]<<val3
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __PKHTB (uint32_t val1,
uint32_t val2,
uint32_t val3 
)
+
+

Combines a halfword from one register with a halfword from another register. The second argument can be right-shifted before extraction of the halfword. The registers PC and SP are not allowed as arguments. This instruction does not change the flags.

+
Parameters
+ + + + +
val1second 16-bit operands
val2first 16-bit operands
val3value for right-shifting val2. Value range [1..32].
+
+
+
Returns
the combination of halfwords.
+
Operation:
res[15:0] = val2[15:0]>>val3
+
res[31:16] = val1[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QADD (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to obtain the saturating add of two integers.
+ The Q bit is set if the operation saturates.

+
Parameters
+ + + +
val1first summand of the saturating add operation.
val2second summand of the saturating add operation.
+
+
+
Returns
the saturating addition of val1 and val2.
+
Operation:
res[31:0] = SAT(val1 + SAT(val2))
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QADD16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit integer arithmetic additions in parallel, saturating the results to the 16-bit signed integer range -215 <= x <= 215 - 1.

+
Parameters
+ + + +
val1first two 16-bit summands.
val2second two 16-bit summands.
+
+
+
Returns
    +
  • the saturated addition of the low halfwords, in the low halfword of the return value.
    • +
  • the saturated addition of the high halfwords, in the high halfword of the return value.
    • +
+
+
The returned results are saturated to the 16-bit signed integer range -215 <= x <= 215 - 1
+
Operation:
res[15:0] = val1[15:0] + val2[15:0]
+
res[31:16] = val1[31:16] + val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QADD8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four 8-bit integer additions, saturating the results to the 8-bit signed integer range -27 <= x <= 27 - 1.

+
Parameters
+ + + +
val1first four 8-bit summands.
val2second four 8-bit summands.
+
+
+
Returns
    +
  • the saturated addition of the first byte of each operand in the first byte of the return value.
    • +
  • the saturated addition of the second byte of each operand in the second byte of the return value.
    • +
  • the saturated addition of the third byte of each operand in the third byte of the return value.
    • +
  • the saturated addition of the fourth byte of each operand in the fourth byte of the return value.
    • +
+
+
The returned results are saturated to the 16-bit signed integer range -27 <= x <= 27 - 1.
+
Operation:
res[7:0] = val1[7:0] + val2[7:0]
+
res[15:8] = val1[15:8] + val2[15:8]
+
res[23:16] = val1[23:16] + val2[23:16]
+
res[31:24] = val1[31:24] + val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QASX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the halfwords of the one operand, then add the high halfwords and subtract the low halfwords, saturating the results to the 16-bit signed integer range -215 <= x <= 215 - 1.

+
Parameters
+ + + +
val1first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
val2second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.
+
+
+
Returns
    +
  • the saturated subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the saturated addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.
    • +
+
+
The returned results are saturated to the 16-bit signed integer range -215 <= x <= 215 - 1.
+
Operation:
res[15:0] = val1[15:0] - val2[31:16]
+
res[31:16] = val1[31:16] + val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QSAX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the halfwords of one operand, then subtract the high halfwords and add the low halfwords, saturating the results to the 16-bit signed integer range -215 <= x <= 215 - 1.

+
Parameters
+ + + +
val1first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
val2second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
+
+
+
Returns
    +
  • the saturated addition of the low halfword of the first operand and the high halfword of the second operand, in the low halfword of the return value.
    • +
  • the saturated subtraction of the low halfword of the second operand from the high halfword of the first operand, in the high halfword of the return value.
    • +
+
+
The returned results are saturated to the 16-bit signed integer range -215 <= x <= 215 - 1.
+
Operation:
res[15:0] = val1[15:0] + val2[31:16]
+
res[31:16] = val1[31:16] - val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QSUB (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to obtain the saturating subtraction of two integers.
+ The Q bit is set if the operation saturates.

+
Parameters
+ + + +
val1minuend of the saturating subtraction operation.
val2subtrahend of the saturating subtraction operation.
+
+
+
Returns
the saturating subtraction of val1 and val2.
+
Operation:
res[31:0] = SAT(val1 - SAT(val2))
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QSUB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit integer subtractions, saturating the results to the 16-bit signed integer range -215 <= x <= 215 - 1.

+
Parameters
+ + + +
val1first two 16-bit operands.
val2second two 16-bit operands.
+
+
+
Returns
    +
  • the saturated subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the returned result.
    • +
  • the saturated subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the returned result.
    • +
+
+
The returned results are saturated to the 16-bit signed integer range -215 <= x <= 215 - 1.
+
Operation:
res[15:0] = val1[15:0] - val2[15:0]
+
res[31:16] = val1[31:16] - val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __QSUB8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four 8-bit integer subtractions, saturating the results to the 8-bit signed integer range -27 <= x <= 27 - 1.

+
Parameters
+ + + +
val1first four 8-bit operands.
val2second four 8-bit operands.
+
+
+
Returns
    +
  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
    • +
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
    • +
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
    • +
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
    • +
+
+
The returned results are saturated to the 8-bit signed integer range -27 <= x <= 27 - 1.
+
Operation:
res[7:0] = val1[7:0] - val2[7:0]
+
res[15:8] = val1[15:8] - val2[15:8]
+
res[23:16] = val1[23:16] - val2[23:16]
+
res[31:24] = val1[31:24] - val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SADD16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit signed integer additions.
+ The GE bits in the APSR are set according to the results of the additions.

+
Parameters
+ + + +
val1first two 16-bit summands.
val2second two 16-bit summands.
+
+
+
Returns
    +
  • the addition of the low halfwords in the low halfword of the return value.
    • +
  • the addition of the high halfwords in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00
    • +
  • if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] + val2[15:0]
+
res[31:16] = val1[31:16] + val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SADD8 (uint32_t val1,
uint32_t val2 
)
+
+

This function performs four 8-bit signed integer additions. The GE bits of the APSR are set according to the results of the additions.

+
Parameters
+ + + +
val1first four 8-bit summands.
val2second four 8-bit summands.
+
+
+
Returns
    +
  • the addition of the first bytes from each operand, in the first byte of the return value.
    • +
  • the addition of the second bytes of each operand, in the second byte of the return value.
    • +
  • the addition of the third bytes of each operand, in the third byte of the return value.
    • +
  • the addition of the fourth bytes of each operand, in the fourth byte of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[7:0] >= 0 then APSR.GE[0] = 1 else 0
    • +
  • if res[15:8] >= 0 then APSR.GE[1] = 1 else 0
    • +
  • if res[23:16] >= 0 then APSR.GE[2] = 1 else 0
    • +
  • if res[31:24] >= 0 then APSR.GE[3] = 1 else 0
    • +
+
+
Operation:
res[7:0] = val1[7:0] + val2[7:0]
+
res[15:8] = val1[15:8] + val2[15:8]
+
res[23:16] = val1[23:16] + val2[23:16]
+
res[31:24] = val1[31:24] + val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SASX (uint32_t val1,
uint32_t val2 
)
+
+

This function inserts an SASX instruction into the instruction stream generated by the compiler. It enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords.
+ The GE bits in the APRS are set according to the results.

+
Parameters
+ + + +
val1first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
val2second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.
+
+
+
Returns
    +
  • the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00
    • +
  • if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] - val2[31:16]
+
res[31:16] = val1[31:16] + val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SEL (uint32_t val1,
uint32_t val2 
)
+
+

This function inserts a SEL instruction into the instruction stream generated by the compiler. It enables you to select bytes from the input parameters, whereby the bytes that are selected depend upon the results of previous SIMD instruction function. The results of previous SIMD instruction function are represented by the Greater than or Equal flags in the Application Program Status Register (APSR). The __SEL function works equally well on both halfword and byte operand function results. This is because halfword operand operations set two (duplicate) GE bits per value.

+
Parameters
+ + + +
val1four selectable 8-bit values.
val2four selectable 8-bit values.
+
+
+
Returns
The function selects bytes from the input parameters and returns them in the return value, res, according to the following criteria:
    +
  • if APSR.GE[0] == 1 then res[7:0] = val1[7:0] else res[7:0] = val2[7:0]
    • +
  • if APSR.GE[1] == 1 then res[15:8] = val1[15:8] else res[15:8] = val2[15:8]
    • +
  • if APSR.GE[2] == 1 then res[23:16] = val1[23:16] else res[23:16] = val2[23:16]
    • +
  • if APSR.GE[3] == 1 then res[31;24] = val1[31:24] else res = val2[31:24]
    • +
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SHADD16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two signed 16-bit integer additions, halving the results.

+
Parameters
+ + + +
val1first two 16-bit summands.
val2second two 16-bit summands.
+
+
+
Returns
    +
  • the halved addition of the low halfwords, in the low halfword of the return value.
    • +
  • the halved addition of the high halfwords, in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = val1[15:0] + val2[15:0] >> 1
+
res[31:16] = val1[31:16] + val2[31:16] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SHADD8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four signed 8-bit integer additions, halving the results.

+
Parameters
+ + + +
val1first four 8-bit summands.
val2second four 8-bit summands.
+
+
+
Returns
    +
  • the halved addition of the first bytes from each operand, in the first byte of the return value.
    • +
  • the halved addition of the second bytes from each operand, in the second byte of the return value.
    • +
  • the halved addition of the third bytes from each operand, in the third byte of the return value.
    • +
  • the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.
    • +
+
+
Operation:
res[7:0] = val1[7:0] + val2[7:0] >> 1
+
res[15:8] = val1[15:8] + val2[15:8] >> 1
+
res[23:16] = val1[23:16] + val2[23:16] >> 1
+
res[31:24] = val1[31:24] + val2[31:24] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SHASX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer addition and one signed 16-bit subtraction, and halve the results.

+
Parameters
+ + + +
val1first 16-bit operands.
val2second 16-bit operands.
+
+
+
Returns
    +
  • the halved subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = (val1[15:0] - val2[31:16]) >> 1
+
res[31:16] = (val1[31:16] - val2[15:0] ) >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SHSAX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer subtraction and one signed 16-bit addition, and halve the results.

+
Parameters
+ + + +
val1first 16-bit operands.
val2second 16-bit operands.
+
+
+
Returns
    +
  • the halved addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
    • +
  • the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = (val1[15:0] + val2[31:16]) >> 1
+
res[31:16] = (val1[31:16] - val2[15:0] ) >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SHSUB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two signed 16-bit integer subtractions, halving the results.

+
Parameters
+ + + +
val1first two 16-bit operands.
val2second two 16-bit operands.
+
+
+
Returns
    +
  • the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the returned result.
    • +
  • the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the returned result.
    • +
+
+
Operation:
res[15:0] = val1[15:0] - val2[15:0] >> 1
+
res[31:16] = val1[31:16] - val2[31:16] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SHSUB8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four signed 8-bit integer subtractions, halving the results.

+
Parameters
+ + + +
val1first four 8-bit operands.
val2second four 8-bit operands.
+
+
+
Returns
    +
  • the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
    • +
  • the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
    • +
  • the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
    • +
  • the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
    • +
+
+
Operation:
res[7:0] = val1[7:0] - val2[7:0] >> 1
+
res[15:8] = val1[15:8] - val2[15:8] >> 1
+
res[23:16] = val1[23:16] - val2[23:16] >> 1
+
res[31:24] = val1[31:24] - val2[31:24] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __SMLAD (uint32_t val1,
uint32_t val2,
uint32_t val3 
)
+
+

This function enables you to perform two signed 16-bit multiplications, adding both results to a 32-bit accumulate operand.
+ The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the product of each multiplication added to the accumulate value, as a 32-bit integer.
+
Operation:
p1 = val1[15:0] * val2[15:0]
+
p2 = val1[31:16] * val2[31:16]
+
res[31:0] = p1 + p2 + val3[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __SMLADX (uint32_t val1,
uint32_t val2,
uint32_t val3 
)
+
+

This function enables you to perform two signed 16-bit multiplications with exchanged halfwords of the second operand, adding both results to a 32-bit accumulate operand.
+ The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the product of each multiplication with exchanged halfwords of the second operand added to the accumulate value, as a 32-bit integer.
+
Operation:
p1 = val1[15:0] * val2[31:16]
+
p2 = val1[31:16] * val2[15:0]
+
res[31:0] = p1 + p2 + val3[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint64_t __SMLALD (uint32_t val1,
uint32_t val2,
uint64_t val3 
)
+
+

This function enables you to perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo264.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the product of each multiplication added to the accumulate value.
+
Operation:
p1 = val1[15:0] * val2[15:0]
+
p2 = val1[31:16] * val2[31:16]
+
sum = p1 + p2 + val3[63:32][31:0]
+
res[63:32] = sum[63:32]
+
res[31:0] = sum[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
unsigned long long __SMLALDX (uint32_t val1,
uint32_t val2,
unsigned long long val3 
)
+
+

This function enables you to exchange the halfwords of the second operand, and perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo264.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the product of each multiplication added to the accumulate value.
+
Operation:
p1 = val1[15:0] * val2[31:16]
+
p2 = val1[31:16] * val2[15:0]
+
sum = p1 + p2 + val3[63:32][31:0]
+
res[63:32] = sum[63:32]
+
res[31:0] = sum[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __SMLSD (uint32_t val1,
uint32_t val2,
uint32_t val3 
)
+
+

This function enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 32-bit accumulate operand.
+ The Q bit is set if the accumulation overflows. Overflow cannot occur during the multiplications or the subtraction.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the difference of the product of each multiplication, added to the accumulate value.
+
Operation:
p1 = val1[15:0] * val2[15:0]
+
p2 = val1[31:16] * val2[31:16]
+
res[31:0] = p1 - p2 + val3[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __SMLSDX (uint32_t val1,
uint32_t val2,
uint32_t val3 
)
+
+

This function enables you to exchange the halfwords in the second operand, then perform two 16-bit signed multiplications. The difference of the products is added to a 32-bit accumulate operand.
+ The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications or the subtraction.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the difference of the product of each multiplication, added to the accumulate value.
+
Operation:
p1 = val1[15:0] * val2[31:16]
+
p2 = val1[31:16] * val2[15:0]
+
res[31:0] = p1 - p2 + val3[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint64_t __SMLSLD (uint32_t val1,
uint32_t val2,
uint64_t val3 
)
+
+

This function It enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo264.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the difference of the product of each multiplication, added to the accumulate value.
+
Operation:
p1 = val1[15:0] * val2[15:0]
+
p2 = val1[31:16] * val2[31:16]
+
res[63:0] = p1 - p2 + val3[63:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
unsigned long long __SMLSLDX (uint32_t val1,
uint32_t val2,
unsigned long long val3 
)
+
+

This function enables you to exchange the halfwords of the second operand, perform two 16-bit multiplications, adding the difference of the products to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo264.

+
Parameters
+ + + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
val3accumulate value.
+
+
+
Returns
the difference of the product of each multiplication, added to the accumulate value.
+
Operation:
p1 = val1[15:0] * val2[31:16]
+
p2 = val1[31:16] * val2[15:0]
+
res[63:0] = p1 - p2 + val3[63:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __SMMLA (int32_t val1,
int32_t val2,
int32_t val3 
)
+
+

This function enables you to perform a signed 32-bit multiplications, adding the most significant 32 bits of the 64-bit result to a 32-bit accumulate operand.
+

+
Parameters
+ + + + +
val1first operand for multiplication.
val2second operand for multiplication.
val3accumulate value.
+
+
+
Returns
the product of multiplication (most significant 32 bits) is added to the accumulate value, as a 32-bit integer.
+
Operation:
p = val1 * val2
+
res[31:0] = p[61:32] + val3[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SMUAD (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit signed multiplications, adding the products together.
+ The Q bit is set if the addition overflows.

+
Parameters
+ + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
+
+
+
Returns
the sum of the products of the two 16-bit signed multiplications.
+
Operation:
p1 = val1[15:0] * val2[15:0]
+
p2 = val1[31:16] * val2[31:16]
+
res[31:0] = p1 + p2
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SMUADX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit signed multiplications with exchanged halfwords of the second operand, adding the products together.
+ The Q bit is set if the addition overflows.

+
Parameters
+ + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
+
+
+
Returns
the sum of the products of the two 16-bit signed multiplications with exchanged halfwords of the second operand.
+
Operation:
p1 = val1[15:0] * val2[31:16]
+
p2 = val1[31:16] * val2[15:0]
+
res[31:0] = p1 + p2
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SMUSD (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit signed multiplications, taking the difference of the products by subtracting the high halfword product from the low halfword product.

+
Parameters
+ + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
+
+
+
Returns
the difference of the products of the two 16-bit signed multiplications.
+
Operation:
p1 = val1[15:0] * val2[15:0]
+
p2 = val1[31:16] * val2[31:16]
+
res[31:0] = p1 - p2
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SMUSDX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit signed multiplications, subtracting one of the products from the other. The halfwords of the second operand are exchanged before performing the arithmetic. This produces top * bottom and bottom * top multiplication.

+
Parameters
+ + + +
val1first 16-bit operands for each multiplication.
val2second 16-bit operands for each multiplication.
+
+
+
Returns
the difference of the products of the two 16-bit signed multiplications.
+
Operation:
p1 = val1[15:0] * val2[31:16]
+
p2 = val1[31:16] * val2[15:0]
+
res[31:0] = p1 - p2
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SSAT16 (uint32_t val1,
const uint32_t val2 
)
+
+

This function enables you to saturate two signed 16-bit values to a selected signed range.
+ The Q bit is set if either operation saturates.

+
Parameters
+ + + +
val1two signed 16-bit values to be saturated.
val2bit position for saturation, an integral constant expression in the range 1 to 16.
+
+
+
Returns
the sum of the absolute differences of the following bytes, added to the accumulation value:
    +
  • the signed saturation of the low halfword in val1, saturated to the bit position specified in val2 and returned in the low halfword of the return value.
    • +
  • the signed saturation of the high halfword in val1, saturated to the bit position specified in val2 and returned in the high halfword of the return value.
    • +
+
+
Operation:
Saturate halfwords in val1 to the signed range specified by the bit position in val2
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SSAX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the two halfwords of one operand and perform one 16-bit integer subtraction and one 16-bit addition.
+ The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
val2second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
+
+
+
Returns
    +
  • the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
    • +
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00
    • +
  • if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] + val2[31:16]
+
res[31:16] = val1[31:16] - val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SSUB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit signed integer subtractions.
+ The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first two 16-bit operands of each subtraction.
val2second two 16-bit operands of each subtraction.
+
+
+
Returns
    +
  • the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If
    +
  • res is the return value, then:
    • +
  • if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00
    • +
  • if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] - val2[15:0]
+
res[31:16] = val1[31:16] - val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SSUB8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four 8-bit signed integer subtractions.
+ The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first four 8-bit operands of each subtraction.
val2second four 8-bit operands of each subtraction.
+
+
+
Returns
    +
  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
    • +
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
    • +
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
    • +
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on
the results of the operation.
+
If res is the return value, then:
    +
  • if res[8:0] >= 0 then APSR.GE[0] = 1 else 0
    • +
  • if res[15:8] >= 0 then APSR.GE[1] = 1 else 0
    • +
  • if res[23:16] >= 0 then APSR.GE[2] = 1 else 0
    • +
  • if res[31:24] >= 0 then APSR.GE[3] = 1 else 0
    • +
+
+
Operation:
res[7:0] = val1[7:0] - val2[7:0]
+
res[15:8] = val1[15:8] - val2[15:8]
+
res[23:16] = val1[23:16] - val2[23:16]
+
res[31:24] = val1[31:24] - val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __SXTAB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to extract two 8-bit values from the second operand (at bit positions [7:0] and [23:16]), sign-extend them to 16-bits each, and add the results to the first operand.

+
Parameters
+ + + +
val1values added to the zero-extended to 16-bit values.
val2two 8-bit values to be extracted and zero-extended.
+
+
+
Returns
the addition of val1 and val2, where the 8-bit values in val2[7:0] and val2[23:16] have been extracted and sign-extended prior to the addition.
+
Operation:
res[15:0] = val1[15:0] + SignExtended(val2[7:0])
+
res[31:16] = val1[31:16] + SignExtended(val2[23:16])
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __SXTB16 (uint32_t val)
+
+

This function enables you to extract two 8-bit values from an operand and sign-extend them to 16 bits each.

+
Parameters
+ + +
valtwo 8-bit values in val[7:0] and val[23:16] to be sign-extended.
+
+
+
Returns
the 8-bit values sign-extended to 16-bit values.
    +
  • sign-extended value of val[7:0] in the low halfword of the return value.
    • +
  • sign-extended value of val[23:16] in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = SignExtended(val[7:0]
+
res[31:16] = SignExtended(val[23:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UADD16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit unsigned integer additions.
+ The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first two 16-bit summands for each addition.
val2second two 16-bit summands for each addition.
+
+
+
Returns
    +
  • the addition of the low halfwords in each operand, in the low halfword of the return value.
    • +
  • the addition of the high halfwords in each operand, in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[15:0] >= 0x10000 then APSR.GE[0] = 11 else 00
    • +
  • if res[31:16] >= 0x10000 then APSR.GE[1] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] + val2[15:0]
+
res[31:16] = val1[31:16] + val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UADD8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four unsigned 8-bit integer additions. The GE bits of the APSR are set according to the results.

+
Parameters
+ + + +
val1first four 8-bit summands for each addition.
val2second four 8-bit summands for each addition.
+
+
+
Returns
    +
  • the halved addition of the first bytes from each operand, in the first byte of the return value.
    • +
  • the halved addition of the second bytes from each operand, in the second byte of the return value.
    • +
  • the halved addition of the third bytes from each operand, in the third byte of the return value.
    • +
  • the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[7:0] >= 0x100 then APSR.GE[0] = 1 else 0
    • +
  • if res[15:8] >= 0x100 then APSR.GE[1] = 1 else 0
    • +
  • if res[23:16] >= 0x100 then APSR.GE[2] = 1 else 0
    • +
  • if res[31:24] >= 0x100 then APSR.GE[3] = 1 else 0
    • +
+
+
Operation:
res[7:0] = val1[7:0] + val2[7:0]
+
res[15:8] = val1[15:8] + val2[15:8]
+
res[23:16] = val1[23:16] + val2[23:16]
+
res[31:24] = val1[31:24] + val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UASX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the two halfwords of the second operand, add the high halfwords and subtract the low halfwords.
+ The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
val2second operand for the subtraction in the high halfword and the second operand for the addition in the low halfword.
+
+
+
Returns
    +
  • the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00
    • +
  • if res[31:16] >= 0x10000 then APSR.GE[3:2] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] - val2[31:16]
+
res[31:16] = val1[31:16] + val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UHADD16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two unsigned 16-bit integer additions, halving the results.

+
Parameters
+ + + +
val1first two 16-bit summands.
val2second two 16-bit summands.
+
+
+
Returns
    +
  • the halved addition of the low halfwords in each operand, in the low halfword of the return value.
    • +
  • the halved addition of the high halfwords in each operand, in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = val1[15:0] + val2[15:0] >> 1
+
res[31:16] = val1[31:16] + val2[31:16] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UHADD8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four unsigned 8-bit integer additions, halving the results.

+
Parameters
+ + + +
val1first four 8-bit summands.
val2second four 8-bit summands.
+
+
+
Returns
    +
  • the halved addition of the first bytes in each operand, in the first byte of the return value.
    • +
  • the halved addition of the second bytes in each operand, in the second byte of the return value.
    • +
  • the halved addition of the third bytes in each operand, in the third byte of the return value.
    • +
  • the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.
    • +
+
+
Operation:
res[7:0] = val1[7:0] + val2[7:0] >> 1
+
res[15:8] = val1[15:8] + val2[15:8] >> 1
+
res[23:16] = val1[23:16] + val2[23:16] >> 1
+
res[31:24] = val1[31:24] + val2[31:24] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UHASX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords, halving the results.

+
Parameters
+ + + +
val1first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword.
val2second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.
+
+
+
Returns
    +
  • the halved subtraction of the high halfword in the second operand from the low halfword in the first operand.
    • +
  • the halved addition of the high halfword in the first operand and the low halfword in the second operand.
    • +
+
+
Operation:
res[15:0] = (val1[15:0] - val2[31:16]) >> 1
+
res[31:16] = (val1[31:16] + val2[15:0] ) >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UHSAX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords, halving the results.

+
Parameters
+ + + +
val1first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
val2second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
+
+
+
Returns
    +
  • the halved addition of the high halfword in the second operand and the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = (val1[15:0] + val2[31:16]) >> 1
+
res[31:16] = (val1[31:16] - val2[15:0] ) >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UHSUB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two unsigned 16-bit integer subtractions, halving the results.

+
Parameters
+ + + +
val1first two 16-bit operands.
val2second two 16-bit operands.
+
+
+
Returns
    +
  • the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = val1[15:0] - val2[15:0] >> 1
+
res[31:16] = val1[31:16] - val2[31:16] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UHSUB8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four unsigned 8-bit integer subtractions, halving the results.

+
Parameters
+ + + +
val1first four 8-bit operands.
val2second four 8-bit operands.
+
+
+
Returns
    +
  • the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
    • +
  • the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
    • +
  • the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
    • +
  • the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
    • +
+
+
Operation:
res[7:0] = val1[7:0] - val2[7:0] >> 1
+
res[15:8] = val1[15:8] - val2[15:8] >> 1
+
res[23:16] = val1[23:16] - val2[23:16] >> 1
+
res[31:24] = val1[31:24] - val2[31:24] >> 1
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UQADD16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two unsigned 16-bit integer additions, saturating the results to the 16-bit unsigned integer range 0 < x < 216 - 1.

+
Parameters
+ + + +
val1first two 16-bit summands.
val2second two 16-bit summands.
+
+
+
Returns
    +
  • the addition of the low halfword in the first operand and the low halfword in the second operand, in the low halfword of the return value.
    • +
  • the addition of the high halfword in the first operand and the high halfword in the second operand, in the high halfword of the return value.
    • +
+
+
The results are saturated to the 16-bit unsigned integer range 0 < x < 216 - 1.
+
Operation:
res[15:0] = val1[15:0] + val2[15:0]
+
res[31:16] = val1[31:16] + val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UQADD8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four unsigned 8-bit integer additions, saturating the results to the 8-bit unsigned integer range 0 < x < 28 - 1.

+
Parameters
+ + + +
val1first four 8-bit summands.
val2second four 8-bit summands.
+
+
+
Returns
    +
  • the halved addition of the first bytes in each operand, in the first byte of the return value.
    • +
  • the halved addition of the second bytes in each operand, in the second byte of the return value.
    • +
  • the halved addition of the third bytes in each operand, in the third byte of the return value.
    • +
  • the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.
    • +
+
+
The results are saturated to the 8-bit unsigned integer range 0 < x < 28 - 1.
+
Operation:
res[7:0] = val1[7:0] + val2[7:0]
+
res[15:8] = val1[15:8] + val2[15:8]
+
res[23:16] = val1[23:16] + val2[23:16]
+
res[31:24] = val1[31:24] + val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UQASX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer addition and one unsigned 16-bit subtraction, saturating the results to the 16-bit unsigned integer range 0 <= x <= 216 - 1.

+
Parameters
+ + + +
val1first two 16-bit operands.
val2second two 16-bit operands.
+
+
+
Returns
    +
  • the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
The results are saturated to the 16-bit unsigned integer range 0 <= x <= 216 - 1.
+
Operation:
res[15:0] = val1[15:0] - val2[31:16]
+
res[31:16] = val1[31:16] + val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UQSAX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer subtraction and one unsigned 16-bit addition, saturating the results to the 16-bit unsigned integer range 0 <= x <= 216 - 1.

+
Parameters
+ + + +
val1first 16-bit operand for the addition in the low halfword, and the first 16-bit operand for the subtraction in the high halfword.
val2second 16-bit halfword for the addition in the high halfword, and the second 16-bit halfword for the subtraction in the low halfword.
+
+
+
Returns
    +
  • the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
    • +
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
The results are saturated to the 16-bit unsigned integer range 0 <= x <= 216 - 1.
+
Operation:
res[15:0] = val1[15:0] + val2[31:16]
+
res[31:16] = val1[31:16] - val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UQSUB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two unsigned 16-bit integer subtractions, saturating the results to the 16-bit unsigned integer range 0 < x < 216 - 1.

+
Parameters
+ + + +
val1first two 16-bit operands for each subtraction.
val2second two 16-bit operands for each subtraction.
+
+
+
Returns
    +
  • the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
The results are saturated to the 16-bit unsigned integer range 0 < x < 216 - 1.
+
Operation:
res[15:0] = val1[15:0] - val2[15:0]
+
res[31:16] = val1[31:16] - val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UQSUB8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four unsigned 8-bit integer subtractions, saturating the results to the 8-bit unsigned integer range 0 < x < 28 - 1.

+
Parameters
+ + + +
val1first four 8-bit operands.
val2second four 8-bit operands.
+
+
+
Returns
    +
  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
    • +
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
    • +
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
    • +
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
    • +
+
+
The results are saturated to the 8-bit unsigned integer range 0 < x < 28 - 1.
+
Operation:
res[7:0] = val1[7:0] - val2[7:0]
+
res[15:8] = val1[15:8] - val2[15:8]
+
res[23:16] = val1[23:16] - val2[23:16]
+
res[31:24] = val1[31:24] - val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __USAD8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences together, returning the result as a single unsigned integer.

+
Parameters
+ + + +
val1first four 8-bit operands for the subtractions.
val2second four 8-bit operands for the subtractions.
+
+
+
Returns
    +
  • the subtraction of the first byte in the second operand from the first byte in the first operand.
    • +
  • the subtraction of the second byte in the second operand from the second byte in the first operand.
    • +
  • the subtraction of the third byte in the second operand from the third byte in the first operand.
    • +
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand.
    • +
+
+
The sum is returned as a single unsigned integer.
+
Operation:
absdiff1 = val1[7:0] - val2[7:0]
+
absdiff2 = val1[15:8] - val2[15:8]
+
absdiff3 = val1[23:16] - val2[23:16]
+
absdiff4 = val1[31:24] - val2[31:24]
+
res[31:0] = absdiff1 + absdiff2 + absdiff3 + absdiff4
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
uint32_t __USADA8 (uint32_t val1,
uint32_t val2,
uint32_t val3 
)
+
+

This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences to a 32-bit accumulate operand.

+
Parameters
+ + + + +
val1first four 8-bit operands for the subtractions.
val2second four 8-bit operands for the subtractions.
val3accumulation value.
+
+
+
Returns
the sum of the absolute differences of the following bytes, added to the accumulation value:
    +
  • the subtraction of the first byte in the second operand from the first byte in the first operand.
    • +
  • the subtraction of the second byte in the second operand from the second byte in the first operand.
    • +
  • the subtraction of the third byte in the second operand from the third byte in the first operand.
    • +
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand.
    • +
+
+
Operation:
absdiff1 = val1[7:0] - val2[7:0]
+
absdiff2 = val1[15:8] - val2[15:8]
+
absdiff3 = val1[23:16] - val2[23:16]
+
absdiff4 = val1[31:24] - val2[31:24]
+
sum = absdiff1 + absdiff2 + absdiff3 + absdiff4
+
res[31:0] = sum[31:0] + val3[31:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __USAT16 (uint32_t val1,
const uint32_t val2 
)
+
+

This function enables you to saturate two signed 16-bit values to a selected unsigned range.
+ The Q bit is set if either operation saturates.

+
Parameters
+ + + +
val1two 16-bit values that are to be saturated.
val2bit position for saturation, and must be an integral constant expression in the range 0 to 15.
+
+
+
Returns
the saturation of the two signed 16-bit values, as non-negative values.
    +
  • the saturation of the low halfword in val1, saturated to the bit position specified in val2 and returned in the low halfword of the return value.
    • +
  • the saturation of the high halfword in val1, saturated to the bit position specified in val2 and returned in the high halfword of the return value.
    • +
+
+
Operation:
Saturate halfwords in val1 to the unsigned range specified by the bit position in val2
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __USAX (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords.
+ The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword.
val2second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.
+
+
+
Returns
    +
  • the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value.
    • +
  • the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[15:0] >= 0x10000 then APSR.GE[1:0] = 11 else 00
    • +
  • if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] + val2[31:16]
+
res[31:16] = val1[31:16] - val2[15:0]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __USUB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform two 16-bit unsigned integer subtractions.
+ The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first two 16-bit operands.
val2second two 16-bit operands.
+
+
+
Returns
    +
  • the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value.
    • +
  • the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00
    • +
  • if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00
    • +
+
+
Operation:
res[15:0] = val1[15:0] - val2[15:0]
+
res[31:16] = val1[31:16] - val2[31:16]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __USUB8 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to perform four 8-bit unsigned integer subtractions. The GE bits in the APSR are set according to the results.

+
Parameters
+ + + +
val1first four 8-bit operands.
val2second four 8-bit operands.
+
+
+
Returns
    +
  • the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value.
    • +
  • the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value.
    • +
  • the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value.
    • +
  • the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.
    • +
+
+
Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.
+
If res is the return value, then:
    +
  • if res[8:0] >= 0 then APSR.GE[0] = 1 else 0
    • +
  • if res[15:8] >= 0 then APSR.GE[1] = 1 else 0
    • +
  • if res[23:16] >= 0 then APSR.GE[2] = 1 else 0
    • +
  • if res[31:24] >= 0 then APSR.GE[3] = 1 else 0
    • +
+
+
Operation:
res[7:0] = val1[7:0] - val2[7:0]
+
res[15:8] = val1[15:8] - val2[15:8]
+
res[23:16] = val1[23:16] - val2[23:16]
+
res[31:24] = val1[31:24] - val2[31:24]
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
uint32_t __UXTAB16 (uint32_t val1,
uint32_t val2 
)
+
+

This function enables you to extract two 8-bit values from one operand, zero-extend them to 16 bits each, and add the results to two 16-bit values from another operand.

+
Parameters
+ + + +
val1value added to the zero-extended to 16-bit values.
val2two 8-bit values to be extracted and zero-extended.
+
+
+
Returns
the 8-bit values in val2, zero-extended to 16-bit values and added to val1.
+
Operation:
res[15:0] = ZeroExt(val2[7:0] to 16 bits) + val1[15:0]
+
res[31:16] = ZeroExt(val2[31:16] to 16 bits) + val1[31:16]
+
+ +
+
+ +
+
+ + + + + + + + +
uint32_t __UXTB16 (uint32_t val)
+
+

This function enables you to extract two 8-bit values from an operand and zero-extend them to 16 bits each.

+
Parameters
+ + +
valtwo 8-bit values in val[7:0] and val[23:16] to be sign-extended.
+
+
+
Returns
the 8-bit values zero-extended to 16-bit values.
    +
  • zero-extended value of val[7:0] in the low halfword of the return value.
    • +
  • zero-extended value of val[23:16] in the high halfword of the return value.
    • +
+
+
Operation:
res[15:0] = ZeroExtended(val[7:0] )
+
res[31:16] = ZeroExtended(val[23:16])
+
+ +
+
+
+
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+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Peripheral Access
+
+
+ +

Describes naming conventions, requirements, and optional features for accessing peripherals. +More...

+ + + + + + + + +

+Macros

#define _VAL2FLD(field, value)
 Mask and shift a bit field value for assigning to result to a peripheral register.
 
#define _FLD2VAL(field, value)
 Extract from a peripheral register value the a bit field value.
 
+

Description

+

The section below describes the naming conventions, requirements, and optional features for accessing device specific peripherals. Most of the rules also apply to the core peripherals. The Device Header File <device.h> contains typically these definition and also includes the core specific header files.

+

Most of the definitions can be generated using the CMSIS-SVD System View Description for Peripherals. Refer to SVDConv.exe for more information.

+

Each peripheral provides a data type definition with a name that is composed of:

+
    +
  • prefix <device abbreviation>_
    • +
  • <peripheral name>
    • +
  • postfix _Type or _TypeDef to identify a type definition.
    • +
+

Example: LPC_UART_TypeDef for the device LPC and the peripheral UART.

+

The data type definition uses standard C data types defined by the ANSI C header file <stdint.h>.

+
    +
  • IO Type Qualifiers are used to specify the access to peripheral variables. + + + + + + + + + + + + + + +
    IO Type Qualifier Type Description
    __IM Struct member Defines 'read only' permissions
    __OM Struct member Defines 'write only' permissions
    __IOM Struct member Defines 'read / write' permissions
    __I Scalar variable Defines 'read only' permissions
    __O Scalar variable Defines 'write only' permissions
    __IO Scalar variable Defines 'read / write' permissions
    +
    • +
+
Note
__IM, __OM, __IOM are added in CMSIS-Core V4.20 to enhance support for C++. Prior version used __I, __O, __IO also for struct member definitions.
+

The typedef <device abbreviation>_UART_TypeDef shown below defines the generic register layout for all UART channels in a device.

+
typedef struct
+
{
+
union {
+
__IM uint8_t RBR; /* Offset: 0x000 (R/ ) Receiver Buffer Register */
+
__OM uint8_t THR; /* Offset: 0x000 ( /W) Transmit Holding Register */
+
__IOM uint8_t DLL; /* Offset: 0x000 (R/W) Divisor Latch LSB */
+
uint32_t RESERVED0;
+
};
+
union {
+
__IOM uint8_t DLM; /* Offset: 0x004 (R/W) Divisor Latch MSB */
+
__IOM uint32_t IER; /* Offset: 0x004 (R/W) Interrupt Enable Register */
+
};
+
union {
+
__IM uint32_t IIR; /* Offset: 0x008 (R/ ) Interrupt ID Register */
+
__OM uint8_t FCR; /* Offset: 0x008 ( /W) FIFO Control Register */
+
};
+
__IOM uint8_t LCR; /* Offset: 0x00C (R/W) Line Control Register */
+
uint8_t RESERVED1[7];
+
__IM uint8_t LSR; /* Offset: 0x014 (R/ ) Line Status Register */
+
uint8_t RESERVED2[7];
+
__IOM uint8_t SCR; /* Offset: 0x01C (R/W) Scratch Pad Register */
+
uint8_t RESERVED3[3];
+
__IOM uint32_t ACR; /* Offset: 0x020 (R/W) Autobaud Control Register */
+
__IOM uint8_t ICR; /* Offset: 0x024 (R/W) IrDA Control Register */
+
uint8_t RESERVED4[3];
+
__IOM uint8_t FDR; /* Offset: 0x028 (R/W) Fractional Divider Register */
+
uint8_t RESERVED5[7];
+
__IOM uint8_t TER; /* Offset: 0x030 (R/W) Transmit Enable Register */
+
uint8_t RESERVED6[39];
+
__IM uint8_t FIFOLVL; /* Offset: 0x058 (R/ ) FIFO Level Register */
+
} LPC_UART_TypeDef;
+

To access the registers of the UART defined above, pointers to this register structure are defined. If more instances of a peripheral exist, the variables have a postfix (digit or letter) that identifies the peripheral.

+

Example: In this example LPC_UART2 and LPC_UART3 are two pointers to UARTs defined with above register structure.
+

+
#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )
+
#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )
+

The registers in the various UARTs can now be referred in the user code as shown below:
+

+
val = LPC_UART2->DR // is the data register of UART1.
+
+

+Minimal Requirements

+

To access the peripheral registers and related function in a device, the files device.h and core_cm#.h define as a minimum:
+
+

+
    +
  • The Register Layout Typedef for each peripheral that defines all register names. RESERVED is used to introduce space into the structure for adjusting the addresses of the peripheral registers.
    +
    + Example:
    typedef struct
    +
    {
    +
    __IOM uint32_t CTRL; /* Offset: 0x000 (R/W) SysTick Control and Status Register */
    +
    __IOM uint32_t LOAD; /* Offset: 0x004 (R/W) SysTick Reload Value Register */
    +
    __IOM uint32_t VAL; /* Offset: 0x008 (R/W) SysTick Current Value Register */
    +
    __IM uint32_t CALIB; /* Offset: 0x00C (R/ ) SysTick Calibration Register */
    +
    } SysTick_Type;
    +
    • +
+
    +
  • Base Address for each peripheral (in case of multiple peripherals that use the same register layout typedef multiple base addresses are defined).
    +
    + Example:
    #define SysTick_BASE (SCS_BASE + 0x0010) /* SysTick Base Address */
    +
    • +
+
    +
  • Access Definitions for each peripheral. In case of multiple peripherals that are using the same register layout typdef, multiple access definitions exist (LPC_UART0, LPC_UART2).
    +
    + Example:
    #define SysTick ((SysTick_Type *) Systick_BASE) /* SysTick access definition */
    +
    • +
+

These definitions allow accessing peripheral registers with simple assignments.

+
    +
  • Example:
    +
    SysTick->CTRL = 0;
    +
    • +
+
+

+Optional Features

+

Optionally, the file device.h may define:

+
    +
  • Register Bit Fields and #define constants that simplify access to peripheral registers. These constants may define bit-positions or other specific patterns that are required for programming peripheral registers. The identifiers should start with <device abbreviation>_ and <peripheral name>_. It is recommended to use CAPITAL letters for #define constants.
    • +
+
    +
  • More complex functions (i.e. status query before a sending register is accessed). Again, these functions start with <device abbreviation>_ and <peripheral name>_.
    • +
+
+

+Register Bit Fields

+

For Core Register, macros define the position and the mask value for a bit field. It is recommended to create such definitions also for other peripheral registers.

+

Example:

+

Bit field definitions for register CPUID in SCB (System Control Block).

+
/* SCB CPUID Register Definitions */
+
#define SCB_CPUID_IMPLEMENTER_Pos 24U
+
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)
+
#define SCB_CPUID_VARIANT_Pos 20U
+
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos)
+
#define SCB_CPUID_ARCHITECTURE_Pos 16U
+
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)
+
#define SCB_CPUID_PARTNO_Pos 4U
+
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos)
+
#define SCB_CPUID_REVISION_Pos 0U
+
#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)
+

The macros _VAL2FLD(field, value) and _FLD2VAL(field, value) enable access to bit fields.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define _FLD2VAL( field,
 value 
)
+
+
Parameters
+ + + +
fieldname of bit field.
valuevalue of the register
+
+
+

The macro _FLD2VAL uses the #define's _Pos and _Msk of the related bit field to extract the value of a bit field from a register.

+

Example:

+
id = = _FLD2VAL(SCB_CPUID_REVISION, SCB->CPUID);
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
#define _VAL2FLD( field,
 value 
)
+
+
Parameters
+ + + +
fieldname of bit field.
valuevalue for the bit field.
+
+
+

The macro _VAL2FLD uses the #define's _Pos and _Msk of the related bit field to shift bit-field values for assigning to a register.

+

Example:

+
SCB->CPUID = _VAL2FLD(SCB_CPUID_REVISION, 0x3) | _VAL2FLD(SCB_CPUID_VARIANT, 0x3);
+
+
+
+
+
+ + + + diff --git a/Documentation/Core/html/group__peripheral__gr.js b/Documentation/Core/html/group__peripheral__gr.js new file mode 100644 index 0000000..39b83c7 --- /dev/null +++ b/Documentation/Core/html/group__peripheral__gr.js @@ -0,0 +1,5 @@ +var group__peripheral__gr = +[ + [ "_FLD2VAL", "group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444", null ], + [ "_VAL2FLD", "group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/group__system__init__gr.html b/Documentation/Core/html/group__system__init__gr.html new file mode 100644 index 0000000..91fd650 --- /dev/null +++ b/Documentation/Core/html/group__system__init__gr.html @@ -0,0 +1,230 @@ + + + + + +System and Clock Configuration +CMSIS-CORE: System and Clock Configuration + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions | +Variables
+
+
System and Clock Configuration
+
+
+ +

Describes system_device.c file that contains functions for system and clock setup. +More...

+ + + + + + + + +

+Functions

void SystemInit (void)
 Function to Initialize the system.
 
void SystemCoreClockUpdate (void)
 Function to update the variable SystemCoreClock.
 
+ + + + +

+Variables

uint32_t SystemCoreClock
 Variable to hold the system core clock value.
 
+

Description

+

ARM provides a template file system_device.c that must be adapted by the silicon vendor to match their actual device. As a minimum requirement, this file must provide:

+
    +
  • A device-specific system configuration function, SystemInit().
    • +
  • A global variable that contains the system frequency, SystemCoreClock.
    • +
+

The file configures the device and, typically, initializes the oscillator (PLL) that is part of the microcontroller device. This file might export other functions or variables that provide a more flexible configuration of the microcontroller system.

+

+Code Example

+

The code below shows the usage of the variable SystemCoreClock and the functions SystemInit() and SystemCoreClockUpdate() with an LPC1700.

+
#include "LPC17xx.h"
+
+
uint32_t coreClock_1 = 0; /* Variables to store core clock values */
+
uint32_t coreClock_2 = 0;
+
+
+
int main (void) {
+
+
coreClock_1 = SystemCoreClock; /* Store value of predefined SystemCoreClock */
+
+
SystemCoreClockUpdate(); /* Update SystemCoreClock according to register settings */
+
+
coreClock_2 = SystemCoreClock; /* Store value of calculated SystemCoreClock */
+
+
if (coreClock_2 != coreClock_1) { /* Without changing the clock setting both core clock values should be the same */
+
// Error Handling
+
}
+
+
while(1);
+
}
+

Function Documentation

+ +
+
+ + + + + + + + +
void SystemCoreClockUpdate (void )
+
+

Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution. The function evaluates the clock register settings and calculates the current core clock.

+ +
+
+ +
+
+ + + + + + + + +
void SystemInit (void )
+
+

Initializes the microcontroller system. Typically, this function configures the oscillator (PLL) that is part of the microcontroller device. For systems with a variable clock speed, it updates the variable SystemCoreClock. SystemInit is called from the file startup_device.

+ +
+
+

Variable Documentation

+ +
+
+ + + + +
uint32_t SystemCoreClock
+
+

Holds the system core clock, which is the system clock frequency supplied to the SysTick timer and the processor core clock. This variable can be used by debuggers to query the frequency of the debug timer or to configure the trace clock speed.

+
Attention
Compilers must be configured to avoid removing this variable in case the application program is not using it. Debugging systems require the variable to be physically present in memory so that it can be examined to configure the debugger.
+ +
+
+
+
+ + + + diff --git a/Documentation/Core/html/group__system__init__gr.js b/Documentation/Core/html/group__system__init__gr.js new file mode 100644 index 0000000..1ed21ea --- /dev/null +++ b/Documentation/Core/html/group__system__init__gr.js @@ -0,0 +1,6 @@ +var group__system__init__gr = +[ + [ "SystemCoreClockUpdate", "group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f", null ], + [ "SystemInit", "group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2", null ], + [ "SystemCoreClock", "group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/index.html b/Documentation/Core/html/index.html new file mode 100644 index 0000000..0799a18 --- /dev/null +++ b/Documentation/Core/html/index.html @@ -0,0 +1,181 @@ + + + + + +Overview +CMSIS-CORE: Overview + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Overview
+
+
+

CMSIS-CORE implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:

+
    +
  • Hardware Abstraction Layer (HAL) for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.
    • +
  • System exception names to interface to system exceptions without having compatibility issues.
    • +
  • Methods to organize header files that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.
    • +
  • Methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function is essential for configuring the clock system of the device.
    • +
  • Intrinsic functions used to generate CPU instructions that are not supported by standard C functions.
    • +
  • A variable to determine the system clock frequency which simplifies the setup the SysTick timer.
    • +
+

The following sections provide details about the CMSIS-CORE:

+ +
+

CMSIS-CORE in ARM::CMSIS Pack

+

Files relevant to CMSIS-CORE are present in the following ARM::CMSIS directories:

+ + + + + + + + + + + +
File/Folder Content
CMSIS\Documentation\Core This documentation
CMSIS\Include CMSIS-CORE header files (for example core_cm3.h, core_cmInstr.h, etc.)
Device ARM reference implementations of Cortex-M devices
Device\_Template_Vendor Template Files for extension by silicon vendors
+
+

+Cortex-M Reference Manuals

+

The Cortex-M Reference Manuals are generic user guides for devices that implement the various ARM Cortex-M processors. These manuals contain the programmers model and detailed information about the core peripherals.

+ +
+

+Tested and Verified Toolchains

+

The CMSIS-CORE Template Files supplied by ARM have been tested and verified with the following toolchains:

+
    +
  • ARM: MDK-ARM Version 5.16
    • +
  • GNU: GNU Tools ARM Embedded 4.9 2015.q2
    • +
  • IAR: IAR Embedded Workbench Kickstart Edition V6.10
    • +
+
+
+
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this.each(function(){a(this).css(f,h(this,b,!0,c)+"px")})}}),a.extend(a.expr[":"],{data:function(b,c,d){return!!a.data(b,d[3])},focusable:function(b){return c(b,!isNaN(a.attr(b,"tabindex")))},tabbable:function(b){var d=a.attr(b,"tabindex"),e=isNaN(d);return(e||d>=0)&&c(b,!e)}}),a(function(){var b=document.body,c=b.appendChild(c=document.createElement("div"));c.offsetHeight,a.extend(c.style,{minHeight:"100px",height:"auto",padding:0,borderWidth:0}),a.support.minHeight=c.offsetHeight===100,a.support.selectstart="onselectstart"in c,b.removeChild(c).style.display="none"}),a.extend(a.ui,{plugin:{add:function(b,c,d){var e=a.ui[b].prototype;for(var f in d)e.plugins[f]=e.plugins[f]||[],e.plugins[f].push([c,d[f]])},call:function(a,b,c){var d=a.plugins[b];if(!!d&&!!a.element[0].parentNode)for(var e=0;e0)return!0;b[d]=1,e=b[d]>0,b[d]=0;return e},isOverAxis:function(a,b,c){return a>b&&a=9)&&!b.button)return this._mouseUp(b);if(this._mouseStarted){this._mouseDrag(b);return b.preventDefault()}this._mouseDistanceMet(b)&&this._mouseDelayMet(b)&&(this._mouseStarted=this._mouseStart(this._mouseDownEvent,b)!==!1,this._mouseStarted?this._mouseDrag(b):this._mouseUp(b));return!this._mouseStarted},_mouseUp:function(b){a(document).unbind("mousemove."+this.widgetName,this._mouseMoveDelegate).unbind("mouseup."+this.widgetName,this._mouseUpDelegate),this._mouseStarted&&(this._mouseStarted=!1,b.target==this._mouseDownEvent.target&&a.data(b.target,this.widgetName+".preventClickEvent",!0),this._mouseStop(b));return!1},_mouseDistanceMet:function(a){return Math.max(Math.abs(this._mouseDownEvent.pageX-a.pageX),Math.abs(this._mouseDownEvent.pageY-a.pageY))>=this.options.distance},_mouseDelayMet:function(a){return this.mouseDelayMet},_mouseStart:function(a){},_mouseDrag:function(a){},_mouseStop:function(a){},_mouseCapture:function(a){return!0}})})(jQuery); +/* + * jQuery UI Resizable 1.8.18 + * + * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about) + * Dual licensed under the MIT or GPL Version 2 licenses. + * http://jquery.org/license + * + * http://docs.jquery.com/UI/Resizables + * + * Depends: + * jquery.ui.core.js + * jquery.ui.mouse.js + * jquery.ui.widget.js + */ +(function(a,b){a.widget("ui.resizable",a.ui.mouse,{widgetEventPrefix:"resize",options:{alsoResize:!1,animate:!1,animateDuration:"slow",animateEasing:"swing",aspectRatio:!1,autoHide:!1,containment:!1,ghost:!1,grid:!1,handles:"e,s,se",helper:!1,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:1e3},_create:function(){var b=this,c=this.options;this.element.addClass("ui-resizable"),a.extend(this,{_aspectRatio:!!c.aspectRatio,aspectRatio:c.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:c.helper||c.ghost||c.animate?c.helper||"ui-resizable-helper":null}),this.element[0].nodeName.match(/canvas|textarea|input|select|button|img/i)&&(this.element.wrap(a('
').css({position:this.element.css("position"),width:this.element.outerWidth(),height:this.element.outerHeight(),top:this.element.css("top"),left:this.element.css("left")})),this.element=this.element.parent().data("resizable",this.element.data("resizable")),this.elementIsWrapper=!0,this.element.css({marginLeft:this.originalElement.css("marginLeft"),marginTop:this.originalElement.css("marginTop"),marginRight:this.originalElement.css("marginRight"),marginBottom:this.originalElement.css("marginBottom")}),this.originalElement.css({marginLeft:0,marginTop:0,marginRight:0,marginBottom:0}),this.originalResizeStyle=this.originalElement.css("resize"),this.originalElement.css("resize","none"),this._proportionallyResizeElements.push(this.originalElement.css({position:"static",zoom:1,display:"block"})),this.originalElement.css({margin:this.originalElement.css("margin")}),this._proportionallyResize()),this.handles=c.handles||(a(".ui-resizable-handle",this.element).length?{n:".ui-resizable-n",e:".ui-resizable-e",s:".ui-resizable-s",w:".ui-resizable-w",se:".ui-resizable-se",sw:".ui-resizable-sw",ne:".ui-resizable-ne",nw:".ui-resizable-nw"}:"e,s,se");if(this.handles.constructor==String){this.handles=="all"&&(this.handles="n,e,s,w,se,sw,ne,nw");var d=this.handles.split(",");this.handles={};for(var e=0;e
');/sw|se|ne|nw/.test(f)&&h.css({zIndex:++c.zIndex}),"se"==f&&h.addClass("ui-icon ui-icon-gripsmall-diagonal-se"),this.handles[f]=".ui-resizable-"+f,this.element.append(h)}}this._renderAxis=function(b){b=b||this.element;for(var c in this.handles){this.handles[c].constructor==String&&(this.handles[c]=a(this.handles[c],this.element).show());if(this.elementIsWrapper&&this.originalElement[0].nodeName.match(/textarea|input|select|button/i)){var d=a(this.handles[c],this.element),e=0;e=/sw|ne|nw|se|n|s/.test(c)?d.outerHeight():d.outerWidth();var f=["padding",/ne|nw|n/.test(c)?"Top":/se|sw|s/.test(c)?"Bottom":/^e$/.test(c)?"Right":"Left"].join("");b.css(f,e),this._proportionallyResize()}if(!a(this.handles[c]).length)continue}},this._renderAxis(this.element),this._handles=a(".ui-resizable-handle",this.element).disableSelection(),this._handles.mouseover(function(){if(!b.resizing){if(this.className)var a=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i);b.axis=a&&a[1]?a[1]:"se"}}),c.autoHide&&(this._handles.hide(),a(this.element).addClass("ui-resizable-autohide").hover(function(){c.disabled||(a(this).removeClass("ui-resizable-autohide"),b._handles.show())},function(){c.disabled||b.resizing||(a(this).addClass("ui-resizable-autohide"),b._handles.hide())})),this._mouseInit()},destroy:function(){this._mouseDestroy();var b=function(b){a(b).removeClass("ui-resizable ui-resizable-disabled ui-resizable-resizing").removeData("resizable").unbind(".resizable").find(".ui-resizable-handle").remove()};if(this.elementIsWrapper){b(this.element);var c=this.element;c.after(this.originalElement.css({position:c.css("position"),width:c.outerWidth(),height:c.outerHeight(),top:c.css("top"),left:c.css("left")})).remove()}this.originalElement.css("resize",this.originalResizeStyle),b(this.originalElement);return this},_mouseCapture:function(b){var c=!1;for(var d in this.handles)a(this.handles[d])[0]==b.target&&(c=!0);return!this.options.disabled&&c},_mouseStart:function(b){var d=this.options,e=this.element.position(),f=this.element;this.resizing=!0,this.documentScroll={top:a(document).scrollTop(),left:a(document).scrollLeft()},(f.is(".ui-draggable")||/absolute/.test(f.css("position")))&&f.css({position:"absolute",top:e.top,left:e.left}),this._renderProxy();var g=c(this.helper.css("left")),h=c(this.helper.css("top"));d.containment&&(g+=a(d.containment).scrollLeft()||0,h+=a(d.containment).scrollTop()||0),this.offset=this.helper.offset(),this.position={left:g,top:h},this.size=this._helper?{width:f.outerWidth(),height:f.outerHeight()}:{width:f.width(),height:f.height()},this.originalSize=this._helper?{width:f.outerWidth(),height:f.outerHeight()}:{width:f.width(),height:f.height()},this.originalPosition={left:g,top:h},this.sizeDiff={width:f.outerWidth()-f.width(),height:f.outerHeight()-f.height()},this.originalMousePosition={left:b.pageX,top:b.pageY},this.aspectRatio=typeof d.aspectRatio=="number"?d.aspectRatio:this.originalSize.width/this.originalSize.height||1;var i=a(".ui-resizable-"+this.axis).css("cursor");a("body").css("cursor",i=="auto"?this.axis+"-resize":i),f.addClass("ui-resizable-resizing"),this._propagate("start",b);return!0},_mouseDrag:function(b){var c=this.helper,d=this.options,e={},f=this,g=this.originalMousePosition,h=this.axis,i=b.pageX-g.left||0,j=b.pageY-g.top||0,k=this._change[h];if(!k)return!1;var l=k.apply(this,[b,i,j]),m=a.browser.msie&&a.browser.version<7,n=this.sizeDiff;this._updateVirtualBoundaries(b.shiftKey);if(this._aspectRatio||b.shiftKey)l=this._updateRatio(l,b);l=this._respectSize(l,b),this._propagate("resize",b),c.css({top:this.position.top+"px",left:this.position.left+"px",width:this.size.width+"px",height:this.size.height+"px"}),!this._helper&&this._proportionallyResizeElements.length&&this._proportionallyResize(),this._updateCache(l),this._trigger("resize",b,this.ui());return!1},_mouseStop:function(b){this.resizing=!1;var c=this.options,d=this;if(this._helper){var e=this._proportionallyResizeElements,f=e.length&&/textarea/i.test(e[0].nodeName),g=f&&a.ui.hasScroll(e[0],"left")?0:d.sizeDiff.height,h=f?0:d.sizeDiff.width,i={width:d.helper.width()-h,height:d.helper.height()-g},j=parseInt(d.element.css("left"),10)+(d.position.left-d.originalPosition.left)||null,k=parseInt(d.element.css("top"),10)+(d.position.top-d.originalPosition.top)||null;c.animate||this.element.css(a.extend(i,{top:k,left:j})),d.helper.height(d.size.height),d.helper.width(d.size.width),this._helper&&!c.animate&&this._proportionallyResize()}a("body").css("cursor","auto"),this.element.removeClass("ui-resizable-resizing"),this._propagate("stop",b),this._helper&&this.helper.remove();return!1},_updateVirtualBoundaries:function(a){var b=this.options,c,e,f,g,h;h={minWidth:d(b.minWidth)?b.minWidth:0,maxWidth:d(b.maxWidth)?b.maxWidth:Infinity,minHeight:d(b.minHeight)?b.minHeight:0,maxHeight:d(b.maxHeight)?b.maxHeight:Infinity};if(this._aspectRatio||a)c=h.minHeight*this.aspectRatio,f=h.minWidth/this.aspectRatio,e=h.maxHeight*this.aspectRatio,g=h.maxWidth/this.aspectRatio,c>h.minWidth&&(h.minWidth=c),f>h.minHeight&&(h.minHeight=f),ea.width,k=d(a.height)&&e.minHeight&&e.minHeight>a.height;j&&(a.width=e.minWidth),k&&(a.height=e.minHeight),h&&(a.width=e.maxWidth),i&&(a.height=e.maxHeight);var l=this.originalPosition.left+this.originalSize.width,m=this.position.top+this.size.height,n=/sw|nw|w/.test(g),o=/nw|ne|n/.test(g);j&&n&&(a.left=l-e.minWidth),h&&n&&(a.left=l-e.maxWidth),k&&o&&(a.top=m-e.minHeight),i&&o&&(a.top=m-e.maxHeight);var p=!a.width&&!a.height;p&&!a.left&&a.top?a.top=null:p&&!a.top&&a.left&&(a.left=null);return a},_proportionallyResize:function(){var b=this.options;if(!!this._proportionallyResizeElements.length){var c=this.helper||this.element;for(var d=0;d');var d=a.browser.msie&&a.browser.version<7,e=d?1:0,f=d?2:-1;this.helper.addClass(this._helper).css({width:this.element.outerWidth()+f,height:this.element.outerHeight()+f,position:"absolute",left:this.elementOffset.left-e+"px",top:this.elementOffset.top-e+"px",zIndex:++c.zIndex}),this.helper.appendTo("body").disableSelection()}else this.helper=this.element},_change:{e:function(a,b,c){return{width:this.originalSize.width+b}},w:function(a,b,c){var d=this.options,e=this.originalSize,f=this.originalPosition;return{left:f.left+b,width:e.width-b}},n:function(a,b,c){var d=this.options,e=this.originalSize,f=this.originalPosition;return{top:f.top+c,height:e.height-c}},s:function(a,b,c){return{height:this.originalSize.height+c}},se:function(b,c,d){return a.extend(this._change.s.apply(this,arguments),this._change.e.apply(this,[b,c,d]))},sw:function(b,c,d){return a.extend(this._change.s.apply(this,arguments),this._change.w.apply(this,[b,c,d]))},ne:function(b,c,d){return a.extend(this._change.n.apply(this,arguments),this._change.e.apply(this,[b,c,d]))},nw:function(b,c,d){return a.extend(this._change.n.apply(this,arguments),this._change.w.apply(this,[b,c,d]))}},_propagate:function(b,c){a.ui.plugin.call(this,b,[c,this.ui()]),b!="resize"&&this._trigger(b,c,this.ui())},plugins:{},ui:function(){return{originalElement:this.originalElement,element:this.element,helper:this.helper,position:this.position,size:this.size,originalSize:this.originalSize,originalPosition:this.originalPosition}}}),a.extend(a.ui.resizable,{version:"1.8.18"}),a.ui.plugin.add("resizable","alsoResize",{start:function(b,c){var d=a(this).data("resizable"),e=d.options,f=function(b){a(b).each(function(){var b=a(this);b.data("resizable-alsoresize",{width:parseInt(b.width(),10),height:parseInt(b.height(),10),left:parseInt(b.css("left"),10),top:parseInt(b.css("top"),10)})})};typeof e.alsoResize=="object"&&!e.alsoResize.parentNode?e.alsoResize.length?(e.alsoResize=e.alsoResize[0],f(e.alsoResize)):a.each(e.alsoResize,function(a){f(a)}):f(e.alsoResize)},resize:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.originalSize,g=d.originalPosition,h={height:d.size.height-f.height||0,width:d.size.width-f.width||0,top:d.position.top-g.top||0,left:d.position.left-g.left||0},i=function(b,d){a(b).each(function(){var b=a(this),e=a(this).data("resizable-alsoresize"),f={},g=d&&d.length?d:b.parents(c.originalElement[0]).length?["width","height"]:["width","height","top","left"];a.each(g,function(a,b){var c=(e[b]||0)+(h[b]||0);c&&c>=0&&(f[b]=c||null)}),b.css(f)})};typeof e.alsoResize=="object"&&!e.alsoResize.nodeType?a.each(e.alsoResize,function(a,b){i(a,b)}):i(e.alsoResize)},stop:function(b,c){a(this).removeData("resizable-alsoresize")}}),a.ui.plugin.add("resizable","animate",{stop:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d._proportionallyResizeElements,g=f.length&&/textarea/i.test(f[0].nodeName),h=g&&a.ui.hasScroll(f[0],"left")?0:d.sizeDiff.height,i=g?0:d.sizeDiff.width,j={width:d.size.width-i,height:d.size.height-h},k=parseInt(d.element.css("left"),10)+(d.position.left-d.originalPosition.left)||null,l=parseInt(d.element.css("top"),10)+(d.position.top-d.originalPosition.top)||null;d.element.animate(a.extend(j,l&&k?{top:l,left:k}:{}),{duration:e.animateDuration,easing:e.animateEasing,step:function(){var c={width:parseInt(d.element.css("width"),10),height:parseInt(d.element.css("height"),10),top:parseInt(d.element.css("top"),10),left:parseInt(d.element.css("left"),10)};f&&f.length&&a(f[0]).css({width:c.width,height:c.height}),d._updateCache(c),d._propagate("resize",b)}})}}),a.ui.plugin.add("resizable","containment",{start:function(b,d){var e=a(this).data("resizable"),f=e.options,g=e.element,h=f.containment,i=h instanceof a?h.get(0):/parent/.test(h)?g.parent().get(0):h;if(!!i){e.containerElement=a(i);if(/document/.test(h)||h==document)e.containerOffset={left:0,top:0},e.containerPosition={left:0,top:0},e.parentData={element:a(document),left:0,top:0,width:a(document).width(),height:a(document).height()||document.body.parentNode.scrollHeight};else{var j=a(i),k=[];a(["Top","Right","Left","Bottom"]).each(function(a,b){k[a]=c(j.css("padding"+b))}),e.containerOffset=j.offset(),e.containerPosition=j.position(),e.containerSize={height:j.innerHeight()-k[3],width:j.innerWidth()-k[1]};var l=e.containerOffset,m=e.containerSize.height,n=e.containerSize.width,o=a.ui.hasScroll(i,"left")?i.scrollWidth:n,p=a.ui.hasScroll(i)?i.scrollHeight:m;e.parentData={element:i,left:l.left,top:l.top,width:o,height:p}}}},resize:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.containerSize,g=d.containerOffset,h=d.size,i=d.position,j=d._aspectRatio||b.shiftKey,k={top:0,left:0},l=d.containerElement;l[0]!=document&&/static/.test(l.css("position"))&&(k=g),i.left<(d._helper?g.left:0)&&(d.size.width=d.size.width+(d._helper?d.position.left-g.left:d.position.left-k.left),j&&(d.size.height=d.size.width/e.aspectRatio),d.position.left=e.helper?g.left:0),i.top<(d._helper?g.top:0)&&(d.size.height=d.size.height+(d._helper?d.position.top-g.top:d.position.top),j&&(d.size.width=d.size.height*e.aspectRatio),d.position.top=d._helper?g.top:0),d.offset.left=d.parentData.left+d.position.left,d.offset.top=d.parentData.top+d.position.top;var m=Math.abs((d._helper?d.offset.left-k.left:d.offset.left-k.left)+d.sizeDiff.width),n=Math.abs((d._helper?d.offset.top-k.top:d.offset.top-g.top)+d.sizeDiff.height),o=d.containerElement.get(0)==d.element.parent().get(0),p=/relative|absolute/.test(d.containerElement.css("position"));o&&p +&&(m-=d.parentData.left),m+d.size.width>=d.parentData.width&&(d.size.width=d.parentData.width-m,j&&(d.size.height=d.size.width/d.aspectRatio)),n+d.size.height>=d.parentData.height&&(d.size.height=d.parentData.height-n,j&&(d.size.width=d.size.height*d.aspectRatio))},stop:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.position,g=d.containerOffset,h=d.containerPosition,i=d.containerElement,j=a(d.helper),k=j.offset(),l=j.outerWidth()-d.sizeDiff.width,m=j.outerHeight()-d.sizeDiff.height;d._helper&&!e.animate&&/relative/.test(i.css("position"))&&a(this).css({left:k.left-h.left-g.left,width:l,height:m}),d._helper&&!e.animate&&/static/.test(i.css("position"))&&a(this).css({left:k.left-h.left-g.left,width:l,height:m})}}),a.ui.plugin.add("resizable","ghost",{start:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.size;d.ghost=d.originalElement.clone(),d.ghost.css({opacity:.25,display:"block",position:"relative",height:f.height,width:f.width,margin:0,left:0,top:0}).addClass("ui-resizable-ghost").addClass(typeof e.ghost=="string"?e.ghost:""),d.ghost.appendTo(d.helper)},resize:function(b,c){var d=a(this).data("resizable"),e=d.options;d.ghost&&d.ghost.css({position:"relative",height:d.size.height,width:d.size.width})},stop:function(b,c){var d=a(this).data("resizable"),e=d.options;d.ghost&&d.helper&&d.helper.get(0).removeChild(d.ghost.get(0))}}),a.ui.plugin.add("resizable","grid",{resize:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.size,g=d.originalSize,h=d.originalPosition,i=d.axis,j=e._aspectRatio||b.shiftKey;e.grid=typeof e.grid=="number"?[e.grid,e.grid]:e.grid;var k=Math.round((f.width-g.width)/(e.grid[0]||1))*(e.grid[0]||1),l=Math.round((f.height-g.height)/(e.grid[1]||1))*(e.grid[1]||1);/^(se|s|e)$/.test(i)?(d.size.width=g.width+k,d.size.height=g.height+l):/^(ne)$/.test(i)?(d.size.width=g.width+k,d.size.height=g.height+l,d.position.top=h.top-l):/^(sw)$/.test(i)?(d.size.width=g.width+k,d.size.height=g.height+l,d.position.left=h.left-k):(d.size.width=g.width+k,d.size.height=g.height+l,d.position.top=h.top-l,d.position.left=h.left-k)}});var c=function(a){return parseInt(a,10)||0},d=function(a){return!isNaN(parseInt(a,10))}})(jQuery); +/* + * jQuery hashchange event - v1.3 - 7/21/2010 + * http://benalman.com/projects/jquery-hashchange-plugin/ + * + * Copyright (c) 2010 "Cowboy" Ben Alman + * Dual licensed under the MIT and GPL licenses. + * http://benalman.com/about/license/ + */ +(function($,e,b){var c="hashchange",h=document,f,g=$.event.special,i=h.documentMode,d="on"+c in e&&(i===b||i>7);function a(j){j=j||location.href;return"#"+j.replace(/^[^#]*#?(.*)$/,"$1")}$.fn[c]=function(j){return j?this.bind(c,j):this.trigger(c)};$.fn[c].delay=50;g[c]=$.extend(g[c],{setup:function(){if(d){return false}$(f.start)},teardown:function(){if(d){return false}$(f.stop)}});f=(function(){var j={},p,m=a(),k=function(q){return q},l=k,o=k;j.start=function(){p||n()};j.stop=function(){p&&clearTimeout(p);p=b};function n(){var r=a(),q=o(m);if(r!==m){l(m=r,q);$(e).trigger(c)}else{if(q!==m){location.href=location.href.replace(/#.*/,"")+q}}p=setTimeout(n,$.fn[c].delay)}$.browser.msie&&!d&&(function(){var q,r;j.start=function(){if(!q){r=$.fn[c].src;r=r&&r+a();q=$(' + + +
+
+
Reference
+
+
+
Here is a list of all modules:
+
[detail level 12]
+ + + + + + + + + + + + +
oPeripheral AccessDescribes naming conventions, requirements, and optional features for accessing peripherals
oSystem and Clock ConfigurationDescribes system_device.c file that contains functions for system and clock setup
oInterrupts and Exceptions (NVIC)Explains how to use interrupts and exceptions and access functions for the Nested Vector Interrupt Controller (NVIC)
oCore Register AccessFunctions to access the Cortex-M core registers
oIntrinsic Functions for CPU InstructionsFunctions that generate specific Cortex-M CPU Instructions
oIntrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]Access to dedicated SIMD instructions
oSystick Timer (SYSTICK)Initialize and start the SysTick timer
oDebug AccessDebug Access to the Instrumented Trace Macrocell (ITM)
oFPU Functions (only Cortex-M7)Functions that relate to the Floating-Point Arithmetic Unit
\Cache Functions (only Cortex-M7)Functions for Instruction and Data Cache
 oI-Cache FunctionsFunctions for the instruction cache
 \D-Cache FunctionsFunctions for the data cache
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a/Documentation/Core/html/pages.html b/Documentation/Core/html/pages.html new file mode 100644 index 0000000..c584f96 --- /dev/null +++ b/Documentation/Core/html/pages.html @@ -0,0 +1,143 @@ + + + + + +Usage and Description +CMSIS-CORE: Usage and Description + + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-CORE +  Version 4.30 +
+
CMSIS-CORE support for Cortex-M processor-based devices
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Usage and Description
+
+
+
Here is a list of all related documentation pages:
+
[detail level 12]
+ + + + + + + + + + + +
oRevision History of CMSIS-CORE
oUsing CMSIS in Embedded Applications
|oBasic CMSIS Example
|oUsing Interrupt Vector Remap
|\Using CMSIS with generic ARM Processors
oTemplate Files
|oStartup File startup_<device>.s
|oSystem Configuration Files system_<device>.c and system_<device>.h
|\Device Header File <device.h>
oMISRA-C:2004 Compliance Exceptions
\Register Mapping
+
+
+
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+} + +#MSearchBox { + white-space : nowrap; + position: absolute; + float: none; + display: inline; + margin-top: 3px; + right: 0px; + width: 170px; + z-index: 102; +} + +#MSearchBox .left +{ + display:block; + position:absolute; + left:10px; + width:20px; + height:19px; + background:url('search_l.png') no-repeat; + background-position:right; +} + +#MSearchSelect { + display:block; + position:absolute; + width:20px; + height:19px; +} + +.left #MSearchSelect { + left:4px; +} + +.right #MSearchSelect { + right:5px; +} + +#MSearchField { + display:block; + position:absolute; + height:19px; + background:url('search_m.png') repeat-x; + border:none; + width:116px; + margin-left:20px; + padding-left:4px; + color: #909090; + outline: none; + font: 9pt Arial, Verdana, sans-serif; +} + +#FSearchBox #MSearchField { + margin-left:15px; +} + +#MSearchBox .right { + display:block; + position:absolute; + right:10px; + top:0px; + width:20px; + height:19px; + background:url('search_r.png') no-repeat; + background-position:left; +} + +#MSearchClose { + display: none; + position: absolute; + top: 4px; + background : none; + border: none; + margin: 0px 4px 0px 0px; + padding: 0px 0px; + outline: none; +} + +.left #MSearchClose { + left: 6px; +} + +.right #MSearchClose { + right: 2px; +} + +.MSearchBoxActive #MSearchField { + color: #000000; +} + +/*---------------- Search filter selection */ + +#MSearchSelectWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #90A5CE; + background-color: #F9FAFC; + z-index: 1; + padding-top: 4px; + padding-bottom: 4px; + -moz-border-radius: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRSymbol:focus, a.SRSymbol:active, +a.SRScope:focus, a.SRScope:active { + text-decoration: underline; +} + +.SRPage .SRStatus { + padding: 2px 5px; + font-size: 8pt; + font-style: italic; +} + +.SRResult { + display: none; +} + +DIV.searchresults { + margin-left: 10px; + margin-right: 10px; +} diff --git a/Documentation/Core/html/search/search.js b/Documentation/Core/html/search/search.js new file mode 100644 index 0000000..6fb8704 --- /dev/null +++ b/Documentation/Core/html/search/search.js @@ -0,0 +1,811 @@ +// Search script generated by doxygen +// Copyright (C) 2009 by Dimitri van Heesch. + +// The code in this file is loosly based on main.js, part of Natural Docs, +// which is Copyright (C) 2003-2008 Greg Valure +// Natural Docs is licensed under the GPL. + +var indexSectionsWithContent = +{ + 0: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010111111011001111111111111010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 1: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101101001000110000110001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 2: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000101001011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 3: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000001000010000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 4: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010111111011001110111111110010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 5: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 6: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100010000110100101010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 7: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001101001000000100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 8: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000101001111000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" +}; + +var indexSectionNames = +{ + 0: "all", + 1: "classes", + 2: "files", + 3: "functions", + 4: "variables", + 5: "enums", + 6: "enumvalues", + 7: "groups", + 8: "pages" +}; + +function convertToId(search) +{ + var result = ''; + for (i=0;i do a search + { + this.Search(); + } + } + + this.OnSearchSelectKey = function(evt) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 && this.searchIndex0) // Up + { + this.searchIndex--; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var hexCode; + if (code<16) + { + hexCode="0"+code.toString(16); + } + else + { + hexCode=code.toString(16); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + if (indexSectionsWithContent[this.searchIndex].charAt(code) == '1') + { + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of . + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; + } + } + } + + // Searches for the passed string. If there is no parameter, + // it takes it from the URL query. + // + // Always returns true, since other documents may try to call it + // and that may or may not be possible. + this.Search = function(search) + { + if (!search) // get search word from URL + { + search = window.location.search; + search = search.substring(1); // Remove the leading '?' + search = unescape(search); + } + + search = search.replace(/^ +/, ""); // strip leading spaces + search = search.replace(/ +$/, ""); // strip trailing spaces + search = search.toLowerCase(); + search = convertToId(search); + + var resultRows = document.getElementsByTagName("div"); + var matches = 0; + + var i = 0; + while (i < resultRows.length) + { + var row = resultRows.item(i); + if (row.className == "SRResult") + { + var rowMatchName = row.id.toLowerCase(); + rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_' + + if (search.length<=rowMatchName.length && + rowMatchName.substr(0, search.length)==search) + { + row.style.display = 'block'; + matches++; + } + else + { + row.style.display = 'none'; + } + } + i++; + } + document.getElementById("Searching").style.display='none'; + if (matches == 0) // no results + { + document.getElementById("NoMatches").style.display='block'; + } + else // at least one result + { + document.getElementById("NoMatches").style.display='none'; + } + this.lastMatchCount = matches; + return true; + } + + // return the first item with index index or higher that is visible + this.NavNext = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index++; + } + return focusItem; + } + + this.NavPrev = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index--; + } + return focusItem; + } + + this.ProcessKeys = function(e) + { + if (e.type == "keydown") + { + this.repeatOn = false; + this.lastKey = e.keyCode; + } + else if (e.type == "keypress") + { + if (!this.repeatOn) + { + if (this.lastKey) this.repeatOn = true; + return false; // ignore first keypress after keydown + } + } + else if (e.type == "keyup") + { + this.lastKey = 0; + this.repeatOn = false; + } + return this.lastKey!=0; + } + + this.Nav = function(evt,itemIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e + + + + + + + +
    +
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    + + diff --git a/Documentation/Core/html/search/variables_5f.js b/Documentation/Core/html/search/variables_5f.js new file mode 100644 index 0000000..208e0d9 --- /dev/null +++ b/Documentation/Core/html/search/variables_5f.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['_5freserved0',['_reserved0',['../union_a_p_s_r___type.html#afbce95646fd514c10aa85ec0a33db728',1,'APSR_Type::_reserved0()'],['../union_i_p_s_r___type.html#ad2eb0a06de4f03f58874a727716aa9aa',1,'IPSR_Type::_reserved0()'],['../unionx_p_s_r___type.html#af438e0f407357e914a70b5bd4d6a97c5',1,'xPSR_Type::_reserved0()'],['../union_c_o_n_t_r_o_l___type.html#af8c314273a1e4970a5671bd7f8184f50',1,'CONTROL_Type::_reserved0()']]] +]; diff --git a/Documentation/Core/html/search/variables_61.html b/Documentation/Core/html/search/variables_61.html new file mode 100644 index 0000000..ff1f937 --- /dev/null +++ b/Documentation/Core/html/search/variables_61.html @@ -0,0 +1,25 @@ + + + + + + + + +
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    + + diff --git a/Documentation/Core/html/search/variables_61.js b/Documentation/Core/html/search/variables_61.js new file mode 100644 index 0000000..1a8097a --- /dev/null +++ b/Documentation/Core/html/search/variables_61.js @@ -0,0 +1,8 @@ +var searchData= +[ + ['acpr',['ACPR',['../struct_t_p_i___type.html#a9e5e4421ef9c3d5b7ff8b24abd4e99b3',1,'TPI_Type']]], + ['actlr',['ACTLR',['../struct_s_cn_s_c_b___type.html#a13af9b718dde7481f1c0344f00593c23',1,'SCnSCB_Type']]], + ['adr',['ADR',['../struct_s_c_b___type.html#af084e1b2dad004a88668efea1dfe7fa1',1,'SCB_Type']]], + ['afsr',['AFSR',['../struct_s_c_b___type.html#ab65372404ce64b0f0b35e2709429404e',1,'SCB_Type']]], + ['aircr',['AIRCR',['../struct_s_c_b___type.html#ad3e5b8934c647eb1b7383c1894f01380',1,'SCB_Type']]] +]; diff --git a/Documentation/Core/html/search/variables_62.html b/Documentation/Core/html/search/variables_62.html new file mode 100644 index 0000000..c55a15e --- /dev/null +++ b/Documentation/Core/html/search/variables_62.html @@ -0,0 +1,25 @@ + + + + + + + + +
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    + + diff --git a/Documentation/Core/html/search/variables_76.js b/Documentation/Core/html/search/variables_76.js new file mode 100644 index 0000000..698e362 --- /dev/null +++ b/Documentation/Core/html/search/variables_76.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['v',['V',['../union_a_p_s_r___type.html#a8004d224aacb78ca37774c35f9156e7e',1,'APSR_Type::V()'],['../unionx_p_s_r___type.html#af14df16ea0690070c45b95f2116b7a0a',1,'xPSR_Type::V()']]], + ['val',['VAL',['../struct_sys_tick___type.html#a9b5420d17e8e43104ddd4ae5a610af93',1,'SysTick_Type']]], + ['vtor',['VTOR',['../struct_s_c_b___type.html#a187a4578e920544ed967f98020fb8170',1,'SCB_Type']]] +]; diff --git a/Documentation/Core/html/search/variables_77.html b/Documentation/Core/html/search/variables_77.html new file mode 100644 index 0000000..25c3e3a --- /dev/null +++ b/Documentation/Core/html/search/variables_77.html @@ -0,0 +1,25 @@ + + + + + + + + +
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    + + diff --git a/Documentation/Core/html/search/variables_77.js b/Documentation/Core/html/search/variables_77.js new file mode 100644 index 0000000..7681c0f --- /dev/null +++ b/Documentation/Core/html/search/variables_77.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['w',['w',['../union_a_p_s_r___type.html#ae4c2ef8c9430d7b7bef5cbfbbaed3a94',1,'APSR_Type::w()'],['../union_i_p_s_r___type.html#a4adca999d3a0bc1ae682d73ea7cfa879',1,'IPSR_Type::w()'],['../unionx_p_s_r___type.html#a1a47176768f45f79076c4f5b1b534bc2',1,'xPSR_Type::w()'],['../union_c_o_n_t_r_o_l___type.html#a6b642cca3d96da660b1198c133ca2a1f',1,'CONTROL_Type::w()']]] +]; diff --git a/Documentation/Core/html/search/variables_7a.html b/Documentation/Core/html/search/variables_7a.html new file mode 100644 index 0000000..2ae1676 --- /dev/null +++ b/Documentation/Core/html/search/variables_7a.html @@ -0,0 +1,25 @@ + + + + + + + + +
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    + + diff --git a/Documentation/Core/html/search/variables_7a.js b/Documentation/Core/html/search/variables_7a.js new file mode 100644 index 0000000..ed348a5 --- /dev/null +++ b/Documentation/Core/html/search/variables_7a.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['z',['Z',['../union_a_p_s_r___type.html#a3b04d58738b66a28ff13f23d8b0ba7e5',1,'APSR_Type::Z()'],['../unionx_p_s_r___type.html#a1e5d9801013d5146f2e02d9b7b3da562',1,'xPSR_Type::Z()']]] +]; diff --git a/Documentation/Core/html/startup_s_pg.html b/Documentation/Core/html/startup_s_pg.html new file mode 100644 index 0000000..1541b71 --- /dev/null +++ b/Documentation/Core/html/startup_s_pg.html @@ -0,0 +1,370 @@ + + + + + +Startup File startup_<device>.s +CMSIS-CORE: Startup File startup_<device>.s + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Startup File startup_<device>.s
    +
    +
    +

    The Startup File startup_<device>.s contains:

    +
      +
    • The reset handler which is executed after CPU reset and typically calls the SystemInit function.
      • +
    • The setup values for the Main Stack Pointer (MSP).
      • +
    • Exception vectors of the Cortex-M Processor with weak functions that implement default routines.
      • +
    • Interrupt vectors that are device specific with weak functions that implement default routines.
      • +
    +

    The file exists for each supported toolchain and is the only tool-chain specific CMSIS file.

    +

    To adapt the file to a new device only the interrupt vector table needs to be extended with the device-specific interrupt handlers. The naming convention for the interrupt handler names are <interrupt_name>_IRQHandler. This table needs to be consistent with IRQn_Type that defines all the IRQ numbers for each interrupt.

    +

    Example:

    +

    The following example shows the extension of the interrupt vector table for the LPC1100 device family.

    +
    ; External Interrupts
    +
    DCD WAKEUP0_IRQHandler ; 16+ 0: Wakeup PIO0.0
    +
    DCD WAKEUP1_IRQHandler ; 16+ 1: Wakeup PIO0.1
    +
    DCD WAKEUP2_IRQHandler ; 16+ 2: Wakeup PIO0.2
    +
    : :
    +
    : :
    +
    DCD EINT1_IRQHandler ; 16+30: PIO INT1
    +
    DCD EINT0_IRQHandler ; 16+31: PIO INT0
    +
    :
    +
    :
    +
    EXPORT WAKEUP0_IRQHandler [WEAK]
    +
    EXPORT WAKEUP1_IRQHandler [WEAK]
    +
    EXPORT WAKEUP2_IRQHandler [WEAK]
    +
    : :
    +
    : :
    +
    EXPORT EINT1_IRQHandler [WEAK]
    +
    EXPORT EINT0_IRQHandler [WEAK]
    +
    +
    WAKEUP0_IRQHandler
    +
    WAKEUP1_IRQHandler
    +
    WAKEUP1_IRQHandler
    +
    :
    +
    :
    +
    EINT1_IRQHandler
    +
    EINT0_IRQHandler
    +
    B .
    +

    +startup_Device.s Template File

    +

    The startup_Device.s Template File for the Cortex-M3 and the ARMCC compiler is shown below. The files for other compiler vendors differ slightly in the syntax, but not in the overall structure.

    +
    ;/**************************************************************************//**
+; * @file     startup_<Device>.s
+; * @brief    CMSIS Cortex-M# Core Device Startup File for
+; *           Device <Device>
+; * @version  V3.10
+; * @date     23. November 2012
+; *
+; * @note
+; *
+; ******************************************************************************/
+;/* Copyright (c) 2012 ARM LIMITED
+;
+;   All rights reserved.
+;   Redistribution and use in source and binary forms, with or without
+;   modification, are permitted provided that the following conditions are met:
+;   - Redistributions of source code must retain the above copyright
+;     notice, this list of conditions and the following disclaimer.
+;   - Redistributions in binary form must reproduce the above copyright
+;     notice, this list of conditions and the following disclaimer in the
+;     documentation and/or other materials provided with the distribution.
+;   - Neither the name of ARM nor the names of its contributors may be used
+;     to endorse or promote products derived from this software without
+;     specific prior written permission.
+;   *
+;   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+;   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+;   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+;   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+;   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+;   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+;   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+;   POSSIBILITY OF SUCH DAMAGE.
+;   ---------------------------------------------------------------------------*/
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000400
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000100
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler             ; Reset Handler
+                DCD     NMI_Handler               ; NMI Handler
+                DCD     HardFault_Handler         ; Hard Fault Handler
+                DCD     MemManage_Handler         ; MPU Fault Handler
+                DCD     BusFault_Handler          ; Bus Fault Handler
+                DCD     UsageFault_Handler        ; Usage Fault Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler               ; SVCall Handler
+                DCD     DebugMon_Handler          ; Debug Monitor Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler            ; PendSV Handler
+                DCD     SysTick_Handler           ; SysTick Handler
+
+                ; External Interrupts
+; ToDo:  Add here the vectors for the device specific external interrupts handler
+                DCD     <DeviceInterrupt>_IRQHandler       ;  0: Default
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler         [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler\
+                PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler\
+                PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+; ToDo:  Add here the export definition for the device specific external interrupts handler
+                EXPORT  <DeviceInterrupt>_IRQHandler         [WEAK]
+
+; ToDo:  Add here the names for the device specific external interrupts handler
+<DeviceInterrupt>_IRQHandler
+                B       .
+                ENDP
+
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+
+                END
+
    +
    + + + + diff --git a/Documentation/Core/html/struct_core_debug___type.html b/Documentation/Core/html/struct_core_debug___type.html new file mode 100644 index 0000000..9f82c8c --- /dev/null +++ b/Documentation/Core/html/struct_core_debug___type.html @@ -0,0 +1,205 @@ + + + + + +CoreDebug_Type Struct Reference +CMSIS-CORE: CoreDebug_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    CoreDebug_Type Struct Reference
    +
    +
    + +

    Structure type to access the Core Debug Register (CoreDebug). +

    + + + + + + + + + + + + + + +

    +Data Fields

    __IOM uint32_t DHCSR
     Offset: 0x000 (R/W) Debug Halting Control and Status Register.
     
    __OM uint32_t DCRSR
     Offset: 0x004 ( /W) Debug Core Register Selector Register.
     
    __IOM uint32_t DCRDR
     Offset: 0x008 (R/W) Debug Core Register Data Register.
     
    __IOM uint32_t DEMCR
     Offset: 0x00C (R/W) Debug Exception and Monitor Control Register.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IOM uint32_t CoreDebug_Type::DCRDR
    +
    + +
    +
    + +
    +
    + + + + +
    __OM uint32_t CoreDebug_Type::DCRSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t CoreDebug_Type::DEMCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t CoreDebug_Type::DHCSR
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_core_debug___type.js b/Documentation/Core/html/struct_core_debug___type.js new file mode 100644 index 0000000..812a293 --- /dev/null +++ b/Documentation/Core/html/struct_core_debug___type.js @@ -0,0 +1,7 @@ +var struct_core_debug___type = +[ + [ "DCRDR", "struct_core_debug___type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55", null ], + [ "DCRSR", "struct_core_debug___type.html#af907cf64577eaf927dac6787df6dd98b", null ], + [ "DEMCR", "struct_core_debug___type.html#aeb3126abc4c258a858f21f356c0df6ee", null ], + [ "DHCSR", "struct_core_debug___type.html#ad63554e4650da91a8e79929cbb63db66", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_d_w_t___type.html b/Documentation/Core/html/struct_d_w_t___type.html new file mode 100644 index 0000000..2e85193 --- /dev/null +++ b/Documentation/Core/html/struct_d_w_t___type.html @@ -0,0 +1,490 @@ + + + + + +DWT_Type Struct Reference +CMSIS-CORE: DWT_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    DWT_Type Struct Reference
    +
    +
    + +

    Structure type to access the Data Watchpoint and Trace Register (DWT). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    __IOM uint32_t CTRL
     Offset: 0x000 (R/W) Control Register.
     
    __IOM uint32_t CYCCNT
     Offset: 0x004 (R/W) Cycle Count Register.
     
    __IOM uint32_t CPICNT
     Offset: 0x008 (R/W) CPI Count Register.
     
    __IOM uint32_t EXCCNT
     Offset: 0x00C (R/W) Exception Overhead Count Register.
     
    __IOM uint32_t SLEEPCNT
     Offset: 0x010 (R/W) Sleep Count Register.
     
    __IOM uint32_t LSUCNT
     Offset: 0x014 (R/W) LSU Count Register.
     
    __IOM uint32_t FOLDCNT
     Offset: 0x018 (R/W) Folded-instruction Count Register.
     
    __IM uint32_t PCSR
     Offset: 0x01C (R/ ) Program Counter Sample Register.
     
    __IOM uint32_t COMP0
     Offset: 0x020 (R/W) Comparator Register 0.
     
    __IOM uint32_t MASK0
     Offset: 0x024 (R/W) Mask Register 0.
     
    __IOM uint32_t FUNCTION0
     Offset: 0x028 (R/W) Function Register 0.
     
    uint32_t RESERVED0 [1]
     Reserved.
     
    __IOM uint32_t COMP1
     Offset: 0x030 (R/W) Comparator Register 1.
     
    __IOM uint32_t MASK1
     Offset: 0x034 (R/W) Mask Register 1.
     
    __IOM uint32_t FUNCTION1
     Offset: 0x038 (R/W) Function Register 1.
     
    uint32_t RESERVED1 [1]
     Reserved.
     
    __IOM uint32_t COMP2
     Offset: 0x040 (R/W) Comparator Register 2.
     
    __IOM uint32_t MASK2
     Offset: 0x044 (R/W) Mask Register 2.
     
    __IOM uint32_t FUNCTION2
     Offset: 0x048 (R/W) Function Register 2.
     
    uint32_t RESERVED2 [1]
     Reserved.
     
    __IOM uint32_t COMP3
     Offset: 0x050 (R/W) Comparator Register 3.
     
    __IOM uint32_t MASK3
     Offset: 0x054 (R/W) Mask Register 3.
     
    __IOM uint32_t FUNCTION3
     Offset: 0x058 (R/W) Function Register 3.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::COMP0
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::COMP1
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::COMP2
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::COMP3
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::CPICNT
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::CTRL
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::CYCCNT
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::EXCCNT
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::FOLDCNT
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::FUNCTION0
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::FUNCTION1
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::FUNCTION2
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::FUNCTION3
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::LSUCNT
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::MASK0
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::MASK1
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::MASK2
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::MASK3
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t DWT_Type::PCSR
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t DWT_Type::RESERVED0[1]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t DWT_Type::RESERVED1[1]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t DWT_Type::RESERVED2[1]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t DWT_Type::SLEEPCNT
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_d_w_t___type.js b/Documentation/Core/html/struct_d_w_t___type.js new file mode 100644 index 0000000..8551743 --- /dev/null +++ b/Documentation/Core/html/struct_d_w_t___type.js @@ -0,0 +1,26 @@ +var struct_d_w_t___type = +[ + [ "COMP0", "struct_d_w_t___type.html#a61c2965af5bc0643f9af65620b0e67c9", null ], + [ "COMP1", "struct_d_w_t___type.html#a38714af6b7fa7c64d68f5e1efbe7a931", null ], + [ "COMP2", "struct_d_w_t___type.html#a5ae6dde39989f27bae90afc2347deb46", null ], + [ "COMP3", "struct_d_w_t___type.html#a85eb73d1848ac3f82d39d6c3e8910847", null ], + [ "CPICNT", "struct_d_w_t___type.html#a2c08096c82abe245c0fa97badc458154", null ], + [ "CTRL", "struct_d_w_t___type.html#add790c53410023b3b581919bb681fe2a", null ], + [ "CYCCNT", "struct_d_w_t___type.html#a102eaa529d9098242851cb57c52b42d9", null ], + [ "EXCCNT", "struct_d_w_t___type.html#a9fe20c16c5167ca61486caf6832686d1", null ], + [ "FOLDCNT", "struct_d_w_t___type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97", null ], + [ "FUNCTION0", "struct_d_w_t___type.html#a579ae082f58a0317b7ef029b20f52889", null ], + [ "FUNCTION1", "struct_d_w_t___type.html#a8dfcf25675f9606aa305c46e85182e4e", null ], + [ "FUNCTION2", "struct_d_w_t___type.html#ab1b60d6600c38abae515bab8e86a188f", null ], + [ "FUNCTION3", "struct_d_w_t___type.html#a52d4ff278fae6f9216c63b74ce328841", null ], + [ "LSUCNT", "struct_d_w_t___type.html#acc05d89bdb1b4fe2fa499920ec02d0b1", null ], + [ "MASK0", "struct_d_w_t___type.html#a821eb5e71f340ec077efc064cfc567db", null ], + [ "MASK1", "struct_d_w_t___type.html#aabf94936c9340e62fed836dcfb152405", null ], + [ "MASK2", "struct_d_w_t___type.html#a00ac4d830dfe0070a656cda9baed170f", null ], + [ "MASK3", "struct_d_w_t___type.html#a2a509d8505c37a3b64f6b24993df5f3f", null ], + [ "PCSR", "struct_d_w_t___type.html#a6353ca1d1ad9bc1be05d3b5632960113", null ], + [ "RESERVED0", "struct_d_w_t___type.html#addd893d655ed90d40705b20170daac59", null ], + [ "RESERVED1", "struct_d_w_t___type.html#a069871233a8c1df03521e6d7094f1de4", null ], + [ "RESERVED2", "struct_d_w_t___type.html#a8556ca1c32590517602d92fe0cd55738", null ], + [ "SLEEPCNT", "struct_d_w_t___type.html#a416a54e2084ce66e5ca74f152a5ecc70", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_f_p_u___type.html b/Documentation/Core/html/struct_f_p_u___type.html new file mode 100644 index 0000000..b84f3c3 --- /dev/null +++ b/Documentation/Core/html/struct_f_p_u___type.html @@ -0,0 +1,235 @@ + + + + + +FPU_Type Struct Reference +CMSIS-CORE: FPU_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    FPU_Type Struct Reference
    +
    +
    + +

    Structure type to access the Floating Point Unit (FPU). +

    + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    uint32_t RESERVED0 [1]
     Reserved.
     
    __IOM uint32_t FPCCR
     Offset: 0x004 (R/W) Floating-Point Context Control Register.
     
    __IOM uint32_t FPCAR
     Offset: 0x008 (R/W) Floating-Point Context Address Register.
     
    __IOM uint32_t FPDSCR
     Offset: 0x00C (R/W) Floating-Point Default Status Control Register.
     
    __IM uint32_t MVFR0
     Offset: 0x010 (R/ ) Media and FP Feature Register 0.
     
    __IM uint32_t MVFR1
     Offset: 0x014 (R/ ) Media and FP Feature Register 1.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IOM uint32_t FPU_Type::FPCAR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t FPU_Type::FPCCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t FPU_Type::FPDSCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t FPU_Type::MVFR0
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t FPU_Type::MVFR1
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t FPU_Type::RESERVED0[1]
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_f_p_u___type.js b/Documentation/Core/html/struct_f_p_u___type.js new file mode 100644 index 0000000..8af3cda --- /dev/null +++ b/Documentation/Core/html/struct_f_p_u___type.js @@ -0,0 +1,9 @@ +var struct_f_p_u___type = +[ + [ "FPCAR", "struct_f_p_u___type.html#a55263b468d0f8e11ac77aec9ff87c820", null ], + [ "FPCCR", "struct_f_p_u___type.html#af1b708c5e413739150df3d16ca3b7061", null ], + [ "FPDSCR", "struct_f_p_u___type.html#a58d1989664a06db6ec2e122eefa9f04a", null ], + [ "MVFR0", "struct_f_p_u___type.html#a4f19014defe6033d070b80af19ef627c", null ], + [ "MVFR1", "struct_f_p_u___type.html#a66f8cfa49a423b480001a4e101bf842d", null ], + [ "RESERVED0", "struct_f_p_u___type.html#a7b2967b069046c8544adbbc1db143a36", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_i_t_m___type.html b/Documentation/Core/html/struct_i_t_m___type.html new file mode 100644 index 0000000..ba162b2 --- /dev/null +++ b/Documentation/Core/html/struct_i_t_m___type.html @@ -0,0 +1,296 @@ + + + + + +ITM_Type Struct Reference +CMSIS-CORE: ITM_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    ITM_Type Struct Reference
    +
    +
    + +

    Structure type to access the Instrumentation Trace Macrocell Register (ITM). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    union {
       __OM uint8_t   u8
     Offset: 0x000 ( /W) ITM Stimulus Port 8-bit.
     
       __OM uint16_t   u16
     Offset: 0x000 ( /W) ITM Stimulus Port 16-bit.
     
       __OM uint32_t   u32
     Offset: 0x000 ( /W) ITM Stimulus Port 32-bit.
     
    } PORT [32]
     Offset: 0x000 ( /W) ITM Stimulus Port Registers.
     
    uint32_t RESERVED0 [864]
     Reserved.
     
    __IOM uint32_t TER
     Offset: 0xE00 (R/W) ITM Trace Enable Register.
     
    uint32_t RESERVED1 [15]
     Reserved.
     
    __IOM uint32_t TPR
     Offset: 0xE40 (R/W) ITM Trace Privilege Register.
     
    uint32_t RESERVED2 [15]
     Reserved.
     
    __IOM uint32_t TCR
     Offset: 0xE80 (R/W) ITM Trace Control Register.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __OM { ... } ITM_Type::PORT[32]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t ITM_Type::RESERVED0[864]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t ITM_Type::RESERVED1[15]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t ITM_Type::RESERVED2[15]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t ITM_Type::TCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t ITM_Type::TER
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t ITM_Type::TPR
    +
    + +
    +
    + +
    +
    + + + + +
    __OM uint16_t ITM_Type::u16
    +
    + +
    +
    + +
    +
    + + + + +
    __OM uint32_t ITM_Type::u32
    +
    + +
    +
    + +
    +
    + + + + +
    __OM uint8_t ITM_Type::u8
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_i_t_m___type.js b/Documentation/Core/html/struct_i_t_m___type.js new file mode 100644 index 0000000..4c165a2 --- /dev/null +++ b/Documentation/Core/html/struct_i_t_m___type.js @@ -0,0 +1,13 @@ +var struct_i_t_m___type = +[ + [ "PORT", "struct_i_t_m___type.html#af4c205be465780a20098387120bdb482", null ], + [ "RESERVED0", "struct_i_t_m___type.html#a2c5ae30385b5f370d023468ea9914c0e", null ], + [ "RESERVED1", "struct_i_t_m___type.html#afffce5b93bbfedbaee85357d0b07ebce", null ], + [ "RESERVED2", "struct_i_t_m___type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b", null ], + [ "TCR", "struct_i_t_m___type.html#a04b9fbc83759cb818dfa161d39628426", null ], + [ "TER", "struct_i_t_m___type.html#acd03c6858f7b678dab6a6121462e7807", null ], + [ "TPR", "struct_i_t_m___type.html#ae907229ba50538bf370fbdfd54c099a2", null ], + [ "u16", "struct_i_t_m___type.html#a962a970dfd286cad7f8a8577e87d4ad3", null ], + [ "u32", "struct_i_t_m___type.html#a5834885903a557674f078f3b71fa8bc8", null ], + [ "u8", "struct_i_t_m___type.html#ae773bf9f9dac64e6c28b14aa39f74275", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_m_p_u___type.html b/Documentation/Core/html/struct_m_p_u___type.html new file mode 100644 index 0000000..ee63cbe --- /dev/null +++ b/Documentation/Core/html/struct_m_p_u___type.html @@ -0,0 +1,310 @@ + + + + + +MPU_Type Struct Reference +CMSIS-CORE: MPU_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    MPU_Type Struct Reference
    +
    +
    + +

    Structure type to access the Memory Protection Unit (MPU). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    __IM uint32_t TYPE
     Offset: 0x000 (R/ ) MPU Type Register.
     
    __IOM uint32_t CTRL
     Offset: 0x004 (R/W) MPU Control Register.
     
    __IOM uint32_t RNR
     Offset: 0x008 (R/W) MPU Region RNRber Register.
     
    __IOM uint32_t RBAR
     Offset: 0x00C (R/W) MPU Region Base Address Register.
     
    __IOM uint32_t RASR
     Offset: 0x010 (R/W) MPU Region Attribute and Size Register.
     
    __IOM uint32_t RBAR_A1
     Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register.
     
    __IOM uint32_t RASR_A1
     Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register.
     
    __IOM uint32_t RBAR_A2
     Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register.
     
    __IOM uint32_t RASR_A2
     Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register.
     
    __IOM uint32_t RBAR_A3
     Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register.
     
    __IOM uint32_t RASR_A3
     Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::CTRL
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RASR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RASR_A1
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RASR_A2
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RASR_A3
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RBAR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RBAR_A1
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RBAR_A2
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RBAR_A3
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t MPU_Type::RNR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t MPU_Type::TYPE
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_m_p_u___type.js b/Documentation/Core/html/struct_m_p_u___type.js new file mode 100644 index 0000000..26696b1 --- /dev/null +++ b/Documentation/Core/html/struct_m_p_u___type.js @@ -0,0 +1,14 @@ +var struct_m_p_u___type = +[ + [ "CTRL", "struct_m_p_u___type.html#a4d81d6aa73a9287bafba2bcc5ffc6d18", null ], + [ "RASR", "struct_m_p_u___type.html#a9236c629b7cf86f8bd2459c610fdf715", null ], + [ "RASR_A1", "struct_m_p_u___type.html#ab5a224ccd12ac55ddfe11d9eca42de48", null ], + [ "RASR_A2", "struct_m_p_u___type.html#ac60e0919871b66446a039838bcaaec3b", null ], + [ "RASR_A3", "struct_m_p_u___type.html#a9c0b2d3e3e16bb4e7dfa069652d5a155", null ], + [ "RBAR", "struct_m_p_u___type.html#ac953770d38a7d322b971d93eb8a5b062", null ], + [ "RBAR_A1", "struct_m_p_u___type.html#a13d69b9bea12861383f3a62764b02f63", null ], + [ "RBAR_A2", "struct_m_p_u___type.html#a57dc551614932150e684fcc60590c2c4", null ], + [ "RBAR_A3", "struct_m_p_u___type.html#a345911aabecd1f7d93a1bff7738b0d86", null ], + [ "RNR", "struct_m_p_u___type.html#aa800d44f4d3520cc891d7b8d711320c1", null ], + [ "TYPE", "struct_m_p_u___type.html#a0433efc1383674bc8e86cc0e830b462d", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_n_v_i_c___type.html b/Documentation/Core/html/struct_n_v_i_c___type.html new file mode 100644 index 0000000..a6b9a0a --- /dev/null +++ b/Documentation/Core/html/struct_n_v_i_c___type.html @@ -0,0 +1,340 @@ + + + + + +NVIC_Type Struct Reference +CMSIS-CORE: NVIC_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    NVIC_Type Struct Reference
    +
    +
    + +

    Structure type to access the Nested Vectored Interrupt Controller (NVIC). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    __IOM uint32_t ISER [8]
     Offset: 0x000 (R/W) Interrupt Set Enable Register.
     
    uint32_t RESERVED0 [24]
     Reserved.
     
    __IOM uint32_t ICER [8]
     Offset: 0x080 (R/W) Interrupt Clear Enable Register.
     
    uint32_t RSERVED1 [24]
     Reserved.
     
    __IOM uint32_t ISPR [8]
     Offset: 0x100 (R/W) Interrupt Set Pending Register.
     
    uint32_t RESERVED2 [24]
     Reserved.
     
    __IOM uint32_t ICPR [8]
     Offset: 0x180 (R/W) Interrupt Clear Pending Register.
     
    uint32_t RESERVED3 [24]
     Reserved.
     
    __IOM uint32_t IABR [8]
     Offset: 0x200 (R/W) Interrupt Active bit Register.
     
    uint32_t RESERVED4 [56]
     Reserved.
     
    __IOM uint8_t IP [240]
     Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)
     
    uint32_t RESERVED5 [644]
     Reserved.
     
    __OM uint32_t STIR
     Offset: 0xE00 ( /W) Software Trigger Interrupt Register.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IOM uint32_t NVIC_Type::IABR[8]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t NVIC_Type::ICER[8]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t NVIC_Type::ICPR[8]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint8_t NVIC_Type::IP[240]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t NVIC_Type::ISER[8]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t NVIC_Type::ISPR[8]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t NVIC_Type::RESERVED0[24]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t NVIC_Type::RESERVED2[24]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t NVIC_Type::RESERVED3[24]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t NVIC_Type::RESERVED4[56]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t NVIC_Type::RESERVED5[644]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t NVIC_Type::RSERVED1[24]
    +
    + +
    +
    + +
    +
    + + + + +
    __OM uint32_t NVIC_Type::STIR
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_n_v_i_c___type.js b/Documentation/Core/html/struct_n_v_i_c___type.js new file mode 100644 index 0000000..ca47fe6 --- /dev/null +++ b/Documentation/Core/html/struct_n_v_i_c___type.js @@ -0,0 +1,16 @@ +var struct_n_v_i_c___type = +[ + [ "IABR", "struct_n_v_i_c___type.html#a4bca5452748ba84d64536fb6a5d795af", null ], + [ "ICER", "struct_n_v_i_c___type.html#a245df8bac1da05c39eadabede9323203", null ], + [ "ICPR", "struct_n_v_i_c___type.html#a8d8f45d9c5c67bba3c153c55574bac95", null ], + [ "IP", "struct_n_v_i_c___type.html#a7ff7364a4260df67a2784811e8da4efd", null ], + [ "ISER", "struct_n_v_i_c___type.html#a9fccef5a60a0d5e81fcd7869a6274f47", null ], + [ "ISPR", "struct_n_v_i_c___type.html#a8f731a9f428efc86e8d311b52ce823d0", null ], + [ "RESERVED0", "struct_n_v_i_c___type.html#a2de17698945ea49abd58a2d45bdc9c80", null ], + [ "RESERVED2", "struct_n_v_i_c___type.html#a0953af43af8ec7fd5869a1d826ce5b72", null ], + [ "RESERVED3", "struct_n_v_i_c___type.html#a9dd330835dbf21471e7b5be8692d77ab", null ], + [ "RESERVED4", "struct_n_v_i_c___type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790", null ], + [ "RESERVED5", "struct_n_v_i_c___type.html#a4f753b4f824270175af045ac99bc12e8", null ], + [ "RSERVED1", "struct_n_v_i_c___type.html#a6d1daf7ab6f2ba83f57ff67ae6f571fe", null ], + [ "STIR", "struct_n_v_i_c___type.html#a37de89637466e007171c6b135299bc75", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_s_c_b___type.html b/Documentation/Core/html/struct_s_c_b___type.html new file mode 100644 index 0000000..2bc4a47 --- /dev/null +++ b/Documentation/Core/html/struct_s_c_b___type.html @@ -0,0 +1,460 @@ + + + + + +SCB_Type Struct Reference +CMSIS-CORE: SCB_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    SCB_Type Struct Reference
    +
    +
    + +

    Structure type to access the System Control Block (SCB). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    __IM uint32_t CPUID
     Offset: 0x000 (R/ ) CPUID Base Register.
     
    __IOM uint32_t ICSR
     Offset: 0x004 (R/W) Interrupt Control and State Register.
     
    __IOM uint32_t VTOR
     Offset: 0x008 (R/W) Vector Table Offset Register.
     
    __IOM uint32_t AIRCR
     Offset: 0x00C (R/W) Application Interrupt and Reset Control Register.
     
    __IOM uint32_t SCR
     Offset: 0x010 (R/W) System Control Register.
     
    __IOM uint32_t CCR
     Offset: 0x014 (R/W) Configuration Control Register.
     
    __IOM uint8_t SHP [12]
     Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)
     
    __IOM uint32_t SHCSR
     Offset: 0x024 (R/W) System Handler Control and State Register.
     
    __IOM uint32_t CFSR
     Offset: 0x028 (R/W) Configurable Fault Status Register.
     
    __IOM uint32_t HFSR
     Offset: 0x02C (R/W) HardFault Status Register.
     
    __IOM uint32_t DFSR
     Offset: 0x030 (R/W) Debug Fault Status Register.
     
    __IOM uint32_t MMFAR
     Offset: 0x034 (R/W) MemManage Fault Address Register.
     
    __IOM uint32_t BFAR
     Offset: 0x038 (R/W) BusFault Address Register.
     
    __IOM uint32_t AFSR
     Offset: 0x03C (R/W) Auxiliary Fault Status Register.
     
    __IM uint32_t PFR [2]
     Offset: 0x040 (R/ ) Processor Feature Register.
     
    __IM uint32_t DFR
     Offset: 0x048 (R/ ) Debug Feature Register.
     
    __IM uint32_t ADR
     Offset: 0x04C (R/ ) Auxiliary Feature Register.
     
    __IM uint32_t MMFR [4]
     Offset: 0x050 (R/ ) Memory Model Feature Register.
     
    __IM uint32_t ISAR [5]
     Offset: 0x060 (R/ ) Instruction Set Attributes Register.
     
    uint32_t RESERVED0 [5]
     Reserved.
     
    __IOM uint32_t CPACR
     Offset: 0x088 (R/W) Coprocessor Access Control Register.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IM uint32_t SCB_Type::ADR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::AFSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::AIRCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::BFAR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::CCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::CFSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::CPACR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t SCB_Type::CPUID
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t SCB_Type::DFR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::DFSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::HFSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::ICSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t SCB_Type::ISAR[5]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::MMFAR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t SCB_Type::MMFR[4]
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t SCB_Type::PFR[2]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t SCB_Type::RESERVED0[5]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::SCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::SHCSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint8_t SCB_Type::SHP[12]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SCB_Type::VTOR
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_s_c_b___type.js b/Documentation/Core/html/struct_s_c_b___type.js new file mode 100644 index 0000000..d82ca54 --- /dev/null +++ b/Documentation/Core/html/struct_s_c_b___type.js @@ -0,0 +1,24 @@ +var struct_s_c_b___type = +[ + [ "ADR", "struct_s_c_b___type.html#af084e1b2dad004a88668efea1dfe7fa1", null ], + [ "AFSR", "struct_s_c_b___type.html#ab65372404ce64b0f0b35e2709429404e", null ], + [ "AIRCR", "struct_s_c_b___type.html#ad3e5b8934c647eb1b7383c1894f01380", null ], + [ "BFAR", "struct_s_c_b___type.html#a3f8e7e58be4e41c88dfa78f54589271c", null ], + [ "CCR", "struct_s_c_b___type.html#a2d6653b0b70faac936046a02809b577f", null ], + [ "CFSR", "struct_s_c_b___type.html#a0cda9e061b42373383418663092ad19a", null ], + [ "CPACR", "struct_s_c_b___type.html#ac6a860c1b8d8154a1f00d99d23b67764", null ], + [ "CPUID", "struct_s_c_b___type.html#a21e08d546d8b641bee298a459ea73e46", null ], + [ "DFR", "struct_s_c_b___type.html#a85dd6fe77aab17e7ea89a52c59da6004", null ], + [ "DFSR", "struct_s_c_b___type.html#a191579bde0d21ff51d30a714fd887033", null ], + [ "HFSR", "struct_s_c_b___type.html#a14ad254659362b9752c69afe3fd80934", null ], + [ "ICSR", "struct_s_c_b___type.html#a0ca18ef984d132c6bf4d9b61cd00f05a", null ], + [ "ISAR", "struct_s_c_b___type.html#ae0136a2d2d3c45f016b2c449e92b2066", null ], + [ "MMFAR", "struct_s_c_b___type.html#a2d03d0b7cec2254f39eb1c46c7445e80", null ], + [ "MMFR", "struct_s_c_b___type.html#aa11887804412bda283cc85a83fdafa7c", null ], + [ "PFR", "struct_s_c_b___type.html#a681c9d9e518b217976bef38c2423d83d", null ], + [ "RESERVED0", "struct_s_c_b___type.html#ac89a5d9901e3748d22a7090bfca2bee6", null ], + [ "SCR", "struct_s_c_b___type.html#a3a4840c6fa4d1ee75544f4032c88ec34", null ], + [ "SHCSR", "struct_s_c_b___type.html#a7b5ae9741a99808043394c4743b635c4", null ], + [ "SHP", "struct_s_c_b___type.html#a85768f4b3dbbc41fd760041ee1202162", null ], + [ "VTOR", "struct_s_c_b___type.html#a187a4578e920544ed967f98020fb8170", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_s_cn_s_c_b___type.html b/Documentation/Core/html/struct_s_cn_s_c_b___type.html new file mode 100644 index 0000000..96a0c00 --- /dev/null +++ b/Documentation/Core/html/struct_s_cn_s_c_b___type.html @@ -0,0 +1,190 @@ + + + + + +SCnSCB_Type Struct Reference +CMSIS-CORE: SCnSCB_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    SCnSCB_Type Struct Reference
    +
    +
    + +

    Structure type to access the System Control and ID Register not in the SCB. +

    + + + + + + + + + + + +

    +Data Fields

    uint32_t RESERVED0 [1]
     Reserved.
     
    __IM uint32_t ICTR
     Offset: 0x004 (R/ ) Interrupt Controller Type Register.
     
    __IOM uint32_t ACTLR
     Offset: 0x008 (R/W) Auxiliary Control Register.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IOM uint32_t SCnSCB_Type::ACTLR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t SCnSCB_Type::ICTR
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t SCnSCB_Type::RESERVED0[1]
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_s_cn_s_c_b___type.js b/Documentation/Core/html/struct_s_cn_s_c_b___type.js new file mode 100644 index 0000000..f0d6f06 --- /dev/null +++ b/Documentation/Core/html/struct_s_cn_s_c_b___type.js @@ -0,0 +1,6 @@ +var struct_s_cn_s_c_b___type = +[ + [ "ACTLR", "struct_s_cn_s_c_b___type.html#a13af9b718dde7481f1c0344f00593c23", null ], + [ "ICTR", "struct_s_cn_s_c_b___type.html#a34ec1d771245eb9bd0e3ec9336949762", null ], + [ "RESERVED0", "struct_s_cn_s_c_b___type.html#afe1d5fd2966d5062716613b05c8d0ae1", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_sys_tick___type.html b/Documentation/Core/html/struct_sys_tick___type.html new file mode 100644 index 0000000..7cea3e3 --- /dev/null +++ b/Documentation/Core/html/struct_sys_tick___type.html @@ -0,0 +1,205 @@ + + + + + +SysTick_Type Struct Reference +CMSIS-CORE: SysTick_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    SysTick_Type Struct Reference
    +
    +
    + +

    Structure type to access the System Timer (SysTick). +

    + + + + + + + + + + + + + + +

    +Data Fields

    __IOM uint32_t CTRL
     Offset: 0x000 (R/W) SysTick Control and Status Register.
     
    __IOM uint32_t LOAD
     Offset: 0x004 (R/W) SysTick Reload Value Register.
     
    __IOM uint32_t VAL
     Offset: 0x008 (R/W) SysTick Current Value Register.
     
    __IM uint32_t CALIB
     Offset: 0x00C (R/ ) SysTick Calibration Register.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IM uint32_t SysTick_Type::CALIB
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SysTick_Type::CTRL
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SysTick_Type::LOAD
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t SysTick_Type::VAL
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_sys_tick___type.js b/Documentation/Core/html/struct_sys_tick___type.js new file mode 100644 index 0000000..8833522 --- /dev/null +++ b/Documentation/Core/html/struct_sys_tick___type.js @@ -0,0 +1,7 @@ +var struct_sys_tick___type = +[ + [ "CALIB", "struct_sys_tick___type.html#afcadb0c6d35b21cdc0018658a13942de", null ], + [ "CTRL", "struct_sys_tick___type.html#a875e7afa5c4fd43997fb544a4ac6e37e", null ], + [ "LOAD", "struct_sys_tick___type.html#a4780a489256bb9f54d0ba8ed4de191cd", null ], + [ "VAL", "struct_sys_tick___type.html#a9b5420d17e8e43104ddd4ae5a610af93", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/struct_t_p_i___type.html b/Documentation/Core/html/struct_t_p_i___type.html new file mode 100644 index 0000000..5b68d26 --- /dev/null +++ b/Documentation/Core/html/struct_t_p_i___type.html @@ -0,0 +1,505 @@ + + + + + +TPI_Type Struct Reference +CMSIS-CORE: TPI_Type Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    TPI_Type Struct Reference
    +
    +
    + +

    Structure type to access the Trace Port Interface Register (TPI). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    __IOM uint32_t SSPSR
     Offset: 0x000 (R/ ) Supported Parallel Port Size Register.
     
    __IOM uint32_t CSPSR
     Offset: 0x004 (R/W) Current Parallel Port Size Register.
     
    uint32_t RESERVED0 [2]
     Reserved.
     
    __IOM uint32_t ACPR
     Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register.
     
    uint32_t RESERVED1 [55]
     Reserved.
     
    __IOM uint32_t SPPR
     Offset: 0x0F0 (R/W) Selected Pin Protocol Register.
     
    uint32_t RESERVED2 [131]
     Reserved.
     
    __IM uint32_t FFSR
     Offset: 0x300 (R/ ) Formatter and Flush Status Register.
     
    __IOM uint32_t FFCR
     Offset: 0x304 (R/W) Formatter and Flush Control Register.
     
    __IM uint32_t FSCR
     Offset: 0x308 (R/ ) Formatter Synchronization Counter Register.
     
    uint32_t RESERVED3 [759]
     Reserved.
     
    __IM uint32_t TRIGGER
     Offset: 0xEE8 (R/ ) TRIGGER.
     
    __IM uint32_t FIFO0
     Offset: 0xEEC (R/ ) Integration ETM Data.
     
    __IM uint32_t ITATBCTR2
     Offset: 0xEF0 (R/ ) ITATBCTR2.
     
    uint32_t RESERVED4 [1]
     Reserved.
     
    __IM uint32_t ITATBCTR0
     Offset: 0xEF8 (R/ ) ITATBCTR0.
     
    __IM uint32_t FIFO1
     Offset: 0xEFC (R/ ) Integration ITM Data.
     
    __IOM uint32_t ITCTRL
     Offset: 0xF00 (R/W) Integration Mode Control.
     
    uint32_t RESERVED5 [39]
     Reserved.
     
    __IOM uint32_t CLAIMSET
     Offset: 0xFA0 (R/W) Claim tag set.
     
    __IOM uint32_t CLAIMCLR
     Offset: 0xFA4 (R/W) Claim tag clear.
     
    uint32_t RESERVED7 [8]
     Reserved.
     
    __IM uint32_t DEVID
     Offset: 0xFC8 (R/ ) TPIU_DEVID.
     
    __IM uint32_t DEVTYPE
     Offset: 0xFCC (R/ ) TPIU_DEVTYPE.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::ACPR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::CLAIMCLR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::CLAIMSET
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::CSPSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::DEVID
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::DEVTYPE
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::FFCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::FFSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::FIFO0
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::FIFO1
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::FSCR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::ITATBCTR0
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::ITATBCTR2
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::ITCTRL
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t TPI_Type::RESERVED0[2]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t TPI_Type::RESERVED1[55]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t TPI_Type::RESERVED2[131]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t TPI_Type::RESERVED3[759]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t TPI_Type::RESERVED4[1]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t TPI_Type::RESERVED5[39]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t TPI_Type::RESERVED7[8]
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::SPPR
    +
    + +
    +
    + +
    +
    + + + + +
    __IOM uint32_t TPI_Type::SSPSR
    +
    + +
    +
    + +
    +
    + + + + +
    __IM uint32_t TPI_Type::TRIGGER
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/struct_t_p_i___type.js b/Documentation/Core/html/struct_t_p_i___type.js new file mode 100644 index 0000000..e95d25f --- /dev/null +++ b/Documentation/Core/html/struct_t_p_i___type.js @@ -0,0 +1,27 @@ +var struct_t_p_i___type = +[ + [ "ACPR", "struct_t_p_i___type.html#a9e5e4421ef9c3d5b7ff8b24abd4e99b3", null ], + [ "CLAIMCLR", "struct_t_p_i___type.html#a0e10e292cb019a832b03ddd055b2f6ac", null ], + [ "CLAIMSET", "struct_t_p_i___type.html#af8b7d15fa5252b733dd4b11fa1b5730a", null ], + [ "CSPSR", "struct_t_p_i___type.html#a8826aa84e5806053395a742d38d59d0f", null ], + [ "DEVID", "struct_t_p_i___type.html#abc0ecda8a5446bc754080276bad77514", null ], + [ "DEVTYPE", "struct_t_p_i___type.html#ad98855854a719bbea33061e71529a472", null ], + [ "FFCR", "struct_t_p_i___type.html#a3f68b6e73561b4849ebf953a894df8d2", null ], + [ "FFSR", "struct_t_p_i___type.html#a6c47a0b4c7ffc66093ef993d36bb441c", null ], + [ "FIFO0", "struct_t_p_i___type.html#aa4d7b5cf39dff9f53bf7f69bc287a814", null ], + [ "FIFO1", "struct_t_p_i___type.html#a061372fcd72f1eea871e2d9c1be849bc", null ], + [ "FSCR", "struct_t_p_i___type.html#ad6901bfd8a0089ca7e8a20475cf494a8", null ], + [ "ITATBCTR0", "struct_t_p_i___type.html#aaa573b2e073e76e93c51ecec79c616d0", null ], + [ "ITATBCTR2", "struct_t_p_i___type.html#ab358319b969d3fed0f89bbe33e9f1652", null ], + [ "ITCTRL", "struct_t_p_i___type.html#aaa4c823c10f115f7517c82ef86a5a68d", null ], + [ "RESERVED0", "struct_t_p_i___type.html#af143c5e8fc9a3b2be2878e9c1f331aa9", null ], + [ "RESERVED1", "struct_t_p_i___type.html#ac3956fe93987b725d89d3be32738da12", null ], + [ "RESERVED2", "struct_t_p_i___type.html#ac7bbb92e6231b9b38ac483f7d161a096", null ], + [ "RESERVED3", "struct_t_p_i___type.html#a31700c8cdd26e4c094db72af33d9f24c", null ], + [ "RESERVED4", "struct_t_p_i___type.html#a684071216fafee4e80be6aaa932cec46", null ], + [ "RESERVED5", "struct_t_p_i___type.html#a3f80dd93f6bab6524603a7aa58de9a30", null ], + [ "RESERVED7", "struct_t_p_i___type.html#a476ca23fbc9480f1697fbec871130550", null ], + [ "SPPR", "struct_t_p_i___type.html#a12f79d4e3ddc69893ba8bff890d04cc5", null ], + [ "SSPSR", "struct_t_p_i___type.html#a7b72598e20066133e505bb781690dc22", null ], + [ "TRIGGER", "struct_t_p_i___type.html#a4d4cd2357f72333a82a1313228287bbd", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/sync_off.png b/Documentation/Core/html/sync_off.png new file mode 100644 index 0000000..e8e314d Binary files /dev/null and b/Documentation/Core/html/sync_off.png differ diff --git a/Documentation/Core/html/sync_on.png b/Documentation/Core/html/sync_on.png new file mode 100644 index 0000000..f80906a Binary files /dev/null and b/Documentation/Core/html/sync_on.png differ diff --git a/Documentation/Core/html/system_c_pg.html b/Documentation/Core/html/system_c_pg.html new file mode 100644 index 0000000..c298350 --- /dev/null +++ b/Documentation/Core/html/system_c_pg.html @@ -0,0 +1,310 @@ + + + + + +System Configuration Files system_<device>.c and system_<device>.h +CMSIS-CORE: System Configuration Files system_<device>.c and system_<device>.h + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    System Configuration Files system_<device>.c and system_<device>.h
    +
    +
    +

    The System Configuration Files system_<device>.c and system_<device>.h provides as a minimum the functions described under System and Clock Configuration. These functions are device specific and need adaptations. In addition, the file might have configuration settings for the device such as XTAL frequency or PLL prescaler settings.

    +

    For devices with external memory BUS the system_<device>.c also configures the BUS system.

    +

    The silicon vendor might expose other functions (i.e. for power configuration) in the system_<device>.c file. In case of additional features the function prototypes need to be added to the system_<device>.h header file.

    +

    +system_Device.c Template File

    +

    The system_Device.c Template File for the Cortex-M3 is shown below.

    +
    /**************************************************************************//**
+ * @file     system_<Device>.c
+ * @brief    CMSIS Cortex-M# Device Peripheral Access Layer Source File for
+ *           Device <Device>
+ * @version  V3.10
+ * @date     23. November 2012
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2012 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#include <stdint.h>
+#include "<Device>.h"
+
+
+/*----------------------------------------------------------------------------
+  DEFINES
+ *----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+/* ToDo: add here your necessary defines for device initialization
+         following is an example for different system frequencies             */
+#define __HSI             ( 6000000UL)
+#define __XTAL            (12000000UL)    /* Oscillator frequency             */
+#define __SYS_OSC_CLK     (    ___HSI)    /* Main oscillator frequency        */
+
+#define __SYSTEM_CLOCK    (4*__XTAL)
+
+
+/*----------------------------------------------------------------------------
+  Clock Variable definitions
+ *----------------------------------------------------------------------------*/
+/* ToDo: initialize SystemCoreClock with the system core clock frequency value
+         achieved after system intitialization.
+         This means system core clock frequency after call to SystemInit()    */
+uint32_t SystemCoreClock = __SYSTEM_CLOCK;  /*!< System Clock Frequency (Core Clock)*/
+
+
+/*----------------------------------------------------------------------------
+  Clock functions
+ *----------------------------------------------------------------------------*/
+void SystemCoreClockUpdate (void)            /* Get Core Clock Frequency      */
+{
+/* ToDo: add code to calculate the system frequency based upon the current
+         register settings.
+         This function can be used to retrieve the system core clock frequeny
+         after user changed register sittings.                                */
+  SystemCoreClock = __SYSTEM_CLOCK;
+}
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System.
+ */
+void SystemInit (void)
+{
+/* ToDo: add code to initialize the system
+         do not use global variables because this function is called before
+         reaching pre-main. RW section maybe overwritten afterwards.          */
+  SystemCoreClock = __SYSTEM_CLOCK;
+}
+

    +system_Device.h Template File

    +

    The system_<device>.h header file contains prototypes to access the public functions in the system_<device>.c file. The system_Device.h Template File is shown below.

    +
    /**************************************************************************//**
+ * @file     system_<Device>.h
+ * @brief    CMSIS Cortex-M# Device Peripheral Access Layer Header File for
+ *           Device <Device>
+ * @version  V3.10
+ * @date     23. November 2012
+ *
+ * @note
+ *
+ ******************************************************************************/
+/* Copyright (c) 2012 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+
+#ifndef SYSTEM_<Device>_H   /* ToDo: replace '<Device>' with your device name */
+#define SYSTEM_<Device>_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
+
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_<Device>_H */
+
    +
    + + + + diff --git a/Documentation/Core/html/tab_a.png b/Documentation/Core/html/tab_a.png new file mode 100644 index 0000000..fffadc1 Binary files /dev/null and b/Documentation/Core/html/tab_a.png differ diff --git a/Documentation/Core/html/tab_b.png b/Documentation/Core/html/tab_b.png new file mode 100644 index 0000000..f69d988 Binary files /dev/null and b/Documentation/Core/html/tab_b.png differ diff --git a/Documentation/Core/html/tab_h.png b/Documentation/Core/html/tab_h.png new file mode 100644 index 0000000..5e9188f Binary files /dev/null and b/Documentation/Core/html/tab_h.png differ diff --git a/Documentation/Core/html/tab_s.png b/Documentation/Core/html/tab_s.png new file mode 100644 index 0000000..956e1c2 Binary files /dev/null and b/Documentation/Core/html/tab_s.png differ diff --git a/Documentation/Core/html/tab_topnav.png b/Documentation/Core/html/tab_topnav.png new file mode 100644 index 0000000..b257b77 Binary files /dev/null and b/Documentation/Core/html/tab_topnav.png differ diff --git a/Documentation/Core/html/tabs.css b/Documentation/Core/html/tabs.css new file mode 100644 index 0000000..ffbab50 --- /dev/null +++ b/Documentation/Core/html/tabs.css @@ -0,0 +1,71 @@ +.tabs, .tabs1, .tabs2, .tabs3 { + background-image: url('tab_b.png'); + width: 100%; + z-index: 101; + font-size: 10px; +} + +.tabs1 { + background-image: url('tab_topnav.png'); + font-size: 12px; +} + +.tabs2 { + font-size: 10px; +} +.tabs3 { + font-size: 9px; +} + +.tablist { + margin: 0; + padding: 0; + display: table; + line-height: 24px; +} + +.tablist li { + float: left; + display: table-cell; + background-image: url('tab_b.png'); + list-style: none; +} + +.tabs1 .tablist li { + float: left; + display: table-cell; + background-image: url('tab_topnav.png'); + list-style: none; +} + +.tablist a { + display: block; + padding: 0 20px; + font-weight: bold; + background-image:url('tab_s.png'); + background-repeat:no-repeat; + background-position:right; + color: #283A5D; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; + outline: none; +} + +.tabs3 .tablist a { + padding: 0 10px; +} + +.tablist a:hover { + background-image: url('tab_h.png'); + background-repeat:repeat-x; + color: #fff; + text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); + text-decoration: none; +} + +.tablist li.current a { + background-image: url('tab_a.png'); + background-repeat:repeat-x; + color: #fff; + text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +} diff --git a/Documentation/Core/html/union_a_p_s_r___type.html b/Documentation/Core/html/union_a_p_s_r___type.html new file mode 100644 index 0000000..5450446 --- /dev/null +++ b/Documentation/Core/html/union_a_p_s_r___type.html @@ -0,0 +1,266 @@ + + + + + +APSR_Type Union Reference +CMSIS-CORE: APSR_Type Union Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    APSR_Type Union Reference
    +
    +
    + +

    Union type to access the Application Program Status Register (APSR). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    struct {
       uint32_t   _reserved0:27
     bit: 0..26 Reserved
     
       uint32_t   Q:1
     bit: 27 Saturation condition flag
     
       uint32_t   V:1
     bit: 28 Overflow condition code flag
     
       uint32_t   C:1
     bit: 29 Carry condition code flag
     
       uint32_t   Z:1
     bit: 30 Zero condition code flag
     
       uint32_t   N:1
     bit: 31 Negative condition code flag
     
    } b
     Structure used for bit access.
     
    uint32_t w
     Type used for word access.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint32_t APSR_Type::_reserved0
    +
    + +
    +
    + +
    +
    + + + + +
    struct { ... } APSR_Type::b
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t APSR_Type::C
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t APSR_Type::N
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t APSR_Type::Q
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t APSR_Type::V
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t APSR_Type::w
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t APSR_Type::Z
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/union_a_p_s_r___type.js b/Documentation/Core/html/union_a_p_s_r___type.js new file mode 100644 index 0000000..cbea61b --- /dev/null +++ b/Documentation/Core/html/union_a_p_s_r___type.js @@ -0,0 +1,11 @@ +var union_a_p_s_r___type = +[ + [ "_reserved0", "union_a_p_s_r___type.html#afbce95646fd514c10aa85ec0a33db728", null ], + [ "b", "union_a_p_s_r___type.html#a7dbc79a057ded4b11ca5323fc2d5ab14", null ], + [ "C", "union_a_p_s_r___type.html#a86e2c5b891ecef1ab55b1edac0da79a6", null ], + [ "N", "union_a_p_s_r___type.html#a7e7bbba9b00b0bb3283dc07f1abe37e0", null ], + [ "Q", "union_a_p_s_r___type.html#a22d10913489d24ab08bd83457daa88de", null ], + [ "V", "union_a_p_s_r___type.html#a8004d224aacb78ca37774c35f9156e7e", null ], + [ "w", "union_a_p_s_r___type.html#ae4c2ef8c9430d7b7bef5cbfbbaed3a94", null ], + [ "Z", "union_a_p_s_r___type.html#a3b04d58738b66a28ff13f23d8b0ba7e5", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/union_c_o_n_t_r_o_l___type.html b/Documentation/Core/html/union_c_o_n_t_r_o_l___type.html new file mode 100644 index 0000000..f9b889b --- /dev/null +++ b/Documentation/Core/html/union_c_o_n_t_r_o_l___type.html @@ -0,0 +1,236 @@ + + + + + +CONTROL_Type Union Reference +CMSIS-CORE: CONTROL_Type Union Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    CONTROL_Type Union Reference
    +
    +
    + +

    Union type to access the Control Registers (CONTROL). +

    + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    struct {
       uint32_t   nPRIV:1
     bit: 0 Execution privilege in Thread mode
     
       uint32_t   SPSEL:1
     bit: 1 Stack to be used
     
       uint32_t   FPCA:1
     bit: 2 FP extension active flag
     
       uint32_t   _reserved0:29
     bit: 3..31 Reserved
     
    } b
     Structure used for bit access.
     
    uint32_t w
     Type used for word access.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint32_t CONTROL_Type::_reserved0
    +
    + +
    +
    + +
    +
    + + + + +
    struct { ... } CONTROL_Type::b
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t CONTROL_Type::FPCA
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t CONTROL_Type::nPRIV
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t CONTROL_Type::SPSEL
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t CONTROL_Type::w
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/Core/html/union_c_o_n_t_r_o_l___type.js b/Documentation/Core/html/union_c_o_n_t_r_o_l___type.js new file mode 100644 index 0000000..eb2c173 --- /dev/null +++ b/Documentation/Core/html/union_c_o_n_t_r_o_l___type.js @@ -0,0 +1,9 @@ +var union_c_o_n_t_r_o_l___type = +[ + [ "_reserved0", "union_c_o_n_t_r_o_l___type.html#af8c314273a1e4970a5671bd7f8184f50", null ], + [ "b", "union_c_o_n_t_r_o_l___type.html#adc6a38ab2980d0e9577b5a871da14eb9", null ], + [ "FPCA", "union_c_o_n_t_r_o_l___type.html#ac62cfff08e6f055e0101785bad7094cd", null ], + [ "nPRIV", "union_c_o_n_t_r_o_l___type.html#a35c1732cf153b7b5c4bd321cf1de9605", null ], + [ "SPSEL", "union_c_o_n_t_r_o_l___type.html#a8cc085fea1c50a8bd9adea63931ee8e2", null ], + [ "w", "union_c_o_n_t_r_o_l___type.html#a6b642cca3d96da660b1198c133ca2a1f", null ] +]; \ No newline at end of file diff --git a/Documentation/Core/html/union_i_p_s_r___type.html b/Documentation/Core/html/union_i_p_s_r___type.html new file mode 100644 index 0000000..9685687 --- /dev/null +++ b/Documentation/Core/html/union_i_p_s_r___type.html @@ -0,0 +1,206 @@ + + + + + +IPSR_Type Union Reference +CMSIS-CORE: IPSR_Type Union Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-CORE +  Version 4.30 +
    +
    CMSIS-CORE support for Cortex-M processor-based devices
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    IPSR_Type Union Reference
    +
    +
    + +

    Union type to access the Interrupt Program Status Register (IPSR). +

    + + + + + + + + + + + + + + + +

    +Data Fields

    struct {
       uint32_t   ISR:9
     bit: 0.. 8 Exception number
     
       uint32_t   _reserved0:23
     bit: 9..31 Reserved
     
    } b
     Structure used for bit access.
     
    uint32_t w
     Type used for word access.
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint32_t IPSR_Type::_reserved0
    +
    + +
    +
    + +
    +
    + + + + +
    struct { ... } IPSR_Type::b
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t IPSR_Type::ISR
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t IPSR_Type::w
    +
    + +
    +
    +
    +
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    +
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    CMSIS-CORE +  Version 4.30 +
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    CMSIS-CORE support for Cortex-M processor-based devices
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    +Data Fields
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    +
    xPSR_Type Union Reference
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    +
    + +

    Union type to access the Special-Purpose Program Status Registers (xPSR). +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Data Fields

    struct {
       uint32_t   ISR:9
     bit: 0.. 8 Exception number
     
       uint32_t   _reserved0:15
     bit: 9..23 Reserved
     
       uint32_t   T:1
     bit: 24 Thumb bit (read 0)
     
       uint32_t   IT:2
     bit: 25..26 saved IT state (read 0)
     
       uint32_t   Q:1
     bit: 27 Saturation condition flag
     
       uint32_t   V:1
     bit: 28 Overflow condition code flag
     
       uint32_t   C:1
     bit: 29 Carry condition code flag
     
       uint32_t   Z:1
     bit: 30 Zero condition code flag
     
       uint32_t   N:1
     bit: 31 Negative condition code flag
     
    } b
     Structure used for bit access.
     
    uint32_t w
     Type used for word access.
     
    +

    Field Documentation

    + +
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    uint32_t xPSR_Type::_reserved0
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    struct { ... } xPSR_Type::b
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    uint32_t xPSR_Type::C
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    uint32_t xPSR_Type::ISR
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    uint32_t xPSR_Type::IT
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    uint32_t xPSR_Type::N
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    uint32_t xPSR_Type::Q
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    uint32_t xPSR_Type::T
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    uint32_t xPSR_Type::V
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    uint32_t xPSR_Type::w
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    uint32_t xPSR_Type::Z
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    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    ARM/arm_class_marks_example_f32.c File Reference
    +
    +
    + + + + + + + + + + +

    +Macros

    #define USE_STATIC_INIT
     
    #define TEST_LENGTH_SAMPLES
     
    #define NUMSTUDENTS
     
    #define NUMSUBJECTS
     
    + + + +

    +Functions

    int32_t main ()
     
    + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    const float32_t testMarks_f32 [TEST_LENGTH_SAMPLES]
     
    const float32_t testUnity_f32 [4]
     
    static float32_t testOutput [TEST_LENGTH_SAMPLES]
     
    uint32_t numStudents
     
    uint32_t numSubjects
     
    float32_t max_marks
     
    float32_t min_marks
     
    float32_t mean
     
    float32_t std
     
    float32_t var
     
    uint32_t student_num
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define NUMSTUDENTS
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define NUMSUBJECTS
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define TEST_LENGTH_SAMPLES
    +
    +
    Examples:
    arm_class_marks_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_linear_interp_example_f32.c, and arm_signal_converge_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + +
    #define USE_STATIC_INIT
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    +
    Examples:
    arm_class_marks_example_f32.c, arm_convolution_example_f32.c, arm_dotproduct_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, arm_linear_interp_example_f32.c, arm_matrix_example_f32.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    References arm_mat_init_f32(), arm_mat_mult_f32(), arm_max_f32(), arm_mean_f32(), arm_min_f32(), arm_std_f32(), arm_var_f32(), max_marks, mean, min_marks, NUMSTUDENTS, numStudents, NUMSUBJECTS, numSubjects, std, student_num, testMarks_f32, testOutput, testUnity_f32, and var.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t max_marks
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t mean
    +
    +
    Examples:
    arm_class_marks_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by arm_std_f32(), arm_var_f32(), and main().

    + +
    +
    + +
    +
    + + + + +
    float32_t min_marks
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t numStudents
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t numSubjects
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t std
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t student_num
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const float32_t testMarks_f32[TEST_LENGTH_SAMPLES]
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    float32_t testOutput[TEST_LENGTH_SAMPLES]
    +     		+static
    +
    +
    Examples:
    arm_class_marks_example_f32.c, arm_dotproduct_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, arm_linear_interp_example_f32.c, and arm_sin_cos_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const float32_t testUnity_f32[4]
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t var
    +
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    Referenced by arm_std_f32(), and main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_a_r_m_2arm__convolution__example__f32_8c.html b/Documentation/DSP/html/_a_r_m_2arm__convolution__example__f32_8c.html new file mode 100644 index 0000000..9b30514 --- /dev/null +++ b/Documentation/DSP/html/_a_r_m_2arm__convolution__example__f32_8c.html @@ -0,0 +1,385 @@ + + + + + +arm_convolution_example_f32.c File Reference +CMSIS-DSP: arm_convolution_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    ARM/arm_convolution_example_f32.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define MAX_BLOCKSIZE
     
    #define DELTA
     
    #define SNR_THRESHOLD
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    float32_t Ak [MAX_BLOCKSIZE]
     
    float32_t Bk [MAX_BLOCKSIZE]
     
    float32_t AxB [MAX_BLOCKSIZE *2]
     
    float32_t testInputA_f32 [64]
     
    float32_t testInputB_f32 [64]
     
    const float testRefOutput_f32 [127]
     
    uint32_t srcALen
     
    uint32_t srcBLen
     
    uint32_t outLen
     
    float32_t snr
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define DELTA
    +
    +
    Examples:
    arm_dotproduct_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + +
    #define MAX_BLOCKSIZE
    +
    +
    Examples:
    arm_convolution_example_f32.c, arm_dotproduct_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define SNR_THRESHOLD
    +
    +
    Examples:
    arm_convolution_example_f32.c, and arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References Ak, arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), arm_cmplx_mult_cmplx_f32(), arm_copy_f32(), arm_fill_f32(), ARM_MATH_SUCCESS, arm_snr_f32(), AxB, Bk, MAX_BLOCKSIZE, outLen, snr, SNR_THRESHOLD, srcALen, srcBLen, status, testInputA_f32, testInputB_f32, and testRefOutput_f32.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t Ak[MAX_BLOCKSIZE]
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t AxB[MAX_BLOCKSIZE *2]
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t Bk[MAX_BLOCKSIZE]
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t outLen
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t snr
    +
    +
    Examples:
    arm_convolution_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, and arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t srcALen
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by arm_conv_f32(), arm_conv_fast_opt_q15(), arm_conv_fast_q15(), arm_conv_fast_q31(), arm_conv_opt_q15(), arm_conv_opt_q7(), arm_conv_partial_f32(), arm_conv_partial_fast_opt_q15(), arm_conv_partial_fast_q15(), arm_conv_partial_fast_q31(), arm_conv_partial_opt_q15(), arm_conv_partial_opt_q7(), arm_conv_partial_q15(), arm_conv_partial_q31(), arm_conv_partial_q7(), arm_conv_q15(), arm_conv_q31(), arm_conv_q7(), arm_correlate_f32(), arm_correlate_fast_opt_q15(), arm_correlate_fast_q15(), arm_correlate_fast_q31(), arm_correlate_opt_q15(), arm_correlate_opt_q7(), arm_correlate_q15(), arm_correlate_q31(), arm_correlate_q7(), and main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t srcBLen
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by arm_conv_f32(), arm_conv_fast_opt_q15(), arm_conv_fast_q15(), arm_conv_fast_q31(), arm_conv_opt_q15(), arm_conv_opt_q7(), arm_conv_partial_f32(), arm_conv_partial_fast_opt_q15(), arm_conv_partial_fast_q15(), arm_conv_partial_fast_q31(), arm_conv_partial_opt_q15(), arm_conv_partial_opt_q7(), arm_conv_partial_q15(), arm_conv_partial_q31(), arm_conv_partial_q7(), arm_conv_q15(), arm_conv_q31(), arm_conv_q7(), arm_correlate_f32(), arm_correlate_fast_opt_q15(), arm_correlate_fast_q15(), arm_correlate_fast_q31(), arm_correlate_opt_q15(), arm_correlate_opt_q7(), arm_correlate_q15(), arm_correlate_q31(), arm_correlate_q7(), and main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testInputA_f32[64]
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testInputB_f32[64]
    +
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const float testRefOutput_f32[127]
    +
    +
    Examples:
    arm_convolution_example_f32.c, arm_graphic_equalizer_example_q31.c, and arm_sin_cos_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_a_r_m_2arm__dotproduct__example__f32_8c.html b/Documentation/DSP/html/_a_r_m_2arm__dotproduct__example__f32_8c.html new file mode 100644 index 0000000..76b279f --- /dev/null +++ b/Documentation/DSP/html/_a_r_m_2arm__dotproduct__example__f32_8c.html @@ -0,0 +1,297 @@ + + + + + +arm_dotproduct_example_f32.c File Reference +CMSIS-DSP: arm_dotproduct_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    ARM/arm_dotproduct_example_f32.c File Reference
    +
    +
    + + + + + + +

    +Macros

    #define MAX_BLOCKSIZE
     
    #define DELTA
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + +

    +Variables

    float32_t srcA_buf_f32 [MAX_BLOCKSIZE]
     
    float32_t srcB_buf_f32 [MAX_BLOCKSIZE]
     
    float32_t refDotProdOut
     
    float32_t multOutput [MAX_BLOCKSIZE]
     
    float32_t testOutput
     
    arm_status status
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define DELTA
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define MAX_BLOCKSIZE
    +
    + +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_add_f32(), ARM_MATH_TEST_FAILURE, arm_mult_f32(), DELTA, MAX_BLOCKSIZE, multOutput, refDotProdOut, srcA_buf_f32, srcB_buf_f32, status, and testOutput.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t multOutput[MAX_BLOCKSIZE]
    +
    +
    Examples:
    arm_dotproduct_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t refDotProdOut
    +
    +
    Examples:
    arm_dotproduct_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t srcA_buf_f32[MAX_BLOCKSIZE]
    +
    +
    Examples:
    arm_dotproduct_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t srcB_buf_f32[MAX_BLOCKSIZE]
    +
    +
    Examples:
    arm_dotproduct_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    arm_status status
    +
    +
    Examples:
    arm_convolution_example_f32.c, arm_dotproduct_example_f32.c, arm_fft_bin_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, arm_linear_interp_example_f32.c, arm_matrix_example_f32.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by arm_cfft_radix2_init_f32(), arm_cfft_radix2_init_q15(), arm_cfft_radix2_init_q31(), arm_cfft_radix4_init_f32(), arm_cfft_radix4_init_q15(), arm_cfft_radix4_init_q31(), arm_conv_partial_f32(), arm_conv_partial_fast_opt_q15(), arm_conv_partial_fast_q15(), arm_conv_partial_fast_q31(), arm_conv_partial_opt_q15(), arm_conv_partial_opt_q7(), arm_conv_partial_q15(), arm_conv_partial_q31(), arm_conv_partial_q7(), arm_dct4_init_f32(), arm_dct4_init_q15(), arm_dct4_init_q31(), arm_fir_decimate_init_f32(), arm_fir_decimate_init_q15(), arm_fir_decimate_init_q31(), arm_fir_init_q15(), arm_fir_interpolate_init_f32(), arm_fir_interpolate_init_q15(), arm_fir_interpolate_init_q31(), arm_mat_add_f32(), arm_mat_add_q15(), arm_mat_add_q31(), arm_mat_cmplx_mult_f32(), arm_mat_cmplx_mult_q15(), arm_mat_cmplx_mult_q31(), arm_mat_inverse_f32(), arm_mat_inverse_f64(), arm_mat_mult_f32(), arm_mat_mult_fast_q15(), arm_mat_mult_fast_q31(), arm_mat_mult_q15(), arm_mat_mult_q31(), arm_mat_scale_f32(), arm_mat_scale_q15(), arm_mat_scale_q31(), arm_mat_sub_f32(), arm_mat_sub_q15(), arm_mat_sub_q31(), arm_mat_trans_f32(), arm_mat_trans_q15(), arm_mat_trans_q31(), arm_rfft_fast_init_f32(), arm_rfft_init_f32(), arm_rfft_init_q15(), arm_rfft_init_q31(), and main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testOutput
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_a_r_m_2arm__fft__bin__data_8c.html b/Documentation/DSP/html/_a_r_m_2arm__fft__bin__data_8c.html new file mode 100644 index 0000000..1e8ddfc --- /dev/null +++ b/Documentation/DSP/html/_a_r_m_2arm__fft__bin__data_8c.html @@ -0,0 +1,153 @@ + + + + + +arm_fft_bin_data.c File Reference +CMSIS-DSP: arm_fft_bin_data.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    ARM/arm_fft_bin_data.c File Reference
    +
    +
    + + + + +

    +Variables

    float32_t testInput_f32_10khz [2048]
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t testInput_f32_10khz[2048]
    +
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_a_r_m_2arm__fft__bin__example__f32_8c.html b/Documentation/DSP/html/_a_r_m_2arm__fft__bin__example__f32_8c.html new file mode 100644 index 0000000..accf978 --- /dev/null +++ b/Documentation/DSP/html/_a_r_m_2arm__fft__bin__example__f32_8c.html @@ -0,0 +1,301 @@ + + + + + +arm_fft_bin_example_f32.c File Reference +CMSIS-DSP: arm_fft_bin_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    ARM/arm_fft_bin_example_f32.c File Reference
    +
    +
    + + + + +

    +Macros

    #define TEST_LENGTH_SAMPLES
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + +

    +Variables

    float32_t testInput_f32_10khz [TEST_LENGTH_SAMPLES]
     
    static float32_t testOutput [TEST_LENGTH_SAMPLES/2]
     
    uint32_t fftSize
     
    uint32_t ifftFlag
     
    uint32_t doBitReverse
     
    uint32_t refIndex
     
    uint32_t testIndex
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define TEST_LENGTH_SAMPLES
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_cfft_f32(), arm_cfft_sR_f32_len1024, arm_cmplx_mag_f32(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_max_f32(), doBitReverse, fftSize, ifftFlag, refIndex, status, testIndex, testInput_f32_10khz, and testOutput.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t doBitReverse
    +
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t fftSize
    +
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t ifftFlag
    +
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    Referenced by arm_cfft_radix2_init_f32(), arm_cfft_radix2_init_q15(), arm_cfft_radix2_init_q31(), arm_cfft_radix4_init_f32(), arm_cfft_radix4_init_q15(), arm_cfft_radix4_init_q31(), and main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t refIndex
    +
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t testIndex
    +
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    float32_t testOutput[TEST_LENGTH_SAMPLES/2]
    +     		+static
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_change_01_log_8txt.html b/Documentation/DSP/html/_change_01_log_8txt.html new file mode 100644 index 0000000..1efb727 --- /dev/null +++ b/Documentation/DSP/html/_change_01_log_8txt.html @@ -0,0 +1,129 @@ + + + + + +Change Log.txt File Reference +CMSIS-DSP: Change Log.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Change Log.txt File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_change_log_pg.html b/Documentation/DSP/html/_change_log_pg.html new file mode 100644 index 0000000..8b03721 --- /dev/null +++ b/Documentation/DSP/html/_change_log_pg.html @@ -0,0 +1,371 @@ + + + + + +Change Log +CMSIS-DSP: Change Log + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Change Log
    +
    +
    +
    + Version 1.4.7 (no source code change [still labeled 1.4.5]) 2015/10/20

    +

    Modified arm_math.h

    +
      +
    • Added explicit type casts to remove compiler warnings.
      • +
    • Supressed irrelevant warnings for toolchain GCC.
      • +
    +

    Updated documentation

    +
      +
    • functions arm_cos_f32, arm_sin_f32 use table lookup combined with linear interpolation (since V1.4.2). This is now documented.
      • +
    +
    + Version 1.4.6 (no source code change [still labeled 1.4.5]) 2015/08/26

    +

    Modified arm_math.h

    + +
    + Version 1.4.5 2015/03/19

    +

    Added support for the Cortex-M7 processor

    +

    Fixed bug in arm_mat_inverse_f32.c and arm_mat_inverse_f64.c. They weren't properly handling diagonal matrices.

    +

    arm_cfft_f32.c - help documentation updated

    +

    Updated documentation to show deprecated functions

    +
    + Version 1.4.4 2014/07/31

    +

    Added the following new files:

    + +

    Optimizations to the following files:

    + +
    + Version 1.4.3 2014/03/12

    +

    Undid changes to arm_biquad_cascade_df1_q31.c

    +

    Added support for COSMIC

    +

    Changed 'short' to 'q15_t' where appropriate

    +

    Fixed arm_conv_partial_fast_q15.c for UNALIGNED_SUPPORT_DISABLE

    +

    Fixed arm_mat_cmplx_mult_q15.c for UNALIGNED_SUPPORT_DISABLE

    +

    Fixed arm_conv_partial_opt_q7.c for UNALIGNED_SUPPORT_DISABLE

    +

    Restored the internal fftlen of 16 to arm_rfft_fast_init_f32.c

    +

    Updated core_xxx.h files to newer versions from ARM

    +
    + Version 1.4.2 2013/10/16

    +

    Moved const structures from arm_const_structs.h to arm_const_structs.c

    +

    Rfft_fast_f32 no longer allows fft length of 16 as it wouldn't have worked anyways

    +

    Partial convolution was producing the wrong results in some cases

    +

    arm_lms_q31 and q15 now saturate the results in the M0 code to match the M3 & M4 code

    +

    Rfft_q15 and q31 had potential overflow issues resolved

    +

    arm_biquad_cascade_df1_q31.c had a typo which resulted in incorrect outputs

    +

    fast math sine and cosine now use linear interpolation

    +

    controller sin/cos now uses a more accurate interpolation algorithm

    +

    arm_mat_inverse was reading outside its input array

    +

    arm_cmplx_dot_prod was incorrect

    +

    switched some incorrect usages of __ssat to clip_q63_to_q31

    +

    changed var & std q31 to downshift input data by 8

    +

    var q31 & q15 no longer output larger data types

    +

    arm_mat_cmplx_mult_q15.c was done incorrectly for big vs little endian

    +

    arm_mat_mult_q31.c was inconsistent with the other multiplies, so added saturation

    +

    arm_conv_partial_q15 had an incorrect comparison between signed & unsigned values

    +
    + Version 1.4.1 2013/02/20

    +

    Updated licenses in headers to 2013

    +

    Fixed ALIGN4 macro in arm_math.h

    +

    Added files to Cortex-M0 projects so that all projects have same file list

    +

    Fixed bugs in

    + +
    + Version 1.4.0 2013/01/09

    +

    Updated with more optimizations, bug fixes and new license information in headers

    +

    Optimized functions:

    +
      +
    • arm_biquad_cascade_df2T_f32
      • +
    • arm_biquad_cascade_df1_q31
      • +
    • arm_fir_f32
      • +
    • arm_fir_fast_q31
      • +
    • arm_cfft_f32
      • +
    • arm_cfft_radix2_q31
      • +
    • arm_rfft_fast_f32 (new function)
      • +
    +

    Fixed compiler warnings in arm_math.h for comparing signed and unsigned ints

    +

    Fixed a saturation bug in arm_rms_q15

    +

    Simplified the code in arm_sin_cos_q31

    +

    Added a preprocessor directive to treat the Cortex M0+ just like the Cortex M0

    +

    The following functions were deprecated and will be removed in a future version

    +
      +
    • arm_cfft_radix2_f32
      • +
    • arm_cfft_radix2_init_f32
      • +
    • arm_cfft_radix4_f32
      • +
    • arm_cfft_radix4_init_f32
      • +
    +
    + Version 1.3.0

    +

    Added CMSIS DSP Software Library

    +

    The CMSIS DSP Software Library is a suite of common signal processing functions targeted to Cortex-M processor based microcontrollers. Even though the code has been specifically optimized towards using the extended DSP instruction set of the Cortex-M4 processor, the library can be compiled for any Cortex-M processor.

    +

    For more information please see CMSIS DSP Library documentation. Added Cortex-M4 Core Support

    +

    Additional folder CM4, containing the Cortex-M4 core support files, has been added. CM0 CM3 CM4 CoreSupport DeviceSupport

    +

    New naming for Core Support Files

    +

    The new Core Support Files are:

    +
      +
    • core_cm#.h (# = 0, 3, 4)
      • +
    • core_cmFunc.h (Cortex-M Core Register access functions)
      • +
    • core_cmInstr.h (Cortex-M Core instructions)
      • +
    • core_cm4_simd.h (Cortex-M4 SIMD instructions)
      • +
    +
    + Version 1.2.0

    +

    Removed CMSIS Middelware packages

    +

    CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found. SystemFrequency renamed to SystemCoreClock

    +

    The variable name SystemCoreClock is more precise than SystemFrequency because the variable holds the clock value at which the core is running. Changed startup concept

    +

    The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit from main) has the weakness that it does not work for controllers which need a already configuerd clock system to configure the external memory controller.

    +

    Changed startup concept

    +
      +
    • SystemInit() is called from startup file before premain.
      • +
    • SystemInit() configures the clock system and also configures an existing external memory controller.
      • +
    • SystemInit() must not use global variables.
      • +
    • SystemCoreClock is initialized with a correct predefined value.
      • +
    • Additional function void SystemCoreClockUpdate (void) is provided.
      • +
    • SystemCoreClockUpdate() updates the variable SystemCoreClock and must be called whenever the core clock is changed.
      • +
    • SystemCoreClockUpdate() evaluates the clock register settings and calculates the current core clock.
      • +
    +

    Advanced Debug Functions

    +

    ITM communication channel is only capable for OUT direction. To allow also communication for IN direction a simple concept is provided.

    +
      +
    • Global variable volatile int ITM_RxBuffer used for IN data.
      • +
    • Function int ITM_CheckChar (void) checks if a new character is available.
      • +
    • Function int ITM_ReceiveChar (void) retrieves the new character.
      • +
    +

    For detailed explanation see file CMSIS debug support.htm.

    +

    Core Register Bit Definitions

    +

    Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the defines correspond with the Cortex-M Technical Reference Manual.

    +

    e.g. SysTick structure with bit definitions

    +
    +
    typedef struct
    +
    {
    +
    __IO uint32_t CTRL;
    +
    __IO uint32_t LOAD;
    +
    __IO uint32_t VAL;
    +
    __I uint32_t CALIB;
    +
    } SysTick_Type;
    +
    +
    /* SysTick Control / Status Register Definitions */
    +
    #define SysTick_CTRL_COUNTFLAG_Pos 16
    +
    #define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos)
    +
    #define SysTick_CTRL_CLKSOURCE_Pos 2
    +
    #define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos)
    +
    #define SysTick_CTRL_TICKINT_Pos 1
    +
    #define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos)
    +
    #define SysTick_CTRL_ENABLE_Pos 0
    +
    #define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos)
    +
    /* SysTick Reload Register Definitions */
    +
    #define SysTick_LOAD_RELOAD_Pos 0
    +
    #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos)
    +
    /* SysTick Current Register Definitions */
    +
    #define SysTick_VAL_CURRENT_Pos 0
    +
    #define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)
    +
    /* SysTick Calibration Register Definitions */
    +
    #define SysTick_CALIB_NOREF_Pos 31
    +
    #define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos)
    +
    #define SysTick_CALIB_SKEW_Pos 30
    +
    #define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos)
    +
    #define SysTick_CALIB_TENMS_Pos 0
    +
    #define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)
    +
    /* end of group CMSIS_CM3_SysTick */
    +

    DoxyGen Tags

    +

    DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation using DoxyGen. Folder Structure

    +

    The folder structure is changed to differentiate the single support packages.

    +
    CM0
+CM3
+    CoreSupport
+    DeviceSupport
+        Vendor
+            Device
+                Startup
+                    Toolchain
+                    Toolchain
+                    ...
+            Device
+            ...
+        Vendor
+        ...
+    Example (optional)
+        Toolchain
+            Device
+            Device
+            ...
+        Toolchain
+        ...
+Documentation
+
    + Version 1.1.0 2012/02/15

    +

    Updated with more optimizations, bug fixes and minor API changes.

    +
    + Version 1.0.11 2011/10/18

    +

    Bug Fix in conv, correlation, partial convolution.

    +
    + Version 1.0.10 2011/7/15

    +

    Big Endian support added and Merged M0 and M3/M4 Source code.

    +
    + Version 1.0.3 2010/11/29

    +

    Re-organized the CMSIS folders and updated documentation.

    +
    + Version 1.0.2 2010/11/11

    +

    Documentation updated.

    +
    + Version 1.0.1 2010/10/05

    +

    Production release and review comments incorporated.

    +
    + Version 1.0.0 2010/09/20

    +

    Production release and review comments incorporated.

    +
    + Version 0.0.9 2010/08/27

    +

    Added files: arm_biquad_cascade_df1_fast_q15.c arm_biquad_cascade_df1_fast_q31.c arm_fir_fast_q31.c arm_fir_fast_q15.c

    +
    + Version 0.0.7 2010/06/10

    +

    Misra-C changes done

    +
    + Version 0.0.5 2010/04/26

    +

    incorporated review comments and updated with latest CMSIS layer

    +
    + Version 0.0.3 2010/03/10 DP

    +

    Initial version

    +
    +
    + + + + diff --git a/Documentation/DSP/html/_g_c_c_2arm__class__marks__example__f32_8c.html b/Documentation/DSP/html/_g_c_c_2arm__class__marks__example__f32_8c.html new file mode 100644 index 0000000..762f476 --- /dev/null +++ b/Documentation/DSP/html/_g_c_c_2arm__class__marks__example__f32_8c.html @@ -0,0 +1,388 @@ + + + + + +arm_class_marks_example_f32.c File Reference +CMSIS-DSP: arm_class_marks_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    GCC/arm_class_marks_example_f32.c File Reference
    +
    +
    + + + + + + + + + + +

    +Macros

    #define USE_STATIC_INIT
     
    #define TEST_LENGTH_SAMPLES
     
    #define NUMSTUDENTS
     
    #define NUMSUBJECTS
     
    + + + +

    +Functions

    int32_t main ()
     
    + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    const float32_t testMarks_f32 [TEST_LENGTH_SAMPLES]
     
    const float32_t testUnity_f32 [4]
     
    static float32_t testOutput [TEST_LENGTH_SAMPLES]
     
    uint32_t numStudents
     
    uint32_t numSubjects
     
    float32_t max_marks
     
    float32_t min_marks
     
    float32_t mean
     
    float32_t std
     
    float32_t var
     
    uint32_t student_num
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define NUMSTUDENTS
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define NUMSUBJECTS
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define TEST_LENGTH_SAMPLES
    +
    + +
    +
    + +
    +
    + + + + +
    #define USE_STATIC_INIT
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_mat_init_f32(), arm_mat_mult_f32(), arm_max_f32(), arm_mean_f32(), arm_min_f32(), arm_std_f32(), arm_var_f32(), max_marks, mean, min_marks, NUMSTUDENTS, numStudents, NUMSUBJECTS, numSubjects, std, student_num, testMarks_f32, testOutput, testUnity_f32, and var.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t max_marks
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t mean
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t min_marks
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t numStudents
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t numSubjects
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t std
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t student_num
    +
    + +
    +
    + +
    +
    + + + + +
    const float32_t testMarks_f32[TEST_LENGTH_SAMPLES]
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    float32_t testOutput[TEST_LENGTH_SAMPLES]
    +     		+static
    +
    + +
    +
    + +
    +
    + + + + +
    const float32_t testUnity_f32[4]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t var
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_g_c_c_2arm__convolution__example__f32_8c.html b/Documentation/DSP/html/_g_c_c_2arm__convolution__example__f32_8c.html new file mode 100644 index 0000000..86872bf --- /dev/null +++ b/Documentation/DSP/html/_g_c_c_2arm__convolution__example__f32_8c.html @@ -0,0 +1,352 @@ + + + + + +arm_convolution_example_f32.c File Reference +CMSIS-DSP: arm_convolution_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    GCC/arm_convolution_example_f32.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define MAX_BLOCKSIZE
     
    #define DELTA
     
    #define SNR_THRESHOLD
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    float32_t Ak [MAX_BLOCKSIZE]
     
    float32_t Bk [MAX_BLOCKSIZE]
     
    float32_t AxB [MAX_BLOCKSIZE *2]
     
    float32_t testInputA_f32 [64]
     
    float32_t testInputB_f32 [64]
     
    const float testRefOutput_f32 [127]
     
    uint32_t srcALen
     
    uint32_t srcBLen
     
    uint32_t outLen
     
    float32_t snr
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define DELTA
    +
    + +
    +
    + +
    +
    + + + + +
    #define MAX_BLOCKSIZE
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define SNR_THRESHOLD
    +
    + +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References Ak, arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), arm_cmplx_mult_cmplx_f32(), arm_copy_f32(), arm_fill_f32(), ARM_MATH_SUCCESS, arm_snr_f32(), AxB, Bk, MAX_BLOCKSIZE, outLen, snr, SNR_THRESHOLD, srcALen, srcBLen, status, testInputA_f32, testInputB_f32, and testRefOutput_f32.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t Ak[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t AxB[MAX_BLOCKSIZE *2]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t Bk[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t outLen
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t snr
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t srcALen
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t srcBLen
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testInputA_f32[64]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testInputB_f32[64]
    +
    + +
    +
    + +
    +
    + + + + +
    const float testRefOutput_f32[127]
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_g_c_c_2arm__dotproduct__example__f32_8c.html b/Documentation/DSP/html/_g_c_c_2arm__dotproduct__example__f32_8c.html new file mode 100644 index 0000000..544f2ae --- /dev/null +++ b/Documentation/DSP/html/_g_c_c_2arm__dotproduct__example__f32_8c.html @@ -0,0 +1,282 @@ + + + + + +arm_dotproduct_example_f32.c File Reference +CMSIS-DSP: arm_dotproduct_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    GCC/arm_dotproduct_example_f32.c File Reference
    +
    +
    + + + + + + +

    +Macros

    #define MAX_BLOCKSIZE
     
    #define DELTA
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + +

    +Variables

    float32_t srcA_buf_f32 [MAX_BLOCKSIZE]
     
    float32_t srcB_buf_f32 [MAX_BLOCKSIZE]
     
    float32_t refDotProdOut
     
    float32_t multOutput [MAX_BLOCKSIZE]
     
    float32_t testOutput
     
    arm_status status
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define DELTA
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define MAX_BLOCKSIZE
    +
    + +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_add_f32(), ARM_MATH_TEST_FAILURE, arm_mult_f32(), DELTA, MAX_BLOCKSIZE, multOutput, refDotProdOut, srcA_buf_f32, srcB_buf_f32, status, and testOutput.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t multOutput[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t refDotProdOut
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t srcA_buf_f32[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t srcB_buf_f32[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    arm_status status
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testOutput
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_g_c_c_2arm__fft__bin__data_8c.html b/Documentation/DSP/html/_g_c_c_2arm__fft__bin__data_8c.html new file mode 100644 index 0000000..1f015ba --- /dev/null +++ b/Documentation/DSP/html/_g_c_c_2arm__fft__bin__data_8c.html @@ -0,0 +1,150 @@ + + + + + +arm_fft_bin_data.c File Reference +CMSIS-DSP: arm_fft_bin_data.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    GCC/arm_fft_bin_data.c File Reference
    +
    +
    + + + + +

    +Variables

    float32_t testInput_f32_10khz [2048]
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t testInput_f32_10khz[2048]
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/_g_c_c_2arm__fft__bin__example__f32_8c.html b/Documentation/DSP/html/_g_c_c_2arm__fft__bin__example__f32_8c.html new file mode 100644 index 0000000..3d4c31c --- /dev/null +++ b/Documentation/DSP/html/_g_c_c_2arm__fft__bin__example__f32_8c.html @@ -0,0 +1,288 @@ + + + + + +arm_fft_bin_example_f32.c File Reference +CMSIS-DSP: arm_fft_bin_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    GCC/arm_fft_bin_example_f32.c File Reference
    +
    +
    + + + + +

    +Macros

    #define TEST_LENGTH_SAMPLES
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + +

    +Variables

    float32_t testInput_f32_10khz [TEST_LENGTH_SAMPLES]
     
    static float32_t testOutput [TEST_LENGTH_SAMPLES/2]
     
    uint32_t fftSize
     
    uint32_t ifftFlag
     
    uint32_t doBitReverse
     
    uint32_t refIndex
     
    uint32_t testIndex
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define TEST_LENGTH_SAMPLES
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_cfft_f32(), arm_cfft_sR_f32_len1024, arm_cmplx_mag_f32(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_max_f32(), doBitReverse, fftSize, ifftFlag, refIndex, status, testIndex, testInput_f32_10khz, and testOutput.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t doBitReverse
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t fftSize
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t ifftFlag
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t refIndex
    +
    + +
    +
    + +
    +
    + + + + +
    uint32_t testIndex
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES]
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    float32_t testOutput[TEST_LENGTH_SAMPLES/2]
    +     		+static
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/annotated.html b/Documentation/DSP/html/annotated.html new file mode 100644 index 0000000..e676fe3 --- /dev/null +++ b/Documentation/DSP/html/annotated.html @@ -0,0 +1,199 @@ + + + + + +Data Structures +CMSIS-DSP: Data Structures + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Data Structures
    +
    +
    +
    Here are the data structures with brief descriptions:
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    oCarm_bilinear_interp_instance_f32Instance structure for the floating-point bilinear interpolation function
    oCarm_bilinear_interp_instance_q15Instance structure for the Q15 bilinear interpolation function
    oCarm_bilinear_interp_instance_q31Instance structure for the Q31 bilinear interpolation function
    oCarm_bilinear_interp_instance_q7Instance structure for the Q15 bilinear interpolation function
    oCarm_biquad_cas_df1_32x64_ins_q31Instance structure for the high precision Q31 Biquad cascade filter
    oCarm_biquad_cascade_df2T_instance_f32Instance structure for the floating-point transposed direct form II Biquad cascade filter
    oCarm_biquad_cascade_df2T_instance_f64Instance structure for the floating-point transposed direct form II Biquad cascade filter
    oCarm_biquad_cascade_stereo_df2T_instance_f32Instance structure for the floating-point transposed direct form II Biquad cascade filter
    oCarm_biquad_casd_df1_inst_f32Instance structure for the floating-point Biquad cascade filter
    oCarm_biquad_casd_df1_inst_q15Instance structure for the Q15 Biquad cascade filter
    oCarm_biquad_casd_df1_inst_q31Instance structure for the Q31 Biquad cascade filter
    oCarm_cfft_instance_f32Instance structure for the floating-point CFFT/CIFFT function
    oCarm_cfft_instance_q15Instance structure for the fixed-point CFFT/CIFFT function
    oCarm_cfft_instance_q31Instance structure for the fixed-point CFFT/CIFFT function
    oCarm_cfft_radix2_instance_f32Instance structure for the floating-point CFFT/CIFFT function
    oCarm_cfft_radix2_instance_q15Instance structure for the Q15 CFFT/CIFFT function
    oCarm_cfft_radix2_instance_q31Instance structure for the Radix-2 Q31 CFFT/CIFFT function
    oCarm_cfft_radix4_instance_f32Instance structure for the floating-point CFFT/CIFFT function
    oCarm_cfft_radix4_instance_q15Instance structure for the Q15 CFFT/CIFFT function
    oCarm_cfft_radix4_instance_q31Instance structure for the Q31 CFFT/CIFFT function
    oCarm_dct4_instance_f32Instance structure for the floating-point DCT4/IDCT4 function
    oCarm_dct4_instance_q15Instance structure for the Q15 DCT4/IDCT4 function
    oCarm_dct4_instance_q31Instance structure for the Q31 DCT4/IDCT4 function
    oCarm_fir_decimate_instance_f32Instance structure for the floating-point FIR decimator
    oCarm_fir_decimate_instance_q15Instance structure for the Q15 FIR decimator
    oCarm_fir_decimate_instance_q31Instance structure for the Q31 FIR decimator
    oCarm_fir_instance_f32Instance structure for the floating-point FIR filter
    oCarm_fir_instance_q15Instance structure for the Q15 FIR filter
    oCarm_fir_instance_q31Instance structure for the Q31 FIR filter
    oCarm_fir_instance_q7Instance structure for the Q7 FIR filter
    oCarm_fir_interpolate_instance_f32Instance structure for the floating-point FIR interpolator
    oCarm_fir_interpolate_instance_q15Instance structure for the Q15 FIR interpolator
    oCarm_fir_interpolate_instance_q31Instance structure for the Q31 FIR interpolator
    oCarm_fir_lattice_instance_f32Instance structure for the floating-point FIR lattice filter
    oCarm_fir_lattice_instance_q15Instance structure for the Q15 FIR lattice filter
    oCarm_fir_lattice_instance_q31Instance structure for the Q31 FIR lattice filter
    oCarm_fir_sparse_instance_f32Instance structure for the floating-point sparse FIR filter
    oCarm_fir_sparse_instance_q15Instance structure for the Q15 sparse FIR filter
    oCarm_fir_sparse_instance_q31Instance structure for the Q31 sparse FIR filter
    oCarm_fir_sparse_instance_q7Instance structure for the Q7 sparse FIR filter
    oCarm_iir_lattice_instance_f32Instance structure for the floating-point IIR lattice filter
    oCarm_iir_lattice_instance_q15Instance structure for the Q15 IIR lattice filter
    oCarm_iir_lattice_instance_q31Instance structure for the Q31 IIR lattice filter
    oCarm_linear_interp_instance_f32Instance structure for the floating-point Linear Interpolate function
    oCarm_lms_instance_f32Instance structure for the floating-point LMS filter
    oCarm_lms_instance_q15Instance structure for the Q15 LMS filter
    oCarm_lms_instance_q31Instance structure for the Q31 LMS filter
    oCarm_lms_norm_instance_f32Instance structure for the floating-point normalized LMS filter
    oCarm_lms_norm_instance_q15Instance structure for the Q15 normalized LMS filter
    oCarm_lms_norm_instance_q31Instance structure for the Q31 normalized LMS filter
    oCarm_matrix_instance_f32Instance structure for the floating-point matrix structure
    oCarm_matrix_instance_f64Instance structure for the floating-point matrix structure
    oCarm_matrix_instance_q15Instance structure for the Q15 matrix structure
    oCarm_matrix_instance_q31Instance structure for the Q31 matrix structure
    oCarm_pid_instance_f32Instance structure for the floating-point PID Control
    oCarm_pid_instance_q15Instance structure for the Q15 PID Control
    oCarm_pid_instance_q31Instance structure for the Q31 PID Control
    oCarm_rfft_fast_instance_f32Instance structure for the floating-point RFFT/RIFFT function
    oCarm_rfft_instance_f32Instance structure for the floating-point RFFT/RIFFT function
    oCarm_rfft_instance_q15Instance structure for the Q15 RFFT/RIFFT function
    \Carm_rfft_instance_q31Instance structure for the Q31 RFFT/RIFFT function
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/annotated.js b/Documentation/DSP/html/annotated.js new file mode 100644 index 0000000..4649803 --- /dev/null +++ b/Documentation/DSP/html/annotated.js @@ -0,0 +1,64 @@ +var annotated = +[ + [ "arm_bilinear_interp_instance_f32", "structarm__bilinear__interp__instance__f32.html", "structarm__bilinear__interp__instance__f32" ], + [ "arm_bilinear_interp_instance_q15", "structarm__bilinear__interp__instance__q15.html", "structarm__bilinear__interp__instance__q15" ], + [ "arm_bilinear_interp_instance_q31", "structarm__bilinear__interp__instance__q31.html", "structarm__bilinear__interp__instance__q31" ], + [ "arm_bilinear_interp_instance_q7", "structarm__bilinear__interp__instance__q7.html", "structarm__bilinear__interp__instance__q7" ], + [ "arm_biquad_cas_df1_32x64_ins_q31", "structarm__biquad__cas__df1__32x64__ins__q31.html", "structarm__biquad__cas__df1__32x64__ins__q31" ], + [ "arm_biquad_cascade_df2T_instance_f32", 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"structarm__matrix__instance__q31" ], + [ "arm_pid_instance_f32", "structarm__pid__instance__f32.html", "structarm__pid__instance__f32" ], + [ "arm_pid_instance_q15", "structarm__pid__instance__q15.html", "structarm__pid__instance__q15" ], + [ "arm_pid_instance_q31", "structarm__pid__instance__q31.html", "structarm__pid__instance__q31" ], + [ "arm_rfft_fast_instance_f32", "structarm__rfft__fast__instance__f32.html", "structarm__rfft__fast__instance__f32" ], + [ "arm_rfft_instance_f32", "structarm__rfft__instance__f32.html", "structarm__rfft__instance__f32" ], + [ "arm_rfft_instance_q15", "structarm__rfft__instance__q15.html", "structarm__rfft__instance__q15" ], + [ "arm_rfft_instance_q31", "structarm__rfft__instance__q31.html", "structarm__rfft__instance__q31" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/arm__abs__f32_8c.html b/Documentation/DSP/html/arm__abs__f32_8c.html new file mode 100644 index 0000000..66bf4eb --- /dev/null +++ b/Documentation/DSP/html/arm__abs__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_abs_f32.c File Reference +CMSIS-DSP: arm_abs_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
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      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_abs_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Floating-point vector absolute value.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__abs__q15_8c.html b/Documentation/DSP/html/arm__abs__q15_8c.html new file mode 100644 index 0000000..e24c5ba --- /dev/null +++ b/Documentation/DSP/html/arm__abs__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_abs_q15.c File Reference +CMSIS-DSP: arm_abs_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
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    +Functions
    +
    +
    arm_abs_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Q15 vector absolute value.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__abs__q31_8c.html b/Documentation/DSP/html/arm__abs__q31_8c.html new file mode 100644 index 0000000..d9f3ae5 --- /dev/null +++ b/Documentation/DSP/html/arm__abs__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_abs_q31.c File Reference +CMSIS-DSP: arm_abs_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
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    + +
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    + +
    + +
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    +Functions
    +
    +
    arm_abs_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Q31 vector absolute value.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__abs__q7_8c.html b/Documentation/DSP/html/arm__abs__q7_8c.html new file mode 100644 index 0000000..a39ebdf --- /dev/null +++ b/Documentation/DSP/html/arm__abs__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_abs_q7.c File Reference +CMSIS-DSP: arm_abs_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
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    +Functions
    +
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    arm_abs_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Q7 vector absolute value.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__add__f32_8c.html b/Documentation/DSP/html/arm__add__f32_8c.html new file mode 100644 index 0000000..8c72457 --- /dev/null +++ b/Documentation/DSP/html/arm__add__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_add_f32.c File Reference +CMSIS-DSP: arm_add_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
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    +
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    arm_add_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector addition.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__add__q15_8c.html b/Documentation/DSP/html/arm__add__q15_8c.html new file mode 100644 index 0000000..938ca53 --- /dev/null +++ b/Documentation/DSP/html/arm__add__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_add_q15.c File Reference +CMSIS-DSP: arm_add_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
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    arm_add_q15.c File Reference
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    +Functions

    void arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector addition.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__add__q31_8c.html b/Documentation/DSP/html/arm__add__q31_8c.html new file mode 100644 index 0000000..5f0414c --- /dev/null +++ b/Documentation/DSP/html/arm__add__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_add_q31.c File Reference +CMSIS-DSP: arm_add_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
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    arm_add_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector addition.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__add__q7_8c.html b/Documentation/DSP/html/arm__add__q7_8c.html new file mode 100644 index 0000000..47dd883 --- /dev/null +++ b/Documentation/DSP/html/arm__add__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_add_q7.c File Reference +CMSIS-DSP: arm_add_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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      + +
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    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_add_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector addition.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__32x64__init__q31_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__32x64__init__q31_8c.html new file mode 100644 index 0000000..85dc9c4 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__32x64__init__q31_8c.html @@ -0,0 +1,137 @@ + + + + + +arm_biquad_cascade_df1_32x64_init_q31.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_32x64_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
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    +
    + +
    +
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    + +
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    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_32x64_init_q31.c File Reference
    +
    +
    + + + + +

    +Functions

    void arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__32x64__q31_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__32x64__q31_8c.html new file mode 100644 index 0000000..9be9487 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__32x64__q31_8c.html @@ -0,0 +1,137 @@ + + + + + +arm_biquad_cascade_df1_32x64_q31.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_32x64_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_32x64_q31.c File Reference
    +
    +
    + + + + +

    +Functions

    void arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__f32_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__f32_8c.html new file mode 100644 index 0000000..9362abf --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_f32.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__fast__q15_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__fast__q15_8c.html new file mode 100644 index 0000000..c942093 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__fast__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_fast_q15.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_fast_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
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    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_fast_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__fast__q31_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__fast__q31_8c.html new file mode 100644 index 0000000..6621f6e --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__fast__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_fast_q31.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_fast_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_fast_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__init__f32_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__init__f32_8c.html new file mode 100644 index 0000000..6fb47f3 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_init_f32.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
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    + +
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    + + + + +
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    + +
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    +Functions
    +
    +
    arm_biquad_cascade_df1_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__init__q15_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__init__q15_8c.html new file mode 100644 index 0000000..0e5e535 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_init_q15.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
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    + +
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    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
     Initialization function for the Q15 Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__init__q31_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__init__q31_8c.html new file mode 100644 index 0000000..ae17a63 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_init_q31.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
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    +
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    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
     Initialization function for the Q31 Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__q15_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__q15_8c.html new file mode 100644 index 0000000..b6e2e75 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_q15.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df1__q31_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df1__q31_8c.html new file mode 100644 index 0000000..106463b --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df1__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df1_q31.c File Reference +CMSIS-DSP: arm_biquad_cascade_df1_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
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    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df1_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df2_t__f32_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df2_t__f32_8c.html new file mode 100644 index 0000000..b6e0707 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df2_t__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df2T_f32.c File Reference +CMSIS-DSP: arm_biquad_cascade_df2T_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
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    +
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    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df2T_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df2_t__f64_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df2_t__f64_8c.html new file mode 100644 index 0000000..fc085ad --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df2_t__f64_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df2T_f64.c File Reference +CMSIS-DSP: arm_biquad_cascade_df2T_f64.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df2T_f64.c File Reference
    +
    +
    + + + + + +

    +Functions

    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_df2T_f64 (const arm_biquad_cascade_df2T_instance_f64 *S, float64_t *pSrc, float64_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df2_t__init__f32_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df2_t__init__f32_8c.html new file mode 100644 index 0000000..1acdbc0 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df2_t__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df2T_init_f32.c File Reference +CMSIS-DSP: arm_biquad_cascade_df2T_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df2T_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__df2_t__init__f64_8c.html b/Documentation/DSP/html/arm__biquad__cascade__df2_t__init__f64_8c.html new file mode 100644 index 0000000..997f7b1 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__df2_t__init__f64_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_df2T_init_f64.c File Reference +CMSIS-DSP: arm_biquad_cascade_df2T_init_f64.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_df2T_init_f64.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_df2T_init_f64 (arm_biquad_cascade_df2T_instance_f64 *S, uint8_t numStages, float64_t *pCoeffs, float64_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__stereo__df2_t__f32_8c.html b/Documentation/DSP/html/arm__biquad__cascade__stereo__df2_t__f32_8c.html new file mode 100644 index 0000000..8a43ac4 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__stereo__df2_t__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_stereo_df2T_f32.c File Reference +CMSIS-DSP: arm_biquad_cascade_stereo_df2T_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_stereo_df2T_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_stereo_df2T_f32 (const arm_biquad_cascade_stereo_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__biquad__cascade__stereo__df2_t__init__f32_8c.html b/Documentation/DSP/html/arm__biquad__cascade__stereo__df2_t__init__f32_8c.html new file mode 100644 index 0000000..99f58f5 --- /dev/null +++ b/Documentation/DSP/html/arm__biquad__cascade__stereo__df2_t__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_biquad_cascade_stereo_df2T_init_f32.c File Reference +CMSIS-DSP: arm_biquad_cascade_stereo_df2T_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_biquad_cascade_stereo_df2T_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_biquad_cascade_stereo_df2T_init_f32 (arm_biquad_cascade_stereo_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__bitreversal_8c.html b/Documentation/DSP/html/arm__bitreversal_8c.html new file mode 100644 index 0000000..8066ee5 --- /dev/null +++ b/Documentation/DSP/html/arm__bitreversal_8c.html @@ -0,0 +1,262 @@ + + + + + +arm_bitreversal.c File Reference +CMSIS-DSP: arm_bitreversal.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_bitreversal.c File Reference
    +
    +
    + + + + + + + + +

    +Functions

    void arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_bitreversal_q31 (q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTable)
     
    void arm_bitreversal_q15 (q15_t *pSrc16, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_f32 (float32_t * pSrc,
    uint16_t fftSize,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +

    Referenced by arm_cfft_radix2_f32(), arm_cfft_radix4_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_q15 (q15_t * pSrc16,
    uint32_t fftLen,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +

    Referenced by arm_cfft_radix2_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_q31 (q31_t * pSrc,
    uint32_t fftLen,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTable 
    )
    +
    + +

    Referenced by arm_cfft_radix2_q31(), and arm_cfft_radix4_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__f32_8c.html b/Documentation/DSP/html/arm__cfft__f32_8c.html new file mode 100644 index 0000000..8fe7b72 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__f32_8c.html @@ -0,0 +1,281 @@ + + + + + +arm_cfft_f32.c File Reference +CMSIS-DSP: arm_cfft_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_f32.c File Reference
    +
    +
    + + + + + + + + + + + + + +

    +Functions

    void arm_radix8_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, const float32_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_bitreversal_32 (uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTable)
     
    void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 *S, float32_t *p1)
     
    void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 *S, float32_t *p1)
     
    void arm_cfft_f32 (const arm_cfft_instance_f32 *S, float32_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the floating-point complex FFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_32 (uint32_t * pSrc,
    const uint16_t bitRevLen,
    const uint16_t * pBitRevTable 
    )
    +
    + +

    Referenced by arm_cfft_f32(), and arm_cfft_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S,
    float32_t * p1 
    )
    +
    + +

    References arm_radix8_butterfly_f32(), arm_cfft_instance_f32::fftLen, and arm_cfft_instance_f32::pTwiddle.

    + +

    Referenced by arm_cfft_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S,
    float32_t * p1 
    )
    +
    + +

    References arm_radix8_butterfly_f32(), arm_cfft_instance_f32::fftLen, and arm_cfft_instance_f32::pTwiddle.

    + +

    Referenced by arm_cfft_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix8_butterfly_f32 (float32_t * pSrc,
    uint16_t fftLen,
    const float32_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    + +

    Referenced by arm_cfft_f32(), arm_cfft_radix8by2_f32(), and arm_cfft_radix8by4_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__q15_8c.html b/Documentation/DSP/html/arm__cfft__q15_8c.html new file mode 100644 index 0000000..2ce3507 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__q15_8c.html @@ -0,0 +1,363 @@ + + + + + +arm_cfft_q15.c File Reference +CMSIS-DSP: arm_cfft_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_q15.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_radix4_butterfly_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pCoef, uint32_t twidCoefModifier)
     Core function for the Q15 CFFT butterfly process.
     
    void arm_radix4_butterfly_inverse_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pCoef, uint32_t twidCoefModifier)
     Core function for the Q15 CIFFT butterfly process.
     
    void arm_bitreversal_16 (uint16_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTable)
     
    void arm_cfft_radix4by2_q15 (q15_t *pSrc, uint32_t fftLen, const q15_t *pCoef)
     
    void arm_cfft_radix4by2_inverse_q15 (q15_t *pSrc, uint32_t fftLen, const q15_t *pCoef)
     
    void arm_cfft_q15 (const arm_cfft_instance_q15 *S, q15_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the Q15 complex FFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_16 (uint16_t * pSrc,
    const uint16_t bitRevLen,
    const uint16_t * pBitRevTable 
    )
    +
    + +

    Referenced by arm_cfft_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix4by2_inverse_q15 (q15_t * pSrc,
    uint32_t fftLen,
    const q15_t * pCoef 
    )
    +
    + +

    References _SIMD32_OFFSET, and arm_radix4_butterfly_inverse_q15().

    + +

    Referenced by arm_cfft_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix4by2_q15 (q15_t * pSrc,
    uint32_t fftLen,
    const q15_t * pCoef 
    )
    +
    +

    end of ComplexFFT group

    + +

    References _SIMD32_OFFSET, and arm_radix4_butterfly_q15().

    + +

    Referenced by arm_cfft_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_inverse_q15 (q15_t * pSrc16,
    uint32_t fftLen,
    q15_t * pCoef16,
    uint32_t twidCoefModifier 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*pSrc16points to the in-place buffer of Q15 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoef16points to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, and _SIMD32_OFFSET.

    + +

    Referenced by arm_cfft_q15(), arm_cfft_radix4_q15(), and arm_cfft_radix4by2_inverse_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_q15 (q15_t * pSrc16,
    uint32_t fftLen,
    q15_t * pCoef16,
    uint32_t twidCoefModifier 
    )
    +
    +

    end of ComplexFFT group

    +
    Parameters
    + + + + + +
    [in,out]*pSrc16points to the in-place buffer of Q15 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoef16points to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, and _SIMD32_OFFSET.

    + +

    Referenced by arm_cfft_q15(), arm_cfft_radix4_q15(), and arm_cfft_radix4by2_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__q31_8c.html b/Documentation/DSP/html/arm__cfft__q31_8c.html new file mode 100644 index 0000000..6700e87 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__q31_8c.html @@ -0,0 +1,361 @@ + + + + + +arm_cfft_q31.c File Reference +CMSIS-DSP: arm_cfft_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_q31.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_radix4_butterfly_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
     Core function for the Q31 CFFT butterfly process.
     
    void arm_radix4_butterfly_inverse_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
     Core function for the Q31 CIFFT butterfly process.
     
    void arm_bitreversal_32 (uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTable)
     
    void arm_cfft_radix4by2_q31 (q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef)
     
    void arm_cfft_radix4by2_inverse_q31 (q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef)
     
    void arm_cfft_q31 (const arm_cfft_instance_q31 *S, q31_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the fixed-point complex FFT in Q31 format.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_32 (uint32_t * pSrc,
    const uint16_t bitRevLen,
    const uint16_t * pBitRevTable 
    )
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix4by2_inverse_q31 (q31_t * pSrc,
    uint32_t fftLen,
    const q31_t * pCoef 
    )
    +
    + +

    References arm_radix4_butterfly_inverse_q31(), mult_32x32_keep32_R, multAcc_32x32_keep32_R, and multSub_32x32_keep32_R.

    + +

    Referenced by arm_cfft_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix4by2_q31 (q31_t * pSrc,
    uint32_t fftLen,
    const q31_t * pCoef 
    )
    +
    +

    end of ComplexFFT group

    + +

    References arm_radix4_butterfly_q31(), mult_32x32_keep32_R, multAcc_32x32_keep32_R, and multSub_32x32_keep32_R.

    + +

    Referenced by arm_cfft_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_inverse_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pCoef,
    uint32_t twidCoefModifier 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*pSrcpoints to the in-place buffer of Q31 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoefpoints to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD64.

    + +

    Referenced by arm_cfft_q31(), arm_cfft_radix4_q31(), and arm_cfft_radix4by2_inverse_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pCoef,
    uint32_t twidCoefModifier 
    )
    +
    +

    end of ComplexFFT group

    +
    Parameters
    + + + + + +
    [in,out]*pSrcpoints to the in-place buffer of Q31 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoefpoints to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD64.

    + +

    Referenced by arm_cfft_q31(), arm_cfft_radix4_q31(), and arm_cfft_radix4by2_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix2__f32_8c.html b/Documentation/DSP/html/arm__cfft__radix2__f32_8c.html new file mode 100644 index 0000000..09f0277 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix2__f32_8c.html @@ -0,0 +1,270 @@ + + + + + +arm_cfft_radix2_f32.c File Reference +CMSIS-DSP: arm_cfft_radix2_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix2_f32.c File Reference
    +
    +
    + + + + + + + + + + + +

    +Functions

    void arm_radix2_butterfly_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_radix2_butterfly_inverse_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier, float32_t onebyfftLen)
     
    void arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_cfft_radix2_f32 (const arm_cfft_radix2_instance_f32 *S, float32_t *pSrc)
     Radix-2 CFFT/CIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_f32 (float32_t * pSrc,
    uint16_t fftSize,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix2_butterfly_f32 (float32_t * pSrc,
    uint32_t fftLen,
    float32_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    +

    end of ComplexFFT group

    + +

    Referenced by arm_cfft_radix2_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix2_butterfly_inverse_f32 (float32_t * pSrc,
    uint32_t fftLen,
    float32_t * pCoef,
    uint16_t twidCoefModifier,
    float32_t onebyfftLen 
    )
    +
    + +

    Referenced by arm_cfft_radix2_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix2__init__f32_8c.html b/Documentation/DSP/html/arm__cfft__radix2__init__f32_8c.html new file mode 100644 index 0000000..d95a004 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix2__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cfft_radix2_init_f32.c File Reference +CMSIS-DSP: arm_cfft_radix2_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix2_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_cfft_radix2_init_f32 (arm_cfft_radix2_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the floating-point CFFT/CIFFT.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix2__init__q15_8c.html b/Documentation/DSP/html/arm__cfft__radix2__init__q15_8c.html new file mode 100644 index 0000000..656a34c --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix2__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cfft_radix2_init_q15.c File Reference +CMSIS-DSP: arm_cfft_radix2_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix2_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_cfft_radix2_init_q15 (arm_cfft_radix2_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q15 CFFT/CIFFT.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix2__init__q31_8c.html b/Documentation/DSP/html/arm__cfft__radix2__init__q31_8c.html new file mode 100644 index 0000000..ce0fc48 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix2__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cfft_radix2_init_q31.c File Reference +CMSIS-DSP: arm_cfft_radix2_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix2_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_cfft_radix2_init_q31 (arm_cfft_radix2_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q31 CFFT/CIFFT.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix2__q15_8c.html b/Documentation/DSP/html/arm__cfft__radix2__q15_8c.html new file mode 100644 index 0000000..72536b0 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix2__q15_8c.html @@ -0,0 +1,268 @@ + + + + + +arm_cfft_radix2_q15.c File Reference +CMSIS-DSP: arm_cfft_radix2_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix2_q15.c File Reference
    +
    +
    + + + + + + + + + + + +

    +Functions

    void arm_radix2_butterfly_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_radix2_butterfly_inverse_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_bitreversal_q15 (q15_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_cfft_radix2_q15 (const arm_cfft_radix2_instance_q15 *S, q15_t *pSrc)
     Processing function for the fixed-point CFFT/CIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_q15 (q15_t * pSrc,
    uint32_t fftLen,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix2_butterfly_inverse_q15 (q15_t * pSrc,
    uint32_t fftLen,
    q15_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    + +

    References _SIMD32_OFFSET.

    + +

    Referenced by arm_cfft_radix2_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix2_butterfly_q15 (q15_t * pSrc,
    uint32_t fftLen,
    q15_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    +

    end of ComplexFFT group

    + +

    References _SIMD32_OFFSET.

    + +

    Referenced by arm_cfft_radix2_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix2__q31_8c.html b/Documentation/DSP/html/arm__cfft__radix2__q31_8c.html new file mode 100644 index 0000000..d2a9594 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix2__q31_8c.html @@ -0,0 +1,268 @@ + + + + + +arm_cfft_radix2_q31.c File Reference +CMSIS-DSP: arm_cfft_radix2_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix2_q31.c File Reference
    +
    +
    + + + + + + + + + + + +

    +Functions

    void arm_radix2_butterfly_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_radix2_butterfly_inverse_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_bitreversal_q31 (q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_cfft_radix2_q31 (const arm_cfft_radix2_instance_q31 *S, q31_t *pSrc)
     Processing function for the fixed-point CFFT/CIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_q31 (q31_t * pSrc,
    uint32_t fftLen,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix2_butterfly_inverse_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    + +

    References mult_32x32_keep32_R, multAcc_32x32_keep32_R, and multSub_32x32_keep32_R.

    + +

    Referenced by arm_cfft_radix2_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix2_butterfly_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    +

    end of ComplexFFT group

    + +

    References mult_32x32_keep32_R, multAcc_32x32_keep32_R, and multSub_32x32_keep32_R.

    + +

    Referenced by arm_cfft_radix2_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix4__f32_8c.html b/Documentation/DSP/html/arm__cfft__radix4__f32_8c.html new file mode 100644 index 0000000..d715bbb --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix4__f32_8c.html @@ -0,0 +1,229 @@ + + + + + +arm_cfft_radix4_f32.c File Reference +CMSIS-DSP: arm_cfft_radix4_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix4_f32.c File Reference
    +
    +
    + + + + + + + + + + + +

    +Functions

    void arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_radix4_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_radix4_butterfly_inverse_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier, float32_t onebyfftLen)
     
    void arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
     Processing function for the floating-point Radix-4 CFFT/CIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_f32 (float32_t * pSrc,
    uint16_t fftSize,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_inverse_f32 (float32_t * pSrc,
    uint16_t fftLen,
    float32_t * pCoef,
    uint16_t twidCoefModifier,
    float32_t onebyfftLen 
    )
    +
    + +

    Referenced by arm_cfft_radix4_f32(), and arm_rfft_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix4__init__f32_8c.html b/Documentation/DSP/html/arm__cfft__radix4__init__f32_8c.html new file mode 100644 index 0000000..1c50744 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix4__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cfft_radix4_init_f32.c File Reference +CMSIS-DSP: arm_cfft_radix4_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix4_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the floating-point CFFT/CIFFT.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix4__init__q15_8c.html b/Documentation/DSP/html/arm__cfft__radix4__init__q15_8c.html new file mode 100644 index 0000000..24056eb --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix4__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cfft_radix4_init_q15.c File Reference +CMSIS-DSP: arm_cfft_radix4_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix4_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q15 CFFT/CIFFT.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix4__init__q31_8c.html b/Documentation/DSP/html/arm__cfft__radix4__init__q31_8c.html new file mode 100644 index 0000000..2022e2a --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix4__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cfft_radix4_init_q31.c File Reference +CMSIS-DSP: arm_cfft_radix4_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix4_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q31 CFFT/CIFFT.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix4__q15_8c.html b/Documentation/DSP/html/arm__cfft__radix4__q15_8c.html new file mode 100644 index 0000000..80ba0bb --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix4__q15_8c.html @@ -0,0 +1,292 @@ + + + + + +arm_cfft_radix4_q15.c File Reference +CMSIS-DSP: arm_cfft_radix4_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix4_q15.c File Reference
    +
    +
    + + + + + + + + + + + + + +

    +Functions

    void arm_radix4_butterfly_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
     Core function for the Q15 CFFT butterfly process.
     
    void arm_radix4_butterfly_inverse_q15 (q15_t *pSrc16, uint32_t fftLen, q15_t *pCoef16, uint32_t twidCoefModifier)
     Core function for the Q15 CIFFT butterfly process.
     
    void arm_bitreversal_q15 (q15_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
     Processing function for the Q15 CFFT/CIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_q15 (q15_t * pSrc,
    uint32_t fftLen,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +

    Referenced by arm_cfft_radix2_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_inverse_q15 (q15_t * pSrc16,
    uint32_t fftLen,
    q15_t * pCoef16,
    uint32_t twidCoefModifier 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*pSrc16points to the in-place buffer of Q15 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoef16points to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, and _SIMD32_OFFSET.

    + +

    Referenced by arm_cfft_q15(), arm_cfft_radix4_q15(), and arm_cfft_radix4by2_inverse_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_q15 (q15_t * pSrc16,
    uint32_t fftLen,
    q15_t * pCoef16,
    uint32_t twidCoefModifier 
    )
    +
    +

    end of ComplexFFT group

    +
    Parameters
    + + + + + +
    [in,out]*pSrc16points to the in-place buffer of Q15 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoef16points to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, and _SIMD32_OFFSET.

    + +

    Referenced by arm_cfft_q15(), arm_cfft_radix4_q15(), and arm_cfft_radix4by2_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix4__q31_8c.html b/Documentation/DSP/html/arm__cfft__radix4__q31_8c.html new file mode 100644 index 0000000..2892c02 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix4__q31_8c.html @@ -0,0 +1,292 @@ + + + + + +arm_cfft_radix4_q31.c File Reference +CMSIS-DSP: arm_cfft_radix4_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix4_q31.c File Reference
    +
    +
    + + + + + + + + + + + + + +

    +Functions

    void arm_radix4_butterfly_inverse_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
     Core function for the Q31 CIFFT butterfly process.
     
    void arm_radix4_butterfly_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pCoef, uint32_t twidCoefModifier)
     Core function for the Q31 CFFT butterfly process.
     
    void arm_bitreversal_q31 (q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
     Processing function for the Q31 CFFT/CIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_q31 (q31_t * pSrc,
    uint32_t fftLen,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +

    Referenced by arm_cfft_radix2_q31(), and arm_cfft_radix4_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_inverse_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pCoef,
    uint32_t twidCoefModifier 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*pSrcpoints to the in-place buffer of Q31 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoefpoints to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD64.

    + +

    Referenced by arm_cfft_q31(), arm_cfft_radix4_q31(), and arm_cfft_radix4by2_inverse_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pCoef,
    uint32_t twidCoefModifier 
    )
    +
    +

    end of ComplexFFT group

    +
    Parameters
    + + + + + +
    [in,out]*pSrcpoints to the in-place buffer of Q31 data type.
    [in]fftLenlength of the FFT.
    [in]*pCoefpoints to twiddle coefficient buffer.
    [in]twidCoefModifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD64.

    + +

    Referenced by arm_cfft_q31(), arm_cfft_radix4_q31(), and arm_cfft_radix4by2_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cfft__radix8__f32_8c.html b/Documentation/DSP/html/arm__cfft__radix8__f32_8c.html new file mode 100644 index 0000000..74e8271 --- /dev/null +++ b/Documentation/DSP/html/arm__cfft__radix8__f32_8c.html @@ -0,0 +1,178 @@ + + + + + +arm_cfft_radix8_f32.c File Reference +CMSIS-DSP: arm_cfft_radix8_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cfft_radix8_f32.c File Reference
    +
    +
    + + + + +

    +Functions

    void arm_radix8_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, const float32_t *pCoef, uint16_t twidCoefModifier)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix8_butterfly_f32 (float32_t * pSrc,
    uint16_t fftLen,
    const float32_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    + +

    Referenced by arm_cfft_f32(), arm_cfft_radix8by2_f32(), and arm_cfft_radix8by4_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..5e0e892 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_class_marks_example for
    +Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_class_marks_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..3beb926 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,256 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_class_marks_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..5ab0445 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_class_marks_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..61ac521 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_class_marks_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..96a63ef --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_class_marks_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..c326759 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_class_marks_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_abstract_8txt.html b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_abstract_8txt.html new file mode 100644 index 0000000..d03f9d2 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_class_marks_example for
    +Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_class_marks_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..31ab829 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_class_marks_example/GCC/Startup/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..9c3f91c --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_class_marks_example/GCC/Startup/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..96d4474 --- /dev/null +++ b/Documentation/DSP/html/arm__class__marks__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_class_marks_example/GCC/Startup/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__conj__f32_8c.html b/Documentation/DSP/html/arm__cmplx__conj__f32_8c.html new file mode 100644 index 0000000..5d8f8ab --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__conj__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_conj_f32.c File Reference +CMSIS-DSP: arm_cmplx_conj_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_conj_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex conjugate.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__conj__q15_8c.html b/Documentation/DSP/html/arm__cmplx__conj__q15_8c.html new file mode 100644 index 0000000..16b30fd --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__conj__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_conj_q15.c File Reference +CMSIS-DSP: arm_cmplx_conj_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_conj_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex conjugate.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__conj__q31_8c.html b/Documentation/DSP/html/arm__cmplx__conj__q31_8c.html new file mode 100644 index 0000000..e331699 --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__conj__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_conj_q31.c File Reference +CMSIS-DSP: arm_cmplx_conj_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_conj_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex conjugate.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__dot__prod__f32_8c.html b/Documentation/DSP/html/arm__cmplx__dot__prod__f32_8c.html new file mode 100644 index 0000000..f0c031b --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__dot__prod__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_dot_prod_f32.c File Reference +CMSIS-DSP: arm_cmplx_dot_prod_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_dot_prod_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
     Floating-point complex dot product.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__dot__prod__q15_8c.html b/Documentation/DSP/html/arm__cmplx__dot__prod__q15_8c.html new file mode 100644 index 0000000..567715a --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__dot__prod__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_dot_prod_q15.c File Reference +CMSIS-DSP: arm_cmplx_dot_prod_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_dot_prod_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
     Q15 complex dot product.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__dot__prod__q31_8c.html b/Documentation/DSP/html/arm__cmplx__dot__prod__q31_8c.html new file mode 100644 index 0000000..f5a52a4 --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__dot__prod__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_dot_prod_q31.c File Reference +CMSIS-DSP: arm_cmplx_dot_prod_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_dot_prod_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
     Q31 complex dot product.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mag__f32_8c.html b/Documentation/DSP/html/arm__cmplx__mag__f32_8c.html new file mode 100644 index 0000000..5f850fc --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mag__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mag_f32.c File Reference +CMSIS-DSP: arm_cmplx_mag_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mag_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex magnitude.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mag__q15_8c.html b/Documentation/DSP/html/arm__cmplx__mag__q15_8c.html new file mode 100644 index 0000000..592d6bd --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mag__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mag_q15.c File Reference +CMSIS-DSP: arm_cmplx_mag_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mag_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex magnitude.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mag__q31_8c.html b/Documentation/DSP/html/arm__cmplx__mag__q31_8c.html new file mode 100644 index 0000000..4c6c8d4 --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mag__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mag_q31.c File Reference +CMSIS-DSP: arm_cmplx_mag_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mag_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex magnitude.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mag__squared__f32_8c.html b/Documentation/DSP/html/arm__cmplx__mag__squared__f32_8c.html new file mode 100644 index 0000000..a778b99 --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mag__squared__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mag_squared_f32.c File Reference +CMSIS-DSP: arm_cmplx_mag_squared_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mag_squared_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex magnitude squared.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mag__squared__q15_8c.html b/Documentation/DSP/html/arm__cmplx__mag__squared__q15_8c.html new file mode 100644 index 0000000..a6ecacb --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mag__squared__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mag_squared_q15.c File Reference +CMSIS-DSP: arm_cmplx_mag_squared_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mag_squared_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex magnitude squared.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mag__squared__q31_8c.html b/Documentation/DSP/html/arm__cmplx__mag__squared__q31_8c.html new file mode 100644 index 0000000..5234cc5 --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mag__squared__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mag_squared_q31.c File Reference +CMSIS-DSP: arm_cmplx_mag_squared_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mag_squared_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex magnitude squared.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mult__cmplx__f32_8c.html b/Documentation/DSP/html/arm__cmplx__mult__cmplx__f32_8c.html new file mode 100644 index 0000000..bbc39ab --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mult__cmplx__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mult_cmplx_f32.c File Reference +CMSIS-DSP: arm_cmplx_mult_cmplx_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mult_cmplx_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
     Floating-point complex-by-complex multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mult__cmplx__q15_8c.html b/Documentation/DSP/html/arm__cmplx__mult__cmplx__q15_8c.html new file mode 100644 index 0000000..4717fcc --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mult__cmplx__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mult_cmplx_q15.c File Reference +CMSIS-DSP: arm_cmplx_mult_cmplx_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mult_cmplx_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
     Q15 complex-by-complex multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mult__cmplx__q31_8c.html b/Documentation/DSP/html/arm__cmplx__mult__cmplx__q31_8c.html new file mode 100644 index 0000000..deaedd2 --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mult__cmplx__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mult_cmplx_q31.c File Reference +CMSIS-DSP: arm_cmplx_mult_cmplx_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mult_cmplx_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
     Q31 complex-by-complex multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mult__real__f32_8c.html b/Documentation/DSP/html/arm__cmplx__mult__real__f32_8c.html new file mode 100644 index 0000000..53a14da --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mult__real__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mult_real_f32.c File Reference +CMSIS-DSP: arm_cmplx_mult_real_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mult_real_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
     Floating-point complex-by-real multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mult__real__q15_8c.html b/Documentation/DSP/html/arm__cmplx__mult__real__q15_8c.html new file mode 100644 index 0000000..fad116c --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mult__real__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mult_real_q15.c File Reference +CMSIS-DSP: arm_cmplx_mult_real_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mult_real_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
     Q15 complex-by-real multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cmplx__mult__real__q31_8c.html b/Documentation/DSP/html/arm__cmplx__mult__real__q31_8c.html new file mode 100644 index 0000000..470d69a --- /dev/null +++ b/Documentation/DSP/html/arm__cmplx__mult__real__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cmplx_mult_real_q31.c File Reference +CMSIS-DSP: arm_cmplx_mult_real_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_cmplx_mult_real_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
     Q31 complex-by-real multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__common__tables_8c.html b/Documentation/DSP/html/arm__common__tables_8c.html new file mode 100644 index 0000000..21197db --- /dev/null +++ b/Documentation/DSP/html/arm__common__tables_8c.html @@ -0,0 +1,695 @@ + + + + + +arm_common_tables.c File Reference +CMSIS-DSP: arm_common_tables.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
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    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    arm_common_tables.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    const uint16_t armBitRevTable [1024]
     
    const float32_t twiddleCoef_16 [32]
     
    const float32_t twiddleCoef_32 [64]
     
    const float32_t twiddleCoef_64 [128]
     
    const float32_t twiddleCoef_128 [256]
     
    const float32_t twiddleCoef_256 [512]
     
    const float32_t twiddleCoef_512 [1024]
     
    const float32_t twiddleCoef_1024 [2048]
     
    const float32_t twiddleCoef_2048 [4096]
     
    const float32_t twiddleCoef_4096 [8192]
     
    const q31_t twiddleCoef_16_q31 [24]
     
    const q31_t twiddleCoef_32_q31 [48]
     
    const q31_t twiddleCoef_64_q31 [96]
     
    const q31_t twiddleCoef_128_q31 [192]
     
    const q31_t twiddleCoef_256_q31 [384]
     
    const q31_t twiddleCoef_512_q31 [768]
     
    const q31_t twiddleCoef_1024_q31 [1536]
     
    const q31_t twiddleCoef_2048_q31 [3072]
     
    const q31_t twiddleCoef_4096_q31 [6144]
     
    const q15_t twiddleCoef_16_q15 [24]
     
    const q15_t twiddleCoef_32_q15 [48]
     
    const q15_t twiddleCoef_64_q15 [96]
     
    const q15_t twiddleCoef_128_q15 [192]
     
    const q15_t twiddleCoef_256_q15 [384]
     
    const q15_t twiddleCoef_512_q15 [768]
     
    const q15_t twiddleCoef_1024_q15 [1536]
     
    const q15_t twiddleCoef_2048_q15 [3072]
     
    const q15_t twiddleCoef_4096_q15 [6144]
     
    const q15_t ALIGN4 armRecipTableQ15 [64]
     
    const q31_t armRecipTableQ31 [64]
     
    const uint16_t armBitRevIndexTable16 [ARMBITREVINDEXTABLE__16_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable32 [ARMBITREVINDEXTABLE__32_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable64 [ARMBITREVINDEXTABLE__64_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable128 [ARMBITREVINDEXTABLE_128_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable256 [ARMBITREVINDEXTABLE_256_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable512 [ARMBITREVINDEXTABLE_512_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable1024 [ARMBITREVINDEXTABLE1024_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable2048 [ARMBITREVINDEXTABLE2048_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable4096 [ARMBITREVINDEXTABLE4096_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_16 [ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_32 [ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_64 [ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_128 [ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_256 [ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_512 [ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_1024 [ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_2048 [ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_4096 [ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]
     
    const float32_t twiddleCoef_rfft_32 [32]
     
    const float32_t twiddleCoef_rfft_64 [64]
     
    const float32_t twiddleCoef_rfft_128 [128]
     
    const float32_t twiddleCoef_rfft_256 [256]
     
    const float32_t twiddleCoef_rfft_512 [512]
     
    const float32_t twiddleCoef_rfft_1024 [1024]
     
    const float32_t twiddleCoef_rfft_2048 [2048]
     
    const float32_t twiddleCoef_rfft_4096 [4096]
     
    const float32_t sinTable_f32 [FAST_MATH_TABLE_SIZE+1]
     
    const q31_t sinTable_q31 [FAST_MATH_TABLE_SIZE+1]
     
    const q15_t sinTable_q15 [FAST_MATH_TABLE_SIZE+1]
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
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    +
    + + + + +
    const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]
    +
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    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]
    +
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    +
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    +
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    const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]
    +
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    + + + + +
    const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]
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    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]
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    const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]
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    const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]
    +
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    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]
    +
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    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]
    +
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    +
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    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const q15_t ALIGN4 armRecipTableQ15[64]
    +
    +

    end of CFFT_CIFFT group

    + +

    Referenced by arm_lms_norm_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const q31_t armRecipTableQ31[64]
    +
    + +

    Referenced by arm_lms_norm_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE+1]
    +
    +
    Example code for the generation of the floating-point sine table: 
    +tableSize = 512;    
+for(n = 0; n < (tableSize + 1); n++)    
+{    
+     sinTable[n]=sin(2*pi*n/tableSize);    
+}
    +
    where pi value is 3.14159265358979
    + +

    Referenced by arm_cos_f32(), arm_sin_cos_f32(), and arm_sin_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE+1]
    +
    +
    Table values are in Q15 (1.15 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: 
    +tableSize = 512;      
+for(n = 0; n < (tableSize + 1); n++)    
+{    
+     sinTable[n]= sin(2*pi*n/tableSize);    
+}
    where pi value is 3.14159265358979
    +
    Second, convert floating-point to Q15 (Fixed point): (sinTable[i] * pow(2, 15))
    +
    Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
    + +

    Referenced by arm_cos_q15(), and arm_sin_q15().

    + +
    +
    + +
    +
    + + + + +
    const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE+1]
    +
    +
    Table values are in Q31 (1.31 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: 
    +tableSize = 512;      
+for(n = 0; n < (tableSize + 1); n++)    
+{    
+     sinTable[n]= sin(2*pi*n/tableSize);    
+}
    where pi value is 3.14159265358979
    +
    Second, convert floating-point to Q31 (Fixed point): (sinTable[i] * pow(2, 31))
    +
    Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
    + +

    Referenced by arm_cos_q31(), arm_sin_cos_q31(), and arm_sin_q31().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_1024[1024]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_128[128]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_2048[2048]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_256[256]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_32[32]
    +
    +
    Example code for Floating-point RFFT Twiddle factors Generation:
    +
    TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).'
    +
    Real and Imag values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_4096[4096]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_512[512]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_64[64]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__common__tables_8h.html b/Documentation/DSP/html/arm__common__tables_8h.html new file mode 100644 index 0000000..98b62bb --- /dev/null +++ b/Documentation/DSP/html/arm__common__tables_8h.html @@ -0,0 +1,984 @@ + + + + + +arm_common_tables.h File Reference +CMSIS-DSP: arm_common_tables.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Variables
    +
    +
    arm_common_tables.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    #define twiddleCoef
     
    #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
     
    #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    const uint16_t armBitRevTable [1024]
     
    const q15_t armRecipTableQ15 [64]
     
    const q31_t armRecipTableQ31 [64]
     
    const float32_t twiddleCoef_16 [32]
     
    const float32_t twiddleCoef_32 [64]
     
    const float32_t twiddleCoef_64 [128]
     
    const float32_t twiddleCoef_128 [256]
     
    const float32_t twiddleCoef_256 [512]
     
    const float32_t twiddleCoef_512 [1024]
     
    const float32_t twiddleCoef_1024 [2048]
     
    const float32_t twiddleCoef_2048 [4096]
     
    const float32_t twiddleCoef_4096 [8192]
     
    const q31_t twiddleCoef_16_q31 [24]
     
    const q31_t twiddleCoef_32_q31 [48]
     
    const q31_t twiddleCoef_64_q31 [96]
     
    const q31_t twiddleCoef_128_q31 [192]
     
    const q31_t twiddleCoef_256_q31 [384]
     
    const q31_t twiddleCoef_512_q31 [768]
     
    const q31_t twiddleCoef_1024_q31 [1536]
     
    const q31_t twiddleCoef_2048_q31 [3072]
     
    const q31_t twiddleCoef_4096_q31 [6144]
     
    const q15_t twiddleCoef_16_q15 [24]
     
    const q15_t twiddleCoef_32_q15 [48]
     
    const q15_t twiddleCoef_64_q15 [96]
     
    const q15_t twiddleCoef_128_q15 [192]
     
    const q15_t twiddleCoef_256_q15 [384]
     
    const q15_t twiddleCoef_512_q15 [768]
     
    const q15_t twiddleCoef_1024_q15 [1536]
     
    const q15_t twiddleCoef_2048_q15 [3072]
     
    const q15_t twiddleCoef_4096_q15 [6144]
     
    const float32_t twiddleCoef_rfft_32 [32]
     
    const float32_t twiddleCoef_rfft_64 [64]
     
    const float32_t twiddleCoef_rfft_128 [128]
     
    const float32_t twiddleCoef_rfft_256 [256]
     
    const float32_t twiddleCoef_rfft_512 [512]
     
    const float32_t twiddleCoef_rfft_1024 [1024]
     
    const float32_t twiddleCoef_rfft_2048 [2048]
     
    const float32_t twiddleCoef_rfft_4096 [4096]
     
    const uint16_t armBitRevIndexTable16 [ARMBITREVINDEXTABLE__16_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable32 [ARMBITREVINDEXTABLE__32_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable64 [ARMBITREVINDEXTABLE__64_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable128 [ARMBITREVINDEXTABLE_128_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable256 [ARMBITREVINDEXTABLE_256_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable512 [ARMBITREVINDEXTABLE_512_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable1024 [ARMBITREVINDEXTABLE1024_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable2048 [ARMBITREVINDEXTABLE2048_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable4096 [ARMBITREVINDEXTABLE4096_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_16 [ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_32 [ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_64 [ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_128 [ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_256 [ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_512 [ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_1024 [ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_2048 [ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]
     
    const uint16_t armBitRevIndexTable_fixed_4096 [ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]
     
    const float32_t sinTable_f32 [FAST_MATH_TABLE_SIZE+1]
     
    const q31_t sinTable_q31 [FAST_MATH_TABLE_SIZE+1]
     
    const q15_t sinTable_q15 [FAST_MATH_TABLE_SIZE+1]
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

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    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

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    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
    +
    + +
    +
    + +
    +
    + + + + +
    #define twiddleCoef
    +
    + +

    Referenced by arm_cfft_radix2_init_f32(), and arm_cfft_radix4_init_f32().

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]
    +
    + +
    +
    + +
    +
    + + + + +
    const q15_t armRecipTableQ15[64]
    +
    +

    end of CFFT_CIFFT group

    + +

    Referenced by arm_lms_norm_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const q31_t armRecipTableQ31[64]
    +
    + +

    Referenced by arm_lms_norm_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE+1]
    +
    +
    Example code for the generation of the floating-point sine table: 
    +tableSize = 512;    
+for(n = 0; n < (tableSize + 1); n++)    
+{    
+     sinTable[n]=sin(2*pi*n/tableSize);    
+}
    +
    where pi value is 3.14159265358979
    + +

    Referenced by arm_cos_f32(), arm_sin_cos_f32(), and arm_sin_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE+1]
    +
    +
    Table values are in Q15 (1.15 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: 
    +tableSize = 512;      
+for(n = 0; n < (tableSize + 1); n++)    
+{    
+     sinTable[n]= sin(2*pi*n/tableSize);    
+}
    where pi value is 3.14159265358979
    +
    Second, convert floating-point to Q15 (Fixed point): (sinTable[i] * pow(2, 15))
    +
    Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
    + +

    Referenced by arm_cos_q15(), and arm_sin_q15().

    + +
    +
    + +
    +
    + + + + +
    const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE+1]
    +
    +
    Table values are in Q31 (1.31 fixed-point format) and generation is done in three steps. First, generate sin values in floating point: 
    +tableSize = 512;      
+for(n = 0; n < (tableSize + 1); n++)    
+{    
+     sinTable[n]= sin(2*pi*n/tableSize);    
+}
    where pi value is 3.14159265358979
    +
    Second, convert floating-point to Q31 (Fixed point): (sinTable[i] * pow(2, 31))
    +
    Finally, round to the nearest integer value: sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
    + +

    Referenced by arm_cos_q31(), arm_sin_cos_q31(), and arm_sin_q31().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_1024[1024]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_128[128]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_2048[2048]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_256[256]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_32[32]
    +
    +
    Example code for Floating-point RFFT Twiddle factors Generation:
    +
    TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).'
    +
    Real and Imag values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_4096[4096]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_512[512]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_rfft_64[64]
    +
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__const__structs_8c.html b/Documentation/DSP/html/arm__const__structs_8c.html new file mode 100644 index 0000000..391c687 --- /dev/null +++ b/Documentation/DSP/html/arm__const__structs_8c.html @@ -0,0 +1,553 @@ + + + + + +arm_const_structs.c File Reference +CMSIS-DSP: arm_const_structs.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    arm_const_structs.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    const arm_cfft_instance_f32 arm_cfft_sR_f32_len16
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len32
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len64
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len128
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len256
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len512
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len16
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len32
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len64
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len128
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len256
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len512
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len16
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len32
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len64
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len128
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len256
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len512
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024
    +
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len128
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len16
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len256
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len32
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len512
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len64
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len128
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len16
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len256
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len32
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len512
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len64
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len128
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len16
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len256
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len32
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len512
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len64
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__const__structs_8h.html b/Documentation/DSP/html/arm__const__structs_8h.html new file mode 100644 index 0000000..bc4656d --- /dev/null +++ b/Documentation/DSP/html/arm__const__structs_8h.html @@ -0,0 +1,552 @@ + + + + + +arm_const_structs.h File Reference +CMSIS-DSP: arm_const_structs.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    arm_const_structs.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    const arm_cfft_instance_f32 arm_cfft_sR_f32_len16
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len32
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len64
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len128
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len256
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len512
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048
     
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len16
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len32
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len64
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len128
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len256
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len512
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048
     
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len16
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len32
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len64
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len128
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len256
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len512
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048
     
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len128
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len16
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len256
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len32
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len512
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_f32 arm_cfft_sR_f32_len64
    +
    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len128
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len16
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len256
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len32
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len512
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15 arm_cfft_sR_q15_len64
    +
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len128
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len16
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len256
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len32
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len512
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31 arm_cfft_sR_q31_len64
    +
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__f32_8c.html b/Documentation/DSP/html/arm__conv__f32_8c.html new file mode 100644 index 0000000..fd3ac18 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_f32.c File Reference +CMSIS-DSP: arm_conv_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
     Convolution of floating-point sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__fast__opt__q15_8c.html b/Documentation/DSP/html/arm__conv__fast__opt__q15_8c.html new file mode 100644 index 0000000..8481a46 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__fast__opt__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_fast_opt_q15.c File Reference +CMSIS-DSP: arm_conv_fast_opt_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_fast_opt_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__fast__q15_8c.html b/Documentation/DSP/html/arm__conv__fast__q15_8c.html new file mode 100644 index 0000000..39198dd --- /dev/null +++ b/Documentation/DSP/html/arm__conv__fast__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_fast_q15.c File Reference +CMSIS-DSP: arm_conv_fast_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_fast_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__fast__q31_8c.html b/Documentation/DSP/html/arm__conv__fast__q31_8c.html new file mode 100644 index 0000000..40edb11 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__fast__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_fast_q31.c File Reference +CMSIS-DSP: arm_conv_fast_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_fast_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__opt__q15_8c.html b/Documentation/DSP/html/arm__conv__opt__q15_8c.html new file mode 100644 index 0000000..15cf4ab --- /dev/null +++ b/Documentation/DSP/html/arm__conv__opt__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_opt_q15.c File Reference +CMSIS-DSP: arm_conv_opt_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_opt_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q15 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__opt__q7_8c.html b/Documentation/DSP/html/arm__conv__opt__q7_8c.html new file mode 100644 index 0000000..036e8f9 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__opt__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_opt_q7.c File Reference +CMSIS-DSP: arm_conv_opt_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_opt_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q7 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__f32_8c.html b/Documentation/DSP/html/arm__conv__partial__f32_8c.html new file mode 100644 index 0000000..ed72dc8 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_f32.c File Reference +CMSIS-DSP: arm_conv_partial_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of floating-point sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__fast__opt__q15_8c.html b/Documentation/DSP/html/arm__conv__partial__fast__opt__q15_8c.html new file mode 100644 index 0000000..9fb9cbb --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__fast__opt__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_fast_opt_q15.c File Reference +CMSIS-DSP: arm_conv_partial_fast_opt_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_fast_opt_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__fast__q15_8c.html b/Documentation/DSP/html/arm__conv__partial__fast__q15_8c.html new file mode 100644 index 0000000..53425ce --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__fast__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_fast_q15.c File Reference +CMSIS-DSP: arm_conv_partial_fast_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_fast_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__fast__q31_8c.html b/Documentation/DSP/html/arm__conv__partial__fast__q31_8c.html new file mode 100644 index 0000000..c9e1832 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__fast__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_fast_q31.c File Reference +CMSIS-DSP: arm_conv_partial_fast_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_fast_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__opt__q15_8c.html b/Documentation/DSP/html/arm__conv__partial__opt__q15_8c.html new file mode 100644 index 0000000..fe8ddeb --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__opt__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_opt_q15.c File Reference +CMSIS-DSP: arm_conv_partial_opt_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_opt_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q15 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__opt__q7_8c.html b/Documentation/DSP/html/arm__conv__partial__opt__q7_8c.html new file mode 100644 index 0000000..5d0244e --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__opt__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_opt_q7.c File Reference +CMSIS-DSP: arm_conv_partial_opt_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_opt_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q7 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__q15_8c.html b/Documentation/DSP/html/arm__conv__partial__q15_8c.html new file mode 100644 index 0000000..b19e0b6 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_q15.c File Reference +CMSIS-DSP: arm_conv_partial_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q15 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__q31_8c.html b/Documentation/DSP/html/arm__conv__partial__q31_8c.html new file mode 100644 index 0000000..1771cce --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_q31.c File Reference +CMSIS-DSP: arm_conv_partial_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q31 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__partial__q7_8c.html b/Documentation/DSP/html/arm__conv__partial__q7_8c.html new file mode 100644 index 0000000..dccd8fa --- /dev/null +++ b/Documentation/DSP/html/arm__conv__partial__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_partial_q7.c File Reference +CMSIS-DSP: arm_conv_partial_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_partial_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q7 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__q15_8c.html b/Documentation/DSP/html/arm__conv__q15_8c.html new file mode 100644 index 0000000..63fe128 --- /dev/null +++ b/Documentation/DSP/html/arm__conv__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_q15.c File Reference +CMSIS-DSP: arm_conv_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Convolution of Q15 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__q31_8c.html b/Documentation/DSP/html/arm__conv__q31_8c.html new file mode 100644 index 0000000..4a4d36b --- /dev/null +++ b/Documentation/DSP/html/arm__conv__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_q31.c File Reference +CMSIS-DSP: arm_conv_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Convolution of Q31 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__conv__q7_8c.html b/Documentation/DSP/html/arm__conv__q7_8c.html new file mode 100644 index 0000000..e01f1fb --- /dev/null +++ b/Documentation/DSP/html/arm__conv__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_conv_q7.c File Reference +CMSIS-DSP: arm_conv_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_conv_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
     Convolution of Q7 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..b4e0adf --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_convolution_example for
    +Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_convolution_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..76fe15c --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_convolution_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..71b036a --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_convolution_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..0d3b6df --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_convolution_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..36f4d35 --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_convolution_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..c4f35d9 --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_convolution_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2math__helper_8c.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2math__helper_8c.html new file mode 100644 index 0000000..f3ae89d --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2math__helper_8c.html @@ -0,0 +1,748 @@ + + + + + +math_helper.c File Reference +CMSIS-DSP: math_helper.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_convolution_example/ARM/math_helper.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_calc_2pow (uint32_t numShifts)
     Calculates pow(2, numShifts)
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +

    Referenced by arm_apply_guard_bits().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q7 (q7_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    +
    Examples:
    arm_convolution_example_f32.c, arm_fir_example_f32.c, arm_graphic_equalizer_example_q31.c, arm_linear_interp_example_f32.c, and arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2math__helper_8h.html b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2math__helper_8h.html new file mode 100644 index 0000000..8bbbc59 --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_a_r_m_2math__helper_8h.html @@ -0,0 +1,697 @@ + + + + + +math_helper.h File Reference +CMSIS-DSP: math_helper.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_convolution_example/ARM/math_helper.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_calc_2pow (uint32_t guard_bits)
     Calculates pow(2, numShifts)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_abstract_8txt.html b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_abstract_8txt.html new file mode 100644 index 0000000..e80de01 --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_convolution_example for
    +Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_convolution_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..c50734f --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_convolution_example/GCC/Startup/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..03ab03e --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_convolution_example/GCC/Startup/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..76f1c27 --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_convolution_example/GCC/Startup/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2math__helper_8c.html b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2math__helper_8c.html new file mode 100644 index 0000000..6d78c25 --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2math__helper_8c.html @@ -0,0 +1,749 @@ + + + + + +math_helper.c File Reference +CMSIS-DSP: math_helper.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_convolution_example/GCC/math_helper.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_calc_2pow (uint32_t numShifts)
     Calculates pow(2, numShifts)
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +

    References arm_calc_2pow().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q7 (q7_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2math__helper_8h.html b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2math__helper_8h.html new file mode 100644 index 0000000..345f091 --- /dev/null +++ b/Documentation/DSP/html/arm__convolution__example_2_g_c_c_2math__helper_8h.html @@ -0,0 +1,697 @@ + + + + + +math_helper.h File Reference +CMSIS-DSP: math_helper.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_convolution_example/GCC/math_helper.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_calc_2pow (uint32_t guard_bits)
     Calculates pow(2, numShifts)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__copy__f32_8c.html b/Documentation/DSP/html/arm__copy__f32_8c.html new file mode 100644 index 0000000..aed0a27 --- /dev/null +++ b/Documentation/DSP/html/arm__copy__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_copy_f32.c File Reference +CMSIS-DSP: arm_copy_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_copy_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Copies the elements of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__copy__q15_8c.html b/Documentation/DSP/html/arm__copy__q15_8c.html new file mode 100644 index 0000000..a379cb0 --- /dev/null +++ b/Documentation/DSP/html/arm__copy__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_copy_q15.c File Reference +CMSIS-DSP: arm_copy_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_copy_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Copies the elements of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__copy__q31_8c.html b/Documentation/DSP/html/arm__copy__q31_8c.html new file mode 100644 index 0000000..4d107b0 --- /dev/null +++ b/Documentation/DSP/html/arm__copy__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_copy_q31.c File Reference +CMSIS-DSP: arm_copy_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_copy_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Copies the elements of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__copy__q7_8c.html b/Documentation/DSP/html/arm__copy__q7_8c.html new file mode 100644 index 0000000..701e76b --- /dev/null +++ b/Documentation/DSP/html/arm__copy__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_copy_q7.c File Reference +CMSIS-DSP: arm_copy_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_copy_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Copies the elements of a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__f32_8c.html b/Documentation/DSP/html/arm__correlate__f32_8c.html new file mode 100644 index 0000000..9cb9645 --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_f32.c File Reference +CMSIS-DSP: arm_correlate_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_correlate_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
     Correlation of floating-point sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__fast__opt__q15_8c.html b/Documentation/DSP/html/arm__correlate__fast__opt__q15_8c.html new file mode 100644 index 0000000..897197e --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__fast__opt__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_fast_opt_q15.c File Reference +CMSIS-DSP: arm_correlate_fast_opt_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    +
    +Functions
    +
    +
    arm_correlate_fast_opt_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch)
     Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__fast__q15_8c.html b/Documentation/DSP/html/arm__correlate__fast__q15_8c.html new file mode 100644 index 0000000..73f8e15 --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__fast__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_fast_q15.c File Reference +CMSIS-DSP: arm_correlate_fast_q15.c File Reference + + + + + + + + + + + + + + + +
    +
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    +
    CMSIS-DSP +  Version 1.4.7 +
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    + +
    +
    +Functions
    +
    +
    arm_correlate_fast_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__fast__q31_8c.html b/Documentation/DSP/html/arm__correlate__fast__q31_8c.html new file mode 100644 index 0000000..cacd255 --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__fast__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_fast_q31.c File Reference +CMSIS-DSP: arm_correlate_fast_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    + +
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    +Functions
    +
    +
    arm_correlate_fast_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__opt__q15_8c.html b/Documentation/DSP/html/arm__correlate__opt__q15_8c.html new file mode 100644 index 0000000..e562084 --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__opt__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_opt_q15.c File Reference +CMSIS-DSP: arm_correlate_opt_q15.c File Reference + + + + + + + + + + + + + + + +
    +
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    +
    CMSIS-DSP +  Version 1.4.7 +
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    +Functions
    +
    +
    arm_correlate_opt_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch)
     Correlation of Q15 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__opt__q7_8c.html b/Documentation/DSP/html/arm__correlate__opt__q7_8c.html new file mode 100644 index 0000000..0901258 --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__opt__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_opt_q7.c File Reference +CMSIS-DSP: arm_correlate_opt_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
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    + +
    + +
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    +Functions
    +
    +
    arm_correlate_opt_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Correlation of Q7 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__q15_8c.html b/Documentation/DSP/html/arm__correlate__q15_8c.html new file mode 100644 index 0000000..aef11ba --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_q15.c File Reference +CMSIS-DSP: arm_correlate_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
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    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_correlate_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Correlation of Q15 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__q31_8c.html b/Documentation/DSP/html/arm__correlate__q31_8c.html new file mode 100644 index 0000000..1e2aa98 --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_q31.c File Reference +CMSIS-DSP: arm_correlate_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    + +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_correlate_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Correlation of Q31 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__correlate__q7_8c.html b/Documentation/DSP/html/arm__correlate__q7_8c.html new file mode 100644 index 0000000..65beba7 --- /dev/null +++ b/Documentation/DSP/html/arm__correlate__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_correlate_q7.c File Reference +CMSIS-DSP: arm_correlate_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
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    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_correlate_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
     Correlation of Q7 sequences.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cos__f32_8c.html b/Documentation/DSP/html/arm__cos__f32_8c.html new file mode 100644 index 0000000..6bb1789 --- /dev/null +++ b/Documentation/DSP/html/arm__cos__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cos_f32.c File Reference +CMSIS-DSP: arm_cos_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    + +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_cos_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    float32_t arm_cos_f32 (float32_t x)
     Fast approximation to the trigonometric cosine function for floating-point data.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cos__q15_8c.html b/Documentation/DSP/html/arm__cos__q15_8c.html new file mode 100644 index 0000000..15b1143 --- /dev/null +++ b/Documentation/DSP/html/arm__cos__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cos_q15.c File Reference +CMSIS-DSP: arm_cos_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    +
    + +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_cos_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    q15_t arm_cos_q15 (q15_t x)
     Fast approximation to the trigonometric cosine function for Q15 data.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__cos__q31_8c.html b/Documentation/DSP/html/arm__cos__q31_8c.html new file mode 100644 index 0000000..8b9f43e --- /dev/null +++ b/Documentation/DSP/html/arm__cos__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_cos_q31.c File Reference +CMSIS-DSP: arm_cos_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_cos_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    q31_t arm_cos_q31 (q31_t x)
     Fast approximation to the trigonometric cosine function for Q31 data.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dct4__f32_8c.html b/Documentation/DSP/html/arm__dct4__f32_8c.html new file mode 100644 index 0000000..4659e7a --- /dev/null +++ b/Documentation/DSP/html/arm__dct4__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_dct4_f32.c File Reference +CMSIS-DSP: arm_dct4_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
    +
    +Functions
    +
    +
    arm_dct4_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
     Processing function for the floating-point DCT4/IDCT4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dct4__init__f32_8c.html b/Documentation/DSP/html/arm__dct4__init__f32_8c.html new file mode 100644 index 0000000..20483ad --- /dev/null +++ b/Documentation/DSP/html/arm__dct4__init__f32_8c.html @@ -0,0 +1,158 @@ + + + + + +arm_dct4_init_f32.c File Reference +CMSIS-DSP: arm_dct4_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
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    + +
    +
    +Functions | +Variables
    +
    +
    arm_dct4_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
     Initialization function for the floating-point DCT4/IDCT4.
     
    + + + + + + + + + + + + + + + + + +

    +Variables

    static const float32_t Weights_128 [256]
     
    static const float32_t Weights_512 [1024]
     
    static const float32_t Weights_2048 [4096]
     
    static const float32_t Weights_8192 [16384]
     
    static const float32_t cos_factors_128 [128]
     
    static const float32_t cos_factors_512 [512]
     
    static const float32_t cos_factors_2048 [2048]
     
    static const float32_t cos_factors_8192 [8192]
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dct4__init__q15_8c.html b/Documentation/DSP/html/arm__dct4__init__q15_8c.html new file mode 100644 index 0000000..3f08f98 --- /dev/null +++ b/Documentation/DSP/html/arm__dct4__init__q15_8c.html @@ -0,0 +1,158 @@ + + + + + +arm_dct4_init_q15.c File Reference +CMSIS-DSP: arm_dct4_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions | +Variables
    +
    +
    arm_dct4_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
     Initialization function for the Q15 DCT4/IDCT4.
     
    + + + + + + + + + + + + + + + + + +

    +Variables

    static const q15_t ALIGN4 WeightsQ15_128 [256]
     
    static const q15_t ALIGN4 WeightsQ15_512 [1024]
     
    static const q15_t ALIGN4 WeightsQ15_2048 [4096]
     
    static const q15_t ALIGN4 WeightsQ15_8192 [16384]
     
    static const q15_t ALIGN4 cos_factorsQ15_128 [128]
     
    static const q15_t ALIGN4 cos_factorsQ15_512 [512]
     
    static const q15_t ALIGN4 cos_factorsQ15_2048 [2048]
     
    static const q15_t ALIGN4 cos_factorsQ15_8192 [8192]
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dct4__init__q31_8c.html b/Documentation/DSP/html/arm__dct4__init__q31_8c.html new file mode 100644 index 0000000..da30961 --- /dev/null +++ b/Documentation/DSP/html/arm__dct4__init__q31_8c.html @@ -0,0 +1,158 @@ + + + + + +arm_dct4_init_q31.c File Reference +CMSIS-DSP: arm_dct4_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions | +Variables
    +
    +
    arm_dct4_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
     Initialization function for the Q31 DCT4/IDCT4.
     
    + + + + + + + + + + + + + + + + + +

    +Variables

    static const q31_t WeightsQ31_128 [256]
     
    static const q31_t WeightsQ31_512 [1024]
     
    static const q31_t WeightsQ31_2048 [4096]
     
    static const q31_t WeightsQ31_8192 [16384]
     
    static const q31_t cos_factorsQ31_128 [128]
     
    static const q31_t cos_factorsQ31_512 [512]
     
    static const q31_t cos_factorsQ31_2048 [2048]
     
    static const q31_t cos_factorsQ31_8192 [8192]
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dct4__q15_8c.html b/Documentation/DSP/html/arm__dct4__q15_8c.html new file mode 100644 index 0000000..8bca3c3 --- /dev/null +++ b/Documentation/DSP/html/arm__dct4__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_dct4_q15.c File Reference +CMSIS-DSP: arm_dct4_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_dct4_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
     Processing function for the Q15 DCT4/IDCT4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dct4__q31_8c.html b/Documentation/DSP/html/arm__dct4__q31_8c.html new file mode 100644 index 0000000..e3bcef0 --- /dev/null +++ b/Documentation/DSP/html/arm__dct4__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_dct4_q31.c File Reference +CMSIS-DSP: arm_dct4_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_dct4_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
     Processing function for the Q31 DCT4/IDCT4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dot__prod__f32_8c.html b/Documentation/DSP/html/arm__dot__prod__f32_8c.html new file mode 100644 index 0000000..a80ebd8 --- /dev/null +++ b/Documentation/DSP/html/arm__dot__prod__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_dot_prod_f32.c File Reference +CMSIS-DSP: arm_dot_prod_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_dot_prod_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
     Dot product of floating-point vectors.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dot__prod__q15_8c.html b/Documentation/DSP/html/arm__dot__prod__q15_8c.html new file mode 100644 index 0000000..df89e64 --- /dev/null +++ b/Documentation/DSP/html/arm__dot__prod__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_dot_prod_q15.c File Reference +CMSIS-DSP: arm_dot_prod_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_dot_prod_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
     Dot product of Q15 vectors.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dot__prod__q31_8c.html b/Documentation/DSP/html/arm__dot__prod__q31_8c.html new file mode 100644 index 0000000..08a3356 --- /dev/null +++ b/Documentation/DSP/html/arm__dot__prod__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_dot_prod_q31.c File Reference +CMSIS-DSP: arm_dot_prod_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_dot_prod_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
     Dot product of Q31 vectors.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dot__prod__q7_8c.html b/Documentation/DSP/html/arm__dot__prod__q7_8c.html new file mode 100644 index 0000000..aaff19b --- /dev/null +++ b/Documentation/DSP/html/arm__dot__prod__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_dot_prod_q7.c File Reference +CMSIS-DSP: arm_dot_prod_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_dot_prod_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
     Dot product of Q7 vectors.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..fef245f --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_dotproduct_example for
    +Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_dotproduct_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..732af09 --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_dotproduct_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..314fcee --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_dotproduct_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..1d31414 --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_dotproduct_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..e478d88 --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_dotproduct_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..4015a0c --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_dotproduct_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_abstract_8txt.html b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_abstract_8txt.html new file mode 100644 index 0000000..510f981 --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_dotproduct_example for
    +Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_dotproduct_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..6fd3e8c --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_dotproduct_example/GCC/Startup/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..6c50f16 --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_dotproduct_example/GCC/Startup/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..4a71973 --- /dev/null +++ b/Documentation/DSP/html/arm__dotproduct__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_dotproduct_example/GCC/Startup/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..bbf3b5c --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,151 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_fft_bin_example for Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_fft_bin_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..b2c7fb6 --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fft_bin_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..b1a18e8 --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fft_bin_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..99737ea --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fft_bin_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..bd37de2 --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fft_bin_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..270a317 --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_fft_bin_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_abstract_8txt.html b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_abstract_8txt.html new file mode 100644 index 0000000..e45fdc0 --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_abstract_8txt.html @@ -0,0 +1,151 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_fft_bin_example for Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_fft_bin_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..2dcdb66 --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fft_bin_example/GCC/Startup/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..745fc35 --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fft_bin_example/GCC/Startup/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..094998a --- /dev/null +++ b/Documentation/DSP/html/arm__fft__bin__example_2_g_c_c_2_startup_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fft_bin_example/GCC/Startup/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fill__f32_8c.html b/Documentation/DSP/html/arm__fill__f32_8c.html new file mode 100644 index 0000000..ecd0490 --- /dev/null +++ b/Documentation/DSP/html/arm__fill__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fill_f32.c File Reference +CMSIS-DSP: arm_fill_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fill_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
     Fills a constant value into a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fill__q15_8c.html b/Documentation/DSP/html/arm__fill__q15_8c.html new file mode 100644 index 0000000..467680d --- /dev/null +++ b/Documentation/DSP/html/arm__fill__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fill_q15.c File Reference +CMSIS-DSP: arm_fill_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fill_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fill__q31_8c.html b/Documentation/DSP/html/arm__fill__q31_8c.html new file mode 100644 index 0000000..21217d5 --- /dev/null +++ b/Documentation/DSP/html/arm__fill__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fill_q31.c File Reference +CMSIS-DSP: arm_fill_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fill_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fill__q7_8c.html b/Documentation/DSP/html/arm__fill__q7_8c.html new file mode 100644 index 0000000..7a82e55 --- /dev/null +++ b/Documentation/DSP/html/arm__fill__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fill_q7.c File Reference +CMSIS-DSP: arm_fill_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fill_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__data_8c.html b/Documentation/DSP/html/arm__fir__data_8c.html new file mode 100644 index 0000000..4176597 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__data_8c.html @@ -0,0 +1,170 @@ + + + + + +arm_fir_data.c File Reference +CMSIS-DSP: arm_fir_data.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    arm_fir_data.c File Reference
    +
    +
    + + + + + + +

    +Variables

    float32_t testInput_f32_1kHz_15kHz [320]
     
    float32_t refOutput [320]
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t refOutput[320]
    +
    +
    Examples:
    arm_fir_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32_1kHz_15kHz[320]
    +
    +
    Examples:
    arm_fir_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__f32_8c.html b/Documentation/DSP/html/arm__fir__decimate__f32_8c.html new file mode 100644 index 0000000..8f538af --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_f32.c File Reference +CMSIS-DSP: arm_fir_decimate_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR decimator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__fast__q15_8c.html b/Documentation/DSP/html/arm__fir__decimate__fast__q15_8c.html new file mode 100644 index 0000000..a8fa868 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__fast__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_fast_q15.c File Reference +CMSIS-DSP: arm_fir_decimate_fast_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_fast_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__fast__q31_8c.html b/Documentation/DSP/html/arm__fir__decimate__fast__q31_8c.html new file mode 100644 index 0000000..53749fd --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__fast__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_fast_q31.c File Reference +CMSIS-DSP: arm_fir_decimate_fast_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_fast_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__init__f32_8c.html b/Documentation/DSP/html/arm__fir__decimate__init__f32_8c.html new file mode 100644 index 0000000..fe6a2a5 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_init_f32.c File Reference +CMSIS-DSP: arm_fir_decimate_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR decimator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__init__q15_8c.html b/Documentation/DSP/html/arm__fir__decimate__init__q15_8c.html new file mode 100644 index 0000000..080621d --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_init_q15.c File Reference +CMSIS-DSP: arm_fir_decimate_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR decimator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__init__q31_8c.html b/Documentation/DSP/html/arm__fir__decimate__init__q31_8c.html new file mode 100644 index 0000000..d35ad73 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_init_q31.c File Reference +CMSIS-DSP: arm_fir_decimate_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR decimator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__q15_8c.html b/Documentation/DSP/html/arm__fir__decimate__q15_8c.html new file mode 100644 index 0000000..6a13011 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_q15.c File Reference +CMSIS-DSP: arm_fir_decimate_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR decimator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__decimate__q31_8c.html b/Documentation/DSP/html/arm__fir__decimate__q31_8c.html new file mode 100644 index 0000000..b5d75b7 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__decimate__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_decimate_q31.c File Reference +CMSIS-DSP: arm_fir_decimate_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_decimate_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR decimator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..b7e8399 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,151 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_fir_example for Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_fir_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..7cc8a43 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fir_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..8735da4 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fir_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..976c33e --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fir_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..d53d034 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fir_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..12c8a6f --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_fir_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2math__helper_8c.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2math__helper_8c.html new file mode 100644 index 0000000..d28dc0d --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2math__helper_8c.html @@ -0,0 +1,749 @@ + + + + + +math_helper.c File Reference +CMSIS-DSP: math_helper.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_example/ARM/math_helper.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_calc_2pow (uint32_t numShifts)
     Calculates pow(2, numShifts)
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +

    References arm_calc_2pow().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q7 (q7_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example_2_a_r_m_2math__helper_8h.html b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2math__helper_8h.html new file mode 100644 index 0000000..15b6d94 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example_2_a_r_m_2math__helper_8h.html @@ -0,0 +1,697 @@ + + + + + +math_helper.h File Reference +CMSIS-DSP: math_helper.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_example/ARM/math_helper.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_calc_2pow (uint32_t guard_bits)
     Calculates pow(2, numShifts)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__example__f32_8c.html b/Documentation/DSP/html/arm__fir__example__f32_8c.html new file mode 100644 index 0000000..27a7966 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__example__f32_8c.html @@ -0,0 +1,374 @@ + + + + + +arm_fir_example_f32.c File Reference +CMSIS-DSP: arm_fir_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_fir_example_f32.c File Reference
    +
    +
    + + + + + + + + + + +

    +Macros

    #define TEST_LENGTH_SAMPLES
     
    #define SNR_THRESHOLD_F32
     
    #define BLOCK_SIZE
     
    #define NUM_TAPS
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + + + +

    +Variables

    float32_t testInput_f32_1kHz_15kHz [TEST_LENGTH_SAMPLES]
     
    float32_t refOutput [TEST_LENGTH_SAMPLES]
     
    static float32_t testOutput [TEST_LENGTH_SAMPLES]
     
    static float32_t firStateF32 [BLOCK_SIZE+NUM_TAPS-1]
     
    const float32_t firCoeffs32 [NUM_TAPS]
     
    uint32_t blockSize
     
    uint32_t numBlocks
     
    float32_t snr
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define BLOCK_SIZE
    +
    +
    Examples:
    arm_fir_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + +
    #define NUM_TAPS
    +
    +
    Examples:
    arm_fir_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define SNR_THRESHOLD_F32
    +
    +
    Examples:
    arm_fir_example_f32.c, and arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define TEST_LENGTH_SAMPLES
    +
    + +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_fir_f32(), arm_fir_init_f32(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_snr_f32(), blockSize, firCoeffs32, firStateF32, NUM_TAPS, numBlocks, refOutput, snr, SNR_THRESHOLD_F32, status, TEST_LENGTH_SAMPLES, testInput_f32_1kHz_15kHz, and testOutput.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t blockSize
    +
    +
    Examples:
    arm_fir_example_f32.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by arm_abs_f32(), arm_abs_q15(), arm_abs_q31(), arm_abs_q7(), arm_add_f32(), arm_add_q15(), arm_add_q31(), arm_add_q7(), arm_biquad_cas_df1_32x64_q31(), arm_biquad_cascade_df1_f32(), arm_biquad_cascade_df1_q31(), arm_biquad_cascade_df2T_f32(), arm_biquad_cascade_df2T_f64(), arm_biquad_cascade_stereo_df2T_f32(), arm_circularRead_f32(), arm_circularRead_q15(), arm_circularRead_q7(), arm_circularWrite_f32(), arm_circularWrite_q15(), arm_circularWrite_q7(), arm_copy_f32(), arm_copy_q15(), arm_copy_q31(), arm_copy_q7(), arm_dot_prod_f32(), arm_dot_prod_q15(), arm_dot_prod_q31(), arm_dot_prod_q7(), arm_fill_f32(), arm_fill_q15(), arm_fill_q31(), arm_fill_q7(), arm_fir_lattice_f32(), arm_fir_lattice_q15(), arm_fir_q31(), arm_fir_q7(), arm_fir_sparse_f32(), arm_fir_sparse_q15(), arm_fir_sparse_q31(), arm_fir_sparse_q7(), arm_float_to_q15(), arm_float_to_q31(), arm_float_to_q7(), arm_iir_lattice_f32(), arm_iir_lattice_q15(), arm_iir_lattice_q31(), arm_lms_f32(), arm_lms_norm_f32(), arm_lms_norm_q15(), arm_lms_norm_q31(), arm_lms_q15(), arm_lms_q31(), arm_mean_f32(), arm_mean_q15(), arm_mean_q31(), arm_mean_q7(), arm_mult_f32(), arm_mult_q15(), arm_mult_q31(), arm_mult_q7(), arm_negate_f32(), arm_negate_q15(), arm_negate_q31(), arm_negate_q7(), arm_offset_f32(), arm_offset_q15(), arm_offset_q31(), arm_offset_q7(), arm_power_f32(), arm_power_q15(), arm_power_q31(), arm_power_q7(), arm_provide_guard_bits_q15(), arm_provide_guard_bits_q31(), arm_provide_guard_bits_q7(), arm_q15_to_float(), arm_q15_to_q31(), arm_q15_to_q7(), arm_q31_to_float(), arm_q31_to_q15(), arm_q31_to_q7(), arm_q7_to_float(), arm_q7_to_q15(), arm_q7_to_q31(), arm_rms_f32(), arm_rms_q15(), arm_rms_q31(), arm_scale_f32(), arm_scale_q15(), arm_scale_q31(), arm_scale_q7(), arm_shift_q15(), arm_shift_q31(), arm_shift_q7(), arm_std_f32(), arm_std_q15(), arm_std_q31(), arm_sub_f32(), arm_sub_q15(), arm_sub_q31(), arm_sub_q7(), arm_var_f32(), arm_var_q15(), arm_var_q31(), and main().

    + +
    +
    + +
    +
    + + + + +
    const float32_t firCoeffs32[NUM_TAPS]
    +
    +
    Examples:
    arm_fir_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    float32_t firStateF32[BLOCK_SIZE+NUM_TAPS-1]
    +     		+static
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    uint32_t numBlocks
    +
    +
    Examples:
    arm_fir_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t refOutput[TEST_LENGTH_SAMPLES]
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t snr
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES]
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    float32_t testOutput[TEST_LENGTH_SAMPLES]
    +     		+static
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__f32_8c.html b/Documentation/DSP/html/arm__fir__f32_8c.html new file mode 100644 index 0000000..fda7aee --- /dev/null +++ b/Documentation/DSP/html/arm__fir__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_f32.c File Reference +CMSIS-DSP: arm_fir_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__fast__q15_8c.html b/Documentation/DSP/html/arm__fir__fast__q15_8c.html new file mode 100644 index 0000000..34e3d25 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__fast__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_fast_q15.c File Reference +CMSIS-DSP: arm_fir_fast_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_fast_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__fast__q31_8c.html b/Documentation/DSP/html/arm__fir__fast__q31_8c.html new file mode 100644 index 0000000..521672d --- /dev/null +++ b/Documentation/DSP/html/arm__fir__fast__q31_8c.html @@ -0,0 +1,139 @@ + + + + + +arm_fir_fast_q31.c File Reference +CMSIS-DSP: arm_fir_fast_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_fast_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    IAR_ONLY_LOW_OPTIMIZATION_ENTER
    +void     		arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__init__f32_8c.html b/Documentation/DSP/html/arm__fir__init__f32_8c.html new file mode 100644 index 0000000..07f83b7 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_init_f32.c File Reference +CMSIS-DSP: arm_fir_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__init__q15_8c.html b/Documentation/DSP/html/arm__fir__init__q15_8c.html new file mode 100644 index 0000000..4f3b87d --- /dev/null +++ b/Documentation/DSP/html/arm__fir__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_init_q15.c File Reference +CMSIS-DSP: arm_fir_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__init__q31_8c.html b/Documentation/DSP/html/arm__fir__init__q31_8c.html new file mode 100644 index 0000000..0756399 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_init_q31.c File Reference +CMSIS-DSP: arm_fir_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__init__q7_8c.html b/Documentation/DSP/html/arm__fir__init__q7_8c.html new file mode 100644 index 0000000..fca3e55 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__init__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_init_q7.c File Reference +CMSIS-DSP: arm_fir_init_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_init_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
     Initialization function for the Q7 FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__interpolate__f32_8c.html b/Documentation/DSP/html/arm__fir__interpolate__f32_8c.html new file mode 100644 index 0000000..ac4115c --- /dev/null +++ b/Documentation/DSP/html/arm__fir__interpolate__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_interpolate_f32.c File Reference +CMSIS-DSP: arm_fir_interpolate_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_interpolate_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR interpolator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__interpolate__init__f32_8c.html b/Documentation/DSP/html/arm__fir__interpolate__init__f32_8c.html new file mode 100644 index 0000000..9ff34cc --- /dev/null +++ b/Documentation/DSP/html/arm__fir__interpolate__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_interpolate_init_f32.c File Reference +CMSIS-DSP: arm_fir_interpolate_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_interpolate_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR interpolator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__interpolate__init__q15_8c.html b/Documentation/DSP/html/arm__fir__interpolate__init__q15_8c.html new file mode 100644 index 0000000..fe7509d --- /dev/null +++ b/Documentation/DSP/html/arm__fir__interpolate__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_interpolate_init_q15.c File Reference +CMSIS-DSP: arm_fir_interpolate_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_interpolate_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR interpolator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__interpolate__init__q31_8c.html b/Documentation/DSP/html/arm__fir__interpolate__init__q31_8c.html new file mode 100644 index 0000000..807bce0 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__interpolate__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_interpolate_init_q31.c File Reference +CMSIS-DSP: arm_fir_interpolate_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_interpolate_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR interpolator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__interpolate__q15_8c.html b/Documentation/DSP/html/arm__fir__interpolate__q15_8c.html new file mode 100644 index 0000000..b793cf0 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__interpolate__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_interpolate_q15.c File Reference +CMSIS-DSP: arm_fir_interpolate_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_interpolate_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR interpolator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__interpolate__q31_8c.html b/Documentation/DSP/html/arm__fir__interpolate__q31_8c.html new file mode 100644 index 0000000..185b933 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__interpolate__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_interpolate_q31.c File Reference +CMSIS-DSP: arm_fir_interpolate_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_interpolate_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR interpolator.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__lattice__f32_8c.html b/Documentation/DSP/html/arm__fir__lattice__f32_8c.html new file mode 100644 index 0000000..9880a43 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__lattice__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_lattice_f32.c File Reference +CMSIS-DSP: arm_fir_lattice_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_lattice_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__lattice__init__f32_8c.html b/Documentation/DSP/html/arm__fir__lattice__init__f32_8c.html new file mode 100644 index 0000000..4b164fa --- /dev/null +++ b/Documentation/DSP/html/arm__fir__lattice__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_lattice_init_f32.c File Reference +CMSIS-DSP: arm_fir_lattice_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_lattice_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point FIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__lattice__init__q15_8c.html b/Documentation/DSP/html/arm__fir__lattice__init__q15_8c.html new file mode 100644 index 0000000..2166249 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__lattice__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_lattice_init_q15.c File Reference +CMSIS-DSP: arm_fir_lattice_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_lattice_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
     Initialization function for the Q15 FIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__lattice__init__q31_8c.html b/Documentation/DSP/html/arm__fir__lattice__init__q31_8c.html new file mode 100644 index 0000000..e69a7ca --- /dev/null +++ b/Documentation/DSP/html/arm__fir__lattice__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_lattice_init_q31.c File Reference +CMSIS-DSP: arm_fir_lattice_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_lattice_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
     Initialization function for the Q31 FIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__lattice__q15_8c.html b/Documentation/DSP/html/arm__fir__lattice__q15_8c.html new file mode 100644 index 0000000..4a84c90 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__lattice__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_lattice_q15.c File Reference +CMSIS-DSP: arm_fir_lattice_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_lattice_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__lattice__q31_8c.html b/Documentation/DSP/html/arm__fir__lattice__q31_8c.html new file mode 100644 index 0000000..dc11cf1 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__lattice__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_lattice_q31.c File Reference +CMSIS-DSP: arm_fir_lattice_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_lattice_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__q15_8c.html b/Documentation/DSP/html/arm__fir__q15_8c.html new file mode 100644 index 0000000..e9d113a --- /dev/null +++ b/Documentation/DSP/html/arm__fir__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_q15.c File Reference +CMSIS-DSP: arm_fir_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__q31_8c.html b/Documentation/DSP/html/arm__fir__q31_8c.html new file mode 100644 index 0000000..3ec87e2 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_q31.c File Reference +CMSIS-DSP: arm_fir_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__q7_8c.html b/Documentation/DSP/html/arm__fir__q7_8c.html new file mode 100644 index 0000000..b7fa690 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_q7.c File Reference +CMSIS-DSP: arm_fir_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Processing function for the Q7 FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__f32_8c.html b/Documentation/DSP/html/arm__fir__sparse__f32_8c.html new file mode 100644 index 0000000..5a999d1 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_f32.c File Reference +CMSIS-DSP: arm_fir_sparse_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
     Processing function for the floating-point sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__init__f32_8c.html b/Documentation/DSP/html/arm__fir__sparse__init__f32_8c.html new file mode 100644 index 0000000..656e75c --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_init_f32.c File Reference +CMSIS-DSP: arm_fir_sparse_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
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    + +
    + + + + +
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    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the floating-point sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__init__q15_8c.html b/Documentation/DSP/html/arm__fir__sparse__init__q15_8c.html new file mode 100644 index 0000000..b210817 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_init_q15.c File Reference +CMSIS-DSP: arm_fir_sparse_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q15 sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__init__q31_8c.html b/Documentation/DSP/html/arm__fir__sparse__init__q31_8c.html new file mode 100644 index 0000000..08ec873 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_init_q31.c File Reference +CMSIS-DSP: arm_fir_sparse_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q31 sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__init__q7_8c.html b/Documentation/DSP/html/arm__fir__sparse__init__q7_8c.html new file mode 100644 index 0000000..3001ae9 --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__init__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_init_q7.c File Reference +CMSIS-DSP: arm_fir_sparse_init_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_init_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q7 sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__q15_8c.html b/Documentation/DSP/html/arm__fir__sparse__q15_8c.html new file mode 100644 index 0000000..dfadeac --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_q15.c File Reference +CMSIS-DSP: arm_fir_sparse_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
     Processing function for the Q15 sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__q31_8c.html b/Documentation/DSP/html/arm__fir__sparse__q31_8c.html new file mode 100644 index 0000000..9c82fee --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_q31.c File Reference +CMSIS-DSP: arm_fir_sparse_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
     Processing function for the Q31 sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__fir__sparse__q7_8c.html b/Documentation/DSP/html/arm__fir__sparse__q7_8c.html new file mode 100644 index 0000000..a0fef5e --- /dev/null +++ b/Documentation/DSP/html/arm__fir__sparse__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_fir_sparse_q7.c File Reference +CMSIS-DSP: arm_fir_sparse_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_fir_sparse_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
     Processing function for the Q7 sparse FIR filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__float__to__q15_8c.html b/Documentation/DSP/html/arm__float__to__q15_8c.html new file mode 100644 index 0000000..6237fce --- /dev/null +++ b/Documentation/DSP/html/arm__float__to__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_float_to_q15.c File Reference +CMSIS-DSP: arm_float_to_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_float_to_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__float__to__q31_8c.html b/Documentation/DSP/html/arm__float__to__q31_8c.html new file mode 100644 index 0000000..1bb5af0 --- /dev/null +++ b/Documentation/DSP/html/arm__float__to__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_float_to_q31.c File Reference +CMSIS-DSP: arm_float_to_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_float_to_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__float__to__q7_8c.html b/Documentation/DSP/html/arm__float__to__q7_8c.html new file mode 100644 index 0000000..23ea916 --- /dev/null +++ b/Documentation/DSP/html/arm__float__to__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_float_to_q7.c File Reference +CMSIS-DSP: arm_float_to_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_float_to_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__data_8c.html b/Documentation/DSP/html/arm__graphic__equalizer__data_8c.html new file mode 100644 index 0000000..71359df --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__data_8c.html @@ -0,0 +1,167 @@ + + + + + +arm_graphic_equalizer_data.c File Reference +CMSIS-DSP: arm_graphic_equalizer_data.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    arm_graphic_equalizer_data.c File Reference
    +
    +
    + + + + + + +

    +Variables

    float32_t testRefOutput_f32 [320]
     
    float32_t testInput_f32 [320]
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t testInput_f32[320]
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c, arm_signal_converge_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testRefOutput_f32[320]
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..89a0d1b --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_graphic_equalizer_example
    +for Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_graphic_equalizer_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..920d549 --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..a77c00d --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..a7d054b --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
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    +
    +
    arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..9a350a0 --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..19fa7a2 --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_graphic_equalizer_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2math__helper_8c.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2math__helper_8c.html new file mode 100644 index 0000000..5c463bd --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2math__helper_8c.html @@ -0,0 +1,749 @@ + + + + + +math_helper.c File Reference +CMSIS-DSP: math_helper.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_graphic_equalizer_example/ARM/math_helper.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_calc_2pow (uint32_t numShifts)
     Calculates pow(2, numShifts)
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +

    References arm_calc_2pow().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q7 (q7_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2math__helper_8h.html b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2math__helper_8h.html new file mode 100644 index 0000000..51be1b1 --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example_2_a_r_m_2math__helper_8h.html @@ -0,0 +1,697 @@ + + + + + +math_helper.h File Reference +CMSIS-DSP: math_helper.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_graphic_equalizer_example/ARM/math_helper.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_calc_2pow (uint32_t guard_bits)
     Calculates pow(2, numShifts)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__graphic__equalizer__example__q31_8c.html b/Documentation/DSP/html/arm__graphic__equalizer__example__q31_8c.html new file mode 100644 index 0000000..6ed43b3 --- /dev/null +++ b/Documentation/DSP/html/arm__graphic__equalizer__example__q31_8c.html @@ -0,0 +1,509 @@ + + + + + +arm_graphic_equalizer_example_q31.c File Reference +CMSIS-DSP: arm_graphic_equalizer_example_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_graphic_equalizer_example_q31.c File Reference
    +
    +
    + + + + + + + + + + + + +

    +Macros

    #define TESTLENGTH
     
    #define BLOCKSIZE
     
    #define NUMBLOCKS
     
    #define NUMSTAGES
     
    #define SNR_THRESHOLD_F32
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    float32_t testInput_f32 [TESTLENGTH]
     
    static float32_t testOutput [TESTLENGTH]
     
    float32_t testRefOutput_f32 [TESTLENGTH]
     
    static q63_t biquadStateBand1Q31 [4 *2]
     
    static q63_t biquadStateBand2Q31 [4 *2]
     
    static q31_t biquadStateBand3Q31 [4 *2]
     
    static q31_t biquadStateBand4Q31 [4 *2]
     
    static q31_t biquadStateBand5Q31 [4 *2]
     
    q31_t inputQ31 [BLOCKSIZE]
     
    q31_t outputQ31 [BLOCKSIZE]
     
    const q31_t coeffTable [950]
     
    int gainDB [5]
     
    float32_t snr
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define BLOCKSIZE
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c, and arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define NUMBLOCKS
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define NUMSTAGES
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define SNR_THRESHOLD_F32
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define TESTLENGTH
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_biquad_cas_df1_32x64_init_q31(), arm_biquad_cas_df1_32x64_q31(), arm_biquad_cascade_df1_init_q31(), arm_biquad_cascade_df1_q31(), arm_float_to_q31(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_q31_to_float(), arm_scale_f32(), arm_scale_q31(), arm_snr_f32(), biquadStateBand1Q31, biquadStateBand2Q31, biquadStateBand3Q31, biquadStateBand4Q31, biquadStateBand5Q31, BLOCKSIZE, coeffTable, gainDB, inputQ31, NUMBLOCKS, NUMSTAGES, outputQ31, snr, SNR_THRESHOLD_F32, status, testInput_f32, TESTLENGTH, testOutput, and testRefOutput_f32.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + + +
    + + + + +
    q63_t biquadStateBand1Q31[4 *2]
    +     		+static
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    q63_t biquadStateBand2Q31[4 *2]
    +     		+static
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    q31_t biquadStateBand3Q31[4 *2]
    +     		+static
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    q31_t biquadStateBand4Q31[4 *2]
    +     		+static
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    q31_t biquadStateBand5Q31[4 *2]
    +     		+static
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const q31_t coeffTable[950]
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    int gainDB[5]
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    q31_t inputQ31[BLOCKSIZE]
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    q31_t outputQ31[BLOCKSIZE]
    +
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t snr
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32[TESTLENGTH]
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    float32_t testOutput[TESTLENGTH]
    +     		+static
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testRefOutput_f32[TESTLENGTH]
    +
    + +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__iir__lattice__f32_8c.html b/Documentation/DSP/html/arm__iir__lattice__f32_8c.html new file mode 100644 index 0000000..aa41109 --- /dev/null +++ b/Documentation/DSP/html/arm__iir__lattice__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_iir_lattice_f32.c File Reference +CMSIS-DSP: arm_iir_lattice_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_iir_lattice_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point IIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__iir__lattice__init__f32_8c.html b/Documentation/DSP/html/arm__iir__lattice__init__f32_8c.html new file mode 100644 index 0000000..b185619 --- /dev/null +++ b/Documentation/DSP/html/arm__iir__lattice__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_iir_lattice_init_f32.c File Reference +CMSIS-DSP: arm_iir_lattice_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_iir_lattice_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point IIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__iir__lattice__init__q15_8c.html b/Documentation/DSP/html/arm__iir__lattice__init__q15_8c.html new file mode 100644 index 0000000..22f1b7e --- /dev/null +++ b/Documentation/DSP/html/arm__iir__lattice__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_iir_lattice_init_q15.c File Reference +CMSIS-DSP: arm_iir_lattice_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_iir_lattice_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 IIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__iir__lattice__init__q31_8c.html b/Documentation/DSP/html/arm__iir__lattice__init__q31_8c.html new file mode 100644 index 0000000..c762c35 --- /dev/null +++ b/Documentation/DSP/html/arm__iir__lattice__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_iir_lattice_init_q31.c File Reference +CMSIS-DSP: arm_iir_lattice_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_iir_lattice_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 IIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__iir__lattice__q15_8c.html b/Documentation/DSP/html/arm__iir__lattice__q15_8c.html new file mode 100644 index 0000000..a358e98 --- /dev/null +++ b/Documentation/DSP/html/arm__iir__lattice__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_iir_lattice_q15.c File Reference +CMSIS-DSP: arm_iir_lattice_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_iir_lattice_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 IIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__iir__lattice__q31_8c.html b/Documentation/DSP/html/arm__iir__lattice__q31_8c.html new file mode 100644 index 0000000..ca10124 --- /dev/null +++ b/Documentation/DSP/html/arm__iir__lattice__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_iir_lattice_q31.c File Reference +CMSIS-DSP: arm_iir_lattice_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_iir_lattice_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 IIR lattice filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__data_8c.html b/Documentation/DSP/html/arm__linear__interp__data_8c.html new file mode 100644 index 0000000..1d117f7 --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__data_8c.html @@ -0,0 +1,153 @@ + + + + + +arm_linear_interp_data.c File Reference +CMSIS-DSP: arm_linear_interp_data.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    arm_linear_interp_data.c File Reference
    +
    +
    + + + + +

    +Variables

    float arm_linear_interep_table [188495]
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    float arm_linear_interep_table[188495]
    +
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..7649c5a --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_linear_interp_example for
    +Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_linear_interp_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..213f1be --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_linear_interp_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..a896634 --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_linear_interp_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..49f8250 --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_linear_interp_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..3a9033a --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_linear_interp_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..3e11f6f --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_linear_interp_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2math__helper_8c.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2math__helper_8c.html new file mode 100644 index 0000000..79fa804 --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2math__helper_8c.html @@ -0,0 +1,749 @@ + + + + + +math_helper.c File Reference +CMSIS-DSP: math_helper.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_linear_interp_example/ARM/math_helper.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_calc_2pow (uint32_t numShifts)
     Calculates pow(2, numShifts)
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +

    References arm_calc_2pow().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q7 (q7_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2math__helper_8h.html b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2math__helper_8h.html new file mode 100644 index 0000000..d46f22d --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example_2_a_r_m_2math__helper_8h.html @@ -0,0 +1,697 @@ + + + + + +math_helper.h File Reference +CMSIS-DSP: math_helper.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_linear_interp_example/ARM/math_helper.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_calc_2pow (uint32_t guard_bits)
     Calculates pow(2, numShifts)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__linear__interp__example__f32_8c.html b/Documentation/DSP/html/arm__linear__interp__example__f32_8c.html new file mode 100644 index 0000000..6063b03 --- /dev/null +++ b/Documentation/DSP/html/arm__linear__interp__example__f32_8c.html @@ -0,0 +1,328 @@ + + + + + +arm_linear_interp_example_f32.c File Reference +CMSIS-DSP: arm_linear_interp_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_linear_interp_example_f32.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define SNR_THRESHOLD
     
    #define TEST_LENGTH_SAMPLES
     
    #define XSPACING
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + +

    +Variables

    float32_t testInputSin_f32 [TEST_LENGTH_SAMPLES]
     
    float32_t testRefSinOutput32_f32 [TEST_LENGTH_SAMPLES]
     
    float32_t testOutput [TEST_LENGTH_SAMPLES]
     
    float32_t testLinIntOutput [TEST_LENGTH_SAMPLES]
     
    float arm_linear_interep_table [188495]
     
    float32_t snr1
     
    float32_t snr2
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define SNR_THRESHOLD
    +
    + +
    +
    + +
    +
    + + + + +
    #define TEST_LENGTH_SAMPLES
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define XSPACING
    +
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_linear_interep_table, arm_linear_interp_f32(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_sin_f32(), arm_snr_f32(), snr1, snr2, status, TEST_LENGTH_SAMPLES, testInputSin_f32, testLinIntOutput, testOutput, testRefSinOutput32_f32, and XSPACING.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float arm_linear_interep_table[188495]
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t snr1
    +
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t snr2
    +
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testInputSin_f32[TEST_LENGTH_SAMPLES]
    +
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testLinIntOutput[TEST_LENGTH_SAMPLES]
    +
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testOutput[TEST_LENGTH_SAMPLES]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES]
    +
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__f32_8c.html b/Documentation/DSP/html/arm__lms__f32_8c.html new file mode 100644 index 0000000..08f7ac9 --- /dev/null +++ b/Documentation/DSP/html/arm__lms__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_f32.c File Reference +CMSIS-DSP: arm_lms_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_lms_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
     Processing function for floating-point LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__init__f32_8c.html b/Documentation/DSP/html/arm__lms__init__f32_8c.html new file mode 100644 index 0000000..2201c8f --- /dev/null +++ b/Documentation/DSP/html/arm__lms__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_init_f32.c File Reference +CMSIS-DSP: arm_lms_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_lms_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
     Initialization function for floating-point LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__init__q15_8c.html b/Documentation/DSP/html/arm__lms__init__q15_8c.html new file mode 100644 index 0000000..44a963d --- /dev/null +++ b/Documentation/DSP/html/arm__lms__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_init_q15.c File Reference +CMSIS-DSP: arm_lms_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_lms_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
     Initialization function for the Q15 LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__init__q31_8c.html b/Documentation/DSP/html/arm__lms__init__q31_8c.html new file mode 100644 index 0000000..85596c6 --- /dev/null +++ b/Documentation/DSP/html/arm__lms__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_init_q31.c File Reference +CMSIS-DSP: arm_lms_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
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    + + + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_lms_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
     Initialization function for Q31 LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__norm__f32_8c.html b/Documentation/DSP/html/arm__lms__norm__f32_8c.html new file mode 100644 index 0000000..4601c97 --- /dev/null +++ b/Documentation/DSP/html/arm__lms__norm__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_norm_f32.c File Reference +CMSIS-DSP: arm_lms_norm_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_lms_norm_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
     Processing function for floating-point normalized LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__norm__init__f32_8c.html b/Documentation/DSP/html/arm__lms__norm__init__f32_8c.html new file mode 100644 index 0000000..ee4ef87 --- /dev/null +++ b/Documentation/DSP/html/arm__lms__norm__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_norm_init_f32.c File Reference +CMSIS-DSP: arm_lms_norm_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
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    + +
    +
    +Functions
    +
    +
    arm_lms_norm_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
     Initialization function for floating-point normalized LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__norm__init__q15_8c.html b/Documentation/DSP/html/arm__lms__norm__init__q15_8c.html new file mode 100644 index 0000000..91aa267 --- /dev/null +++ b/Documentation/DSP/html/arm__lms__norm__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_norm_init_q15.c File Reference +CMSIS-DSP: arm_lms_norm_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
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    +
    +Functions
    +
    +
    arm_lms_norm_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
     Initialization function for Q15 normalized LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__norm__init__q31_8c.html b/Documentation/DSP/html/arm__lms__norm__init__q31_8c.html new file mode 100644 index 0000000..a6a237b --- /dev/null +++ b/Documentation/DSP/html/arm__lms__norm__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_norm_init_q31.c File Reference +CMSIS-DSP: arm_lms_norm_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_lms_norm_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
     Initialization function for Q31 normalized LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__norm__q15_8c.html b/Documentation/DSP/html/arm__lms__norm__q15_8c.html new file mode 100644 index 0000000..f27253b --- /dev/null +++ b/Documentation/DSP/html/arm__lms__norm__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_norm_q15.c File Reference +CMSIS-DSP: arm_lms_norm_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_lms_norm_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
     Processing function for Q15 normalized LMS filter.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__lms__norm__q31_8c.html b/Documentation/DSP/html/arm__lms__norm__q31_8c.html new file mode 100644 index 0000000..bb87ded --- /dev/null +++ b/Documentation/DSP/html/arm__lms__norm__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_norm_q31.c File Reference +CMSIS-DSP: arm_lms_norm_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
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    +Functions
    +
    +
    arm_lms_norm_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
     Processing function for Q31 normalized LMS filter.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__lms__q15_8c.html b/Documentation/DSP/html/arm__lms__q15_8c.html new file mode 100644 index 0000000..bf04301 --- /dev/null +++ b/Documentation/DSP/html/arm__lms__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_q15.c File Reference +CMSIS-DSP: arm_lms_q15.c File Reference + + + + + + + + + + + + + + + +
    +
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    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    +Functions
    +
    +
    arm_lms_q15.c File Reference
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    +
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    +Functions

    void arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
     Processing function for Q15 LMS filter.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__lms__q31_8c.html b/Documentation/DSP/html/arm__lms__q31_8c.html new file mode 100644 index 0000000..3b43d77 --- /dev/null +++ b/Documentation/DSP/html/arm__lms__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_lms_q31.c File Reference +CMSIS-DSP: arm_lms_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
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      + +
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    + +
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    +Functions
    +
    +
    arm_lms_q31.c File Reference
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    +
    + + + + + +

    +Functions

    void arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
     Processing function for Q31 LMS filter.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__add__f32_8c.html b/Documentation/DSP/html/arm__mat__add__f32_8c.html new file mode 100644 index 0000000..a749e5f --- /dev/null +++ b/Documentation/DSP/html/arm__mat__add__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_add_f32.c File Reference +CMSIS-DSP: arm_mat_add_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    + +
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      + +
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    + +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_mat_add_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix addition.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__add__q15_8c.html b/Documentation/DSP/html/arm__mat__add__q15_8c.html new file mode 100644 index 0000000..7dcb822 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__add__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_add_q15.c File Reference +CMSIS-DSP: arm_mat_add_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
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      + +
    +
    + + + +
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    +Functions
    +
    +
    arm_mat_add_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
     Q15 matrix addition.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__add__q31_8c.html b/Documentation/DSP/html/arm__mat__add__q31_8c.html new file mode 100644 index 0000000..eef091d --- /dev/null +++ b/Documentation/DSP/html/arm__mat__add__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_add_q31.c File Reference +CMSIS-DSP: arm_mat_add_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
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      + +
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    + + + +
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    +Functions
    +
    +
    arm_mat_add_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix addition.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__cmplx__mult__f32_8c.html b/Documentation/DSP/html/arm__mat__cmplx__mult__f32_8c.html new file mode 100644 index 0000000..f67dfc3 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__cmplx__mult__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_cmplx_mult_f32.c File Reference +CMSIS-DSP: arm_mat_cmplx_mult_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + + + +
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    +Functions
    +
    +
    arm_mat_cmplx_mult_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_cmplx_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point Complex matrix multiplication.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__cmplx__mult__q15_8c.html b/Documentation/DSP/html/arm__mat__cmplx__mult__q15_8c.html new file mode 100644 index 0000000..3dd114d --- /dev/null +++ b/Documentation/DSP/html/arm__mat__cmplx__mult__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_cmplx_mult_q15.c File Reference +CMSIS-DSP: arm_mat_cmplx_mult_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
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      + +
    +
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    +Functions
    +
    +
    arm_mat_cmplx_mult_q15.c File Reference
    +
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    + + + + + +

    +Functions

    arm_status arm_mat_cmplx_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pScratch)
     Q15 Complex matrix multiplication.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__cmplx__mult__q31_8c.html b/Documentation/DSP/html/arm__mat__cmplx__mult__q31_8c.html new file mode 100644 index 0000000..835f999 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__cmplx__mult__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_cmplx_mult_q31.c File Reference +CMSIS-DSP: arm_mat_cmplx_mult_q31.c File Reference + + + + + + + + + + + + + + + +
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    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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      + +
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    +Functions
    +
    +
    arm_mat_cmplx_mult_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_cmplx_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 Complex matrix multiplication.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__init__f32_8c.html b/Documentation/DSP/html/arm__mat__init__f32_8c.html new file mode 100644 index 0000000..ed976d1 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_init_f32.c File Reference +CMSIS-DSP: arm_mat_init_f32.c File Reference + + + + + + + + + + + + + + + +
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    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +Functions
    +
    +
    arm_mat_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
     Floating-point matrix initialization.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__init__q15_8c.html b/Documentation/DSP/html/arm__mat__init__q15_8c.html new file mode 100644 index 0000000..b33e8b7 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_init_q15.c File Reference +CMSIS-DSP: arm_mat_init_q15.c File Reference + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +Functions
    +
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    arm_mat_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
     Q15 matrix initialization.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__init__q31_8c.html b/Documentation/DSP/html/arm__mat__init__q31_8c.html new file mode 100644 index 0000000..304ffac --- /dev/null +++ b/Documentation/DSP/html/arm__mat__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_init_q31.c File Reference +CMSIS-DSP: arm_mat_init_q31.c File Reference + + + + + + + + + + + + + + + +
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    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +Functions
    +
    +
    arm_mat_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
     Q31 matrix initialization.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mat__inverse__f32_8c.html b/Documentation/DSP/html/arm__mat__inverse__f32_8c.html new file mode 100644 index 0000000..0c6153f --- /dev/null +++ b/Documentation/DSP/html/arm__mat__inverse__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_inverse_f32.c File Reference +CMSIS-DSP: arm_mat_inverse_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
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      + +
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    + + + +
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    +Functions
    +
    +
    arm_mat_inverse_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
     Floating-point matrix inverse.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__inverse__f64_8c.html b/Documentation/DSP/html/arm__mat__inverse__f64_8c.html new file mode 100644 index 0000000..9881096 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__inverse__f64_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_inverse_f64.c File Reference +CMSIS-DSP: arm_mat_inverse_f64.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
    +
      + +
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    + + + +
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    +Functions
    +
    +
    arm_mat_inverse_f64.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_inverse_f64 (const arm_matrix_instance_f64 *pSrc, arm_matrix_instance_f64 *pDst)
     Floating-point matrix inverse.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mat__mult__f32_8c.html b/Documentation/DSP/html/arm__mat__mult__f32_8c.html new file mode 100644 index 0000000..deaef64 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__mult__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_mult_f32.c File Reference +CMSIS-DSP: arm_mat_mult_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
    +
      + +
    +
    + + + +
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    + +
    +
    +Functions
    +
    +
    arm_mat_mult_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix multiplication.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__mult__fast__q15_8c.html b/Documentation/DSP/html/arm__mat__mult__fast__q15_8c.html new file mode 100644 index 0000000..7104796 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__mult__fast__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_mult_fast_q15.c File Reference +CMSIS-DSP: arm_mat_mult_fast_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
    +
      + +
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    + + + +
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    +Functions
    +
    +
    arm_mat_mult_fast_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
     Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__mult__fast__q31_8c.html b/Documentation/DSP/html/arm__mat__mult__fast__q31_8c.html new file mode 100644 index 0000000..5472dab --- /dev/null +++ b/Documentation/DSP/html/arm__mat__mult__fast__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_mult_fast_q31.c File Reference +CMSIS-DSP: arm_mat_mult_fast_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
    +
      + +
    +
    + + + +
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    + +
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    +Functions
    +
    +
    arm_mat_mult_fast_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__mult__q15_8c.html b/Documentation/DSP/html/arm__mat__mult__q15_8c.html new file mode 100644 index 0000000..0111f74 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__mult__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_mult_q15.c File Reference +CMSIS-DSP: arm_mat_mult_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
    +
      + +
    +
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    + +
    +
    +Functions
    +
    +
    arm_mat_mult_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState CMSIS_UNUSED)
     Q15 matrix multiplication.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__mult__q31_8c.html b/Documentation/DSP/html/arm__mat__mult__q31_8c.html new file mode 100644 index 0000000..2ff768d --- /dev/null +++ b/Documentation/DSP/html/arm__mat__mult__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_mult_q31.c File Reference +CMSIS-DSP: arm_mat_mult_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mat_mult_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mat__scale__f32_8c.html b/Documentation/DSP/html/arm__mat__scale__f32_8c.html new file mode 100644 index 0000000..f5df83e --- /dev/null +++ b/Documentation/DSP/html/arm__mat__scale__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_scale_f32.c File Reference +CMSIS-DSP: arm_mat_scale_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
    +
      + +
    +
    + + + +
    +
    + +
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    + +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_mat_scale_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
     Floating-point matrix scaling.
     
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    arm_mat_scale_q15.c File Reference
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    arm_status arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
     Q15 matrix scaling.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__scale__q31_8c.html b/Documentation/DSP/html/arm__mat__scale__q31_8c.html new file mode 100644 index 0000000..8054d7b --- /dev/null +++ b/Documentation/DSP/html/arm__mat__scale__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_scale_q31.c File Reference +CMSIS-DSP: arm_mat_scale_q31.c File Reference + + + + + + + + + + + + + + + +
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    arm_mat_scale_q31.c File Reference
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    arm_status arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
     Q31 matrix scaling.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__sub__f32_8c.html b/Documentation/DSP/html/arm__mat__sub__f32_8c.html new file mode 100644 index 0000000..2a2d1fb --- /dev/null +++ b/Documentation/DSP/html/arm__mat__sub__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_sub_f32.c File Reference +CMSIS-DSP: arm_mat_sub_f32.c File Reference + + + + + + + + + + + + + + + +
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    arm_mat_sub_f32.c File Reference
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    arm_status arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix subtraction.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__sub__q15_8c.html b/Documentation/DSP/html/arm__mat__sub__q15_8c.html new file mode 100644 index 0000000..cbc8da9 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__sub__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_sub_q15.c File Reference +CMSIS-DSP: arm_mat_sub_q15.c File Reference + + + + + + + + + + + + + + + +
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    arm_mat_sub_q15.c File Reference
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    arm_status arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
     Q15 matrix subtraction.
     
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    arm_mat_sub_q31.c File Reference
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    arm_status arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix subtraction.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__trans__f32_8c.html b/Documentation/DSP/html/arm__mat__trans__f32_8c.html new file mode 100644 index 0000000..4a01253 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__trans__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_trans_f32.c File Reference +CMSIS-DSP: arm_mat_trans_f32.c File Reference + + + + + + + + + + + + + + + +
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    arm_mat_trans_f32.c File Reference
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    arm_status arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
     Floating-point matrix transpose.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__trans__q15_8c.html b/Documentation/DSP/html/arm__mat__trans__q15_8c.html new file mode 100644 index 0000000..0f4beb6 --- /dev/null +++ b/Documentation/DSP/html/arm__mat__trans__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_trans_q15.c File Reference +CMSIS-DSP: arm_mat_trans_q15.c File Reference + + + + + + + + + + + + + + + +
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    arm_mat_trans_q15.c File Reference
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    arm_status arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
     Q15 matrix transpose.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__mat__trans__q31_8c.html b/Documentation/DSP/html/arm__mat__trans__q31_8c.html new file mode 100644 index 0000000..7b54d2d --- /dev/null +++ b/Documentation/DSP/html/arm__mat__trans__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mat_trans_q31.c File Reference +CMSIS-DSP: arm_mat_trans_q31.c File Reference + + + + + + + + + + + + + + + +
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    arm_mat_trans_q31.c File Reference
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    arm_status arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
     Q31 matrix transpose.
     
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    + + + + diff --git a/Documentation/DSP/html/arm__math_8h.html b/Documentation/DSP/html/arm__math_8h.html new file mode 100644 index 0000000..6b53172 --- /dev/null +++ b/Documentation/DSP/html/arm__math_8h.html @@ -0,0 +1,2630 @@ + + + + + +arm_math.h File Reference +CMSIS-DSP: arm_math.h File Reference + + + + + + + + + + + + + + + +
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    +Data Structures | +Macros | +Typedefs | +Enumerations | +Functions
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    arm_math.h File Reference
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    +Data Structures

    struct  arm_fir_instance_q7
     Instance structure for the Q7 FIR filter. More...
     
    struct  arm_fir_instance_q15
     Instance structure for the Q15 FIR filter. More...
     
    struct  arm_fir_instance_q31
     Instance structure for the Q31 FIR filter. More...
     
    struct  arm_fir_instance_f32
     Instance structure for the floating-point FIR filter. More...
     
    struct  arm_biquad_casd_df1_inst_q15
     Instance structure for the Q15 Biquad cascade filter. More...
     
    struct  arm_biquad_casd_df1_inst_q31
     Instance structure for the Q31 Biquad cascade filter. More...
     
    struct  arm_biquad_casd_df1_inst_f32
     Instance structure for the floating-point Biquad cascade filter. More...
     
    struct  arm_matrix_instance_f32
     Instance structure for the floating-point matrix structure. More...
     
    struct  arm_matrix_instance_f64
     Instance structure for the floating-point matrix structure. More...
     
    struct  arm_matrix_instance_q15
     Instance structure for the Q15 matrix structure. More...
     
    struct  arm_matrix_instance_q31
     Instance structure for the Q31 matrix structure. More...
     
    struct  arm_pid_instance_q15
     Instance structure for the Q15 PID Control. More...
     
    struct  arm_pid_instance_q31
     Instance structure for the Q31 PID Control. More...
     
    struct  arm_pid_instance_f32
     Instance structure for the floating-point PID Control. More...
     
    struct  arm_linear_interp_instance_f32
     Instance structure for the floating-point Linear Interpolate function. More...
     
    struct  arm_bilinear_interp_instance_f32
     Instance structure for the floating-point bilinear interpolation function. More...
     
    struct  arm_bilinear_interp_instance_q31
     Instance structure for the Q31 bilinear interpolation function. More...
     
    struct  arm_bilinear_interp_instance_q15
     Instance structure for the Q15 bilinear interpolation function. More...
     
    struct  arm_bilinear_interp_instance_q7
     Instance structure for the Q15 bilinear interpolation function. More...
     
    struct  arm_cfft_radix2_instance_q15
     Instance structure for the Q15 CFFT/CIFFT function. More...
     
    struct  arm_cfft_radix4_instance_q15
     Instance structure for the Q15 CFFT/CIFFT function. More...
     
    struct  arm_cfft_radix2_instance_q31
     Instance structure for the Radix-2 Q31 CFFT/CIFFT function. More...
     
    struct  arm_cfft_radix4_instance_q31
     Instance structure for the Q31 CFFT/CIFFT function. More...
     
    struct  arm_cfft_radix2_instance_f32
     Instance structure for the floating-point CFFT/CIFFT function. More...
     
    struct  arm_cfft_radix4_instance_f32
     Instance structure for the floating-point CFFT/CIFFT function. More...
     
    struct  arm_cfft_instance_q15
     Instance structure for the fixed-point CFFT/CIFFT function. More...
     
    struct  arm_cfft_instance_q31
     Instance structure for the fixed-point CFFT/CIFFT function. More...
     
    struct  arm_cfft_instance_f32
     Instance structure for the floating-point CFFT/CIFFT function. More...
     
    struct  arm_rfft_instance_q15
     Instance structure for the Q15 RFFT/RIFFT function. More...
     
    struct  arm_rfft_instance_q31
     Instance structure for the Q31 RFFT/RIFFT function. More...
     
    struct  arm_rfft_instance_f32
     Instance structure for the floating-point RFFT/RIFFT function. More...
     
    struct  arm_rfft_fast_instance_f32
     Instance structure for the floating-point RFFT/RIFFT function. More...
     
    struct  arm_dct4_instance_f32
     Instance structure for the floating-point DCT4/IDCT4 function. More...
     
    struct  arm_dct4_instance_q31
     Instance structure for the Q31 DCT4/IDCT4 function. More...
     
    struct  arm_dct4_instance_q15
     Instance structure for the Q15 DCT4/IDCT4 function. More...
     
    struct  arm_fir_decimate_instance_q15
     Instance structure for the Q15 FIR decimator. More...
     
    struct  arm_fir_decimate_instance_q31
     Instance structure for the Q31 FIR decimator. More...
     
    struct  arm_fir_decimate_instance_f32
     Instance structure for the floating-point FIR decimator. More...
     
    struct  arm_fir_interpolate_instance_q15
     Instance structure for the Q15 FIR interpolator. More...
     
    struct  arm_fir_interpolate_instance_q31
     Instance structure for the Q31 FIR interpolator. More...
     
    struct  arm_fir_interpolate_instance_f32
     Instance structure for the floating-point FIR interpolator. More...
     
    struct  arm_biquad_cas_df1_32x64_ins_q31
     Instance structure for the high precision Q31 Biquad cascade filter. More...
     
    struct  arm_biquad_cascade_df2T_instance_f32
     Instance structure for the floating-point transposed direct form II Biquad cascade filter. More...
     
    struct  arm_biquad_cascade_stereo_df2T_instance_f32
     Instance structure for the floating-point transposed direct form II Biquad cascade filter. More...
     
    struct  arm_biquad_cascade_df2T_instance_f64
     Instance structure for the floating-point transposed direct form II Biquad cascade filter. More...
     
    struct  arm_fir_lattice_instance_q15
     Instance structure for the Q15 FIR lattice filter. More...
     
    struct  arm_fir_lattice_instance_q31
     Instance structure for the Q31 FIR lattice filter. More...
     
    struct  arm_fir_lattice_instance_f32
     Instance structure for the floating-point FIR lattice filter. More...
     
    struct  arm_iir_lattice_instance_q15
     Instance structure for the Q15 IIR lattice filter. More...
     
    struct  arm_iir_lattice_instance_q31
     Instance structure for the Q31 IIR lattice filter. More...
     
    struct  arm_iir_lattice_instance_f32
     Instance structure for the floating-point IIR lattice filter. More...
     
    struct  arm_lms_instance_f32
     Instance structure for the floating-point LMS filter. More...
     
    struct  arm_lms_instance_q15
     Instance structure for the Q15 LMS filter. More...
     
    struct  arm_lms_instance_q31
     Instance structure for the Q31 LMS filter. More...
     
    struct  arm_lms_norm_instance_f32
     Instance structure for the floating-point normalized LMS filter. More...
     
    struct  arm_lms_norm_instance_q31
     Instance structure for the Q31 normalized LMS filter. More...
     
    struct  arm_lms_norm_instance_q15
     Instance structure for the Q15 normalized LMS filter. More...
     
    struct  arm_fir_sparse_instance_f32
     Instance structure for the floating-point sparse FIR filter. More...
     
    struct  arm_fir_sparse_instance_q31
     Instance structure for the Q31 sparse FIR filter. More...
     
    struct  arm_fir_sparse_instance_q15
     Instance structure for the Q15 sparse FIR filter. More...
     
    struct  arm_fir_sparse_instance_q7
     Instance structure for the Q7 sparse FIR filter. More...
     
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    +Macros

    #define __CMSIS_GENERIC
     
    #define DELTA_Q31
     Macros required for reciprocal calculation in Normalized LMS.
     
    #define DELTA_Q15
     
    #define INDEX_MASK
     
    #define PI
     
    #define FAST_MATH_TABLE_SIZE
     Macros required for SINE and COSINE Fast math approximations.
     
    #define FAST_MATH_Q31_SHIFT
     
    #define FAST_MATH_Q15_SHIFT
     
    #define CONTROLLER_Q31_SHIFT
     
    #define TABLE_SIZE
     
    #define TABLE_SPACING_Q31
     
    #define TABLE_SPACING_Q15
     
    #define INPUT_SPACING
     Macros required for SINE and COSINE Controller functions.
     
    #define ALIGN4
     Macro for Unaligned Support.
     
    #define __SIMD32(addr)
     definition to read/write two 16 bit values.
     
    #define __SIMD32_CONST(addr)
     
    #define _SIMD32_OFFSET(addr)
     
    #define __SIMD64(addr)
     
    #define __PACKq7(v0, v1, v2, v3)
     definition to pack four 8 bit values.
     
    #define multAcc_32x32_keep32_R(a, x, y)
     
    #define multSub_32x32_keep32_R(a, x, y)
     
    #define mult_32x32_keep32_R(a, x, y)
     
    #define multAcc_32x32_keep32(a, x, y)
     
    #define multSub_32x32_keep32(a, x, y)
     
    #define mult_32x32_keep32(a, x, y)
     
    + + + + + + + + + + + + + + + + + + + +

    +Typedefs

    typedef int8_t q7_t
     8-bit fractional data type in 1.7 format.
     
    typedef int16_t q15_t
     16-bit fractional data type in 1.15 format.
     
    typedef int32_t q31_t
     32-bit fractional data type in 1.31 format.
     
    typedef int64_t q63_t
     64-bit fractional data type in 1.63 format.
     
    typedef float float32_t
     32-bit floating-point type definition.
     
    typedef double float64_t
     64-bit floating-point type definition.
     
    + + + + +

    +Enumerations

    enum  arm_status
     Error status returned by some functions in the library. More...
     
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    +Functions

    static __INLINE q31_t clip_q63_to_q31 (q63_t x)
     Clips Q63 to Q31 values.
     
    static __INLINE q15_t clip_q63_to_q15 (q63_t x)
     Clips Q63 to Q15 values.
     
    static __INLINE q7_t clip_q31_to_q7 (q31_t x)
     Clips Q31 to Q7 values.
     
    static __INLINE q15_t clip_q31_to_q15 (q31_t x)
     Clips Q31 to Q15 values.
     
    static __INLINE q63_t mult32x64 (q63_t x, q31_t y)
     Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
     
    static __INLINE uint32_t arm_recip_q31 (q31_t in, q31_t *dst, q31_t *pRecipTable)
     Function to Calculates 1/in (reciprocal) value of Q31 Data type.
     
    static __INLINE uint32_t arm_recip_q15 (q15_t in, q15_t *dst, q15_t *pRecipTable)
     Function to Calculates 1/in (reciprocal) value of Q15 Data type.
     
    void arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Processing function for the Q7 FIR filter.
     
    void arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
     Initialization function for the Q7 FIR filter.
     
    void arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR filter.
     
    void arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
     
    arm_status arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR filter.
     
    void arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR filter.
     
    void arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
     
    void arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR filter.
     
    void arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR filter.
     
    void arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR filter.
     
    void arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 Biquad cascade filter.
     
    void arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
     Initialization function for the Q15 Biquad cascade filter.
     
    void arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
     
    void arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 Biquad cascade filter.
     
    void arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
     
    void arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
     Initialization function for the Q31 Biquad cascade filter.
     
    void arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point Biquad cascade filter.
     
    void arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point Biquad cascade filter.
     
    arm_status arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix addition.
     
    arm_status arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
     Q15 matrix addition.
     
    arm_status arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix addition.
     
    arm_status arm_mat_cmplx_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point, complex, matrix multiplication.
     
    arm_status arm_mat_cmplx_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pScratch)
     Q15, complex, matrix multiplication.
     
    arm_status arm_mat_cmplx_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31, complex, matrix multiplication.
     
    arm_status arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
     Floating-point matrix transpose.
     
    arm_status arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
     Q15 matrix transpose.
     
    arm_status arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
     Q31 matrix transpose.
     
    arm_status arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix multiplication.
     
    arm_status arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
     Q15 matrix multiplication.
     
    arm_status arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
     Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix multiplication.
     
    arm_status arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix subtraction.
     
    arm_status arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
     Q15 matrix subtraction.
     
    arm_status arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix subtraction.
     
    arm_status arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
     Floating-point matrix scaling.
     
    arm_status arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
     Q15 matrix scaling.
     
    arm_status arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
     Q31 matrix scaling.
     
    void arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
     Q31 matrix initialization.
     
    void arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
     Q15 matrix initialization.
     
    void arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
     Floating-point matrix initialization.
     
    void arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
     Initialization function for the floating-point PID Control.
     
    void arm_pid_reset_f32 (arm_pid_instance_f32 *S)
     Reset function for the floating-point PID Control.
     
    void arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
     Initialization function for the Q31 PID Control.
     
    void arm_pid_reset_q31 (arm_pid_instance_q31 *S)
     Reset function for the Q31 PID Control.
     
    void arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
     Initialization function for the Q15 PID Control.
     
    void arm_pid_reset_q15 (arm_pid_instance_q15 *S)
     Reset function for the Q15 PID Control.
     
    void arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector multiplication.
     
    void arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector multiplication.
     
    void arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector multiplication.
     
    void arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector multiplication.
     
    arm_status arm_cfft_radix2_init_q15 (arm_cfft_radix2_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q15 CFFT/CIFFT.
     
    void arm_cfft_radix2_q15 (const arm_cfft_radix2_instance_q15 *S, q15_t *pSrc)
     Processing function for the fixed-point CFFT/CIFFT.
     
    arm_status arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q15 CFFT/CIFFT.
     
    void arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
     Processing function for the Q15 CFFT/CIFFT.
     
    arm_status arm_cfft_radix2_init_q31 (arm_cfft_radix2_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q31 CFFT/CIFFT.
     
    void arm_cfft_radix2_q31 (const arm_cfft_radix2_instance_q31 *S, q31_t *pSrc)
     Processing function for the fixed-point CFFT/CIFFT.
     
    void arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
     Processing function for the Q31 CFFT/CIFFT.
     
    arm_status arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q31 CFFT/CIFFT.
     
    arm_status arm_cfft_radix2_init_f32 (arm_cfft_radix2_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the floating-point CFFT/CIFFT.
     
    void arm_cfft_radix2_f32 (const arm_cfft_radix2_instance_f32 *S, float32_t *pSrc)
     Radix-2 CFFT/CIFFT.
     
    arm_status arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the floating-point CFFT/CIFFT.
     
    void arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
     Processing function for the floating-point Radix-4 CFFT/CIFFT.
     
    void arm_cfft_q15 (const arm_cfft_instance_q15 *S, q15_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the Q15 complex FFT.
     
    void arm_cfft_q31 (const arm_cfft_instance_q31 *S, q31_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the fixed-point complex FFT in Q31 format.
     
    void arm_cfft_f32 (const arm_cfft_instance_f32 *S, float32_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the floating-point complex FFT.
     
    arm_status arm_rfft_init_q15 (arm_rfft_instance_q15 *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the Q15 RFFT/RIFFT.
     
    void arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)
     Processing function for the Q15 RFFT/RIFFT.
     
    arm_status arm_rfft_init_q31 (arm_rfft_instance_q31 *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the Q31 RFFT/RIFFT.
     
    void arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
     Processing function for the Q31 RFFT/RIFFT.
     
    arm_status arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the floating-point RFFT/RIFFT.
     
    void arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
     Processing function for the floating-point RFFT/RIFFT.
     
    arm_status arm_rfft_fast_init_f32 (arm_rfft_fast_instance_f32 *S, uint16_t fftLen)
     Initialization function for the floating-point real FFT.
     
    void arm_rfft_fast_f32 (arm_rfft_fast_instance_f32 *S, float32_t *p, float32_t *pOut, uint8_t ifftFlag)
     Processing function for the floating-point real FFT.
     
    arm_status arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
     Initialization function for the floating-point DCT4/IDCT4.
     
    void arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
     Processing function for the floating-point DCT4/IDCT4.
     
    arm_status arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
     Initialization function for the Q31 DCT4/IDCT4.
     
    void arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
     Processing function for the Q31 DCT4/IDCT4.
     
    arm_status arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
     Initialization function for the Q15 DCT4/IDCT4.
     
    void arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
     Processing function for the Q15 DCT4/IDCT4.
     
    void arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector addition.
     
    void arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector addition.
     
    void arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector addition.
     
    void arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector addition.
     
    void arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector subtraction.
     
    void arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector subtraction.
     
    void arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector subtraction.
     
    void arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector subtraction.
     
    void arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
     Multiplies a floating-point vector by a scalar.
     
    void arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
     Multiplies a Q7 vector by a scalar.
     
    void arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
     Multiplies a Q15 vector by a scalar.
     
    void arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
     Multiplies a Q31 vector by a scalar.
     
    void arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Q7 vector absolute value.
     
    void arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Floating-point vector absolute value.
     
    void arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Q15 vector absolute value.
     
    void arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Q31 vector absolute value.
     
    void arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
     Dot product of floating-point vectors.
     
    void arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
     Dot product of Q7 vectors.
     
    void arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
     Dot product of Q15 vectors.
     
    void arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
     Dot product of Q31 vectors.
     
    void arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q7 vector a specified number of bits.
     
    void arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q15 vector a specified number of bits.
     
    void arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q31 vector a specified number of bits.
     
    void arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
     Adds a constant offset to a floating-point vector.
     
    void arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q7 vector.
     
    void arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q15 vector.
     
    void arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q31 vector.
     
    void arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Negates the elements of a floating-point vector.
     
    void arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Negates the elements of a Q7 vector.
     
    void arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Negates the elements of a Q15 vector.
     
    void arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Negates the elements of a Q31 vector.
     
    void arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Copies the elements of a floating-point vector.
     
    void arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Copies the elements of a Q7 vector.
     
    void arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Copies the elements of a Q15 vector.
     
    void arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Copies the elements of a Q31 vector.
     
    void arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
     Fills a constant value into a floating-point vector.
     
    void arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q7 vector.
     
    void arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q15 vector.
     
    void arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q31 vector.
     
    void arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
     Convolution of floating-point sequences.
     
    void arm_conv_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q15 sequences.
     
    void arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Convolution of Q15 sequences.
     
    void arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_conv_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Convolution of Q31 sequences.
     
    void arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_conv_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q7 sequences.
     
    void arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
     Convolution of Q7 sequences.
     
    arm_status arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of floating-point sequences.
     
    arm_status arm_conv_partial_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q15 sequences.
     
    arm_status arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q15 sequences.
     
    arm_status arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_conv_partial_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q31 sequences.
     
    arm_status arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_conv_partial_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q7 sequences.
     
    arm_status arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q7 sequences.
     
    void arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR decimator.
     
    arm_status arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR decimator.
     
    void arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR decimator.
     
    void arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR decimator.
     
    void arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR decimator.
     
    void arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR decimator.
     
    void arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR interpolator.
     
    arm_status arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR interpolator.
     
    void arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR interpolator.
     
    arm_status arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR interpolator.
     
    void arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR interpolator.
     
    arm_status arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR interpolator.
     
    void arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     
    void arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
     
    void arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_biquad_cascade_stereo_df2T_f32 (const arm_biquad_cascade_stereo_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels.
     
    void arm_biquad_cascade_df2T_f64 (const arm_biquad_cascade_df2T_instance_f64 *S, float64_t *pSrc, float64_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_biquad_cascade_stereo_df2T_init_f32 (arm_biquad_cascade_stereo_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_biquad_cascade_df2T_init_f64 (arm_biquad_cascade_df2T_instance_f64 *S, uint8_t numStages, float64_t *pCoeffs, float64_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
     Initialization function for the Q15 FIR lattice filter.
     
    void arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR lattice filter.
     
    void arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
     Initialization function for the Q31 FIR lattice filter.
     
    void arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR lattice filter.
     
    void arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point FIR lattice filter.
     
    void arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR lattice filter.
     
    void arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point IIR lattice filter.
     
    void arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point IIR lattice filter.
     
    void arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 IIR lattice filter.
     
    void arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 IIR lattice filter.
     
    void arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 IIR lattice filter.
     
    void arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 IIR lattice filter.
     
    void arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
     Processing function for floating-point LMS filter.
     
    void arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
     Initialization function for floating-point LMS filter.
     
    void arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
     Initialization function for the Q15 LMS filter.
     
    void arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
     Processing function for Q15 LMS filter.
     
    void arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
     Processing function for Q31 LMS filter.
     
    void arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
     Initialization function for Q31 LMS filter.
     
    void arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
     Processing function for floating-point normalized LMS filter.
     
    void arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
     Initialization function for floating-point normalized LMS filter.
     
    void arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
     Processing function for Q31 normalized LMS filter.
     
    void arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
     Initialization function for Q31 normalized LMS filter.
     
    void arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
     Processing function for Q15 normalized LMS filter.
     
    void arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
     Initialization function for Q15 normalized LMS filter.
     
    void arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
     Correlation of floating-point sequences.
     
    void arm_correlate_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch)
     Correlation of Q15 sequences.
     
    void arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Correlation of Q15 sequences.
     
    void arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_correlate_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch)
     Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Correlation of Q31 sequences.
     
    void arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_correlate_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Correlation of Q7 sequences.
     
    void arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
     Correlation of Q7 sequences.
     
    void arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
     Processing function for the floating-point sparse FIR filter.
     
    void arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the floating-point sparse FIR filter.
     
    void arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
     Processing function for the Q31 sparse FIR filter.
     
    void arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q31 sparse FIR filter.
     
    void arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
     Processing function for the Q15 sparse FIR filter.
     
    void arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q15 sparse FIR filter.
     
    void arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
     Processing function for the Q7 sparse FIR filter.
     
    void arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q7 sparse FIR filter.
     
    void arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCosVal)
     Floating-point sin_cos function.
     
    void arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)
     Q31 sin_cos function.
     
    void arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex conjugate.
     
    void arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex conjugate.
     
    void arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex conjugate.
     
    void arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex magnitude squared.
     
    void arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex magnitude squared.
     
    void arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex magnitude squared.
     
    static __INLINE float32_t arm_pid_f32 (arm_pid_instance_f32 *S, float32_t in)
     Process function for the floating-point PID Control.
     
    static __INLINE q31_t arm_pid_q31 (arm_pid_instance_q31 *S, q31_t in)
     Process function for the Q31 PID Control.
     
    static __INLINE q15_t arm_pid_q15 (arm_pid_instance_q15 *S, q15_t in)
     Process function for the Q15 PID Control.
     
    arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 *src, arm_matrix_instance_f32 *dst)
     Floating-point matrix inverse.
     
    arm_status arm_mat_inverse_f64 (const arm_matrix_instance_f64 *src, arm_matrix_instance_f64 *dst)
     Floating-point matrix inverse.
     
    static __INLINE void arm_clarke_f32 (float32_t Ia, float32_t Ib, float32_t *pIalpha, float32_t *pIbeta)
     Floating-point Clarke transform.
     
    static __INLINE void arm_clarke_q31 (q31_t Ia, q31_t Ib, q31_t *pIalpha, q31_t *pIbeta)
     Clarke transform for Q31 version.
     
    void arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to Q31 vector.
     
    static __INLINE void arm_inv_clarke_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pIa, float32_t *pIb)
     Floating-point Inverse Clarke transform.
     
    static __INLINE void arm_inv_clarke_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pIa, q31_t *pIb)
     Inverse Clarke transform for Q31 version.
     
    void arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to Q15 vector.
     
    static __INLINE void arm_park_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pId, float32_t *pIq, float32_t sinVal, float32_t cosVal)
     Floating-point Park transform.
     
    static __INLINE void arm_park_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pId, q31_t *pIq, q31_t sinVal, q31_t cosVal)
     Park transform for Q31 version.
     
    void arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to floating-point vector.
     
    static __INLINE void arm_inv_park_f32 (float32_t Id, float32_t Iq, float32_t *pIalpha, float32_t *pIbeta, float32_t sinVal, float32_t cosVal)
     Floating-point Inverse Park transform.
     
    static __INLINE void arm_inv_park_q31 (q31_t Id, q31_t Iq, q31_t *pIalpha, q31_t *pIbeta, q31_t sinVal, q31_t cosVal)
     Inverse Park transform for Q31 version.
     
    void arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to floating-point vector.
     
    static __INLINE float32_t arm_linear_interp_f32 (arm_linear_interp_instance_f32 *S, float32_t x)
     Process function for the floating-point Linear Interpolation Function.
     
    static __INLINE q31_t arm_linear_interp_q31 (q31_t *pYData, q31_t x, uint32_t nValues)
     Process function for the Q31 Linear Interpolation Function.
     
    static __INLINE q15_t arm_linear_interp_q15 (q15_t *pYData, q31_t x, uint32_t nValues)
     Process function for the Q15 Linear Interpolation Function.
     
    static __INLINE q7_t arm_linear_interp_q7 (q7_t *pYData, q31_t x, uint32_t nValues)
     Process function for the Q7 Linear Interpolation Function.
     
    float32_t arm_sin_f32 (float32_t x)
     Fast approximation to the trigonometric sine function for floating-point data.
     
    q31_t arm_sin_q31 (q31_t x)
     Fast approximation to the trigonometric sine function for Q31 data.
     
    q15_t arm_sin_q15 (q15_t x)
     Fast approximation to the trigonometric sine function for Q15 data.
     
    float32_t arm_cos_f32 (float32_t x)
     Fast approximation to the trigonometric cosine function for floating-point data.
     
    q31_t arm_cos_q31 (q31_t x)
     Fast approximation to the trigonometric cosine function for Q31 data.
     
    q15_t arm_cos_q15 (q15_t x)
     Fast approximation to the trigonometric cosine function for Q15 data.
     
    static __INLINE arm_status arm_sqrt_f32 (float32_t in, float32_t *pOut)
     Floating-point square root function.
     
    arm_status arm_sqrt_q31 (q31_t in, q31_t *pOut)
     Q31 square root function.
     
    arm_status arm_sqrt_q15 (q15_t in, q15_t *pOut)
     Q15 square root function.
     
    static __INLINE void arm_circularWrite_f32 (int32_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const int32_t *src, int32_t srcInc, uint32_t blockSize)
     floating-point Circular write function.
     
    static __INLINE void arm_circularRead_f32 (int32_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, int32_t *dst, int32_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t blockSize)
     floating-point Circular Read function.
     
    static __INLINE void arm_circularWrite_q15 (q15_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const q15_t *src, int32_t srcInc, uint32_t blockSize)
     Q15 Circular write function.
     
    static __INLINE void arm_circularRead_q15 (q15_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, q15_t *dst, q15_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t blockSize)
     Q15 Circular Read function.
     
    static __INLINE void arm_circularWrite_q7 (q7_t *circBuffer, int32_t L, uint16_t *writeOffset, int32_t bufferInc, const q7_t *src, int32_t srcInc, uint32_t blockSize)
     Q7 Circular write function.
     
    static __INLINE void arm_circularRead_q7 (q7_t *circBuffer, int32_t L, int32_t *readOffset, int32_t bufferInc, q7_t *dst, q7_t *dst_base, int32_t dst_length, int32_t dstInc, uint32_t blockSize)
     Q7 Circular Read function.
     
    void arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
     Sum of the squares of the elements of a Q31 vector.
     
    void arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Sum of the squares of the elements of a floating-point vector.
     
    void arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
     Sum of the squares of the elements of a Q15 vector.
     
    void arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Sum of the squares of the elements of a Q7 vector.
     
    void arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
     Mean value of a Q7 vector.
     
    void arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Mean value of a Q15 vector.
     
    void arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Mean value of a Q31 vector.
     
    void arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Mean value of a floating-point vector.
     
    void arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Variance of the elements of a floating-point vector.
     
    void arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Variance of the elements of a Q31 vector.
     
    void arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Variance of the elements of a Q15 vector.
     
    void arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Root Mean Square of the elements of a floating-point vector.
     
    void arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Root Mean Square of the elements of a Q31 vector.
     
    void arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Root Mean Square of the elements of a Q15 vector.
     
    void arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Standard deviation of the elements of a floating-point vector.
     
    void arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Standard deviation of the elements of a Q31 vector.
     
    void arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Standard deviation of the elements of a Q15 vector.
     
    void arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex magnitude.
     
    void arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex magnitude.
     
    void arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex magnitude.
     
    void arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
     Q15 complex dot product.
     
    void arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
     Q31 complex dot product.
     
    void arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
     Floating-point complex dot product.
     
    void arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
     Q15 complex-by-real multiplication.
     
    void arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
     Q31 complex-by-real multiplication.
     
    void arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
     Floating-point complex-by-real multiplication.
     
    void arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *result, uint32_t *index)
     Minimum value of a Q7 vector.
     
    void arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
     Minimum value of a Q15 vector.
     
    void arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
     Minimum value of a Q31 vector.
     
    void arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
     Minimum value of a floating-point vector.
     
    void arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
     Maximum value of a Q7 vector.
     
    void arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
     Maximum value of a Q15 vector.
     
    void arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
     Maximum value of a Q31 vector.
     
    void arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
     Maximum value of a floating-point vector.
     
    void arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
     Q15 complex-by-complex multiplication.
     
    void arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
     Q31 complex-by-complex multiplication.
     
    void arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
     Floating-point complex-by-complex multiplication.
     
    void arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q31 vector.
     
    void arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q15 vector.
     
    void arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q7 vector.
     
    void arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to Q15 vector.
     
    void arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to Q7 vector.
     
    void arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to floating-point vector.
     
    void arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to Q31 vector.
     
    void arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to Q7 vector.
     
    static __INLINE float32_t arm_bilinear_interp_f32 (const arm_bilinear_interp_instance_f32 *S, float32_t X, float32_t Y)
     Floating-point bilinear interpolation.
     
    static __INLINE q31_t arm_bilinear_interp_q31 (arm_bilinear_interp_instance_q31 *S, q31_t X, q31_t Y)
     Q31 bilinear interpolation.
     
    static __INLINE q15_t arm_bilinear_interp_q15 (arm_bilinear_interp_instance_q15 *S, q31_t X, q31_t Y)
     Q15 bilinear interpolation.
     
    static __INLINE q7_t arm_bilinear_interp_q7 (arm_bilinear_interp_instance_q7 *S, q31_t X, q31_t Y)
     Q7 bilinear interpolation.
     
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    Macro Definition Documentation

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    #define __CMSIS_GENERIC
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    #define __PACKq7( v0,
     v1,
     v2,
     v3 
    )
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    Referenced by arm_conv_opt_q7(), arm_conv_partial_opt_q7(), arm_fill_q7(), arm_fir_sparse_q7(), arm_mult_q7(), arm_offset_q7(), arm_q31_to_q7(), arm_scale_q7(), and arm_shift_q7().

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    #define __SIMD32( addr)
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    Referenced by arm_add_q15(), arm_add_q7(), arm_biquad_cascade_df1_fast_q15(), arm_biquad_cascade_df1_q15(), arm_cmplx_conj_q15(), arm_cmplx_mag_q15(), arm_cmplx_mag_squared_q15(), arm_cmplx_mult_real_q15(), arm_conv_fast_opt_q15(), arm_conv_fast_q15(), arm_conv_opt_q15(), arm_conv_opt_q7(), arm_conv_partial_fast_opt_q15(), arm_conv_partial_fast_q15(), arm_conv_partial_opt_q15(), arm_conv_partial_opt_q7(), arm_conv_partial_q15(), arm_conv_q15(), arm_copy_q15(), arm_copy_q7(), arm_correlate_fast_opt_q15(), arm_correlate_fast_q15(), arm_correlate_opt_q15(), arm_correlate_opt_q7(), arm_correlate_q15(), arm_dot_prod_q15(), arm_dot_prod_q7(), arm_fill_q15(), arm_fill_q7(), arm_fir_decimate_fast_q15(), arm_fir_decimate_q15(), arm_fir_fast_q15(), arm_fir_interpolate_q15(), arm_fir_lattice_q15(), arm_fir_q15(), arm_fir_sparse_q15(), arm_fir_sparse_q7(), arm_iir_lattice_q15(), arm_lms_norm_q15(), arm_lms_q15(), arm_mat_add_q15(), arm_mat_cmplx_mult_q15(), arm_mat_mult_fast_q15(), arm_mat_mult_q15(), arm_mat_sub_q15(), arm_mat_trans_q15(), arm_mean_q15(), arm_mean_q7(), arm_mult_q15(), arm_mult_q7(), arm_negate_q7(), arm_offset_q15(), arm_offset_q7(), arm_power_q15(), arm_power_q7(), arm_q15_to_q31(), arm_q15_to_q7(), arm_q31_to_q15(), arm_q31_to_q7(), arm_q7_to_q15(), arm_q7_to_q31(), arm_radix4_butterfly_inverse_q15(), arm_radix4_butterfly_q15(), arm_rms_q15(), arm_scale_q15(), arm_scale_q7(), arm_shift_q15(), arm_shift_q7(), arm_split_rfft_q15(), arm_split_rifft_q15(), arm_std_q15(), arm_sub_q15(), arm_sub_q7(), and arm_var_q15().

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    #define __SIMD32_CONST( addr)
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    Referenced by arm_abs_q15(), and arm_pid_q15().

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    #define __SIMD64( addr)
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    Referenced by arm_radix4_butterfly_inverse_q31(), and arm_radix4_butterfly_q31().

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    #define _SIMD32_OFFSET( addr)
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    Referenced by arm_cfft_radix4by2_inverse_q15(), arm_cfft_radix4by2_q15(), arm_conv_fast_opt_q15(), arm_conv_fast_q15(), arm_conv_opt_q15(), arm_conv_opt_q7(), arm_conv_partial_fast_opt_q15(), arm_conv_partial_fast_q15(), arm_conv_partial_opt_q15(), arm_conv_partial_opt_q7(), arm_conv_partial_q15(), arm_conv_q15(), arm_correlate_fast_opt_q15(), arm_correlate_fast_q15(), arm_correlate_opt_q15(), arm_correlate_opt_q7(), arm_correlate_q15(), arm_fir_fast_q15(), arm_fir_q15(), arm_mat_scale_q15(), arm_negate_q15(), arm_radix2_butterfly_inverse_q15(), arm_radix2_butterfly_q15(), arm_radix4_butterfly_inverse_q15(), and arm_radix4_butterfly_q15().

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    #define ALIGN4
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    #define CONTROLLER_Q31_SHIFT
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    Referenced by arm_sin_cos_q31().

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    #define DELTA_Q15
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    Referenced by arm_lms_norm_q15().

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    #define DELTA_Q31
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    Referenced by arm_lms_norm_q31().

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    #define FAST_MATH_Q15_SHIFT
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    Referenced by arm_cos_q15(), and arm_sin_q15().

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    #define FAST_MATH_Q31_SHIFT
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    Referenced by arm_cos_q31(), and arm_sin_q31().

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    #define FAST_MATH_TABLE_SIZE
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    Referenced by arm_cos_f32(), arm_sin_cos_f32(), and arm_sin_f32().

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    #define INDEX_MASK
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    Referenced by arm_recip_q15(), and arm_recip_q31().

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    #define INPUT_SPACING
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    #define mult_32x32_keep32( a,
     x,
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    )
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    #define mult_32x32_keep32_R( a,
     x,
     y 
    )
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    Referenced by arm_biquad_cascade_df1_fast_q31(), arm_cfft_radix4by2_inverse_q31(), arm_cfft_radix4by2_q31(), arm_radix2_butterfly_inverse_q31(), arm_radix2_butterfly_q31(), arm_split_rfft_q31(), and arm_split_rifft_q31().

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    #define multAcc_32x32_keep32( a,
     x,
     y 
    )
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    #define multAcc_32x32_keep32_R( a,
     x,
     y 
    )
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    end of BilinearInterpolate group

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    Referenced by arm_biquad_cascade_df1_fast_q31(), arm_cfft_radix4by2_inverse_q31(), arm_cfft_radix4by2_q31(), arm_fir_fast_q31(), arm_radix2_butterfly_inverse_q31(), arm_radix2_butterfly_q31(), arm_split_rfft_q31(), and arm_split_rifft_q31().

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    #define multSub_32x32_keep32( a,
     x,
     y 
    )
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    #define multSub_32x32_keep32_R( a,
     x,
     y 
    )
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    Referenced by arm_cfft_radix4by2_inverse_q31(), arm_cfft_radix4by2_q31(), arm_radix2_butterfly_inverse_q31(), arm_radix2_butterfly_q31(), arm_split_rfft_q31(), and arm_split_rifft_q31().

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    #define PI
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    #define TABLE_SIZE
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    #define TABLE_SPACING_Q31
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    Typedef Documentation

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    typedef float float32_t
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    typedef double float64_t
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    typedef int16_t q15_t
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    typedef int32_t q31_t
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    typedef int64_t q63_t
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    typedef int8_t q7_t
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    Enumeration Type Documentation

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    enum arm_status
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    Enumerator:
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    ARM_MATH_SUCCESS  +

    No error

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    ARM_MATH_ARGUMENT_ERROR  +

    One or more arguments are incorrect

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    ARM_MATH_LENGTH_ERROR  +

    Length of data buffer is incorrect

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    ARM_MATH_SIZE_MISMATCH  +

    Size of matrices is not compatible with the operation.

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    ARM_MATH_NANINF  +

    Not-a-number (NaN) or infinity is generated

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    ARM_MATH_SINGULAR  +

    Generated by matrix inversion if the input matrix is singular and cannot be inverted.

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    ARM_MATH_TEST_FAILURE  +

    Test Failed

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    Function Documentation

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    static __INLINE void arm_circularRead_f32 (int32_t * circBuffer,
    int32_t L,
    int32_t * readOffset,
    int32_t bufferInc,
    int32_t * dst,
    int32_t * dst_base,
    int32_t dst_length,
    int32_t dstInc,
    uint32_t blockSize 
    )
    +     		+static
    +
    + +

    References blockSize.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_circularRead_q15 (q15_t * circBuffer,
    int32_t L,
    int32_t * readOffset,
    int32_t bufferInc,
    q15_t * dst,
    q15_t * dst_base,
    int32_t dst_length,
    int32_t dstInc,
    uint32_t blockSize 
    )
    +     		+static
    +
    + +

    References blockSize.

    + +

    Referenced by arm_fir_sparse_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_circularRead_q7 (q7_t * circBuffer,
    int32_t L,
    int32_t * readOffset,
    int32_t bufferInc,
    q7_t * dst,
    q7_t * dst_base,
    int32_t dst_length,
    int32_t dstInc,
    uint32_t blockSize 
    )
    +     		+static
    +
    + +

    References blockSize.

    + +

    Referenced by arm_fir_sparse_q7().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_circularWrite_f32 (int32_t * circBuffer,
    int32_t L,
    uint16_t * writeOffset,
    int32_t bufferInc,
    const int32_t * src,
    int32_t srcInc,
    uint32_t blockSize 
    )
    +     		+static
    +
    +

    end of SQRT group

    + +

    References blockSize.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_circularWrite_q15 (q15_t * circBuffer,
    int32_t L,
    uint16_t * writeOffset,
    int32_t bufferInc,
    const q15_t * src,
    int32_t srcInc,
    uint32_t blockSize 
    )
    +     		+static
    +
    + +

    References blockSize.

    + +

    Referenced by arm_fir_sparse_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_circularWrite_q7 (q7_t * circBuffer,
    int32_t L,
    uint16_t * writeOffset,
    int32_t bufferInc,
    const q7_t * src,
    int32_t srcInc,
    uint32_t blockSize 
    )
    +     		+static
    +
    + +

    References blockSize.

    + +

    Referenced by arm_fir_sparse_q7().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_mult_q15 (const arm_matrix_instance_q15 * pSrcA,
    const arm_matrix_instance_q15 * pSrcB,
    arm_matrix_instance_q15 * pDst,
    q15_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in]pSrcApoints to the first input matrix structure
    [in]pSrcBpoints to the second input matrix structure
    [out]pDstpoints to output matrix structure
    [in]pStatepoints to the array for storing intermediate results
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE uint32_t arm_recip_q15 (q15_t in,
    q15_t * dst,
    q15_t * pRecipTable 
    )
    +     		+static
    +
    + +

    References INDEX_MASK.

    + +

    Referenced by arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE uint32_t arm_recip_q31 (q31_t in,
    q31_t * dst,
    q31_t * pRecipTable 
    )
    +     		+static
    +
    + +

    References clip_q63_to_q31(), and INDEX_MASK.

    + +

    Referenced by arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + +
    static __INLINE q15_t clip_q31_to_q15 (q31_t x)
    +     		+static
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + +
    static __INLINE q7_t clip_q31_to_q7 (q31_t x)
    +     		+static
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + +
    static __INLINE q15_t clip_q63_to_q15 (q63_t x)
    +     		+static
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + +
    static __INLINE q31_t clip_q63_to_q31 (q63_t x)
    +     		+static
    +
    + +

    Referenced by arm_add_q31(), arm_cmplx_mult_real_q31(), arm_float_to_q31(), arm_iir_lattice_q31(), arm_lms_norm_q31(), arm_lms_q31(), arm_mat_cmplx_mult_q31(), arm_mat_mult_q31(), arm_mult_q31(), arm_offset_q31(), arm_pid_init_q31(), arm_recip_q31(), arm_rms_q31(), arm_shift_q31(), arm_sin_cos_q31(), and arm_sub_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + +
    static __INLINE q63_t mult32x64 (q63_t x,
    q31_t y 
    )
    +     		+static
    +
    + +

    Referenced by arm_biquad_cas_df1_32x64_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..db9f22d --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,151 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_matrix_example for Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_matrix_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..6eb295e --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_matrix_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..f0f2eb0 --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_matrix_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..d07b96f --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_matrix_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..8416ad1 --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_matrix_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..2c8e531 --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_matrix_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2math__helper_8c.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2math__helper_8c.html new file mode 100644 index 0000000..d9b11bb --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2math__helper_8c.html @@ -0,0 +1,749 @@ + + + + + +math_helper.c File Reference +CMSIS-DSP: math_helper.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_matrix_example/ARM/math_helper.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_calc_2pow (uint32_t numShifts)
     Calculates pow(2, numShifts)
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +

    References arm_calc_2pow().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q7 (q7_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2math__helper_8h.html b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2math__helper_8h.html new file mode 100644 index 0000000..20938ee --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example_2_a_r_m_2math__helper_8h.html @@ -0,0 +1,697 @@ + + + + + +math_helper.h File Reference +CMSIS-DSP: math_helper.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_matrix_example/ARM/math_helper.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_calc_2pow (uint32_t guard_bits)
     Calculates pow(2, numShifts)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__matrix__example__f32_8c.html b/Documentation/DSP/html/arm__matrix__example__f32_8c.html new file mode 100644 index 0000000..599d47a --- /dev/null +++ b/Documentation/DSP/html/arm__matrix__example__f32_8c.html @@ -0,0 +1,315 @@ + + + + + +arm_matrix_example_f32.c File Reference +CMSIS-DSP: arm_matrix_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_matrix_example_f32.c File Reference
    +
    +
    + + + + +

    +Macros

    #define SNR_THRESHOLD
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + + + +

    +Variables

    const float32_t B_f32 [4]
     
    const float32_t A_f32 [16]
     
    float32_t AT_f32 [16]
     
    float32_t ATMA_f32 [16]
     
    float32_t ATMAI_f32 [16]
     
    float32_t X_f32 [4]
     
    const float32_t xRef_f32 [4]
     
    float32_t snr
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define SNR_THRESHOLD
    +
    + +

    Referenced by main().

    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References A_f32, arm_mat_init_f32(), arm_mat_inverse_f32(), arm_mat_mult_f32(), arm_mat_trans_f32(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_snr_f32(), AT_f32, ATMA_f32, ATMAI_f32, B_f32, snr, SNR_THRESHOLD, status, X_f32, and xRef_f32.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    const float32_t A_f32[16]
    +
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t AT_f32[16]
    +
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t ATMA_f32[16]
    +
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t ATMAI_f32[16]
    +
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const float32_t B_f32[4]
    +
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t snr
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t X_f32[4]
    +
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    const float32_t xRef_f32[4]
    +
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__max__f32_8c.html b/Documentation/DSP/html/arm__max__f32_8c.html new file mode 100644 index 0000000..824d8c5 --- /dev/null +++ b/Documentation/DSP/html/arm__max__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_max_f32.c File Reference +CMSIS-DSP: arm_max_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_max_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
     Maximum value of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__max__q15_8c.html b/Documentation/DSP/html/arm__max__q15_8c.html new file mode 100644 index 0000000..453ad6e --- /dev/null +++ b/Documentation/DSP/html/arm__max__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_max_q15.c File Reference +CMSIS-DSP: arm_max_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_max_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
     Maximum value of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__max__q31_8c.html b/Documentation/DSP/html/arm__max__q31_8c.html new file mode 100644 index 0000000..f68130a --- /dev/null +++ b/Documentation/DSP/html/arm__max__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_max_q31.c File Reference +CMSIS-DSP: arm_max_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_max_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
     Maximum value of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__max__q7_8c.html b/Documentation/DSP/html/arm__max__q7_8c.html new file mode 100644 index 0000000..3001704 --- /dev/null +++ b/Documentation/DSP/html/arm__max__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_max_q7.c File Reference +CMSIS-DSP: arm_max_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_max_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
     Maximum value of a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mean__f32_8c.html b/Documentation/DSP/html/arm__mean__f32_8c.html new file mode 100644 index 0000000..074156a --- /dev/null +++ b/Documentation/DSP/html/arm__mean__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mean_f32.c File Reference +CMSIS-DSP: arm_mean_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mean_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Mean value of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mean__q15_8c.html b/Documentation/DSP/html/arm__mean__q15_8c.html new file mode 100644 index 0000000..e328b6f --- /dev/null +++ b/Documentation/DSP/html/arm__mean__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mean_q15.c File Reference +CMSIS-DSP: arm_mean_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mean_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Mean value of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mean__q31_8c.html b/Documentation/DSP/html/arm__mean__q31_8c.html new file mode 100644 index 0000000..8a3d974 --- /dev/null +++ b/Documentation/DSP/html/arm__mean__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mean_q31.c File Reference +CMSIS-DSP: arm_mean_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mean_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Mean value of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mean__q7_8c.html b/Documentation/DSP/html/arm__mean__q7_8c.html new file mode 100644 index 0000000..63d1900 --- /dev/null +++ b/Documentation/DSP/html/arm__mean__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mean_q7.c File Reference +CMSIS-DSP: arm_mean_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mean_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
     Mean value of a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__min__f32_8c.html b/Documentation/DSP/html/arm__min__f32_8c.html new file mode 100644 index 0000000..25af532 --- /dev/null +++ b/Documentation/DSP/html/arm__min__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_min_f32.c File Reference +CMSIS-DSP: arm_min_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_min_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
     Minimum value of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__min__q15_8c.html b/Documentation/DSP/html/arm__min__q15_8c.html new file mode 100644 index 0000000..f7b1e3c --- /dev/null +++ b/Documentation/DSP/html/arm__min__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_min_q15.c File Reference +CMSIS-DSP: arm_min_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_min_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
     Minimum value of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__min__q31_8c.html b/Documentation/DSP/html/arm__min__q31_8c.html new file mode 100644 index 0000000..b489cca --- /dev/null +++ b/Documentation/DSP/html/arm__min__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_min_q31.c File Reference +CMSIS-DSP: arm_min_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_min_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
     Minimum value of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__min__q7_8c.html b/Documentation/DSP/html/arm__min__q7_8c.html new file mode 100644 index 0000000..334062e --- /dev/null +++ b/Documentation/DSP/html/arm__min__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_min_q7.c File Reference +CMSIS-DSP: arm_min_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_min_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
     Minimum value of a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mult__f32_8c.html b/Documentation/DSP/html/arm__mult__f32_8c.html new file mode 100644 index 0000000..ffe5f8d --- /dev/null +++ b/Documentation/DSP/html/arm__mult__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mult_f32.c File Reference +CMSIS-DSP: arm_mult_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mult_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mult__q15_8c.html b/Documentation/DSP/html/arm__mult__q15_8c.html new file mode 100644 index 0000000..714a4e9 --- /dev/null +++ b/Documentation/DSP/html/arm__mult__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mult_q15.c File Reference +CMSIS-DSP: arm_mult_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mult_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mult__q31_8c.html b/Documentation/DSP/html/arm__mult__q31_8c.html new file mode 100644 index 0000000..cfe953a --- /dev/null +++ b/Documentation/DSP/html/arm__mult__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mult_q31.c File Reference +CMSIS-DSP: arm_mult_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mult_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__mult__q7_8c.html b/Documentation/DSP/html/arm__mult__q7_8c.html new file mode 100644 index 0000000..488d072 --- /dev/null +++ b/Documentation/DSP/html/arm__mult__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_mult_q7.c File Reference +CMSIS-DSP: arm_mult_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_mult_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector multiplication.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__negate__f32_8c.html b/Documentation/DSP/html/arm__negate__f32_8c.html new file mode 100644 index 0000000..a7ff0b8 --- /dev/null +++ b/Documentation/DSP/html/arm__negate__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_negate_f32.c File Reference +CMSIS-DSP: arm_negate_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_negate_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Negates the elements of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__negate__q15_8c.html b/Documentation/DSP/html/arm__negate__q15_8c.html new file mode 100644 index 0000000..5edcb60 --- /dev/null +++ b/Documentation/DSP/html/arm__negate__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_negate_q15.c File Reference +CMSIS-DSP: arm_negate_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_negate_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Negates the elements of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__negate__q31_8c.html b/Documentation/DSP/html/arm__negate__q31_8c.html new file mode 100644 index 0000000..031f74d --- /dev/null +++ b/Documentation/DSP/html/arm__negate__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_negate_q31.c File Reference +CMSIS-DSP: arm_negate_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_negate_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Negates the elements of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__negate__q7_8c.html b/Documentation/DSP/html/arm__negate__q7_8c.html new file mode 100644 index 0000000..7e13da3 --- /dev/null +++ b/Documentation/DSP/html/arm__negate__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_negate_q7.c File Reference +CMSIS-DSP: arm_negate_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_negate_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Negates the elements of a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__offset__f32_8c.html b/Documentation/DSP/html/arm__offset__f32_8c.html new file mode 100644 index 0000000..3b2d383 --- /dev/null +++ b/Documentation/DSP/html/arm__offset__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_offset_f32.c File Reference +CMSIS-DSP: arm_offset_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_offset_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
     Adds a constant offset to a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__offset__q15_8c.html b/Documentation/DSP/html/arm__offset__q15_8c.html new file mode 100644 index 0000000..40c64da --- /dev/null +++ b/Documentation/DSP/html/arm__offset__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_offset_q15.c File Reference +CMSIS-DSP: arm_offset_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_offset_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__offset__q31_8c.html b/Documentation/DSP/html/arm__offset__q31_8c.html new file mode 100644 index 0000000..cb81cef --- /dev/null +++ b/Documentation/DSP/html/arm__offset__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_offset_q31.c File Reference +CMSIS-DSP: arm_offset_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_offset_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__offset__q7_8c.html b/Documentation/DSP/html/arm__offset__q7_8c.html new file mode 100644 index 0000000..b29f8f7 --- /dev/null +++ b/Documentation/DSP/html/arm__offset__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_offset_q7.c File Reference +CMSIS-DSP: arm_offset_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_offset_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__pid__init__f32_8c.html b/Documentation/DSP/html/arm__pid__init__f32_8c.html new file mode 100644 index 0000000..27c05a6 --- /dev/null +++ b/Documentation/DSP/html/arm__pid__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_pid_init_f32.c File Reference +CMSIS-DSP: arm_pid_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_pid_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
     Initialization function for the floating-point PID Control.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__pid__init__q15_8c.html b/Documentation/DSP/html/arm__pid__init__q15_8c.html new file mode 100644 index 0000000..1edd34d --- /dev/null +++ b/Documentation/DSP/html/arm__pid__init__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_pid_init_q15.c File Reference +CMSIS-DSP: arm_pid_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_pid_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
     Initialization function for the Q15 PID Control.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__pid__init__q31_8c.html b/Documentation/DSP/html/arm__pid__init__q31_8c.html new file mode 100644 index 0000000..25c2029 --- /dev/null +++ b/Documentation/DSP/html/arm__pid__init__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_pid_init_q31.c File Reference +CMSIS-DSP: arm_pid_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_pid_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
     Initialization function for the Q31 PID Control.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__pid__reset__f32_8c.html b/Documentation/DSP/html/arm__pid__reset__f32_8c.html new file mode 100644 index 0000000..31fc289 --- /dev/null +++ b/Documentation/DSP/html/arm__pid__reset__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_pid_reset_f32.c File Reference +CMSIS-DSP: arm_pid_reset_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_pid_reset_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_pid_reset_f32 (arm_pid_instance_f32 *S)
     Reset function for the floating-point PID Control.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__pid__reset__q15_8c.html b/Documentation/DSP/html/arm__pid__reset__q15_8c.html new file mode 100644 index 0000000..fbd1152 --- /dev/null +++ b/Documentation/DSP/html/arm__pid__reset__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_pid_reset_q15.c File Reference +CMSIS-DSP: arm_pid_reset_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_pid_reset_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_pid_reset_q15 (arm_pid_instance_q15 *S)
     Reset function for the Q15 PID Control.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__pid__reset__q31_8c.html b/Documentation/DSP/html/arm__pid__reset__q31_8c.html new file mode 100644 index 0000000..163e288 --- /dev/null +++ b/Documentation/DSP/html/arm__pid__reset__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_pid_reset_q31.c File Reference +CMSIS-DSP: arm_pid_reset_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_pid_reset_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_pid_reset_q31 (arm_pid_instance_q31 *S)
     Reset function for the Q31 PID Control.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__power__f32_8c.html b/Documentation/DSP/html/arm__power__f32_8c.html new file mode 100644 index 0000000..5719500 --- /dev/null +++ b/Documentation/DSP/html/arm__power__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_power_f32.c File Reference +CMSIS-DSP: arm_power_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_power_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Sum of the squares of the elements of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__power__q15_8c.html b/Documentation/DSP/html/arm__power__q15_8c.html new file mode 100644 index 0000000..562bdfd --- /dev/null +++ b/Documentation/DSP/html/arm__power__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_power_q15.c File Reference +CMSIS-DSP: arm_power_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_power_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
     Sum of the squares of the elements of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__power__q31_8c.html b/Documentation/DSP/html/arm__power__q31_8c.html new file mode 100644 index 0000000..3aed0a9 --- /dev/null +++ b/Documentation/DSP/html/arm__power__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_power_q31.c File Reference +CMSIS-DSP: arm_power_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_power_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
     Sum of the squares of the elements of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__power__q7_8c.html b/Documentation/DSP/html/arm__power__q7_8c.html new file mode 100644 index 0000000..5a8c1c5 --- /dev/null +++ b/Documentation/DSP/html/arm__power__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_power_q7.c File Reference +CMSIS-DSP: arm_power_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_power_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Sum of the squares of the elements of a Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q15__to__float_8c.html b/Documentation/DSP/html/arm__q15__to__float_8c.html new file mode 100644 index 0000000..ace554c --- /dev/null +++ b/Documentation/DSP/html/arm__q15__to__float_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q15_to_float.c File Reference +CMSIS-DSP: arm_q15_to_float.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q15_to_float.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q15__to__q31_8c.html b/Documentation/DSP/html/arm__q15__to__q31_8c.html new file mode 100644 index 0000000..4b1db40 --- /dev/null +++ b/Documentation/DSP/html/arm__q15__to__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q15_to_q31.c File Reference +CMSIS-DSP: arm_q15_to_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q15_to_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q15__to__q7_8c.html b/Documentation/DSP/html/arm__q15__to__q7_8c.html new file mode 100644 index 0000000..1ae350a --- /dev/null +++ b/Documentation/DSP/html/arm__q15__to__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q15_to_q7.c File Reference +CMSIS-DSP: arm_q15_to_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q15_to_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q31__to__float_8c.html b/Documentation/DSP/html/arm__q31__to__float_8c.html new file mode 100644 index 0000000..024b9ab --- /dev/null +++ b/Documentation/DSP/html/arm__q31__to__float_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q31_to_float.c File Reference +CMSIS-DSP: arm_q31_to_float.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q31_to_float.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q31__to__q15_8c.html b/Documentation/DSP/html/arm__q31__to__q15_8c.html new file mode 100644 index 0000000..7517540 --- /dev/null +++ b/Documentation/DSP/html/arm__q31__to__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q31_to_q15.c File Reference +CMSIS-DSP: arm_q31_to_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q31_to_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q31__to__q7_8c.html b/Documentation/DSP/html/arm__q31__to__q7_8c.html new file mode 100644 index 0000000..b7f0029 --- /dev/null +++ b/Documentation/DSP/html/arm__q31__to__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q31_to_q7.c File Reference +CMSIS-DSP: arm_q31_to_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q31_to_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to Q7 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q7__to__float_8c.html b/Documentation/DSP/html/arm__q7__to__float_8c.html new file mode 100644 index 0000000..7609fef --- /dev/null +++ b/Documentation/DSP/html/arm__q7__to__float_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q7_to_float.c File Reference +CMSIS-DSP: arm_q7_to_float.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q7_to_float.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q7__to__q15_8c.html b/Documentation/DSP/html/arm__q7__to__q15_8c.html new file mode 100644 index 0000000..afb5d9c --- /dev/null +++ b/Documentation/DSP/html/arm__q7__to__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q7_to_q15.c File Reference +CMSIS-DSP: arm_q7_to_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_q7_to_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__q7__to__q31_8c.html b/Documentation/DSP/html/arm__q7__to__q31_8c.html new file mode 100644 index 0000000..6d0fe91 --- /dev/null +++ b/Documentation/DSP/html/arm__q7__to__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_q7_to_q31.c File Reference +CMSIS-DSP: arm_q7_to_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
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    +
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    + +
    + +
    +
    +Functions
    +
    +
    arm_q7_to_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__f32_8c.html b/Documentation/DSP/html/arm__rfft__f32_8c.html new file mode 100644 index 0000000..0068b93 --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__f32_8c.html @@ -0,0 +1,301 @@ + + + + + +arm_rfft_f32.c File Reference +CMSIS-DSP: arm_rfft_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
    +
      + +
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    + + + +
    +
    + +
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    +
    +Functions
    +
    +
    arm_rfft_f32.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_radix4_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_radix4_butterfly_inverse_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier, float32_t onebyfftLen)
     
    void arm_bitreversal_f32 (float32_t *pSrc, uint16_t fftSize, uint16_t bitRevFactor, uint16_t *pBitRevTab)
     
    void arm_split_rfft_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pATable, float32_t *pBTable, float32_t *pDst, uint32_t modifier)
     Core Real FFT process.
     
    void arm_split_rifft_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pATable, float32_t *pBTable, float32_t *pDst, uint32_t modifier)
     Core Real IFFT process.
     
    void arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
     Processing function for the floating-point RFFT/RIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_bitreversal_f32 (float32_t * pSrc,
    uint16_t fftSize,
    uint16_t bitRevFactor,
    uint16_t * pBitRevTab 
    )
    +
    + +

    Referenced by arm_cfft_radix2_f32(), arm_cfft_radix4_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_inverse_f32 (float32_t * pSrc,
    uint16_t fftLen,
    float32_t * pCoef,
    uint16_t twidCoefModifier,
    float32_t onebyfftLen 
    )
    +
    + +

    Referenced by arm_cfft_radix4_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_split_rifft_f32 (float32_t * pSrc,
    uint32_t fftLen,
    float32_t * pATable,
    float32_t * pBTable,
    float32_t * pDst,
    uint32_t modifier 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*pSrcpoints to the input buffer.
    [in]fftLenlength of FFT.
    [in]*pATablepoints to the twiddle Coef A buffer.
    [in]*pBTablepoints to the twiddle Coef B buffer.
    [out]*pDstpoints to the output buffer.
    [in]modifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    Referenced by arm_rfft_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__fast__f32_8c.html b/Documentation/DSP/html/arm__rfft__fast__f32_8c.html new file mode 100644 index 0000000..2cc6f89 --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__fast__f32_8c.html @@ -0,0 +1,215 @@ + + + + + +arm_rfft_fast_f32.c File Reference +CMSIS-DSP: arm_rfft_fast_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_rfft_fast_f32.c File Reference
    +
    +
    + + + + + + + + + +

    +Functions

    void stage_rfft_f32 (arm_rfft_fast_instance_f32 *S, float32_t *p, float32_t *pOut)
     
    void merge_rfft_f32 (arm_rfft_fast_instance_f32 *S, float32_t *p, float32_t *pOut)
     
    void arm_rfft_fast_f32 (arm_rfft_fast_instance_f32 *S, float32_t *p, float32_t *pOut, uint8_t ifftFlag)
     Processing function for the floating-point real FFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void merge_rfft_f32 (arm_rfft_fast_instance_f32 * S,
    float32_t * p,
    float32_t * pOut 
    )
    +
    + +

    References arm_rfft_fast_instance_f32::pTwiddleRFFT, and arm_rfft_fast_instance_f32::Sint.

    + +

    Referenced by arm_rfft_fast_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void stage_rfft_f32 (arm_rfft_fast_instance_f32 * S,
    float32_t * p,
    float32_t * pOut 
    )
    +
    + +

    References arm_rfft_fast_instance_f32::pTwiddleRFFT, and arm_rfft_fast_instance_f32::Sint.

    + +

    Referenced by arm_rfft_fast_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__fast__init__f32_8c.html b/Documentation/DSP/html/arm__rfft__fast__init__f32_8c.html new file mode 100644 index 0000000..899c9f4 --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__fast__init__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_rfft_fast_init_f32.c File Reference +CMSIS-DSP: arm_rfft_fast_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    +
    +Functions
    +
    +
    arm_rfft_fast_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_rfft_fast_init_f32 (arm_rfft_fast_instance_f32 *S, uint16_t fftLen)
     Initialization function for the floating-point real FFT.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__init__f32_8c.html b/Documentation/DSP/html/arm__rfft__init__f32_8c.html new file mode 100644 index 0000000..9919a93 --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__init__f32_8c.html @@ -0,0 +1,146 @@ + + + + + +arm_rfft_init_f32.c File Reference +CMSIS-DSP: arm_rfft_init_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
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    +
      + +
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    +
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    + +
    + +
    +
    +Functions | +Variables
    +
    +
    arm_rfft_init_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the floating-point RFFT/RIFFT.
     
    + + + + + +

    +Variables

    static const float32_t realCoefA [8192]
     
    static const float32_t realCoefB [8192]
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__init__q15_8c.html b/Documentation/DSP/html/arm__rfft__init__q15_8c.html new file mode 100644 index 0000000..d04be82 --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__init__q15_8c.html @@ -0,0 +1,146 @@ + + + + + +arm_rfft_init_q15.c File Reference +CMSIS-DSP: arm_rfft_init_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions | +Variables
    +
    +
    arm_rfft_init_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_rfft_init_q15 (arm_rfft_instance_q15 *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the Q15 RFFT/RIFFT.
     
    + + + + + +

    +Variables

    static const q15_t ALIGN4 realCoefAQ15 [8192]
     
    static const q15_t ALIGN4 realCoefBQ15 [8192]
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__init__q31_8c.html b/Documentation/DSP/html/arm__rfft__init__q31_8c.html new file mode 100644 index 0000000..333ea88 --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__init__q31_8c.html @@ -0,0 +1,146 @@ + + + + + +arm_rfft_init_q31.c File Reference +CMSIS-DSP: arm_rfft_init_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions | +Variables
    +
    +
    arm_rfft_init_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    arm_status arm_rfft_init_q31 (arm_rfft_instance_q31 *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the Q31 RFFT/RIFFT.
     
    + + + + + +

    +Variables

    static const q31_t realCoefAQ31 [8192]
     
    static const q31_t realCoefBQ31 [8192]
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__q15_8c.html b/Documentation/DSP/html/arm__rfft__q15_8c.html new file mode 100644 index 0000000..a13972e --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__q15_8c.html @@ -0,0 +1,278 @@ + + + + + +arm_rfft_q15.c File Reference +CMSIS-DSP: arm_rfft_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_rfft_q15.c File Reference
    +
    +
    + + + + + + + + + + + +

    +Functions

    void arm_split_rfft_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pATable, q15_t *pBTable, q15_t *pDst, uint32_t modifier)
     Core Real FFT process.
     
    void arm_split_rifft_q15 (q15_t *pSrc, uint32_t fftLen, q15_t *pATable, q15_t *pBTable, q15_t *pDst, uint32_t modifier)
     Core Real IFFT process.
     
    void arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)
     Processing function for the Q15 RFFT/RIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_split_rfft_q15 (q15_t * pSrc,
    uint32_t fftLen,
    q15_t * pATable,
    q15_t * pBTable,
    q15_t * pDst,
    uint32_t modifier 
    )
    +
    +

    end of RealFFT group

    +
    Parameters
    + + + + + + + +
    *pSrcpoints to the input buffer.
    fftLenlength of FFT.
    *pATablepoints to the A twiddle Coef buffer.
    *pBTablepoints to the B twiddle Coef buffer.
    *pDstpoints to the output buffer.
    modifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none. The function implements a Real FFT
    + +

    References __SIMD32.

    + +

    Referenced by arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_split_rifft_q15 (q15_t * pSrc,
    uint32_t fftLen,
    q15_t * pATable,
    q15_t * pBTable,
    q15_t * pDst,
    uint32_t modifier 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*pSrcpoints to the input buffer.
    [in]fftLenlength of FFT.
    [in]*pATablepoints to the twiddle Coef A buffer.
    [in]*pBTablepoints to the twiddle Coef B buffer.
    [out]*pDstpoints to the output buffer.
    [in]modifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none. The function implements a Real IFFT
    + +

    References __SIMD32.

    + +

    Referenced by arm_rfft_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rfft__q31_8c.html b/Documentation/DSP/html/arm__rfft__q31_8c.html new file mode 100644 index 0000000..4efa2af --- /dev/null +++ b/Documentation/DSP/html/arm__rfft__q31_8c.html @@ -0,0 +1,278 @@ + + + + + +arm_rfft_q31.c File Reference +CMSIS-DSP: arm_rfft_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_rfft_q31.c File Reference
    +
    +
    + + + + + + + + + + + +

    +Functions

    void arm_split_rfft_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pATable, q31_t *pBTable, q31_t *pDst, uint32_t modifier)
     Core Real FFT process.
     
    void arm_split_rifft_q31 (q31_t *pSrc, uint32_t fftLen, q31_t *pATable, q31_t *pBTable, q31_t *pDst, uint32_t modifier)
     Core Real IFFT process.
     
    void arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
     Processing function for the Q31 RFFT/RIFFT.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_split_rfft_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pATable,
    q31_t * pBTable,
    q31_t * pDst,
    uint32_t modifier 
    )
    +
    +

    end of RealFFT group

    +
    Parameters
    + + + + + + + +
    [in]*pSrcpoints to the input buffer.
    [in]fftLenlength of FFT.
    [in]*pATablepoints to the twiddle Coef A buffer.
    [in]*pBTablepoints to the twiddle Coef B buffer.
    [out]*pDstpoints to the output buffer.
    [in]modifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References mult_32x32_keep32_R, multAcc_32x32_keep32_R, and multSub_32x32_keep32_R.

    + +

    Referenced by arm_rfft_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_split_rifft_q31 (q31_t * pSrc,
    uint32_t fftLen,
    q31_t * pATable,
    q31_t * pBTable,
    q31_t * pDst,
    uint32_t modifier 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*pSrcpoints to the input buffer.
    [in]fftLenlength of FFT.
    [in]*pATablepoints to the twiddle Coef A buffer.
    [in]*pBTablepoints to the twiddle Coef B buffer.
    [out]*pDstpoints to the output buffer.
    [in]modifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    References mult_32x32_keep32_R, multAcc_32x32_keep32_R, and multSub_32x32_keep32_R.

    + +

    Referenced by arm_rfft_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rms__f32_8c.html b/Documentation/DSP/html/arm__rms__f32_8c.html new file mode 100644 index 0000000..dc9d801 --- /dev/null +++ b/Documentation/DSP/html/arm__rms__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_rms_f32.c File Reference +CMSIS-DSP: arm_rms_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_rms_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Root Mean Square of the elements of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rms__q15_8c.html b/Documentation/DSP/html/arm__rms__q15_8c.html new file mode 100644 index 0000000..e122899 --- /dev/null +++ b/Documentation/DSP/html/arm__rms__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_rms_q15.c File Reference +CMSIS-DSP: arm_rms_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_rms_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Root Mean Square of the elements of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__rms__q31_8c.html b/Documentation/DSP/html/arm__rms__q31_8c.html new file mode 100644 index 0000000..ef4e31e --- /dev/null +++ b/Documentation/DSP/html/arm__rms__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_rms_q31.c File Reference +CMSIS-DSP: arm_rms_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
    +
    +Functions
    +
    +
    arm_rms_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Root Mean Square of the elements of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__scale__f32_8c.html b/Documentation/DSP/html/arm__scale__f32_8c.html new file mode 100644 index 0000000..820bc03 --- /dev/null +++ b/Documentation/DSP/html/arm__scale__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_scale_f32.c File Reference +CMSIS-DSP: arm_scale_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    + +
    +
    +Functions
    +
    +
    arm_scale_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
     Multiplies a floating-point vector by a scalar.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__scale__q15_8c.html b/Documentation/DSP/html/arm__scale__q15_8c.html new file mode 100644 index 0000000..0cf6a95 --- /dev/null +++ b/Documentation/DSP/html/arm__scale__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_scale_q15.c File Reference +CMSIS-DSP: arm_scale_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_scale_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
     Multiplies a Q15 vector by a scalar.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__scale__q31_8c.html b/Documentation/DSP/html/arm__scale__q31_8c.html new file mode 100644 index 0000000..cce1be8 --- /dev/null +++ b/Documentation/DSP/html/arm__scale__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_scale_q31.c File Reference +CMSIS-DSP: arm_scale_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
    +
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    + + + +
    +
    + +
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    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_scale_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
     Multiplies a Q31 vector by a scalar.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__scale__q7_8c.html b/Documentation/DSP/html/arm__scale__q7_8c.html new file mode 100644 index 0000000..90f677a --- /dev/null +++ b/Documentation/DSP/html/arm__scale__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_scale_q7.c File Reference +CMSIS-DSP: arm_scale_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_scale_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
     Multiplies a Q7 vector by a scalar.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__shift__q15_8c.html b/Documentation/DSP/html/arm__shift__q15_8c.html new file mode 100644 index 0000000..027c6bc --- /dev/null +++ b/Documentation/DSP/html/arm__shift__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_shift_q15.c File Reference +CMSIS-DSP: arm_shift_q15.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_shift_q15.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q15 vector a specified number of bits.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__shift__q31_8c.html b/Documentation/DSP/html/arm__shift__q31_8c.html new file mode 100644 index 0000000..1f11162 --- /dev/null +++ b/Documentation/DSP/html/arm__shift__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_shift_q31.c File Reference +CMSIS-DSP: arm_shift_q31.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_shift_q31.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q31 vector a specified number of bits.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__shift__q7_8c.html b/Documentation/DSP/html/arm__shift__q7_8c.html new file mode 100644 index 0000000..cd08a27 --- /dev/null +++ b/Documentation/DSP/html/arm__shift__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_shift_q7.c File Reference +CMSIS-DSP: arm_shift_q7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_shift_q7.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q7 vector a specified number of bits.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__data_8c.html b/Documentation/DSP/html/arm__signal__converge__data_8c.html new file mode 100644 index 0000000..7a1c553 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__data_8c.html @@ -0,0 +1,184 @@ + + + + + +arm_signal_converge_data.c File Reference +CMSIS-DSP: arm_signal_converge_data.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
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    +
    + +
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    + +
    + +
    +
    +Variables
    +
    +
    arm_signal_converge_data.c File Reference
    +
    +
    + + + + + + + + +

    +Variables

    float32_t testInput_f32 [1536]
     
    float32_t lmsNormCoeff_f32 [32]
     
    const float32_t FIRCoeff_f32 [32]
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    const float32_t FIRCoeff_f32[32]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t lmsNormCoeff_f32[32]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32[1536]
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..fd7f681 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_signal_converge_example
    +for Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_signal_converge_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..36736ea --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
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    +
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    + + + + +
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    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_signal_converge_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..a0e3f29 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_signal_converge_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..75da6b7 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_signal_converge_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..d8d6550 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
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    +
    +
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    + + + + +
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    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_signal_converge_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..f7b782d --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_signal_converge_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2math__helper_8c.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2math__helper_8c.html new file mode 100644 index 0000000..59ab132 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2math__helper_8c.html @@ -0,0 +1,749 @@ + + + + + +math_helper.c File Reference +CMSIS-DSP: math_helper.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_signal_converge_example/ARM/math_helper.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q7 (q7_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_calc_2pow (uint32_t numShifts)
     Calculates pow(2, numShifts)
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +

    References arm_calc_2pow().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q7 (q7_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2math__helper_8h.html b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2math__helper_8h.html new file mode 100644 index 0000000..9c220e1 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example_2_a_r_m_2math__helper_8h.html @@ -0,0 +1,707 @@ + + + + + +math_helper.h File Reference +CMSIS-DSP: math_helper.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    arm_signal_converge_example/ARM/math_helper.h File Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    float arm_snr_f32 (float *pRef, float *pTest, uint32_t buffSize)
     Caluclation of SNR.
     
    void arm_float_to_q12_20 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed in q12.20 format.
     
    void arm_provide_guard_bits_q15 (q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_provide_guard_bits_q31 (q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits)
     Provide guard bits for Input buffer.
     
    void arm_float_to_q14 (float *pIn, q15_t *pOut, uint32_t numSamples)
     Converts float to fixed q14.
     
    void arm_float_to_q29 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_float_to_q28 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q28 format.
     
    void arm_float_to_q30 (float *pIn, q31_t *pOut, uint32_t numSamples)
     Converts float to fixed q30 format.
     
    void arm_clip_f32 (float *pIn, uint32_t numSamples)
     Clip the float values to +/- 1.
     
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
     Caluclates number of guard bits.
     
    void arm_apply_guard_bits (float32_t *pIn, uint32_t numSamples, uint32_t guard_bits)
     Converts Q15 to floating-point.
     
    uint32_t arm_compare_fixed_q15 (q15_t *pIn, q15_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_compare_fixed_q31 (q31_t *pIn, q31_t *pOut, uint32_t numSamples)
     Compare MATLAB Reference Output and ARM Test output.
     
    uint32_t arm_calc_2pow (uint32_t guard_bits)
     Calculates pow(2, numShifts)
     
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_apply_guard_bits (float32_t * pIn,
    uint32_t numSamples,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +

    References arm_calc_2pow().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_2pow (uint32_t numShifts)
    +
    +
    Parameters
    + + +
    uint32_tnumber of shifts
    +
    +
    +
    Returns
    pow(2, numShifts)
    + +

    Referenced by arm_apply_guard_bits().

    + +
    +
    + +
    +
    + + + + + + + + +
    uint32_t arm_calc_guard_bits (uint32_t num_adds)
    +
    +
    Parameters
    + + +
    uint32_tnumber of additions
    +
    +
    +
    Returns
    none The function Caluclates the number of guard bits depending on the numtaps
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_clip_f32 (float * pIn,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + +
    pIninput buffer
    numSamplesnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q15 (q15_t * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to Ref buffer
    q15_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    uint32_t arm_compare_fixed_q31 (q31_t * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to Ref buffer
    q31_t*Pointer to Test buffer
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q12_20 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point(q12.20) values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q14 (float * pIn,
    q15_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q28 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q29 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q30 (float * pIn,
    q31_t * pOut,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + +
    uint32_tnumber of samples in the buffer
    +
    +
    +
    Returns
    none The function converts floating point values to fixed point values
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q15 (q15_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q15_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_provide_guard_bits_q31 (q31_t * input_buf,
    uint32_t blockSize,
    uint32_t guard_bits 
    )
    +
    +
    Parameters
    + + + + +
    q31_t*Pointer to input buffer
    uint32_tblockSize
    uint32_tguard_bits
    +
    +
    +
    Returns
    none The function Provides the guard bits for the buffer to avoid overflow
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    float arm_snr_f32 (float * pRef,
    float * pTest,
    uint32_t buffSize 
    )
    +
    +
    Parameters
    + + + + +
    float*Pointer to the reference buffer
    float*Pointer to the test buffer
    uint32_ttotal number of samples
    +
    +
    +
    Returns
    float SNR The function Caluclates signal to noise ratio for the reference output and test output
    + +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__signal__converge__example__f32_8c.html b/Documentation/DSP/html/arm__signal__converge__example__f32_8c.html new file mode 100644 index 0000000..8b99bb8 --- /dev/null +++ b/Documentation/DSP/html/arm__signal__converge__example__f32_8c.html @@ -0,0 +1,559 @@ + + + + + +arm_signal_converge_example_f32.c File Reference +CMSIS-DSP: arm_signal_converge_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_signal_converge_example_f32.c File Reference
    +
    +
    + + + + + + + + + + + + + + + + +

    +Macros

    #define TEST_LENGTH_SAMPLES
     
    #define NUMTAPS
     
    #define BLOCKSIZE
     
    #define DELTA_ERROR
     
    #define DELTA_COEFF
     
    #define MU
     
    #define NUMFRAMES
     
    + + + + + + + + + +

    +Functions

    arm_status test_signal_converge_example (void)
     
    arm_status test_signal_converge (float32_t *err_signal, uint32_t blockSize)
     
    void getinput (float32_t *input, uint32_t fr_cnt, uint32_t blockSize)
     
    int32_t main (void)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    float32_t firStateF32 [NUMTAPS+BLOCKSIZE]
     
    arm_fir_instance_f32 LPF_instance
     
    float32_t lmsStateF32 [NUMTAPS+BLOCKSIZE]
     
    float32_t errOutput [TEST_LENGTH_SAMPLES]
     
    arm_lms_norm_instance_f32 lmsNorm_instance
     
    float32_t testInput_f32 [TEST_LENGTH_SAMPLES]
     
    float32_t lmsNormCoeff_f32 [32]
     
    const float32_t FIRCoeff_f32 [32]
     
    float32_t wire1 [BLOCKSIZE]
     
    float32_t wire2 [BLOCKSIZE]
     
    float32_t wire3 [BLOCKSIZE]
     
    float32_t err_signal [BLOCKSIZE]
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define BLOCKSIZE
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define DELTA_COEFF
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define DELTA_ERROR
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define MU
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define NUMFRAMES
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define NUMTAPS
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define TEST_LENGTH_SAMPLES
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void getinput (float32_t * input,
    uint32_t fr_cnt,
    uint32_t blockSize 
    )
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_abs_f32(), arm_copy_f32(), arm_fir_f32(), arm_fir_init_f32(), arm_lms_norm_f32(), arm_lms_norm_init_f32(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_min_f32(), arm_scale_f32(), arm_sub_f32(), BLOCKSIZE, DELTA_COEFF, DELTA_ERROR, err_signal, FIRCoeff_f32, firStateF32, lmsNormCoeff_f32, lmsStateF32, MU, NUMFRAMES, NUMTAPS, status, testInput_f32, wire1, wire2, and wire3.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status test_signal_converge (float32_t * err_signal,
    uint32_t blockSize 
    )
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + + + + + +
    arm_status test_signal_converge_example (void )
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    float32_t err_signal[BLOCKSIZE]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t errOutput[TEST_LENGTH_SAMPLES]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + +
    const float32_t FIRCoeff_f32[32]
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t firStateF32[NUMTAPS+BLOCKSIZE]
    +
    +
    Examples:
    arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    arm_lms_norm_instance_f32 lmsNorm_instance
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + +
    float32_t lmsNormCoeff_f32[32]
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t lmsStateF32[NUMTAPS+BLOCKSIZE]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    arm_fir_instance_f32 LPF_instance
    +
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32[TEST_LENGTH_SAMPLES]
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t wire1[BLOCKSIZE]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t wire2[BLOCKSIZE]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t wire3[BLOCKSIZE]
    +
    +
    Examples:
    arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..047ad24 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,151 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Abstract.txt File Reference
    +
    +
    + + + + +

    +Variables

    CMSIS DSP_Lib example
    +arm_sin_cos_example for Cortex     		M0
     
    +

    Variable Documentation

    + +
    +
    + + + + +
    CMSIS DSP_Lib example arm_sin_cos_example for Cortex M0
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html new file mode 100644 index 0000000..90af017 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m0_2system___a_r_m_c_m0_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM0.c File Reference +CMSIS-DSP: system_ARMCM0.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_sin_cos_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..fda1d08 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_sin_cos_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..3f8fdc8 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_sin_cos_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..f326c34 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_sin_cos_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..bd69256 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_sin_cos_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__example__f32_8c.html b/Documentation/DSP/html/arm__sin__cos__example__f32_8c.html new file mode 100644 index 0000000..9eeac59 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__example__f32_8c.html @@ -0,0 +1,334 @@ + + + + + +arm_sin_cos_example_f32.c File Reference +CMSIS-DSP: arm_sin_cos_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_sin_cos_example_f32.c File Reference
    +
    +
    + + + + + + +

    +Macros

    #define MAX_BLOCKSIZE
     
    #define DELTA
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + + + + + + + +

    +Variables

    const float32_t testInput_f32 [MAX_BLOCKSIZE]
     
    const float32_t testRefOutput_f32
     
    uint32_t blockSize
     
    float32_t testOutput
     
    float32_t cosOutput
     
    float32_t sinOutput
     
    float32_t cosSquareOutput
     
    float32_t sinSquareOutput
     
    arm_status status
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define DELTA
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define MAX_BLOCKSIZE
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_add_f32(), arm_cos_f32(), ARM_MATH_TEST_FAILURE, arm_mult_f32(), arm_sin_f32(), blockSize, cosOutput, cosSquareOutput, DELTA, sinOutput, sinSquareOutput, status, testInput_f32, testOutput, and testRefOutput_f32.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t blockSize
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t cosOutput
    +
    +
    Examples:
    arm_sin_cos_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t cosSquareOutput
    +
    +
    Examples:
    arm_sin_cos_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t sinOutput
    +
    +
    Examples:
    arm_sin_cos_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t sinSquareOutput
    +
    +
    Examples:
    arm_sin_cos_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    arm_status status
    +
    + +
    +
    + +
    +
    + + + + +
    const float32_t testInput_f32[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t testOutput
    +
    + +
    +
    + +
    +
    + + + + +
    const float32_t testRefOutput_f32
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__f32_8c.html b/Documentation/DSP/html/arm__sin__cos__f32_8c.html new file mode 100644 index 0000000..87ed98f --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sin_cos_f32.c File Reference +CMSIS-DSP: arm_sin_cos_f32.c File Reference + + + + + + + + + + + + + + + +
    +
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    +
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    arm_sin_cos_f32.c File Reference
    +
    +
    + + + + + +

    +Functions

    void arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCosVal)
     Floating-point sin_cos function.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__cos__q31_8c.html b/Documentation/DSP/html/arm__sin__cos__q31_8c.html new file mode 100644 index 0000000..be3fd8a --- /dev/null +++ b/Documentation/DSP/html/arm__sin__cos__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sin_cos_q31.c File Reference +CMSIS-DSP: arm_sin_cos_q31.c File Reference + + + + + + + + + + + + + + + +
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    +
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    arm_sin_cos_q31.c File Reference
    +
    +
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    +Functions

    void arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)
     Q31 sin_cos function.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__f32_8c.html b/Documentation/DSP/html/arm__sin__f32_8c.html new file mode 100644 index 0000000..99fb8d1 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sin_f32.c File Reference +CMSIS-DSP: arm_sin_f32.c File Reference + + + + + + + + + + + + + + + +
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    arm_sin_f32.c File Reference
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    +Functions

    float32_t arm_sin_f32 (float32_t x)
     Fast approximation to the trigonometric sine function for floating-point data.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__q15_8c.html b/Documentation/DSP/html/arm__sin__q15_8c.html new file mode 100644 index 0000000..e9950f8 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sin_q15.c File Reference +CMSIS-DSP: arm_sin_q15.c File Reference + + + + + + + + + + + + + + + +
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    arm_sin_q15.c File Reference
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    +Functions

    q15_t arm_sin_q15 (q15_t x)
     Fast approximation to the trigonometric sine function for Q15 data.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sin__q31_8c.html b/Documentation/DSP/html/arm__sin__q31_8c.html new file mode 100644 index 0000000..b1c6d19 --- /dev/null +++ b/Documentation/DSP/html/arm__sin__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sin_q31.c File Reference +CMSIS-DSP: arm_sin_q31.c File Reference + + + + + + + + + + + + + + + +
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    arm_sin_q31.c File Reference
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    +Functions

    q31_t arm_sin_q31 (q31_t x)
     Fast approximation to the trigonometric sine function for Q31 data.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sqrt__q15_8c.html b/Documentation/DSP/html/arm__sqrt__q15_8c.html new file mode 100644 index 0000000..d2785ba --- /dev/null +++ b/Documentation/DSP/html/arm__sqrt__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sqrt_q15.c File Reference +CMSIS-DSP: arm_sqrt_q15.c File Reference + + + + + + + + + + + + + + + +
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    arm_sqrt_q15.c File Reference
    +
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    +Functions

    arm_status arm_sqrt_q15 (q15_t in, q15_t *pOut)
     Q15 square root function.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sqrt__q31_8c.html b/Documentation/DSP/html/arm__sqrt__q31_8c.html new file mode 100644 index 0000000..9f7b9ca --- /dev/null +++ b/Documentation/DSP/html/arm__sqrt__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sqrt_q31.c File Reference +CMSIS-DSP: arm_sqrt_q31.c File Reference + + + + + + + + + + + + + + + +
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    +Functions

    arm_status arm_sqrt_q31 (q31_t in, q31_t *pOut)
     Q31 square root function.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__std__f32_8c.html b/Documentation/DSP/html/arm__std__f32_8c.html new file mode 100644 index 0000000..662c778 --- /dev/null +++ b/Documentation/DSP/html/arm__std__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_std_f32.c File Reference +CMSIS-DSP: arm_std_f32.c File Reference + + + + + + + + + + + + + + + +
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    void arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Standard deviation of the elements of a floating-point vector.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__std__q15_8c.html b/Documentation/DSP/html/arm__std__q15_8c.html new file mode 100644 index 0000000..8a35a10 --- /dev/null +++ b/Documentation/DSP/html/arm__std__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_std_q15.c File Reference +CMSIS-DSP: arm_std_q15.c File Reference + + + + + + + + + + + + + + + +
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    +Functions

    void arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Standard deviation of the elements of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__std__q31_8c.html b/Documentation/DSP/html/arm__std__q31_8c.html new file mode 100644 index 0000000..bc29475 --- /dev/null +++ b/Documentation/DSP/html/arm__std__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_std_q31.c File Reference +CMSIS-DSP: arm_std_q31.c File Reference + + + + + + + + + + + + + + + +
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    arm_std_q31.c File Reference
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    +Functions

    void arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Standard deviation of the elements of a Q31 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sub__f32_8c.html b/Documentation/DSP/html/arm__sub__f32_8c.html new file mode 100644 index 0000000..e7d922d --- /dev/null +++ b/Documentation/DSP/html/arm__sub__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sub_f32.c File Reference +CMSIS-DSP: arm_sub_f32.c File Reference + + + + + + + + + + + + + + + +
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    arm_sub_f32.c File Reference
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    +Functions

    void arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector subtraction.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sub__q15_8c.html b/Documentation/DSP/html/arm__sub__q15_8c.html new file mode 100644 index 0000000..8c2a911 --- /dev/null +++ b/Documentation/DSP/html/arm__sub__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sub_q15.c File Reference +CMSIS-DSP: arm_sub_q15.c File Reference + + + + + + + + + + + + + + + +
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    arm_sub_q15.c File Reference
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    +Functions

    void arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector subtraction.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sub__q31_8c.html b/Documentation/DSP/html/arm__sub__q31_8c.html new file mode 100644 index 0000000..c8014d9 --- /dev/null +++ b/Documentation/DSP/html/arm__sub__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sub_q31.c File Reference +CMSIS-DSP: arm_sub_q31.c File Reference + + + + + + + + + + + + + + + +
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    void arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector subtraction.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__sub__q7_8c.html b/Documentation/DSP/html/arm__sub__q7_8c.html new file mode 100644 index 0000000..bbd5f4d --- /dev/null +++ b/Documentation/DSP/html/arm__sub__q7_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_sub_q7.c File Reference +CMSIS-DSP: arm_sub_q7.c File Reference + + + + + + + + + + + + + + + +
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    void arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector subtraction.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__var__f32_8c.html b/Documentation/DSP/html/arm__var__f32_8c.html new file mode 100644 index 0000000..77fc94e --- /dev/null +++ b/Documentation/DSP/html/arm__var__f32_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_var_f32.c File Reference +CMSIS-DSP: arm_var_f32.c File Reference + + + + + + + + + + + + + + + +
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    void arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Variance of the elements of a floating-point vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__var__q15_8c.html b/Documentation/DSP/html/arm__var__q15_8c.html new file mode 100644 index 0000000..76b7ab7 --- /dev/null +++ b/Documentation/DSP/html/arm__var__q15_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_var_q15.c File Reference +CMSIS-DSP: arm_var_q15.c File Reference + + + + + + + + + + + + + + + +
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    void arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Variance of the elements of a Q15 vector.
     
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__var__q31_8c.html b/Documentation/DSP/html/arm__var__q31_8c.html new file mode 100644 index 0000000..ce10f89 --- /dev/null +++ b/Documentation/DSP/html/arm__var__q31_8c.html @@ -0,0 +1,138 @@ + + + + + +arm_var_q31.c File Reference +CMSIS-DSP: arm_var_q31.c File Reference + + + + + + + + + + + + + + + +
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    void arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Variance of the elements of a Q31 vector.
     
    +
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    + + + + diff --git a/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_abstract_8txt.html b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_abstract_8txt.html new file mode 100644 index 0000000..36c7b05 --- /dev/null +++ b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_abstract_8txt.html @@ -0,0 +1,152 @@ + + + + + +Abstract.txt File Reference +CMSIS-DSP: Abstract.txt File Reference + + + + + + + + + + + + + + + +
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    CMSIS DSP_Lib example
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    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html new file mode 100644 index 0000000..844c47e --- /dev/null +++ b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m3_2system___a_r_m_c_m3_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM3.c File Reference +CMSIS-DSP: system_ARMCM3.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_variance_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html new file mode 100644 index 0000000..8257f9e --- /dev/null +++ b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m4___f_p_2system___a_r_m_c_m4_8c.html @@ -0,0 +1,254 @@ + + + + + +system_ARMCM4.c File Reference +CMSIS-DSP: system_ARMCM4.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_variance_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html new file mode 100644 index 0000000..8d0aa27 --- /dev/null +++ b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_device_2_a_r_m_c_m7___s_p_2system___a_r_m_c_m7_8c.html @@ -0,0 +1,262 @@ + + + + + +system_ARMCM7.c File Reference +CMSIS-DSP: system_ARMCM7.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_variance_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c File Reference
    +
    +
    + + + + + + + + +

    +Macros

    #define __HSI
     
    #define __XTAL
     
    #define __SYSTEM_CLOCK
     
    + + + + + + + +

    +Functions

    void SystemCoreClockUpdate (void)
     Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
     
    void SystemInit (void)
     Setup the microcontroller system. Initialize the System.
     
    + + + +

    +Variables

    uint32_t SystemCoreClock
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define __HSI
    +
    + +
    +
    + +
    +
    + + + + +
    #define __SYSTEM_CLOCK
    +
    + +

    Referenced by SystemCoreClockUpdate(), and SystemInit().

    + +
    +
    + +
    +
    + + + + +
    #define __XTAL
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    void SystemCoreClockUpdate (void )
    +
    +

    Update SystemCoreClock variable

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    + +
    +
    + + + + + + + + +
    void SystemInit (void )
    +
    +

    Initialize the system

    +
    Parameters
    + + +
    none
    +
    +
    +
    Returns
    none
    + +

    References __SYSTEM_CLOCK, and SystemCoreClock.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html new file mode 100644 index 0000000..9571b4a --- /dev/null +++ b/Documentation/DSP/html/arm__variance__example_2_a_r_m_2_r_t_e_2_r_t_e___components_8h.html @@ -0,0 +1,129 @@ + + + + + +RTE_Components.h File Reference +CMSIS-DSP: RTE_Components.h File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_variance_example/ARM/RTE/RTE_Components.h File Reference
    +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm__variance__example__f32_8c.html b/Documentation/DSP/html/arm__variance__example__f32_8c.html new file mode 100644 index 0000000..55995df --- /dev/null +++ b/Documentation/DSP/html/arm__variance__example__f32_8c.html @@ -0,0 +1,283 @@ + + + + + +arm_variance_example_f32.c File Reference +CMSIS-DSP: arm_variance_example_f32.c File Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    arm_variance_example_f32.c File Reference
    +
    +
    + + + + + + +

    +Macros

    #define MAX_BLOCKSIZE
     
    #define DELTA
     
    + + + +

    +Functions

    int32_t main (void)
     
    + + + + + + + + + + + + + +

    +Variables

    float32_t wire1 [MAX_BLOCKSIZE]
     
    float32_t wire2 [MAX_BLOCKSIZE]
     
    float32_t wire3 [MAX_BLOCKSIZE]
     
    float32_t testInput_f32 [32]
     
    uint32_t blockSize
     
    float32_t refVarianceOut
     
    +

    Macro Definition Documentation

    + +
    +
    + + + + +
    #define DELTA
    +
    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    #define MAX_BLOCKSIZE
    +
    + +
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + +
    int32_t main (void )
    +
    + +

    References arm_copy_f32(), arm_dot_prod_f32(), arm_fill_f32(), ARM_MATH_SUCCESS, ARM_MATH_TEST_FAILURE, arm_mult_f32(), arm_sub_f32(), blockSize, DELTA, mean, refVarianceOut, status, testInput_f32, wire1, wire2, and wire3.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + +
    uint32_t blockSize
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t refVarianceOut
    +
    +
    Examples:
    arm_variance_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + +
    float32_t testInput_f32[32]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t wire1[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t wire2[MAX_BLOCKSIZE]
    +
    + +
    +
    + +
    +
    + + + + +
    float32_t wire3[MAX_BLOCKSIZE]
    +
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_class_marks_example_f32_8c-example.html b/Documentation/DSP/html/arm_class_marks_example_f32_8c-example.html new file mode 100644 index 0000000..053555b --- /dev/null +++ b/Documentation/DSP/html/arm_class_marks_example_f32_8c-example.html @@ -0,0 +1,297 @@ + + + + + +arm_class_marks_example_f32.c +CMSIS-DSP: arm_class_marks_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_class_marks_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_class_marks_example_f32.c
    +
    *
    +
    * Description: Example code to calculate Minimum, Maximum
    +
    * Mean, std and variance of marks obtained in a class
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include "arm_math.h"
    +
    +
    #define USE_STATIC_INIT
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Global defines
    +
    ** ------------------------------------------------------------------- */
    +
    +
    #define TEST_LENGTH_SAMPLES (20*4)
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** List of Marks scored by 20 students for 4 subjects
    +
    ** ------------------------------------------------------------------- */
    +
    const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
    +
    {
    +
    42.000000, 37.000000, 81.000000, 28.000000,
    +
    83.000000, 72.000000, 36.000000, 38.000000,
    +
    32.000000, 51.000000, 63.000000, 64.000000,
    +
    97.000000, 82.000000, 95.000000, 90.000000,
    +
    66.000000, 51.000000, 54.000000, 42.000000,
    +
    67.000000, 56.000000, 45.000000, 57.000000,
    +
    67.000000, 69.000000, 35.000000, 52.000000,
    +
    29.000000, 81.000000, 58.000000, 47.000000,
    +
    38.000000, 76.000000, 100.000000, 29.000000,
    +
    33.000000, 47.000000, 29.000000, 50.000000,
    +
    34.000000, 41.000000, 61.000000, 46.000000,
    +
    52.000000, 50.000000, 48.000000, 36.000000,
    +
    47.000000, 55.000000, 44.000000, 40.000000,
    +
    100.000000, 94.000000, 84.000000, 37.000000,
    +
    32.000000, 71.000000, 47.000000, 77.000000,
    +
    31.000000, 50.000000, 49.000000, 35.000000,
    +
    63.000000, 67.000000, 40.000000, 31.000000,
    +
    29.000000, 68.000000, 61.000000, 38.000000,
    +
    31.000000, 28.000000, 28.000000, 76.000000,
    +
    55.000000, 33.000000, 29.000000, 39.000000
    +
    };
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Number of subjects X 1
    +
    * ------------------------------------------------------------------- */
    +
    const float32_t testUnity_f32[4] =
    +
    {
    +
    1.000, 1.000, 1.000, 1.000
    +
    };
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** f32 Output buffer
    +
    ** ------------------------------------------------------------------- */
    +
    static float32_t testOutput[TEST_LENGTH_SAMPLES];
    +
    +
    +
    /* ------------------------------------------------------------------
    +
    * Global defines
    +
    *------------------------------------------------------------------- */
    +
    #define NUMSTUDENTS 20
    +
    #define NUMSUBJECTS 4
    +
    +
    /* ------------------------------------------------------------------
    +
    * Global variables
    +
    *------------------------------------------------------------------- */
    +
    +
    uint32_t numStudents = 20;
    +
    uint32_t numSubjects = 4;
    +
    float32_t max_marks, min_marks, mean, std, var;
    +
    uint32_t student_num;
    +
    +
    /* ----------------------------------------------------------------------------------
    +
    * Main f32 test function. It returns maximum marks secured and student number
    +
    * ------------------------------------------------------------------------------- */
    +
    +
    int32_t main()
    +
    {
    +
    +
    #ifndef USE_STATIC_INIT
    +
    +
    arm_matrix_instance_f32 srcA;
    +
    arm_matrix_instance_f32 srcB;
    +
    arm_matrix_instance_f32 dstC;
    +
    +
    /* Input and output matrices initializations */
    +
    arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
    +
    arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
    +
    arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
    +
    +
    #else
    +
    +
    /* Static Initializations of Input and output matrix sizes and array */
    +
    arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
    +
    arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
    +
    arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
    +
    +
    #endif
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    *Call the Matrix multiplication process function
    +
    * ------------------------------------------------------------------- */
    +
    arm_mat_mult_f32(&srcA, &srcB, &dstC);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the Max function to calculate max marks among numStudents
    +
    ** ------------------------------------------------------------------- */
    +
    arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the Min function to calculate min marks among numStudents
    +
    ** ------------------------------------------------------------------- */
    +
    arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the Mean function to calculate mean
    +
    ** ------------------------------------------------------------------- */
    +
    arm_mean_f32(testOutput, numStudents, &mean);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the std function to calculate standard deviation
    +
    ** ------------------------------------------------------------------- */
    +
    arm_std_f32(testOutput, numStudents, &std);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the var function to calculate variance
    +
    ** ------------------------------------------------------------------- */
    +
    arm_var_f32(testOutput, numStudents, &var);
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_convolution_example_f32_8c-example.html b/Documentation/DSP/html/arm_convolution_example_f32_8c-example.html new file mode 100644 index 0000000..fce5994 --- /dev/null +++ b/Documentation/DSP/html/arm_convolution_example_f32_8c-example.html @@ -0,0 +1,310 @@ + + + + + +arm_convolution_example_f32.c +CMSIS-DSP: arm_convolution_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_convolution_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_convolution_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating Convolution of two input signals using fft.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include "arm_math.h"
    +
    #include "math_helper.h"
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Defines each of the tests performed
    +
    * ------------------------------------------------------------------- */
    +
    #define MAX_BLOCKSIZE 128
    +
    #define DELTA (0.000001f)
    +
    #define SNR_THRESHOLD 90
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare I/O buffers
    +
    * ------------------------------------------------------------------- */
    +
    float32_t Ak[MAX_BLOCKSIZE]; /* Input A */
    +
    float32_t Bk[MAX_BLOCKSIZE]; /* Input B */
    +
    float32_t AxB[MAX_BLOCKSIZE * 2]; /* Output */
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Test input data for Floating point Convolution example for 32-blockSize
    +
    * Generated by the MATLAB randn() function
    +
    * ------------------------------------------------------------------- */
    +
    float32_t testInputA_f32[64] =
    +
    {
    +
    -0.808920, 1.357369, 1.180861, -0.504544, 1.762637, -0.703285,
    +
    1.696966, 0.620571, -0.151093, -0.100235, -0.872382, -0.403579,
    +
    -0.860749, -0.382648, -1.052338, 0.128113, -0.646269, 1.093377,
    +
    -2.209198, 0.471706, 0.408901, 1.266242, 0.598252, 1.176827,
    +
    -0.203421, 0.213596, -0.851964, -0.466958, 0.021841, -0.698938,
    +
    -0.604107, 0.461778, -0.318219, 0.942520, 0.577585, 0.417619,
    +
    0.614665, 0.563679, -1.295073, -0.764437, 0.952194, -0.859222,
    +
    -0.618554, -2.268542, -1.210592, 1.655853, -2.627219, -0.994249,
    +
    -1.374704, 0.343799, 0.025619, 1.227481, -0.708031, 0.069355,
    +
    -1.845228, -1.570886, 1.010668, -1.802084, 1.630088, 1.286090,
    +
    -0.161050, -0.940794, 0.367961, 0.291907
    +
    +
    };
    +
    +
    float32_t testInputB_f32[64] =
    +
    {
    +
    0.933724, 0.046881, 1.316470, 0.438345, 0.332682, 2.094885,
    +
    0.512081, 0.035546, 0.050894, -2.320371, 0.168711, -1.830493,
    +
    -0.444834, -1.003242, -0.531494, -1.365600, -0.155420, -0.757692,
    +
    -0.431880, -0.380021, 0.096243, -0.695835, 0.558850, -1.648962,
    +
    0.020369, -0.363630, 0.887146, 0.845503, -0.252864, -0.330397,
    +
    1.269131, -1.109295, -1.027876, 0.135940, 0.116721, -0.293399,
    +
    -1.349799, 0.166078, -0.802201, 0.369367, -0.964568, -2.266011,
    +
    0.465178, 0.651222, -0.325426, 0.320245, -0.784178, -0.579456,
    +
    0.093374, 0.604778, -0.048225, 0.376297, -0.394412, 0.578182,
    +
    -1.218141, -1.387326, 0.692462, -0.631297, 0.153137, -0.638952,
    +
    0.635474, -0.970468, 1.334057, -0.111370
    +
    };
    +
    +
    const float testRefOutput_f32[127] =
    +
    {
    +
    -0.818943, 1.229484, -0.533664, 1.016604, 0.341875, -1.963656,
    +
    5.171476, 3.478033, 7.616361, 6.648384, 0.479069, 1.792012,
    +
    -1.295591, -7.447818, 0.315830, -10.657445, -2.483469, -6.524236,
    +
    -7.380591, -3.739005, -8.388957, 0.184147, -1.554888, 3.786508,
    +
    -1.684421, 5.400610, -1.578126, 7.403361, 8.315999, 2.080267,
    +
    11.077776, 2.749673, 7.138962, 2.748762, 0.660363, 0.981552,
    +
    1.442275, 0.552721, -2.576892, 4.703989, 0.989156, 8.759344,
    +
    -0.564825, -3.994680, 0.954710, -5.014144, 6.592329, 1.599488,
    +
    -13.979146, -0.391891, -4.453369, -2.311242, -2.948764, 1.761415,
    +
    -0.138322, 10.433007, -2.309103, 4.297153, 8.535523, 3.209462,
    +
    8.695819, 5.569919, 2.514304, 5.582029, 2.060199, 0.642280,
    +
    7.024616, 1.686615, -6.481756, 1.343084, -3.526451, 1.099073,
    +
    -2.965764, -0.173723, -4.111484, 6.528384, -6.965658, 1.726291,
    +
    1.535172, 11.023435, 2.338401, -4.690188, 1.298210, 3.943885,
    +
    8.407885, 5.168365, 0.684131, 1.559181, 1.859998, 2.852417,
    +
    8.574070, -6.369078, 6.023458, 11.837963, -6.027632, 4.469678,
    +
    -6.799093, -2.674048, 6.250367, -6.809971, -3.459360, 9.112410,
    +
    -2.711621, -1.336678, 1.564249, -1.564297, -1.296760, 8.904013,
    +
    -3.230109, 6.878013, -7.819823, 3.369909, -1.657410, -2.007358,
    +
    -4.112825, 1.370685, -3.420525, -6.276605, 3.244873, -3.352638,
    +
    1.545372, 0.902211, 0.197489, -1.408732, 0.523390, 0.348440, 0
    +
    };
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare Global variables
    +
    * ------------------------------------------------------------------- */
    +
    uint32_t srcALen = 64; /* Length of Input A */
    +
    uint32_t srcBLen = 64; /* Length of Input B */
    +
    uint32_t outLen; /* Length of convolution output */
    +
    float32_t snr; /* output SNR */
    +
    +
    int32_t main(void)
    +
    {
    +
    arm_status status; /* Status of the example */
    +
    arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */
    +
    +
    /* CFFT Structure instance pointer */
    +
    arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
    +
    (arm_cfft_radix4_instance_f32*) &cfft_instance;
    +
    +
    /* output length of convolution */
    +
    outLen = srcALen + srcBLen - 1;
    +
    +
    /* Initialise the fft input buffers with all zeros */
    +
    arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE);
    +
    arm_fill_f32(0.0, Bk, MAX_BLOCKSIZE);
    +
    +
    /* Copy the input values to the fft input buffers */
    +
    arm_copy_f32(testInputA_f32, Ak, MAX_BLOCKSIZE/2);
    +
    arm_copy_f32(testInputB_f32, Bk, MAX_BLOCKSIZE/2);
    +
    +
    /* Initialize the CFFT function to compute 64 point fft */
    +
    status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
    +
    +
    /* Transform input a[n] from time domain to frequency domain A[k] */
    +
    arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
    +
    /* Transform input b[n] from time domain to frequency domain B[k] */
    +
    arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
    +
    +
    /* Complex Multiplication of the two input buffers in frequency domain */
    +
    arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
    +
    +
    /* Initialize the CIFFT function to compute 64 point ifft */
    +
    status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
    +
    +
    /* Transform the multiplication output from frequency domain to time domain,
    +
    that gives the convolved output */
    +
    arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
    +
    +
    /* SNR Calculation */
    +
    snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
    +
    +
    /* Compare the SNR with threshold to test whether the
    +
    computed output is matched with the reference output values. */
    +
    if( snr > SNR_THRESHOLD)
    +
    {
    +
    status = ARM_MATH_SUCCESS;
    +
    }
    +
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_dotproduct_example_f32_8c-example.html b/Documentation/DSP/html/arm_dotproduct_example_f32_8c-example.html new file mode 100644 index 0000000..a175a6b --- /dev/null +++ b/Documentation/DSP/html/arm_dotproduct_example_f32_8c-example.html @@ -0,0 +1,260 @@ + + + + + +arm_dotproduct_example_f32.c +CMSIS-DSP: arm_dotproduct_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_dotproduct_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_dotproduct_example_f32.c
    +
    *
    +
    * Description: Example code computing dot product of two vectors.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include <math.h>
    +
    #include "arm_math.h"
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Defines each of the tests performed
    +
    * ------------------------------------------------------------------- */
    +
    #define MAX_BLOCKSIZE 32
    +
    #define DELTA (0.000001f)
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Test input data for Floating point Dot Product example for 32-blockSize
    +
    * Generated by the MATLAB randn() function
    +
    * ------------------------------------------------------------------- */
    +
    /* ----------------------------------------------------------------------
    +
    ** Test input data of srcA for blockSize 32
    +
    ** ------------------------------------------------------------------- */
    +
    float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
    +
    {
    +
    -0.4325648115282207, -1.6655843782380970, 0.1253323064748307,
    +
    0.2876764203585489, -1.1464713506814637, 1.1909154656429988,
    +
    1.1891642016521031, -0.0376332765933176, 0.3272923614086541,
    +
    0.1746391428209245, -0.1867085776814394, 0.7257905482933027,
    +
    -0.5883165430141887, 2.1831858181971011, -0.1363958830865957,
    +
    0.1139313135208096, 1.0667682113591888, 0.0592814605236053,
    +
    -0.0956484054836690, -0.8323494636500225, 0.2944108163926404,
    +
    -1.3361818579378040, 0.7143245518189522, 1.6235620644462707,
    +
    -0.6917757017022868, 0.8579966728282626, 1.2540014216025324,
    +
    -1.5937295764474768, -1.4409644319010200, 0.5711476236581780,
    +
    -0.3998855777153632, 0.6899973754643451
    +
    };
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Test input data of srcB for blockSize 32
    +
    ** ------------------------------------------------------------------- */
    +
    float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
    +
    {
    +
    1.7491401329284098, 0.1325982188803279, 0.3252281811989881,
    +
    -0.7938091410349637, 0.3149236145048914, -0.5272704888029532,
    +
    0.9322666565031119, 1.1646643544607362, -2.0456694357357357,
    +
    -0.6443728590041911, 1.7410657940825480, 0.4867684246821860,
    +
    1.0488288293660140, 1.4885752747099299, 1.2705014969484090,
    +
    -1.8561241921210170, 2.1343209047321410, 1.4358467535865909,
    +
    -0.9173023332875400, -1.1060770780029008, 0.8105708062681296,
    +
    0.6985430696369063, -0.4015827425012831, 1.2687512030669628,
    +
    -0.7836083053674872, 0.2132664971465569, 0.7878984786088954,
    +
    0.8966819356782295, -0.1869172943544062, 1.0131816724341454,
    +
    0.2484350696132857, 0.0596083377937976
    +
    };
    +
    +
    /* Reference dot product output */
    +
    float32_t refDotProdOut = 5.9273644806352142;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare Global variables
    +
    * ------------------------------------------------------------------- */
    +
    float32_t multOutput[MAX_BLOCKSIZE]; /* Intermediate output */
    +
    float32_t testOutput; /* Final ouput */
    +
    +
    arm_status status; /* Status of the example */
    +
    +
    int32_t main(void)
    +
    {
    +
    uint32_t i; /* Loop counter */
    +
    float32_t diff; /* Difference between reference and test outputs */
    +
    +
    /* Multiplication of two input buffers */
    +
    arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
    +
    +
    /* Accumulate the multiplication output values to
    +
    get the dot product of the two inputs */
    +
    for(i=0; i< MAX_BLOCKSIZE; i++)
    +
    {
    +
    arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
    +
    }
    +
    +
    /* absolute value of difference between ref and test */
    +
    diff = fabsf(refDotProdOut - testOutput);
    +
    +
    /* Comparison of dot product value with reference */
    +
    if(diff > DELTA)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    if( status == ARM_MATH_TEST_FAILURE)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_fft_bin_example_f32_8c-example.html b/Documentation/DSP/html/arm_fft_bin_example_f32_8c-example.html new file mode 100644 index 0000000..cd397aa --- /dev/null +++ b/Documentation/DSP/html/arm_fft_bin_example_f32_8c-example.html @@ -0,0 +1,230 @@ + + + + + +arm_fft_bin_example_f32.c +CMSIS-DSP: arm_fft_bin_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_fft_bin_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_fft_bin_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating calculation of Max energy bin of
    +
    * frequency domain of input signal.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include "arm_math.h"
    +
    #include "arm_const_structs.h"
    +
    +
    #define TEST_LENGTH_SAMPLES 2048
    +
    +
    /* -------------------------------------------------------------------
    +
    * External Input and Output buffer Declarations for FFT Bin Example
    +
    * ------------------------------------------------------------------- */
    +
    extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES];
    +
    static float32_t testOutput[TEST_LENGTH_SAMPLES/2];
    +
    +
    /* ------------------------------------------------------------------
    +
    * Global variables for FFT Bin Example
    +
    * ------------------------------------------------------------------- */
    +
    uint32_t fftSize = 1024;
    +
    uint32_t ifftFlag = 0;
    +
    uint32_t doBitReverse = 1;
    +
    +
    /* Reference index at which max energy of bin ocuurs */
    +
    uint32_t refIndex = 213, testIndex = 0;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Max magnitude FFT Bin test
    +
    * ------------------------------------------------------------------- */
    +
    +
    int32_t main(void)
    +
    {
    +
    +
    arm_status status;
    +
    float32_t maxValue;
    +
    +
    status = ARM_MATH_SUCCESS;
    +
    +
    /* Process the data through the CFFT/CIFFT module */
    +
    arm_cfft_f32(&arm_cfft_sR_f32_len1024, testInput_f32_10khz, ifftFlag, doBitReverse);
    +
    +
    /* Process the data through the Complex Magnitude Module for
    +
    calculating the magnitude at each bin */
    +
    arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize);
    +
    +
    /* Calculates maxValue and returns corresponding BIN value */
    +
    arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
    +
    +
    if(testIndex != refIndex)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Loop here if the signals fail the PASS check.
    +
    ** This denotes a test failure
    +
    ** ------------------------------------------------------------------- */
    +
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_fir_example_f32_8c-example.html b/Documentation/DSP/html/arm_fir_example_f32_8c-example.html new file mode 100644 index 0000000..fcef847 --- /dev/null +++ b/Documentation/DSP/html/arm_fir_example_f32_8c-example.html @@ -0,0 +1,281 @@ + + + + + +arm_fir_example_f32.c +CMSIS-DSP: arm_fir_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_fir_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_fir_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating how an FIR filter can be used
    +
    * as a low pass filter.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Include Files
    +
    ** ------------------------------------------------------------------- */
    +
    +
    #include "arm_math.h"
    +
    #include "math_helper.h"
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Macro Defines
    +
    ** ------------------------------------------------------------------- */
    +
    +
    #define TEST_LENGTH_SAMPLES 320
    +
    #define SNR_THRESHOLD_F32 140.0f
    +
    #define BLOCK_SIZE 32
    +
    #define NUM_TAPS 29
    +
    +
    /* -------------------------------------------------------------------
    +
    * The input signal and reference output (computed with MATLAB)
    +
    * are defined externally in arm_fir_lpf_data.c.
    +
    * ------------------------------------------------------------------- */
    +
    +
    extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES];
    +
    extern float32_t refOutput[TEST_LENGTH_SAMPLES];
    +
    +
    /* -------------------------------------------------------------------
    +
    * Declare Test output buffer
    +
    * ------------------------------------------------------------------- */
    +
    +
    static float32_t testOutput[TEST_LENGTH_SAMPLES];
    +
    +
    /* -------------------------------------------------------------------
    +
    * Declare State buffer of size (numTaps + blockSize - 1)
    +
    * ------------------------------------------------------------------- */
    +
    +
    static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1];
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** FIR Coefficients buffer generated using fir1() MATLAB function.
    +
    ** fir1(28, 6/24)
    +
    ** ------------------------------------------------------------------- */
    +
    +
    const float32_t firCoeffs32[NUM_TAPS] = {
    +
    -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
    +
    -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
    +
    +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
    +
    +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
    +
    };
    +
    +
    /* ------------------------------------------------------------------
    +
    * Global variables for FIR LPF Example
    +
    * ------------------------------------------------------------------- */
    +
    +
    uint32_t blockSize = BLOCK_SIZE;
    +
    uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE;
    +
    +
    float32_t snr;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * FIR LPF Example
    +
    * ------------------------------------------------------------------- */
    +
    +
    int32_t main(void)
    +
    {
    +
    uint32_t i;
    +
    arm_fir_instance_f32 S;
    +
    arm_status status;
    +
    float32_t *inputF32, *outputF32;
    +
    +
    /* Initialize input and output buffer pointers */
    +
    inputF32 = &testInput_f32_1kHz_15kHz[0];
    +
    outputF32 = &testOutput[0];
    +
    +
    /* Call FIR init function to initialize the instance structure. */
    +
    arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the FIR process function for every blockSize samples
    +
    ** ------------------------------------------------------------------- */
    +
    +
    for(i=0; i < numBlocks; i++)
    +
    {
    +
    arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
    +
    }
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Compare the generated output against the reference output computed
    +
    ** in MATLAB.
    +
    ** ------------------------------------------------------------------- */
    +
    +
    snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);
    +
    +
    if (snr < SNR_THRESHOLD_F32)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    else
    +
    {
    +
    status = ARM_MATH_SUCCESS;
    +
    }
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Loop here if the signal does not match the reference output.
    +
    ** ------------------------------------------------------------------- */
    +
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_graphic_equalizer_example_q31_8c-example.html b/Documentation/DSP/html/arm_graphic_equalizer_example_q31_8c-example.html new file mode 100644 index 0000000..1a71c9a --- /dev/null +++ b/Documentation/DSP/html/arm_graphic_equalizer_example_q31_8c-example.html @@ -0,0 +1,448 @@ + + + + + +arm_graphic_equalizer_example_q31.c +CMSIS-DSP: arm_graphic_equalizer_example_q31.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_graphic_equalizer_example_q31.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_graphic_equalizer_example_q31.c
    +
    *
    +
    * Description: Example showing an audio graphic equalizer constructed
    +
    * out of Biquad filters.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include "arm_math.h"
    +
    #include "math_helper.h"
    +
    +
    /* Length of the overall data in the test */
    +
    #define TESTLENGTH 320
    +
    +
    /* Block size for the underlying processing */
    +
    #define BLOCKSIZE 32
    +
    +
    /* Total number of blocks to run */
    +
    #define NUMBLOCKS (TESTLENGTH/BLOCKSIZE)
    +
    +
    /* Number of 2nd order Biquad stages per filter */
    +
    #define NUMSTAGES 2
    +
    +
    #define SNR_THRESHOLD_F32 98
    +
    +
    /* -------------------------------------------------------------------
    +
    * External Declarations for Input and Output buffers
    +
    * ------------------------------------------------------------------- */
    +
    +
    extern float32_t testInput_f32[TESTLENGTH];
    +
    static float32_t testOutput[TESTLENGTH];
    +
    +
    extern float32_t testRefOutput_f32[TESTLENGTH];
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Q31 state buffers for Band1, Band2, Band3, Band4, Band5
    +
    ** ------------------------------------------------------------------- */
    +
    +
    static q63_t biquadStateBand1Q31[4 * 2];
    +
    static q63_t biquadStateBand2Q31[4 * 2];
    +
    static q31_t biquadStateBand3Q31[4 * 2];
    +
    static q31_t biquadStateBand4Q31[4 * 2];
    +
    static q31_t biquadStateBand5Q31[4 * 2];
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Q31 input and output buffers
    +
    ** ------------------------------------------------------------------- */
    +
    +
    q31_t inputQ31[BLOCKSIZE];
    +
    q31_t outputQ31[BLOCKSIZE];
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Entire coefficient table. There are 10 coefficients per 4th order Biquad
    +
    ** cascade filter. The first 10 coefficients correspond to the -9 dB gain
    +
    ** setting of band 1; the next 10 coefficient correspond to the -8 dB gain
    +
    ** setting of band 1; and so on. There are 10*19=190 coefficients in total
    +
    ** for band 1 (gains = -9, -8, -7, ..., 9). After this come the 190 coefficients
    +
    ** for band 2.
    +
    **
    +
    ** The coefficients are in Q29 format and require a postShift of 2.
    +
    ** ------------------------------------------------------------------- */
    +
    +
    const q31_t coeffTable[950] = {
    +
    +
    /* Band 1, -9 dB gain */
    +
    535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981,
    +
    /* Band 1, -8 dB gain */
    +
    535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778,
    +
    535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686,
    +
    536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972,
    +
    536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897,
    +
    536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716,
    +
    536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676,
    +
    536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017,
    +
    536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975,
    +
    536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777,
    +
    537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648,
    +
    537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803,
    +
    537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454,
    +
    537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806,
    +
    537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059,
    +
    537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409,
    +
    537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045,
    +
    538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151,
    +
    538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907,
    +
    +
    /* Band 2, -9 dB gain */
    +
    531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367,
    +
    /* Band 2, -8 dB gain */
    +
    532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122,
    +
    532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090,
    +
    533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573,
    +
    534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887,
    +
    534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373,
    +
    535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399,
    +
    535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368,
    +
    536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724,
    +
    536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953,
    +
    537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588,
    +
    537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208,
    +
    538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437,
    +
    539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946,
    +
    539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450,
    +
    540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700,
    +
    540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484,
    +
    541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621,
    +
    542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956,
    +
    518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571,
    +
    520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158,
    +
    522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225,
    +
    524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221,
    +
    526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897,
    +
    528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319,
    +
    530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872,
    +
    532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254,
    +
    534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474,
    +
    536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839,
    +
    538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937,
    +
    540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621,
    +
    542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987,
    +
    544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351,
    +
    547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226,
    +
    549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298,
    +
    551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401,
    +
    553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495,
    +
    555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644,
    +
    494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750,
    +
    498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942,
    +
    503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028,
    +
    508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289,
    +
    512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811,
    +
    517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485,
    +
    522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012,
    +
    527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882,
    +
    531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352,
    +
    536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420,
    +
    541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786,
    +
    546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816,
    +
    551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495,
    +
    556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389,
    +
    562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597,
    +
    567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710,
    +
    572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767,
    +
    577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214,
    +
    583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865,
    +
    387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270,
    +
    401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316,
    +
    416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319,
    +
    431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540,
    +
    447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528,
    +
    464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141,
    +
    481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559,
    +
    499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296,
    +
    517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221,
    +
    536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566,
    +
    556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943,
    +
    577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360,
    +
    598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230,
    +
    620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383,
    +
    643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077,
    +
    667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004,
    +
    692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294,
    +
    717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515,
    +
    744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673
    +
    +
    };
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Desired gains, in dB, per band
    +
    ** ------------------------------------------------------------------- */
    +
    +
    int gainDB[5] = {0, -3, 6, 4, -6};
    +
    +
    float32_t snr;
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Graphic equalizer Example
    +
    * ------------------------------------------------------------------- */
    +
    +
    int32_t main(void)
    +
    {
    +
    float32_t *inputF32, *outputF32;
    +
    arm_biquad_cas_df1_32x64_ins_q31 S1;
    +
    arm_biquad_cas_df1_32x64_ins_q31 S2;
    +
    arm_biquad_casd_df1_inst_q31 S3;
    +
    arm_biquad_casd_df1_inst_q31 S4;
    +
    arm_biquad_casd_df1_inst_q31 S5;
    +
    int i;
    +
    int32_t status;
    +
    +
    inputF32 = &testInput_f32[0];
    +
    outputF32 = &testOutput[0];
    +
    +
    /* Initialize the state and coefficient buffers for all Biquad sections */
    +
    +
    arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES,
    +
    (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)],
    +
    &biquadStateBand1Q31[0], 2);
    +
    +
    arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES,
    +
    (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)],
    +
    &biquadStateBand2Q31[0], 2);
    +
    +
    arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES,
    +
    (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)],
    +
    &biquadStateBand3Q31[0], 2);
    +
    +
    arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES,
    +
    (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)],
    +
    &biquadStateBand4Q31[0], 2);
    +
    +
    arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES,
    +
    (q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)],
    +
    &biquadStateBand5Q31[0], 2);
    +
    +
    +
    /* Call the process functions and needs to change filter coefficients
    +
    for varying the gain of each band */
    +
    +
    for(i=0; i < NUMBLOCKS; i++)
    +
    {
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Convert block of input data from float to Q31
    +
    ** ------------------------------------------------------------------- */
    +
    +
    arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Scale down by 1/8. This provides additional headroom so that the
    +
    ** graphic EQ can apply gain.
    +
    ** ------------------------------------------------------------------- */
    +
    +
    arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2
    +
    ** ------------------------------------------------------------------- */
    +
    +
    arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE);
    +
    arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5
    +
    ** ------------------------------------------------------------------- */
    +
    +
    arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE);
    +
    arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE);
    +
    arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Convert Q31 result back to float
    +
    ** ------------------------------------------------------------------- */
    +
    +
    arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Scale back up
    +
    ** ------------------------------------------------------------------- */
    +
    +
    arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
    +
    };
    +
    +
    snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH);
    +
    +
    if (snr < SNR_THRESHOLD_F32)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    else
    +
    {
    +
    status = ARM_MATH_SUCCESS;
    +
    }
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Loop here if the signal does not match the reference output.
    +
    ** ------------------------------------------------------------------- */
    +
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_linear_interp_example_f32_8c-example.html b/Documentation/DSP/html/arm_linear_interp_example_f32_8c-example.html new file mode 100644 index 0000000..3501864 --- /dev/null +++ b/Documentation/DSP/html/arm_linear_interp_example_f32_8c-example.html @@ -0,0 +1,287 @@ + + + + + +arm_linear_interp_example_f32.c +CMSIS-DSP: arm_linear_interp_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_linear_interp_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_linear_interp_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating usage of sin function
    +
    * and uses linear interpolation to get higher precision
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    +
    #include "arm_math.h"
    +
    #include "math_helper.h"
    +
    +
    #define SNR_THRESHOLD 90
    +
    #define TEST_LENGTH_SAMPLES 10
    +
    #define XSPACING (0.00005f)
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Test input data for F32 SIN function
    +
    * Generated by the MATLAB rand() function
    +
    * randn('state', 0)
    +
    * xi = (((1/4.18318581819710)* randn(blockSize, 1) * 2* pi));
    +
    * --------------------------------------------------------------------*/
    +
    float32_t testInputSin_f32[TEST_LENGTH_SAMPLES] =
    +
    {
    +
    -0.649716504673081170, -2.501723745497831200,
    +
    0.188250329003310100, 0.432092748487532540,
    +
    -1.722010988459680800, 1.788766476323060600,
    +
    1.786136060975809500, -0.056525543169408797,
    +
    0.491596272728153760, 0.262309671126153390
    +
    };
    +
    +
    /*------------------------------------------------------------------------------
    +
    * Reference out of SIN F32 function for Block Size = 10
    +
    * Calculated from sin(testInputSin_f32)
    +
    *------------------------------------------------------------------------------*/
    +
    float32_t testRefSinOutput32_f32[TEST_LENGTH_SAMPLES] =
    +
    {
    +
    -0.604960695383043530, -0.597090287967934840,
    +
    0.187140422442966500, 0.418772124875992690,
    +
    -0.988588831792106880, 0.976338412038794010,
    +
    0.976903856413481100, -0.056495446835214236,
    +
    0.472033731854734240, 0.259311907228582830
    +
    };
    +
    +
    /*------------------------------------------------------------------------------
    +
    * Method 1: Test out Buffer Calculated from Cubic Interpolation
    +
    *------------------------------------------------------------------------------*/
    +
    float32_t testOutput[TEST_LENGTH_SAMPLES];
    +
    +
    /*------------------------------------------------------------------------------
    +
    * Method 2: Test out buffer Calculated from Linear Interpolation
    +
    *------------------------------------------------------------------------------*/
    +
    float32_t testLinIntOutput[TEST_LENGTH_SAMPLES];
    +
    +
    /*------------------------------------------------------------------------------
    +
    * External table used for linear interpolation
    +
    *------------------------------------------------------------------------------*/
    +
    extern float arm_linear_interep_table[188495];
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Global Variables for caluclating SNR's for Method1 & Method 2
    +
    * ------------------------------------------------------------------- */
    +
    float32_t snr1;
    +
    float32_t snr2;
    +
    +
    /* ----------------------------------------------------------------------------
    +
    * Calculation of Sine values from Cubic Interpolation and Linear interpolation
    +
    * ---------------------------------------------------------------------------- */
    +
    int32_t main(void)
    +
    {
    +
    uint32_t i;
    +
    arm_status status;
    +
    +
    arm_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &arm_linear_interep_table[0]};
    +
    +
    /*------------------------------------------------------------------------------
    +
    * Method 1: Test out Calculated from Cubic Interpolation
    +
    *------------------------------------------------------------------------------*/
    +
    for(i=0; i< TEST_LENGTH_SAMPLES; i++)
    +
    {
    +
    testOutput[i] = arm_sin_f32(testInputSin_f32[i]);
    +
    }
    +
    +
    /*------------------------------------------------------------------------------
    +
    * Method 2: Test out Calculated from Cubic Interpolation and Linear interpolation
    +
    *------------------------------------------------------------------------------*/
    +
    +
    for(i=0; i< TEST_LENGTH_SAMPLES; i++)
    +
    {
    +
    testLinIntOutput[i] = arm_linear_interp_f32(&S, testInputSin_f32[i]);
    +
    }
    +
    +
    /*------------------------------------------------------------------------------
    +
    * SNR calculation for method 1
    +
    *------------------------------------------------------------------------------*/
    +
    snr1 = arm_snr_f32(testRefSinOutput32_f32, testOutput, 2);
    +
    +
    /*------------------------------------------------------------------------------
    +
    * SNR calculation for method 2
    +
    *------------------------------------------------------------------------------*/
    +
    snr2 = arm_snr_f32(testRefSinOutput32_f32, testLinIntOutput, 2);
    +
    +
    /*------------------------------------------------------------------------------
    +
    * Initialise status depending on SNR calculations
    +
    *------------------------------------------------------------------------------*/
    +
    if( snr2 > snr1)
    +
    {
    +
    status = ARM_MATH_SUCCESS;
    +
    }
    +
    else
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Loop here if the signals fail the PASS check.
    +
    ** This denotes a test failure
    +
    ** ------------------------------------------------------------------- */
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_matrix_example_f32_8c-example.html b/Documentation/DSP/html/arm_matrix_example_f32_8c-example.html new file mode 100644 index 0000000..18b8b05 --- /dev/null +++ b/Documentation/DSP/html/arm_matrix_example_f32_8c-example.html @@ -0,0 +1,309 @@ + + + + + +arm_matrix_example_f32.c +CMSIS-DSP: arm_matrix_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_matrix_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_matrix_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating least square fit to data
    +
    * using matrix functions
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include "arm_math.h"
    +
    #include "math_helper.h"
    +
    +
    #define SNR_THRESHOLD 90
    +
    +
    /* --------------------------------------------------------------------------------
    +
    * Test input data(Cycles) taken from FIR Q15 module for differant cases of blockSize
    +
    * and tapSize
    +
    * --------------------------------------------------------------------------------- */
    +
    +
    const float32_t B_f32[4] =
    +
    {
    +
    782.0, 7577.0, 470.0, 4505.0
    +
    };
    +
    +
    /* --------------------------------------------------------------------------------
    +
    * Formula to fit is C1 + C2 * numTaps + C3 * blockSize + C4 * numTaps * blockSize
    +
    * -------------------------------------------------------------------------------- */
    +
    +
    const float32_t A_f32[16] =
    +
    {
    +
    /* Const, numTaps, blockSize, numTaps*blockSize */
    +
    1.0, 32.0, 4.0, 128.0,
    +
    1.0, 32.0, 64.0, 2048.0,
    +
    1.0, 16.0, 4.0, 64.0,
    +
    1.0, 16.0, 64.0, 1024.0,
    +
    };
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Temporary buffers for storing intermediate values
    +
    * ------------------------------------------------------------------- */
    +
    /* Transpose of A Buffer */
    +
    float32_t AT_f32[16];
    +
    /* (Transpose of A * A) Buffer */
    +
    float32_t ATMA_f32[16];
    +
    /* Inverse(Transpose of A * A) Buffer */
    +
    float32_t ATMAI_f32[16];
    +
    /* Test Output Buffer */
    +
    float32_t X_f32[4];
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Reference ouput buffer C1, C2, C3 and C4 taken from MATLAB
    +
    * ------------------------------------------------------------------- */
    +
    const float32_t xRef_f32[4] = {73.0, 8.0, 21.25, 2.875};
    +
    +
    float32_t snr;
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Max magnitude FFT Bin test
    +
    * ------------------------------------------------------------------- */
    +
    +
    int32_t main(void)
    +
    {
    +
    +
    arm_matrix_instance_f32 A; /* Matrix A Instance */
    +
    arm_matrix_instance_f32 AT; /* Matrix AT(A transpose) instance */
    +
    arm_matrix_instance_f32 ATMA; /* Matrix ATMA( AT multiply with A) instance */
    +
    arm_matrix_instance_f32 ATMAI; /* Matrix ATMAI(Inverse of ATMA) instance */
    +
    arm_matrix_instance_f32 B; /* Matrix B instance */
    +
    arm_matrix_instance_f32 X; /* Matrix X(Unknown Matrix) instance */
    +
    +
    uint32_t srcRows, srcColumns; /* Temporary variables */
    +
    arm_status status;
    +
    +
    /* Initialise A Matrix Instance with numRows, numCols and data array(A_f32) */
    +
    srcRows = 4;
    +
    srcColumns = 4;
    +
    arm_mat_init_f32(&A, srcRows, srcColumns, (float32_t *)A_f32);
    +
    +
    /* Initialise Matrix Instance AT with numRows, numCols and data array(AT_f32) */
    +
    srcRows = 4;
    +
    srcColumns = 4;
    +
    arm_mat_init_f32(&AT, srcRows, srcColumns, AT_f32);
    +
    +
    /* calculation of A transpose */
    +
    status = arm_mat_trans_f32(&A, &AT);
    +
    +
    +
    /* Initialise ATMA Matrix Instance with numRows, numCols and data array(ATMA_f32) */
    +
    srcRows = 4;
    +
    srcColumns = 4;
    +
    arm_mat_init_f32(&ATMA, srcRows, srcColumns, ATMA_f32);
    +
    +
    /* calculation of AT Multiply with A */
    +
    status = arm_mat_mult_f32(&AT, &A, &ATMA);
    +
    +
    /* Initialise ATMAI Matrix Instance with numRows, numCols and data array(ATMAI_f32) */
    +
    srcRows = 4;
    +
    srcColumns = 4;
    +
    arm_mat_init_f32(&ATMAI, srcRows, srcColumns, ATMAI_f32);
    +
    +
    /* calculation of Inverse((Transpose(A) * A) */
    +
    status = arm_mat_inverse_f32(&ATMA, &ATMAI);
    +
    +
    /* calculation of (Inverse((Transpose(A) * A)) * Transpose(A)) */
    +
    status = arm_mat_mult_f32(&ATMAI, &AT, &ATMA);
    +
    +
    /* Initialise B Matrix Instance with numRows, numCols and data array(B_f32) */
    +
    srcRows = 4;
    +
    srcColumns = 1;
    +
    arm_mat_init_f32(&B, srcRows, srcColumns, (float32_t *)B_f32);
    +
    +
    /* Initialise X Matrix Instance with numRows, numCols and data array(X_f32) */
    +
    srcRows = 4;
    +
    srcColumns = 1;
    +
    arm_mat_init_f32(&X, srcRows, srcColumns, X_f32);
    +
    +
    /* calculation ((Inverse((Transpose(A) * A)) * Transpose(A)) * B) */
    +
    status = arm_mat_mult_f32(&ATMA, &B, &X);
    +
    +
    /* Comparison of reference with test output */
    +
    snr = arm_snr_f32((float32_t *)xRef_f32, X_f32, 4);
    +
    +
    /*------------------------------------------------------------------------------
    +
    * Initialise status depending on SNR calculations
    +
    *------------------------------------------------------------------------------*/
    +
    if( snr > SNR_THRESHOLD)
    +
    {
    +
    status = ARM_MATH_SUCCESS;
    +
    }
    +
    else
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Loop here if the signals fail the PASS check.
    +
    ** This denotes a test failure
    +
    ** ------------------------------------------------------------------- */
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_signal_converge_example_f32_8c-example.html b/Documentation/DSP/html/arm_signal_converge_example_f32_8c-example.html new file mode 100644 index 0000000..6450350 --- /dev/null +++ b/Documentation/DSP/html/arm_signal_converge_example_f32_8c-example.html @@ -0,0 +1,319 @@ + + + + + +arm_signal_converge_example_f32.c +CMSIS-DSP: arm_signal_converge_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_signal_converge_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_signal_converge_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating convergence of an adaptive
    +
    * filter.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include "arm_math.h"
    +
    #include "math_helper.h"
    +
    +
    /* ----------------------------------------------------------------------
    +
    ** Global defines for the simulation
    +
    * ------------------------------------------------------------------- */
    +
    +
    #define TEST_LENGTH_SAMPLES 1536
    +
    #define NUMTAPS 32
    +
    #define BLOCKSIZE 32
    +
    #define DELTA_ERROR 0.000001f
    +
    #define DELTA_COEFF 0.0001f
    +
    #define MU 0.5f
    +
    +
    #define NUMFRAMES (TEST_LENGTH_SAMPLES / BLOCKSIZE)
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare FIR state buffers and structure
    +
    * ------------------------------------------------------------------- */
    +
    +
    float32_t firStateF32[NUMTAPS + BLOCKSIZE];
    +
    arm_fir_instance_f32 LPF_instance;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare LMSNorm state buffers and structure
    +
    * ------------------------------------------------------------------- */
    +
    +
    float32_t lmsStateF32[NUMTAPS + BLOCKSIZE];
    +
    float32_t errOutput[TEST_LENGTH_SAMPLES];
    +
    arm_lms_norm_instance_f32 lmsNorm_instance;
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Function Declarations for Signal Convergence Example
    +
    * ------------------------------------------------------------------- */
    +
    +
    arm_status test_signal_converge_example( void );
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Internal functions
    +
    * ------------------------------------------------------------------- */
    +
    arm_status test_signal_converge(float32_t* err_signal,
    +
    uint32_t blockSize);
    +
    +
    void getinput(float32_t* input,
    +
    uint32_t fr_cnt,
    +
    uint32_t blockSize);
    +
    +
    /* ----------------------------------------------------------------------
    +
    * External Declarations for FIR F32 module Test
    +
    * ------------------------------------------------------------------- */
    +
    extern float32_t testInput_f32[TEST_LENGTH_SAMPLES];
    +
    extern float32_t lmsNormCoeff_f32[32];
    +
    extern const float32_t FIRCoeff_f32[32];
    +
    extern arm_lms_norm_instance_f32 lmsNorm_instance;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare I/O buffers
    +
    * ------------------------------------------------------------------- */
    +
    +
    float32_t wire1[BLOCKSIZE];
    +
    float32_t wire2[BLOCKSIZE];
    +
    float32_t wire3[BLOCKSIZE];
    +
    float32_t err_signal[BLOCKSIZE];
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Signal converge test
    +
    * ------------------------------------------------------------------- */
    +
    +
    int32_t main(void)
    +
    {
    +
    uint32_t i;
    +
    arm_status status;
    +
    uint32_t index;
    +
    float32_t minValue;
    +
    +
    /* Initialize the LMSNorm data structure */
    +
    arm_lms_norm_init_f32(&lmsNorm_instance, NUMTAPS, lmsNormCoeff_f32, lmsStateF32, MU, BLOCKSIZE);
    +
    +
    /* Initialize the FIR data structure */
    +
    arm_fir_init_f32(&LPF_instance, NUMTAPS, (float32_t *)FIRCoeff_f32, firStateF32, BLOCKSIZE);
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Loop over the frames of data and execute each of the processing
    +
    * functions in the system.
    +
    * ------------------------------------------------------------------- */
    +
    +
    for(i=0; i < NUMFRAMES; i++)
    +
    {
    +
    /* Read the input data - uniformly distributed random noise - into wire1 */
    +
    arm_copy_f32(testInput_f32 + (i * BLOCKSIZE), wire1, BLOCKSIZE);
    +
    +
    /* Execute the FIR processing function. Input wire1 and output wire2 */
    +
    arm_fir_f32(&LPF_instance, wire1, wire2, BLOCKSIZE);
    +
    +
    /* Execute the LMS Norm processing function*/
    +
    +
    arm_lms_norm_f32(&lmsNorm_instance, /* LMSNorm instance */
    +
    wire1, /* Input signal */
    +
    wire2, /* Reference Signal */
    +
    wire3, /* Converged Signal */
    +
    err_signal, /* Error Signal, this will become small as the signal converges */
    +
    BLOCKSIZE); /* BlockSize */
    +
    +
    /* apply overall gain */
    +
    arm_scale_f32(wire3, 5, wire3, BLOCKSIZE); /* in-place buffer */
    +
    }
    +
    +
    status = ARM_MATH_SUCCESS;
    +
    +
    /* -------------------------------------------------------------------------------
    +
    * Test whether the error signal has reached towards 0.
    +
    * ----------------------------------------------------------------------------- */
    +
    +
    arm_abs_f32(err_signal, err_signal, BLOCKSIZE);
    +
    arm_min_f32(err_signal, BLOCKSIZE, &minValue, &index);
    +
    +
    if (minValue > DELTA_ERROR)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Test whether the filter coefficients have converged.
    +
    * ------------------------------------------------------------------- */
    +
    +
    arm_sub_f32((float32_t *)FIRCoeff_f32, lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);
    +
    +
    arm_abs_f32(lmsNormCoeff_f32, lmsNormCoeff_f32, NUMTAPS);
    +
    arm_min_f32(lmsNormCoeff_f32, NUMTAPS, &minValue, &index);
    +
    +
    if (minValue > DELTA_COEFF)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Loop here if the signals did not pass the convergence check.
    +
    * This denotes a test failure
    +
    * ------------------------------------------------------------------- */
    +
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_sin_cos_example_f32_8c-example.html b/Documentation/DSP/html/arm_sin_cos_example_f32_8c-example.html new file mode 100644 index 0000000..b66f077 --- /dev/null +++ b/Documentation/DSP/html/arm_sin_cos_example_f32_8c-example.html @@ -0,0 +1,245 @@ + + + + + +arm_sin_cos_example_f32.c +CMSIS-DSP: arm_sin_cos_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_sin_cos_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 12. March 2014
    +
    * $Revision: V1.4.3
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_sin_cos_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating sin and cos calculation of input signal.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include <math.h>
    +
    #include "arm_math.h"
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Defines each of the tests performed
    +
    * ------------------------------------------------------------------- */
    +
    #define MAX_BLOCKSIZE 32
    +
    #define DELTA (0.0001f)
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Test input data for Floating point sin_cos example for 32-blockSize
    +
    * Generated by the MATLAB randn() function
    +
    * ------------------------------------------------------------------- */
    +
    +
    const float32_t testInput_f32[MAX_BLOCKSIZE] =
    +
    {
    +
    -1.244916875853235400, -4.793533929171324800, 0.360705030233248850, 0.827929644170887320, -3.299532218312426900, 3.427441903227623800, 3.422401784294607700, -0.108308165334010680,
    +
    0.941943896490312180, 0.502609575000365850, -0.537345278736373500, 2.088817392965764500, -1.693168684143455700, 6.283185307179590700, -0.392545884746175080, 0.327893095115825040,
    +
    3.070147440456292300, 0.170611405884662230, -0.275275082396073010, -2.395492805446796300, 0.847311163536506600, -3.845517018083148800, 2.055818378415868300, 4.672594161978930800,
    +
    -1.990923030266425800, 2.469305197656249500, 3.609002606064021000, -4.586736582331667500, -4.147080139136136300, 1.643756718868359500, -1.150866392366494800, 1.985805026477433800
    +
    +
    +
    };
    +
    +
    const float32_t testRefOutput_f32 = 1.000000000;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare Global variables
    +
    * ------------------------------------------------------------------- */
    +
    uint32_t blockSize = 32;
    +
    float32_t testOutput;
    +
    float32_t cosOutput;
    +
    float32_t sinOutput;
    +
    float32_t cosSquareOutput;
    +
    float32_t sinSquareOutput;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Max magnitude FFT Bin test
    +
    * ------------------------------------------------------------------- */
    +
    +
    arm_status status;
    +
    +
    int32_t main(void)
    +
    {
    +
    float32_t diff;
    +
    uint32_t i;
    +
    +
    for(i=0; i< blockSize; i++)
    +
    {
    +
    cosOutput = arm_cos_f32(testInput_f32[i]);
    +
    sinOutput = arm_sin_f32(testInput_f32[i]);
    +
    +
    arm_mult_f32(&cosOutput, &cosOutput, &cosSquareOutput, 1);
    +
    arm_mult_f32(&sinOutput, &sinOutput, &sinSquareOutput, 1);
    +
    +
    arm_add_f32(&cosSquareOutput, &sinSquareOutput, &testOutput, 1);
    +
    +
    /* absolute value of difference between ref and test */
    +
    diff = fabsf(testRefOutput_f32 - testOutput);
    +
    +
    /* Comparison of sin_cos value with reference */
    +
    if(diff > DELTA)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    if( status == ARM_MATH_TEST_FAILURE)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/arm_variance_example_f32_8c-example.html b/Documentation/DSP/html/arm_variance_example_f32_8c-example.html new file mode 100644 index 0000000..2fc4e61 --- /dev/null +++ b/Documentation/DSP/html/arm_variance_example_f32_8c-example.html @@ -0,0 +1,279 @@ + + + + + +arm_variance_example_f32.c +CMSIS-DSP: arm_variance_example_f32.c + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    arm_variance_example_f32.c
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
    +
    *
    +
    * $Date: 17. January 2013
    +
    * $Revision: V1.4.0
    +
    *
    +
    * Project: CMSIS DSP Library
    +
    * Title: arm_variance_example_f32.c
    +
    *
    +
    * Description: Example code demonstrating variance calculation of input sequence.
    +
    *
    +
    * Target Processor: Cortex-M4/Cortex-M3
    +
    *
    +
    * Redistribution and use in source and binary forms, with or without
    +
    * modification, are permitted provided that the following conditions
    +
    * are met:
    +
    * - Redistributions of source code must retain the above copyright
    +
    * notice, this list of conditions and the following disclaimer.
    +
    * - Redistributions in binary form must reproduce the above copyright
    +
    * notice, this list of conditions and the following disclaimer in
    +
    * the documentation and/or other materials provided with the
    +
    * distribution.
    +
    * - Neither the name of ARM LIMITED nor the names of its contributors
    +
    * may be used to endorse or promote products derived from this
    +
    * software without specific prior written permission.
    +
    *
    +
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    +
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    +
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
    +
    * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
    +
    * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
    +
    * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
    +
    * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
    +
    * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
    +
    * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    +
    * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    +
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    +
    * POSSIBILITY OF SUCH DAMAGE.
    +
    * -------------------------------------------------------------------- */
    +
    +
    #include <math.h>
    +
    #include "arm_math.h"
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Defines each of the tests performed
    +
    * ------------------------------------------------------------------- */
    +
    #define MAX_BLOCKSIZE 32
    +
    #define DELTA (0.000001f)
    +
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare I/O buffers
    +
    * ------------------------------------------------------------------- */
    +
    float32_t wire1[MAX_BLOCKSIZE];
    +
    float32_t wire2[MAX_BLOCKSIZE];
    +
    float32_t wire3[MAX_BLOCKSIZE];
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Test input data for Floating point Variance example for 32-blockSize
    +
    * Generated by the MATLAB randn() function
    +
    * ------------------------------------------------------------------- */
    +
    +
    float32_t testInput_f32[32] =
    +
    {
    +
    -0.432564811528221, -1.665584378238097, 0.125332306474831, 0.287676420358549,
    +
    -1.146471350681464, 1.190915465642999, 1.189164201652103, -0.037633276593318,
    +
    0.327292361408654, 0.174639142820925, -0.186708577681439, 0.725790548293303,
    +
    -0.588316543014189, 2.183185818197101, -0.136395883086596, 0.113931313520810,
    +
    1.066768211359189, 0.059281460523605, -0.095648405483669, -0.832349463650022,
    +
    0.294410816392640, -1.336181857937804, 0.714324551818952, 1.623562064446271,
    +
    -0.691775701702287, 0.857996672828263, 1.254001421602532, -1.593729576447477,
    +
    -1.440964431901020, 0.571147623658178, -0.399885577715363, 0.689997375464345
    +
    +
    };
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Declare Global variables
    +
    * ------------------------------------------------------------------- */
    +
    uint32_t blockSize = 32;
    +
    float32_t refVarianceOut = 0.903941793931839;
    +
    +
    /* ----------------------------------------------------------------------
    +
    * Variance calculation test
    +
    * ------------------------------------------------------------------- */
    +
    +
    int32_t main(void)
    +
    {
    +
    arm_status status;
    +
    float32_t mean, oneByBlockSize;
    +
    float32_t variance;
    +
    float32_t diff;
    +
    +
    status = ARM_MATH_SUCCESS;
    +
    +
    /* Calculation of mean value of input */
    +
    +
    /* x' = 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */
    +
    +
    /* Fill wire1 buffer with 1.0 value */
    +
    arm_fill_f32(1.0, wire1, blockSize);
    +
    +
    /* Calculate the dot product of wire1 and wire2 */
    +
    /* (x(0)* 1 + x(1) * 1 + ...+ x(n-1) * 1) */
    +
    arm_dot_prod_f32(testInput_f32, wire1, blockSize, &mean);
    +
    +
    /* Calculation of 1/blockSize */
    +
    oneByBlockSize = 1.0 / (blockSize);
    +
    +
    /* 1/blockSize * (x(0)* 1 + x(1) * 1 + ... + x(n-1) * 1) */
    +
    arm_mult_f32(&mean, &oneByBlockSize, &mean, 1);
    +
    +
    +
    /* Calculation of variance value of input */
    +
    +
    /* (1/blockSize) * (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */
    +
    +
    /* Fill wire2 with mean value x' */
    +
    arm_fill_f32(mean, wire2, blockSize);
    +
    +
    /* wire3 contains (x-x') */
    +
    arm_sub_f32(testInput_f32, wire2, wire3, blockSize);
    +
    +
    /* wire2 contains (x-x') */
    +
    arm_copy_f32(wire3, wire2, blockSize);
    +
    +
    /* (x(0) - x') * (x(0) - x') + (x(1) - x') * (x(1) - x') + ... + (x(n-1) - x') * (x(n-1) - x') */
    +
    arm_dot_prod_f32(wire2, wire3, blockSize, &variance);
    +
    +
    /* Calculation of 1/blockSize */
    +
    oneByBlockSize = 1.0 / (blockSize - 1);
    +
    +
    /* Calculation of variance */
    +
    arm_mult_f32(&variance, &oneByBlockSize, &variance, 1);
    +
    +
    /* absolute value of difference between ref and test */
    +
    diff = fabsf(refVarianceOut - variance);
    +
    +
    /* Comparison of variance value with reference */
    +
    if(diff > DELTA)
    +
    {
    +
    status = ARM_MATH_TEST_FAILURE;
    +
    }
    +
    +
    if( status != ARM_MATH_SUCCESS)
    +
    {
    +
    while(1);
    +
    }
    +
    +
    while(1); /* main function does not return */
    +
    }
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/bc_s.png b/Documentation/DSP/html/bc_s.png new file mode 100644 index 0000000..224b29a Binary files /dev/null and b/Documentation/DSP/html/bc_s.png differ diff --git a/Documentation/DSP/html/bdwn.png b/Documentation/DSP/html/bdwn.png new file mode 100644 index 0000000..940a0b9 Binary files /dev/null and b/Documentation/DSP/html/bdwn.png differ diff --git a/Documentation/DSP/html/clarke.gif b/Documentation/DSP/html/clarke.gif new file mode 100644 index 0000000..5c75d09 Binary files /dev/null and b/Documentation/DSP/html/clarke.gif differ diff --git a/Documentation/DSP/html/clarkeFormula.gif b/Documentation/DSP/html/clarkeFormula.gif new file mode 100644 index 0000000..f2a1c3e Binary files /dev/null and b/Documentation/DSP/html/clarkeFormula.gif differ diff --git a/Documentation/DSP/html/clarkeInvFormula.gif b/Documentation/DSP/html/clarkeInvFormula.gif new file mode 100644 index 0000000..60522f7 Binary files /dev/null and b/Documentation/DSP/html/clarkeInvFormula.gif differ diff --git a/Documentation/DSP/html/classes.html b/Documentation/DSP/html/classes.html new file mode 100644 index 0000000..107aaa7 --- /dev/null +++ b/Documentation/DSP/html/classes.html @@ -0,0 +1,165 @@ + + + + + +Data Structure Index +CMSIS-DSP: Data Structure Index + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Data Structure Index
    +
    +
    +
    B | C | D | F | I | L | M | P | R
    + + + + + + + + + + + + + + + + + + + +
      B  
    +    		arm_cfft_instance_q15   arm_fir_decimate_instance_q15   
      I  
    +    		arm_matrix_instance_f64   
    arm_cfft_instance_q31   arm_fir_decimate_instance_q31   arm_matrix_instance_q15   
    arm_bilinear_interp_instance_f32   arm_cfft_radix2_instance_f32   arm_fir_instance_f32   arm_iir_lattice_instance_f32   arm_matrix_instance_q31   
    arm_bilinear_interp_instance_q15   arm_cfft_radix2_instance_q15   arm_fir_instance_q15   arm_iir_lattice_instance_q15   
      P  
    +
    arm_bilinear_interp_instance_q31   arm_cfft_radix2_instance_q31   arm_fir_instance_q31   arm_iir_lattice_instance_q31   
    arm_bilinear_interp_instance_q7   arm_cfft_radix4_instance_f32   arm_fir_instance_q7   
      L  
    +    		arm_pid_instance_f32   
    arm_biquad_cas_df1_32x64_ins_q31   arm_cfft_radix4_instance_q15   arm_fir_interpolate_instance_f32   arm_pid_instance_q15   
    arm_biquad_cascade_df2T_instance_f32   arm_cfft_radix4_instance_q31   arm_fir_interpolate_instance_q15   arm_linear_interp_instance_f32   arm_pid_instance_q31   
    arm_biquad_cascade_df2T_instance_f64   
      D  
    +    		arm_fir_interpolate_instance_q31   arm_lms_instance_f32   
      R  
    +
    arm_biquad_cascade_stereo_df2T_instance_f32   arm_fir_lattice_instance_f32   arm_lms_instance_q15   
    arm_biquad_casd_df1_inst_f32   arm_dct4_instance_f32   arm_fir_lattice_instance_q15   arm_lms_instance_q31   arm_rfft_fast_instance_f32   
    arm_biquad_casd_df1_inst_q15   arm_dct4_instance_q15   arm_fir_lattice_instance_q31   arm_lms_norm_instance_f32   arm_rfft_instance_f32   
    arm_biquad_casd_df1_inst_q31   arm_dct4_instance_q31   arm_fir_sparse_instance_f32   arm_lms_norm_instance_q15   arm_rfft_instance_q15   
      C  
    +
      F  
    +    		arm_fir_sparse_instance_q15   arm_lms_norm_instance_q31   arm_rfft_instance_q31   
    arm_fir_sparse_instance_q31   
      M  
    +
    arm_cfft_instance_f32   arm_fir_decimate_instance_f32   arm_fir_sparse_instance_q7   
    arm_matrix_instance_f32   
    +
    B | C | D | F | I | L | M | P | R
    +
    +
    + + + + diff --git a/Documentation/DSP/html/closed.png b/Documentation/DSP/html/closed.png new file mode 100644 index 0000000..98cc2c9 Binary files /dev/null and b/Documentation/DSP/html/closed.png differ diff --git a/Documentation/DSP/html/cmsis.css b/Documentation/DSP/html/cmsis.css new file mode 100644 index 0000000..293d0d0 --- /dev/null +++ b/Documentation/DSP/html/cmsis.css @@ -0,0 +1,1269 @@ +/* The standard CSS for doxygen */ + +body, table, div, p, dl { + font-family: Lucida Grande, Verdana, Geneva, Arial, sans-serif; + font-size: 13px; + line-height: 1.3; +} + +/* CMSIS styles */ + +.style1 { + text-align: center; +} +.style2 { + color: #0000FF; + font-weight: normal; +} +.style3 { + text-align: left; +} +.style4 { + color: #008000; +} +.style5 { + color: #0000FF; +} +.style6 { + color: #000000; + font-style:italic; +} +.mand { + color: #0000FF; +} +.opt { + color: #008000; +} +.cond { + color: #990000; +} + +.choice +{ + background-color:#F7F9D0; +} +.seq +{ + background-color:#C9DECB; +} +.group1 +{ + background-color:#F8F1F1; +} +.group2 +{ + background-color:#DCEDEA; +} + + +ul ul { + list-style-type: disc; +} + +ul ul ul { + list-style-type: disc; +} + +ul.hierarchy { + color: green; +} + +em { + color: #000000; + font-style:italic; +} + + + +/* CMSIS Tables */ +table.cmtab1 { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; + text-align: justify; + width:70%; +} + +th.cmtab1 { + background: #EBEFF6; + font-weight: bold; + height: 28px; +} + +td.cmtab1 { + padding:1px; + text-align: left; +} + +table.cmtable { + border-collapse:collapse; + text-align: justify; +} + +table.cmtable td, table.cmtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.cmtable th { + background-color: #EBEFF6; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; +} + +td.MonoTxt { + font-family:"Arial monospaced for SAP"; +} + +td.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.h2 +{ + font-size: 120%; + font-weight: bold; +} + + + +/* @group Heading Levels */ + +h1 { + font-size: 150%; +} + +.title { + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2 { + font-size: 120%; +} + +h3 { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd, p.starttd { + margin-top: 2px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3A568E; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4464A5; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9AAED5; + color: #ffffff; + border: 1px double #849CCC; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C3CFE6; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; +} + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C3CFE6; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C3CFE6; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EDF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9AAED5; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A2B4D8; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4769AD; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memItemLeft, .memItemRight, .memTemplParams { + border-top: 1px solid #C3CFE6; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4464A5; + white-space: nowrap; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4464A5; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 0px 6px 0px; + color: #233456; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #708CC4; + border-top:1px solid #5072B7; + border-left:1px solid #5072B7; + border-right:1px solid #C3CFE6; + border-bottom:1px solid #C3CFE6; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3A568E; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #293C63; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2B4069; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #EBEFF6; + color: #000000; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A7B8DA; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A7B8DA; + border-bottom: 1px solid #A7B8DA; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A7B8DA; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + font-size: 90%; + color: #233456; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A7B8DA; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + height:30px; + line-height:30px; + color:#889FCE; + border:solid 1px #C1CDE5; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#344D7E; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; +} + +.navpath li.navelem a:hover +{ + color:#6583BF; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#344D7E; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + margin-left: 5px; + font-size: 8pt; + padding-left: 5px; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C3CFE6; +} + +div.headertitle +{ + padding: 5px 5px 5px 7px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5072B7; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #8EA4D0; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#314877; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D7DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4464A5; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/Documentation/DSP/html/dct4FormatsQ15Table.gif b/Documentation/DSP/html/dct4FormatsQ15Table.gif new file mode 100644 index 0000000..050999c Binary files /dev/null and b/Documentation/DSP/html/dct4FormatsQ15Table.gif differ diff --git a/Documentation/DSP/html/dct4FormatsQ31Table.gif b/Documentation/DSP/html/dct4FormatsQ31Table.gif new file mode 100644 index 0000000..7491187 Binary files /dev/null and b/Documentation/DSP/html/dct4FormatsQ31Table.gif differ diff --git a/Documentation/DSP/html/dct4NormalizingF32Table.gif b/Documentation/DSP/html/dct4NormalizingF32Table.gif new file mode 100644 index 0000000..f3536b8 Binary files /dev/null and b/Documentation/DSP/html/dct4NormalizingF32Table.gif differ diff --git a/Documentation/DSP/html/dct4NormalizingQ15Table.gif b/Documentation/DSP/html/dct4NormalizingQ15Table.gif new file mode 100644 index 0000000..625a418 Binary files /dev/null and b/Documentation/DSP/html/dct4NormalizingQ15Table.gif differ diff --git a/Documentation/DSP/html/dct4NormalizingQ31Table.gif b/Documentation/DSP/html/dct4NormalizingQ31Table.gif new file mode 100644 index 0000000..22d1f65 Binary files /dev/null and b/Documentation/DSP/html/dct4NormalizingQ31Table.gif differ diff --git a/Documentation/DSP/html/deprecated.html b/Documentation/DSP/html/deprecated.html new file mode 100644 index 0000000..4b37ad6 --- /dev/null +++ b/Documentation/DSP/html/deprecated.html @@ -0,0 +1,158 @@ + + + + + +Deprecated List +CMSIS-DSP: Deprecated List + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    Deprecated List
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    Global arm_cfft_radix2_f32 (const arm_cfft_radix2_instance_f32 *S, float32_t *pSrc)
    +
    Do not use this function. It has been superseded by arm_cfft_f32 and will be removed in the future.
    +
    Global arm_cfft_radix2_init_f32 (arm_cfft_radix2_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
    +
    Do not use this function. It has been superseded by arm_cfft_f32 and will be removed in the future.
    +
    Global arm_cfft_radix2_init_q15 (arm_cfft_radix2_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
    +
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Global arm_cfft_radix2_init_q31 (arm_cfft_radix2_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
    +
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Global arm_cfft_radix2_q15 (const arm_cfft_radix2_instance_q15 *S, q15_t *pSrc)
    +
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Global arm_cfft_radix2_q31 (const arm_cfft_radix2_instance_q31 *S, q31_t *pSrc)
    +
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Global arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
    +
    Do not use this function. It has been superseded by arm_cfft_f32 and will be removed in the future.
    +
    Global arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
    +
    Do not use this function. It has been superceded by arm_cfft_f32 and will be removed in the future.
    +
    Global arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
    +
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Global arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
    +
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Global arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
    +
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Global arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
    +
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Global arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
    +
    Do not use this function. It has been superceded by arm_rfft_fast_f32 and will be removed in the future.
    +
    Global arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
    +
    Do not use this function. It has been superceded by arm_rfft_fast_init_f32 and will be removed in the future.
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/dir_05485b5eab41976e219ba5522ae8a40f.html b/Documentation/DSP/html/dir_05485b5eab41976e219ba5522ae8a40f.html new file mode 100644 index 0000000..53b4dc8 --- /dev/null +++ b/Documentation/DSP/html/dir_05485b5eab41976e219ba5522ae8a40f.html @@ -0,0 +1,140 @@ + + + + + +ARM Directory Reference +CMSIS-DSP: ARM Directory Reference + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    ARM Directory Reference
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    directory  RTE
     
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    +Files

    file  arm_sin_cos_example_f32.c
     
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    CMSIS-DSP +  Version 1.4.7 +
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    ARMCM7_SP Directory Reference
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    +Files

    file  arm_fft_bin_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
     
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    + + + + diff --git a/Documentation/DSP/html/dir_0a655a63e9fde46c9762ddfc77ca04bf.html b/Documentation/DSP/html/dir_0a655a63e9fde46c9762ddfc77ca04bf.html new file mode 100644 index 0000000..5ea8e5a --- /dev/null +++ b/Documentation/DSP/html/dir_0a655a63e9fde46c9762ddfc77ca04bf.html @@ -0,0 +1,141 @@ + + + + + +Device Directory Reference +CMSIS-DSP: Device Directory Reference + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    Device Directory Reference
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    +Directories

    directory  ARMCM0
     
    directory  ARMCM3
     
    directory  ARMCM4_FP
     
    directory  ARMCM7_SP
     
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    + + + + diff --git a/Documentation/DSP/html/dir_0a68311637137c2c11b8e5c250252a09.html b/Documentation/DSP/html/dir_0a68311637137c2c11b8e5c250252a09.html new file mode 100644 index 0000000..40e33d9 --- /dev/null +++ b/Documentation/DSP/html/dir_0a68311637137c2c11b8e5c250252a09.html @@ -0,0 +1,135 @@ + + + + + +ARMCM4_FP Directory Reference +CMSIS-DSP: ARMCM4_FP Directory Reference + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    ARMCM4_FP Directory Reference
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    file  arm_biquad_cascade_df1_32x64_init_q31.c
     
    file  arm_biquad_cascade_df1_32x64_q31.c
     
    file  arm_biquad_cascade_df1_f32.c
     
    file  arm_biquad_cascade_df1_fast_q15.c
     
    file  arm_biquad_cascade_df1_fast_q31.c
     
    file  arm_biquad_cascade_df1_init_f32.c
     
    file  arm_biquad_cascade_df1_init_q15.c
     
    file  arm_biquad_cascade_df1_init_q31.c
     
    file  arm_biquad_cascade_df1_q15.c
     
    file  arm_biquad_cascade_df1_q31.c
     
    file  arm_biquad_cascade_df2T_f32.c
     
    file  arm_biquad_cascade_df2T_f64.c
     
    file  arm_biquad_cascade_df2T_init_f32.c
     
    file  arm_biquad_cascade_df2T_init_f64.c
     
    file  arm_biquad_cascade_stereo_df2T_f32.c
     
    file  arm_biquad_cascade_stereo_df2T_init_f32.c
     
    file  arm_conv_f32.c
     
    file  arm_conv_fast_opt_q15.c
     
    file  arm_conv_fast_q15.c
     
    file  arm_conv_fast_q31.c
     
    file  arm_conv_opt_q15.c
     
    file  arm_conv_opt_q7.c
     
    file  arm_conv_partial_f32.c
     
    file  arm_conv_partial_fast_opt_q15.c
     
    file  arm_conv_partial_fast_q15.c
     
    file  arm_conv_partial_fast_q31.c
     
    file  arm_conv_partial_opt_q15.c
     
    file  arm_conv_partial_opt_q7.c
     
    file  arm_conv_partial_q15.c
     
    file  arm_conv_partial_q31.c
     
    file  arm_conv_partial_q7.c
     
    file  arm_conv_q15.c
     
    file  arm_conv_q31.c
     
    file  arm_conv_q7.c
     
    file  arm_correlate_f32.c
     
    file  arm_correlate_fast_opt_q15.c
     
    file  arm_correlate_fast_q15.c
     
    file  arm_correlate_fast_q31.c
     
    file  arm_correlate_opt_q15.c
     
    file  arm_correlate_opt_q7.c
     
    file  arm_correlate_q15.c
     
    file  arm_correlate_q31.c
     
    file  arm_correlate_q7.c
     
    file  arm_fir_decimate_f32.c
     
    file  arm_fir_decimate_fast_q15.c
     
    file  arm_fir_decimate_fast_q31.c
     
    file  arm_fir_decimate_init_f32.c
     
    file  arm_fir_decimate_init_q15.c
     
    file  arm_fir_decimate_init_q31.c
     
    file  arm_fir_decimate_q15.c
     
    file  arm_fir_decimate_q31.c
     
    file  arm_fir_f32.c
     
    file  arm_fir_fast_q15.c
     
    file  arm_fir_fast_q31.c
     
    file  arm_fir_init_f32.c
     
    file  arm_fir_init_q15.c
     
    file  arm_fir_init_q31.c
     
    file  arm_fir_init_q7.c
     
    file  arm_fir_interpolate_f32.c
     
    file  arm_fir_interpolate_init_f32.c
     
    file  arm_fir_interpolate_init_q15.c
     
    file  arm_fir_interpolate_init_q31.c
     
    file  arm_fir_interpolate_q15.c
     
    file  arm_fir_interpolate_q31.c
     
    file  arm_fir_lattice_f32.c
     
    file  arm_fir_lattice_init_f32.c
     
    file  arm_fir_lattice_init_q15.c
     
    file  arm_fir_lattice_init_q31.c
     
    file  arm_fir_lattice_q15.c
     
    file  arm_fir_lattice_q31.c
     
    file  arm_fir_q15.c
     
    file  arm_fir_q31.c
     
    file  arm_fir_q7.c
     
    file  arm_fir_sparse_f32.c
     
    file  arm_fir_sparse_init_f32.c
     
    file  arm_fir_sparse_init_q15.c
     
    file  arm_fir_sparse_init_q31.c
     
    file  arm_fir_sparse_init_q7.c
     
    file  arm_fir_sparse_q15.c
     
    file  arm_fir_sparse_q31.c
     
    file  arm_fir_sparse_q7.c
     
    file  arm_iir_lattice_f32.c
     
    file  arm_iir_lattice_init_f32.c
     
    file  arm_iir_lattice_init_q15.c
     
    file  arm_iir_lattice_init_q31.c
     
    file  arm_iir_lattice_q15.c
     
    file  arm_iir_lattice_q31.c
     
    file  arm_lms_f32.c
     
    file  arm_lms_init_f32.c
     
    file  arm_lms_init_q15.c
     
    file  arm_lms_init_q31.c
     
    file  arm_lms_norm_f32.c
     
    file  arm_lms_norm_init_f32.c
     
    file  arm_lms_norm_init_q15.c
     
    file  arm_lms_norm_init_q31.c
     
    file  arm_lms_norm_q15.c
     
    file  arm_lms_norm_q31.c
     
    file  arm_lms_q15.c
     
    file  arm_lms_q31.c
     
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+ -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd, p.starttd { + margin-top: 2px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3D578C; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4665A2; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9CAFD4; + color: #ffffff; + border: 1px double #869DCA; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C4CFE5; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + min-height: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C4CFE5; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C4CFE5; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EEF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9CAFD4; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4A6AAA; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td, .fieldtable tr { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow, .fieldtable tr.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4665A2; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4665A2; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 0px 6px 0px; + color: #253555; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #728DC1; + border-top:1px solid #5373B4; + border-left:1px solid #5373B4; + border-right:1px solid #C4CFE5; + border-bottom:1px solid #C4CFE5; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3D578C; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #2A3D61; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A8B8D9; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + font-size: 90%; + color: #253555; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A8B8D9; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5373B4; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #90A5CE; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#334975; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D8DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4665A2; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/Documentation/DSP/html/doxygen.png b/Documentation/DSP/html/doxygen.png new file mode 100644 index 0000000..3ff17d8 Binary files /dev/null and b/Documentation/DSP/html/doxygen.png differ diff --git a/Documentation/DSP/html/dynsections.js b/Documentation/DSP/html/dynsections.js new file mode 100644 index 0000000..116542f --- /dev/null +++ b/Documentation/DSP/html/dynsections.js @@ -0,0 +1,78 @@ +function toggleVisibility(linkObj) +{ + var base = $(linkObj).attr('id'); + var summary = $('#'+base+'-summary'); + var content = $('#'+base+'-content'); + var trigger = $('#'+base+'-trigger'); + var src=$(trigger).attr('src'); + if (content.is(':visible')===true) { + content.hide(); + summary.show(); + $(linkObj).addClass('closed').removeClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png'); + } else { + content.show(); + summary.hide(); + $(linkObj).removeClass('closed').addClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-10)+'open.png'); + } + return false; +} + +function updateStripes() +{ + $('table.directory tr'). + removeClass('even').filter(':visible:even').addClass('even'); +} +function toggleLevel(level) +{ + $('table.directory tr').each(function(){ + var l = this.id.split('_').length-1; + var i = $('#img'+this.id.substring(3)); + var a = $('#arr'+this.id.substring(3)); + if (l + + + + +Examples +CMSIS-DSP: Examples + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +
    Examples
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    +
    +
    Here is a list of all examples:
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    +
    + + + + diff --git a/Documentation/DSP/html/files.html b/Documentation/DSP/html/files.html new file mode 100644 index 0000000..71ebea5 --- /dev/null +++ b/Documentation/DSP/html/files.html @@ -0,0 +1,508 @@ + + + + + +File List +CMSIS-DSP: File List + + + + + + + + + + + + + + + +
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    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    +
    File List
    +
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    Here is a list of all files with brief descriptions:
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    o*arm_abs_f32.c
    o*arm_abs_q15.c
    o*arm_abs_q31.c
    o*arm_abs_q7.c
    o*arm_add_f32.c
    o*arm_add_q15.c
    o*arm_add_q31.c
    o*arm_add_q7.c
    o*arm_biquad_cascade_df1_32x64_init_q31.c
    o*arm_biquad_cascade_df1_32x64_q31.c
    o*arm_biquad_cascade_df1_f32.c
    o*arm_biquad_cascade_df1_fast_q15.c
    o*arm_biquad_cascade_df1_fast_q31.c
    o*arm_biquad_cascade_df1_init_f32.c
    o*arm_biquad_cascade_df1_init_q15.c
    o*arm_biquad_cascade_df1_init_q31.c
    o*arm_biquad_cascade_df1_q15.c
    o*arm_biquad_cascade_df1_q31.c
    o*arm_biquad_cascade_df2T_f32.c
    o*arm_biquad_cascade_df2T_f64.c
    o*arm_biquad_cascade_df2T_init_f32.c
    o*arm_biquad_cascade_df2T_init_f64.c
    o*arm_biquad_cascade_stereo_df2T_f32.c
    o*arm_biquad_cascade_stereo_df2T_init_f32.c
    o*arm_bitreversal.c
    o*arm_cfft_f32.c
    o*arm_cfft_q15.c
    o*arm_cfft_q31.c
    o*arm_cfft_radix2_f32.c
    o*arm_cfft_radix2_init_f32.c
    o*arm_cfft_radix2_init_q15.c
    o*arm_cfft_radix2_init_q31.c
    o*arm_cfft_radix2_q15.c
    o*arm_cfft_radix2_q31.c
    o*arm_cfft_radix4_f32.c
    o*arm_cfft_radix4_init_f32.c
    o*arm_cfft_radix4_init_q15.c
    o*arm_cfft_radix4_init_q31.c
    o*arm_cfft_radix4_q15.c
    o*arm_cfft_radix4_q31.c
    o*arm_cfft_radix8_f32.c
    o*ARM/arm_class_marks_example_f32.c
    o*GCC/arm_class_marks_example_f32.c
    o*arm_cmplx_conj_f32.c
    o*arm_cmplx_conj_q15.c
    o*arm_cmplx_conj_q31.c
    o*arm_cmplx_dot_prod_f32.c
    o*arm_cmplx_dot_prod_q15.c
    o*arm_cmplx_dot_prod_q31.c
    o*arm_cmplx_mag_f32.c
    o*arm_cmplx_mag_q15.c
    o*arm_cmplx_mag_q31.c
    o*arm_cmplx_mag_squared_f32.c
    o*arm_cmplx_mag_squared_q15.c
    o*arm_cmplx_mag_squared_q31.c
    o*arm_cmplx_mult_cmplx_f32.c
    o*arm_cmplx_mult_cmplx_q15.c
    o*arm_cmplx_mult_cmplx_q31.c
    o*arm_cmplx_mult_real_f32.c
    o*arm_cmplx_mult_real_q15.c
    o*arm_cmplx_mult_real_q31.c
    o*arm_common_tables.c
    o*arm_common_tables.h
    o*arm_const_structs.c
    o*arm_const_structs.h
    o*arm_conv_f32.c
    o*arm_conv_fast_opt_q15.c
    o*arm_conv_fast_q15.c
    o*arm_conv_fast_q31.c
    o*arm_conv_opt_q15.c
    o*arm_conv_opt_q7.c
    o*arm_conv_partial_f32.c
    o*arm_conv_partial_fast_opt_q15.c
    o*arm_conv_partial_fast_q15.c
    o*arm_conv_partial_fast_q31.c
    o*arm_conv_partial_opt_q15.c
    o*arm_conv_partial_opt_q7.c
    o*arm_conv_partial_q15.c
    o*arm_conv_partial_q31.c
    o*arm_conv_partial_q7.c
    o*arm_conv_q15.c
    o*arm_conv_q31.c
    o*arm_conv_q7.c
    o*ARM/arm_convolution_example_f32.c
    o*GCC/arm_convolution_example_f32.c
    o*arm_copy_f32.c
    o*arm_copy_q15.c
    o*arm_copy_q31.c
    o*arm_copy_q7.c
    o*arm_correlate_f32.c
    o*arm_correlate_fast_opt_q15.c
    o*arm_correlate_fast_q15.c
    o*arm_correlate_fast_q31.c
    o*arm_correlate_opt_q15.c
    o*arm_correlate_opt_q7.c
    o*arm_correlate_q15.c
    o*arm_correlate_q31.c
    o*arm_correlate_q7.c
    o*arm_cos_f32.c
    o*arm_cos_q15.c
    o*arm_cos_q31.c
    o*arm_dct4_f32.c
    o*arm_dct4_init_f32.c
    o*arm_dct4_init_q15.c
    o*arm_dct4_init_q31.c
    o*arm_dct4_q15.c
    o*arm_dct4_q31.c
    o*arm_dot_prod_f32.c
    o*arm_dot_prod_q15.c
    o*arm_dot_prod_q31.c
    o*arm_dot_prod_q7.c
    o*ARM/arm_dotproduct_example_f32.c
    o*GCC/arm_dotproduct_example_f32.c
    o*ARM/arm_fft_bin_data.c
    o*GCC/arm_fft_bin_data.c
    o*ARM/arm_fft_bin_example_f32.c
    o*GCC/arm_fft_bin_example_f32.c
    o*arm_fill_f32.c
    o*arm_fill_q15.c
    o*arm_fill_q31.c
    o*arm_fill_q7.c
    o*arm_fir_data.c
    o*arm_fir_decimate_f32.c
    o*arm_fir_decimate_fast_q15.c
    o*arm_fir_decimate_fast_q31.c
    o*arm_fir_decimate_init_f32.c
    o*arm_fir_decimate_init_q15.c
    o*arm_fir_decimate_init_q31.c
    o*arm_fir_decimate_q15.c
    o*arm_fir_decimate_q31.c
    o*arm_fir_example_f32.c
    o*arm_fir_f32.c
    o*arm_fir_fast_q15.c
    o*arm_fir_fast_q31.c
    o*arm_fir_init_f32.c
    o*arm_fir_init_q15.c
    o*arm_fir_init_q31.c
    o*arm_fir_init_q7.c
    o*arm_fir_interpolate_f32.c
    o*arm_fir_interpolate_init_f32.c
    o*arm_fir_interpolate_init_q15.c
    o*arm_fir_interpolate_init_q31.c
    o*arm_fir_interpolate_q15.c
    o*arm_fir_interpolate_q31.c
    o*arm_fir_lattice_f32.c
    o*arm_fir_lattice_init_f32.c
    o*arm_fir_lattice_init_q15.c
    o*arm_fir_lattice_init_q31.c
    o*arm_fir_lattice_q15.c
    o*arm_fir_lattice_q31.c
    o*arm_fir_q15.c
    o*arm_fir_q31.c
    o*arm_fir_q7.c
    o*arm_fir_sparse_f32.c
    o*arm_fir_sparse_init_f32.c
    o*arm_fir_sparse_init_q15.c
    o*arm_fir_sparse_init_q31.c
    o*arm_fir_sparse_init_q7.c
    o*arm_fir_sparse_q15.c
    o*arm_fir_sparse_q31.c
    o*arm_fir_sparse_q7.c
    o*arm_float_to_q15.c
    o*arm_float_to_q31.c
    o*arm_float_to_q7.c
    o*arm_graphic_equalizer_data.c
    o*arm_graphic_equalizer_example_q31.c
    o*arm_iir_lattice_f32.c
    o*arm_iir_lattice_init_f32.c
    o*arm_iir_lattice_init_q15.c
    o*arm_iir_lattice_init_q31.c
    o*arm_iir_lattice_q15.c
    o*arm_iir_lattice_q31.c
    o*arm_linear_interp_data.c
    o*arm_linear_interp_example_f32.c
    o*arm_lms_f32.c
    o*arm_lms_init_f32.c
    o*arm_lms_init_q15.c
    o*arm_lms_init_q31.c
    o*arm_lms_norm_f32.c
    o*arm_lms_norm_init_f32.c
    o*arm_lms_norm_init_q15.c
    o*arm_lms_norm_init_q31.c
    o*arm_lms_norm_q15.c
    o*arm_lms_norm_q31.c
    o*arm_lms_q15.c
    o*arm_lms_q31.c
    o*arm_mat_add_f32.c
    o*arm_mat_add_q15.c
    o*arm_mat_add_q31.c
    o*arm_mat_cmplx_mult_f32.c
    o*arm_mat_cmplx_mult_q15.c
    o*arm_mat_cmplx_mult_q31.c
    o*arm_mat_init_f32.c
    o*arm_mat_init_q15.c
    o*arm_mat_init_q31.c
    o*arm_mat_inverse_f32.c
    o*arm_mat_inverse_f64.c
    o*arm_mat_mult_f32.c
    o*arm_mat_mult_fast_q15.c
    o*arm_mat_mult_fast_q31.c
    o*arm_mat_mult_q15.c
    o*arm_mat_mult_q31.c
    o*arm_mat_scale_f32.c
    o*arm_mat_scale_q15.c
    o*arm_mat_scale_q31.c
    o*arm_mat_sub_f32.c
    o*arm_mat_sub_q15.c
    o*arm_mat_sub_q31.c
    o*arm_mat_trans_f32.c
    o*arm_mat_trans_q15.c
    o*arm_mat_trans_q31.c
    o*arm_math.h
    o*arm_matrix_example_f32.c
    o*arm_max_f32.c
    o*arm_max_q15.c
    o*arm_max_q31.c
    o*arm_max_q7.c
    o*arm_mean_f32.c
    o*arm_mean_q15.c
    o*arm_mean_q31.c
    o*arm_mean_q7.c
    o*arm_min_f32.c
    o*arm_min_q15.c
    o*arm_min_q31.c
    o*arm_min_q7.c
    o*arm_mult_f32.c
    o*arm_mult_q15.c
    o*arm_mult_q31.c
    o*arm_mult_q7.c
    o*arm_negate_f32.c
    o*arm_negate_q15.c
    o*arm_negate_q31.c
    o*arm_negate_q7.c
    o*arm_offset_f32.c
    o*arm_offset_q15.c
    o*arm_offset_q31.c
    o*arm_offset_q7.c
    o*arm_pid_init_f32.c
    o*arm_pid_init_q15.c
    o*arm_pid_init_q31.c
    o*arm_pid_reset_f32.c
    o*arm_pid_reset_q15.c
    o*arm_pid_reset_q31.c
    o*arm_power_f32.c
    o*arm_power_q15.c
    o*arm_power_q31.c
    o*arm_power_q7.c
    o*arm_q15_to_float.c
    o*arm_q15_to_q31.c
    o*arm_q15_to_q7.c
    o*arm_q31_to_float.c
    o*arm_q31_to_q15.c
    o*arm_q31_to_q7.c
    o*arm_q7_to_float.c
    o*arm_q7_to_q15.c
    o*arm_q7_to_q31.c
    o*arm_rfft_f32.c
    o*arm_rfft_fast_f32.c
    o*arm_rfft_fast_init_f32.c
    o*arm_rfft_init_f32.c
    o*arm_rfft_init_q15.c
    o*arm_rfft_init_q31.c
    o*arm_rfft_q15.c
    o*arm_rfft_q31.c
    o*arm_rms_f32.c
    o*arm_rms_q15.c
    o*arm_rms_q31.c
    o*arm_scale_f32.c
    o*arm_scale_q15.c
    o*arm_scale_q31.c
    o*arm_scale_q7.c
    o*arm_shift_q15.c
    o*arm_shift_q31.c
    o*arm_shift_q7.c
    o*arm_signal_converge_data.c
    o*arm_signal_converge_example_f32.c
    o*arm_sin_cos_example_f32.c
    o*arm_sin_cos_f32.c
    o*arm_sin_cos_q31.c
    o*arm_sin_f32.c
    o*arm_sin_q15.c
    o*arm_sin_q31.c
    o*arm_sqrt_q15.c
    o*arm_sqrt_q31.c
    o*arm_std_f32.c
    o*arm_std_q15.c
    o*arm_std_q31.c
    o*arm_sub_f32.c
    o*arm_sub_q15.c
    o*arm_sub_q31.c
    o*arm_sub_q7.c
    o*arm_var_f32.c
    o*arm_var_q15.c
    o*arm_var_q31.c
    o*arm_variance_example_f32.c
    o*arm_convolution_example/ARM/math_helper.c
    o*arm_convolution_example/GCC/math_helper.c
    o*arm_fir_example/ARM/math_helper.c
    o*arm_graphic_equalizer_example/ARM/math_helper.c
    o*arm_linear_interp_example/ARM/math_helper.c
    o*arm_matrix_example/ARM/math_helper.c
    o*arm_signal_converge_example/ARM/math_helper.c
    o*arm_convolution_example/ARM/math_helper.h
    o*arm_convolution_example/GCC/math_helper.h
    o*arm_fir_example/ARM/math_helper.h
    o*arm_graphic_equalizer_example/ARM/math_helper.h
    o*arm_linear_interp_example/ARM/math_helper.h
    o*arm_matrix_example/ARM/math_helper.h
    o*arm_signal_converge_example/ARM/math_helper.h
    o*arm_class_marks_example/ARM/RTE/RTE_Components.h
    o*arm_convolution_example/ARM/RTE/RTE_Components.h
    o*arm_dotproduct_example/ARM/RTE/RTE_Components.h
    o*arm_fft_bin_example/ARM/RTE/RTE_Components.h
    o*arm_fir_example/ARM/RTE/RTE_Components.h
    o*arm_graphic_equalizer_example/ARM/RTE/RTE_Components.h
    o*arm_linear_interp_example/ARM/RTE/RTE_Components.h
    o*arm_matrix_example/ARM/RTE/RTE_Components.h
    o*arm_signal_converge_example/ARM/RTE/RTE_Components.h
    o*arm_sin_cos_example/ARM/RTE/RTE_Components.h
    o*arm_variance_example/ARM/RTE/RTE_Components.h
    o*arm_class_marks_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_class_marks_example/GCC/Startup/system_ARMCM0.c
    o*arm_convolution_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_convolution_example/GCC/Startup/system_ARMCM0.c
    o*arm_dotproduct_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_dotproduct_example/GCC/Startup/system_ARMCM0.c
    o*arm_fft_bin_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_fft_bin_example/GCC/Startup/system_ARMCM0.c
    o*arm_fir_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_linear_interp_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_matrix_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_signal_converge_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_sin_cos_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_variance_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
    o*arm_class_marks_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_class_marks_example/GCC/Startup/system_ARMCM3.c
    o*arm_convolution_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_convolution_example/GCC/Startup/system_ARMCM3.c
    o*arm_dotproduct_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_dotproduct_example/GCC/Startup/system_ARMCM3.c
    o*arm_fft_bin_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_fft_bin_example/GCC/Startup/system_ARMCM3.c
    o*arm_fir_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_linear_interp_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_matrix_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_signal_converge_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_sin_cos_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_variance_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
    o*arm_class_marks_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_class_marks_example/GCC/Startup/system_ARMCM4.c
    o*arm_convolution_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_convolution_example/GCC/Startup/system_ARMCM4.c
    o*arm_dotproduct_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_dotproduct_example/GCC/Startup/system_ARMCM4.c
    o*arm_fft_bin_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_fft_bin_example/GCC/Startup/system_ARMCM4.c
    o*arm_fir_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_linear_interp_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_matrix_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_signal_converge_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_sin_cos_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_variance_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
    o*arm_class_marks_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_convolution_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_dotproduct_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_fft_bin_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_fir_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_linear_interp_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_matrix_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_signal_converge_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    o*arm_sin_cos_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    \*arm_variance_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
    +
    +
    +
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    + +

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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
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    + + + + diff --git a/Documentation/DSP/html/functions_0x66.html b/Documentation/DSP/html/functions_0x66.html new file mode 100644 index 0000000..d3f6efb --- /dev/null +++ b/Documentation/DSP/html/functions_0x66.html @@ -0,0 +1,181 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    + + + + diff --git a/Documentation/DSP/html/functions_0x69.html b/Documentation/DSP/html/functions_0x69.html new file mode 100644 index 0000000..ebdd6e8 --- /dev/null +++ b/Documentation/DSP/html/functions_0x69.html @@ -0,0 +1,172 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    + + + + diff --git a/Documentation/DSP/html/functions_0x6b.html b/Documentation/DSP/html/functions_0x6b.html new file mode 100644 index 0000000..1dab0b3 --- /dev/null +++ b/Documentation/DSP/html/functions_0x6b.html @@ -0,0 +1,174 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    + + + + diff --git a/Documentation/DSP/html/functions_0x6c.html b/Documentation/DSP/html/functions_0x6c.html new file mode 100644 index 0000000..aeaca39 --- /dev/null +++ b/Documentation/DSP/html/functions_0x6c.html @@ -0,0 +1,164 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    +
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    + + + + diff --git a/Documentation/DSP/html/functions_0x6d.html b/Documentation/DSP/html/functions_0x6d.html new file mode 100644 index 0000000..092d5bb --- /dev/null +++ b/Documentation/DSP/html/functions_0x6d.html @@ -0,0 +1,178 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    +
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    + + + + diff --git a/Documentation/DSP/html/functions_0x6e.html b/Documentation/DSP/html/functions_0x6e.html new file mode 100644 index 0000000..16de27d --- /dev/null +++ b/Documentation/DSP/html/functions_0x6e.html @@ -0,0 +1,231 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    CMSIS DSP Software Library
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    +
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    + + + + diff --git a/Documentation/DSP/html/functions_0x6f.html b/Documentation/DSP/html/functions_0x6f.html new file mode 100644 index 0000000..5aebb1b --- /dev/null +++ b/Documentation/DSP/html/functions_0x6f.html @@ -0,0 +1,163 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    + + + + diff --git a/Documentation/DSP/html/functions_0x70.html b/Documentation/DSP/html/functions_0x70.html new file mode 100644 index 0000000..c65f53d --- /dev/null +++ b/Documentation/DSP/html/functions_0x70.html @@ -0,0 +1,325 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

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    + + + + diff --git a/Documentation/DSP/html/functions_0x72.html b/Documentation/DSP/html/functions_0x72.html new file mode 100644 index 0000000..a3af3c7 --- /dev/null +++ b/Documentation/DSP/html/functions_0x72.html @@ -0,0 +1,163 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    + +

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    +
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    + + + + diff --git a/Documentation/DSP/html/functions_0x73.html b/Documentation/DSP/html/functions_0x73.html new file mode 100644 index 0000000..6e99bb8 --- /dev/null +++ b/Documentation/DSP/html/functions_0x73.html @@ -0,0 +1,173 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    CMSIS DSP Software Library
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

    - s -

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    + + + + diff --git a/Documentation/DSP/html/functions_0x74.html b/Documentation/DSP/html/functions_0x74.html new file mode 100644 index 0000000..9c29496 --- /dev/null +++ b/Documentation/DSP/html/functions_0x74.html @@ -0,0 +1,172 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
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    CMSIS DSP Software Library
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    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

    - t -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/functions_0x78.html b/Documentation/DSP/html/functions_0x78.html new file mode 100644 index 0000000..02c28ce --- /dev/null +++ b/Documentation/DSP/html/functions_0x78.html @@ -0,0 +1,170 @@ + + + + + +Data Fields +CMSIS-DSP: Data Fields + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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      + +
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    + + + + +
    + +
    + +
    +
    Here is a list of all struct and union fields with links to the structures/unions they belong to:
    + +

    - x -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/functions_dup.js b/Documentation/DSP/html/functions_dup.js new file mode 100644 index 0000000..4f1774c --- /dev/null +++ b/Documentation/DSP/html/functions_dup.js @@ -0,0 +1,18 @@ +var functions_dup = +[ + [ "a", "functions.html", null ], + [ "b", "functions_0x62.html", null ], + [ "e", "functions_0x65.html", null ], + [ "f", "functions_0x66.html", null ], + [ "i", "functions_0x69.html", null ], + [ "k", "functions_0x6b.html", null ], + [ "l", "functions_0x6c.html", null ], + [ "m", "functions_0x6d.html", null ], + [ "n", "functions_0x6e.html", null ], + [ "o", "functions_0x6f.html", null ], + [ "p", "functions_0x70.html", null ], + [ "r", "functions_0x72.html", null ], + [ "s", "functions_0x73.html", null ], + [ "t", "functions_0x74.html", null ], + [ "x", "functions_0x78.html", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/functions_vars.html b/Documentation/DSP/html/functions_vars.html new file mode 100644 index 0000000..7e15bce --- /dev/null +++ b/Documentation/DSP/html/functions_vars.html @@ -0,0 +1,173 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +  + +

    - a -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/functions_vars.js b/Documentation/DSP/html/functions_vars.js new file mode 100644 index 0000000..ebe2890 --- /dev/null +++ b/Documentation/DSP/html/functions_vars.js @@ -0,0 +1,18 @@ +var functions_vars = +[ + [ "a", "functions_vars.html", null ], + [ "b", "functions_vars_0x62.html", null ], + [ "e", "functions_vars_0x65.html", null ], + [ "f", "functions_vars_0x66.html", null ], + [ "i", "functions_vars_0x69.html", null ], + [ "k", "functions_vars_0x6b.html", null ], + [ "l", "functions_vars_0x6c.html", null ], + [ "m", "functions_vars_0x6d.html", null ], + [ "n", "functions_vars_0x6e.html", null ], + [ "o", "functions_vars_0x6f.html", null ], + [ "p", "functions_vars_0x70.html", null ], + [ "r", "functions_vars_0x72.html", null ], + [ "s", "functions_vars_0x73.html", null ], + [ "t", "functions_vars_0x74.html", null ], + [ "x", "functions_vars_0x78.html", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/functions_vars_0x62.html b/Documentation/DSP/html/functions_vars_0x62.html new file mode 100644 index 0000000..81fd36e --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x62.html @@ -0,0 +1,185 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
    +
    + + + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +  + +

    - b -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x65.html b/Documentation/DSP/html/functions_vars_0x65.html new file mode 100644 index 0000000..ea16c90 --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x65.html @@ -0,0 +1,164 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
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    + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +
      + +
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    + + + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +  + +

    - e -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x66.html b/Documentation/DSP/html/functions_vars_0x66.html new file mode 100644 index 0000000..cfb31b0 --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x66.html @@ -0,0 +1,181 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
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    + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    + +
    +
      + +
    +
    + + + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +  + +

    - f -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x69.html b/Documentation/DSP/html/functions_vars_0x69.html new file mode 100644 index 0000000..345ec4b --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x69.html @@ -0,0 +1,172 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +  + +

    - i -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x6b.html b/Documentation/DSP/html/functions_vars_0x6b.html new file mode 100644 index 0000000..53de796 --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x6b.html @@ -0,0 +1,174 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
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    + + + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +  + +

    - k -

    +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    - l -

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    CMSIS-DSP +  Version 1.4.7 +
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    - m -

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    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x6e.html b/Documentation/DSP/html/functions_vars_0x6e.html new file mode 100644 index 0000000..d419ba0 --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x6e.html @@ -0,0 +1,231 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - n -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - o -

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    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x70.html b/Documentation/DSP/html/functions_vars_0x70.html new file mode 100644 index 0000000..6b8c3bb --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x70.html @@ -0,0 +1,325 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - p -

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    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x72.html b/Documentation/DSP/html/functions_vars_0x72.html new file mode 100644 index 0000000..6e80323 --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x72.html @@ -0,0 +1,163 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - r -

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    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x73.html b/Documentation/DSP/html/functions_vars_0x73.html new file mode 100644 index 0000000..b7b98a5 --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x73.html @@ -0,0 +1,173 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - s -

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    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x74.html b/Documentation/DSP/html/functions_vars_0x74.html new file mode 100644 index 0000000..20900cf --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x74.html @@ -0,0 +1,172 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - t -

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    + + + + diff --git a/Documentation/DSP/html/functions_vars_0x78.html b/Documentation/DSP/html/functions_vars_0x78.html new file mode 100644 index 0000000..04de4a7 --- /dev/null +++ b/Documentation/DSP/html/functions_vars_0x78.html @@ -0,0 +1,170 @@ + + + + + +Data Fields - Variables +CMSIS-DSP: Data Fields - Variables + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    - x -

    +
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    + + + + diff --git a/Documentation/DSP/html/globals.html b/Documentation/DSP/html/globals.html new file mode 100644 index 0000000..7cc6748 --- /dev/null +++ b/Documentation/DSP/html/globals.html @@ -0,0 +1,357 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
    + +

    - _ -

    +
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    + + + + diff --git a/Documentation/DSP/html/globals_0x61.html b/Documentation/DSP/html/globals_0x61.html new file mode 100644 index 0000000..74a029b --- /dev/null +++ b/Documentation/DSP/html/globals_0x61.html @@ -0,0 +1,395 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x62.html b/Documentation/DSP/html/globals_0x62.html new file mode 100644 index 0000000..6608252 --- /dev/null +++ b/Documentation/DSP/html/globals_0x62.html @@ -0,0 +1,302 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    - b -

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    + + + + diff --git a/Documentation/DSP/html/globals_0x63.html b/Documentation/DSP/html/globals_0x63.html new file mode 100644 index 0000000..3ff4cc4 --- /dev/null +++ b/Documentation/DSP/html/globals_0x63.html @@ -0,0 +1,723 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x64.html b/Documentation/DSP/html/globals_0x64.html new file mode 100644 index 0000000..efd2ff5 --- /dev/null +++ b/Documentation/DSP/html/globals_0x64.html @@ -0,0 +1,229 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x65.html b/Documentation/DSP/html/globals_0x65.html new file mode 100644 index 0000000..9e6eb66 --- /dev/null +++ b/Documentation/DSP/html/globals_0x65.html @@ -0,0 +1,171 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x66.html b/Documentation/DSP/html/globals_0x66.html new file mode 100644 index 0000000..78f0788 --- /dev/null +++ b/Documentation/DSP/html/globals_0x66.html @@ -0,0 +1,455 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x67.html b/Documentation/DSP/html/globals_0x67.html new file mode 100644 index 0000000..7f921c4 --- /dev/null +++ b/Documentation/DSP/html/globals_0x67.html @@ -0,0 +1,171 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    + + + + +
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    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    - g -

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    + + + + diff --git a/Documentation/DSP/html/globals_0x69.html b/Documentation/DSP/html/globals_0x69.html new file mode 100644 index 0000000..08fe310 --- /dev/null +++ b/Documentation/DSP/html/globals_0x69.html @@ -0,0 +1,214 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x6c.html b/Documentation/DSP/html/globals_0x6c.html new file mode 100644 index 0000000..1e50032 --- /dev/null +++ b/Documentation/DSP/html/globals_0x6c.html @@ -0,0 +1,242 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x6d.html b/Documentation/DSP/html/globals_0x6d.html new file mode 100644 index 0000000..16763cc --- /dev/null +++ b/Documentation/DSP/html/globals_0x6d.html @@ -0,0 +1,414 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    + + + + +
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    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
    + +

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    +
    +
    + + + + diff --git a/Documentation/DSP/html/globals_0x6e.html b/Documentation/DSP/html/globals_0x6e.html new file mode 100644 index 0000000..2deef6b --- /dev/null +++ b/Documentation/DSP/html/globals_0x6e.html @@ -0,0 +1,219 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x6f.html b/Documentation/DSP/html/globals_0x6f.html new file mode 100644 index 0000000..1eed6c3 --- /dev/null +++ b/Documentation/DSP/html/globals_0x6f.html @@ -0,0 +1,188 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    + +
    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    - o -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/globals_0x70.html b/Documentation/DSP/html/globals_0x70.html new file mode 100644 index 0000000..24cffd1 --- /dev/null +++ b/Documentation/DSP/html/globals_0x70.html @@ -0,0 +1,264 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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      + +
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x72.html b/Documentation/DSP/html/globals_0x72.html new file mode 100644 index 0000000..7c1c724 --- /dev/null +++ b/Documentation/DSP/html/globals_0x72.html @@ -0,0 +1,294 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    + +
    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x73.html b/Documentation/DSP/html/globals_0x73.html new file mode 100644 index 0000000..c36de50 --- /dev/null +++ b/Documentation/DSP/html/globals_0x73.html @@ -0,0 +1,534 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    + + + + diff --git a/Documentation/DSP/html/globals_0x74.html b/Documentation/DSP/html/globals_0x74.html new file mode 100644 index 0000000..39b49e5 --- /dev/null +++ b/Documentation/DSP/html/globals_0x74.html @@ -0,0 +1,401 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    +
    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
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    +
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    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
    + +

    - u -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/globals_0x76.html b/Documentation/DSP/html/globals_0x76.html new file mode 100644 index 0000000..aae6c91 --- /dev/null +++ b/Documentation/DSP/html/globals_0x76.html @@ -0,0 +1,181 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
    + +

    - v -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/globals_0x77.html b/Documentation/DSP/html/globals_0x77.html new file mode 100644 index 0000000..22ae340 --- /dev/null +++ b/Documentation/DSP/html/globals_0x77.html @@ -0,0 +1,213 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    + + + + +
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    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
    + +

    - w -

    +
    +
    + + + + diff --git a/Documentation/DSP/html/globals_0x78.html b/Documentation/DSP/html/globals_0x78.html new file mode 100644 index 0000000..f6fb0a7 --- /dev/null +++ b/Documentation/DSP/html/globals_0x78.html @@ -0,0 +1,174 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
    + +

    - x -

    +
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    + + + + diff --git a/Documentation/DSP/html/globals_defs.html b/Documentation/DSP/html/globals_defs.html new file mode 100644 index 0000000..bcde054 --- /dev/null +++ b/Documentation/DSP/html/globals_defs.html @@ -0,0 +1,349 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    +  + +

    - _ -

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    - a -

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    - b -

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    - c -

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    - d -

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    - f -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - i -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - t -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - u -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    CMSIS DSP Software Library
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      + +
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    + + + + diff --git a/Documentation/DSP/html/globals_eval.html b/Documentation/DSP/html/globals_eval.html new file mode 100644 index 0000000..c8bccb8 --- /dev/null +++ b/Documentation/DSP/html/globals_eval.html @@ -0,0 +1,158 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    CMSIS DSP Software Library
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      + +
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    + + + + diff --git a/Documentation/DSP/html/globals_func.html b/Documentation/DSP/html/globals_func.html new file mode 100644 index 0000000..07af74f --- /dev/null +++ b/Documentation/DSP/html/globals_func.html @@ -0,0 +1,208 @@ + + + + + +Globals +CMSIS-DSP: Globals + + + + + + + + + + + + + + + +
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    - a -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - b -

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    CMSIS DSP Software Library
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    - c -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    - d -

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    CMSIS DSP Software Library
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    CMSIS DSP Software Library
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      + +
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    - g -

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      + +
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    - i -

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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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      + +
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    - l -

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    + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
    +
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    +
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    +
    +Functions
    +
    +
    Vector Absolute Value
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_abs_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Floating-point vector absolute value.
     
    void arm_abs_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Q15 vector absolute value.
     
    void arm_abs_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Q31 vector absolute value.
     
    void arm_abs_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Q7 vector absolute value.
     
    +

    Description

    +

    Computes the absolute value of a vector on an element-by-element basis.

    +
            
+    pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.        
+

    The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_abs_f32 (float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input buffer
    [out]*pDstpoints to the output buffer
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_abs_q15 (q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input buffer
    [out]*pDstpoints to the output buffer
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
    + +

    References __SIMD32_CONST, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_abs_q31 (q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input buffer
    [out]*pDstpoints to the output buffer
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_abs_q7 (q7_t * pSrc,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input buffer
    [out]*pDstpoints to the output buffer
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +
    Conditions for optimum performance
    Input and output buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
    + +

    References blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___basic_abs.js b/Documentation/DSP/html/group___basic_abs.js new file mode 100644 index 0000000..6dbcc94 --- /dev/null +++ b/Documentation/DSP/html/group___basic_abs.js @@ -0,0 +1,7 @@ +var group___basic_abs = +[ + [ "arm_abs_f32", "group___basic_abs.html#ga421b6275f9d35f50286c0ff3beceff02", null ], + [ "arm_abs_q15", "group___basic_abs.html#ga39f92964c9b649ba252e26ebe7b95594", null ], + [ "arm_abs_q31", "group___basic_abs.html#ga59eafcdcdb52da60d37f20aec6ff4577", null ], + [ "arm_abs_q7", "group___basic_abs.html#gadc30985e33fbf96802a5a7954dece3b1", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___basic_add.html b/Documentation/DSP/html/group___basic_add.html new file mode 100644 index 0000000..8afefba --- /dev/null +++ b/Documentation/DSP/html/group___basic_add.html @@ -0,0 +1,361 @@ + + + + + +Vector Addition +CMSIS-DSP: Vector Addition + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Addition
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_add_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector addition.
     
    void arm_add_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector addition.
     
    void arm_add_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector addition.
     
    void arm_add_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector addition.
     
    +

    Description

    +

    Element-by-element addition of two vectors.

    +
            
+    pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.        
+

    There are separate functions for floating-point, Q7, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_add_f32 (float32_t * pSrcA,
    float32_t * pSrcB,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_dotproduct_example_f32.c, and arm_sin_cos_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_add_q15 (q15_t * pSrcA,
    q15_t * pSrcB,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_add_q31 (q31_t * pSrcA,
    q31_t * pSrcB,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
    + +

    References blockSize, and clip_q63_to_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_add_q7 (q7_t * pSrcA,
    q7_t * pSrcB,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___basic_add.js b/Documentation/DSP/html/group___basic_add.js new file mode 100644 index 0000000..d2b67ce --- /dev/null +++ b/Documentation/DSP/html/group___basic_add.js @@ -0,0 +1,7 @@ +var group___basic_add = +[ + [ "arm_add_f32", "group___basic_add.html#ga6a904a547413b10565dd1d251c6bafbd", null ], + [ "arm_add_q15", "group___basic_add.html#gabb51285a41f511670bbff62fc0e1bf62", null ], + [ "arm_add_q31", "group___basic_add.html#ga24d6c3f7f8b9fae4847c0c3f26a39a3b", null ], + [ "arm_add_q7", "group___basic_add.html#gaed633f415a7840a66861debca2dfb96b", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___basic_mult.html b/Documentation/DSP/html/group___basic_mult.html new file mode 100644 index 0000000..8a7190f --- /dev/null +++ b/Documentation/DSP/html/group___basic_mult.html @@ -0,0 +1,365 @@ + + + + + +Vector Multiplication +CMSIS-DSP: Vector Multiplication + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Multiplication
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_mult_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector multiplication.
     
    void arm_mult_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector multiplication.
     
    void arm_mult_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector multiplication.
     
    void arm_mult_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector multiplication.
     
    +

    Description

    +

    Element-by-element multiplication of two vectors.

    +
            
+    pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.        
+

    There are separate functions for floating-point, Q7, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mult_f32 (float32_t * pSrcA,
    float32_t * pSrcB,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_dotproduct_example_f32.c, arm_sin_cos_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by arm_dct4_f32(), and main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mult_q15 (q15_t * pSrcA,
    q15_t * pSrcB,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    + +

    References __SIMD32, and blockSize.

    + +

    Referenced by arm_dct4_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mult_q31 (q31_t * pSrcA,
    q31_t * pSrcB,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
    + +

    References blockSize, and clip_q63_to_q31().

    + +

    Referenced by arm_dct4_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mult_q7 (q7_t * pSrcA,
    q7_t * pSrcB,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
    + +

    References __PACKq7, __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___basic_mult.js b/Documentation/DSP/html/group___basic_mult.js new file mode 100644 index 0000000..a854cd3 --- /dev/null +++ b/Documentation/DSP/html/group___basic_mult.js @@ -0,0 +1,7 @@ +var group___basic_mult = +[ + [ "arm_mult_f32", "group___basic_mult.html#gaca3f0b8227da431ab29225b88888aa32", null ], + [ "arm_mult_q15", "group___basic_mult.html#gafb0778d27ed98a2a6f2ecb7d48cc8c75", null ], + [ "arm_mult_q31", "group___basic_mult.html#ga3528c0f54a0607acc603f0490d3ca6c6", null ], + [ "arm_mult_q7", "group___basic_mult.html#ga16677275ed83ff0878da531e875c27ef", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___basic_sub.html b/Documentation/DSP/html/group___basic_sub.html new file mode 100644 index 0000000..89f6554 --- /dev/null +++ b/Documentation/DSP/html/group___basic_sub.html @@ -0,0 +1,361 @@ + + + + + +Vector Subtraction +CMSIS-DSP: Vector Subtraction + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Subtraction
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_sub_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t blockSize)
     Floating-point vector subtraction.
     
    void arm_sub_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t blockSize)
     Q15 vector subtraction.
     
    void arm_sub_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
     Q31 vector subtraction.
     
    void arm_sub_q7 (q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, uint32_t blockSize)
     Q7 vector subtraction.
     
    +

    Description

    +

    Element-by-element subtraction of two vectors.

    +
            
+    pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.        
+

    There are separate functions for floating-point, Q7, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_sub_f32 (float32_t * pSrcA,
    float32_t * pSrcB,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_sub_q15 (q15_t * pSrcA,
    q15_t * pSrcB,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_sub_q31 (q31_t * pSrcA,
    q31_t * pSrcB,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
    + +

    References blockSize, and clip_q63_to_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_sub_q7 (q7_t * pSrcA,
    q7_t * pSrcB,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___basic_sub.js b/Documentation/DSP/html/group___basic_sub.js new file mode 100644 index 0000000..24142f5 --- /dev/null +++ b/Documentation/DSP/html/group___basic_sub.js @@ -0,0 +1,7 @@ +var group___basic_sub = +[ + [ "arm_sub_f32", "group___basic_sub.html#ga7f975a472de286331134227c08aad826", null ], + [ "arm_sub_q15", "group___basic_sub.html#ga997a8ee93088d15bda23c325d455b588", null ], + [ "arm_sub_q31", "group___basic_sub.html#ga28aa6908d092752144413e21933dc878", null ], + [ "arm_sub_q7", "group___basic_sub.html#gab09941de7dfeb247e5c29b406a435fcc", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___bilinear_interpolate.html b/Documentation/DSP/html/group___bilinear_interpolate.html new file mode 100644 index 0000000..53b464f --- /dev/null +++ b/Documentation/DSP/html/group___bilinear_interpolate.html @@ -0,0 +1,374 @@ + + + + + +Bilinear Interpolation +CMSIS-DSP: Bilinear Interpolation + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Bilinear Interpolation
    +
    Interpolation Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    static __INLINE float32_t arm_bilinear_interp_f32 (const arm_bilinear_interp_instance_f32 *S, float32_t X, float32_t Y)
     Floating-point bilinear interpolation.
     
    static __INLINE q31_t arm_bilinear_interp_q31 (arm_bilinear_interp_instance_q31 *S, q31_t X, q31_t Y)
     Q31 bilinear interpolation.
     
    static __INLINE q15_t arm_bilinear_interp_q15 (arm_bilinear_interp_instance_q15 *S, q31_t X, q31_t Y)
     Q15 bilinear interpolation.
     
    static __INLINE q7_t arm_bilinear_interp_q7 (arm_bilinear_interp_instance_q7 *S, q31_t X, q31_t Y)
     Q7 bilinear interpolation.
     
    +

    Description

    +

    Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid. The underlying function f(x, y) is sampled on a regular grid and the interpolation process determines values between the grid points. Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension. Bilinear interpolation is often used in image processing to rescale images. The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.

    +

    Algorithm

    +
    The instance structure used by the bilinear interpolation functions describes a two dimensional data table. For floating-point, the instance structure is defined as: 
    +  typedef struct
+  {
+    uint16_t numRows;
+    uint16_t numCols;
+    float32_t *pData;
+} arm_bilinear_interp_instance_f32;
+
    +
    where numRows specifies the number of rows in the table; numCols specifies the number of columns in the table; and pData points to an array of size numRows*numCols values. The data table pTable is organized in row order and the supplied data values fall on integer indexes. That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers.
    +
    Let (x, y) specify the desired interpolation point. Then define: 
    +    XF = floor(x)
+    YF = floor(y)
+
    +
    The interpolated output point is computed as: 
    + f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+          + f(XF+1, YF) * (x-XF)*(1-(y-YF))
+          + f(XF, YF+1) * (1-(x-XF))*(y-YF)
+          + f(XF+1, YF+1) * (x-XF)*(y-YF)
+
    Note that the coordinates (x, y) contain integer and fractional components. The integer components specify which portion of the table to use while the fractional components control the interpolation processor.
    +
    if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
    +

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE float32_t arm_bilinear_interp_f32 (const arm_bilinear_interp_instance_f32 * S,
    float32_t X,
    float32_t Y 
    )
    +     		+static
    +
    +
    Parameters
    + + + + +
    [in,out]Spoints to an instance of the interpolation structure.
    [in]Xinterpolation coordinate.
    [in]Yinterpolation coordinate.
    +
    +
    +
    Returns
    out interpolated value.
    + +

    References arm_bilinear_interp_instance_f32::numCols, arm_bilinear_interp_instance_f32::numRows, and arm_bilinear_interp_instance_f32::pData.

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE q15_t arm_bilinear_interp_q15 (arm_bilinear_interp_instance_q15 * S,
    q31_t X,
    q31_t Y 
    )
    +     		+static
    +
    +
    Parameters
    + + + + +
    [in,out]Spoints to an instance of the interpolation structure.
    [in]Xinterpolation coordinate in 12.20 format.
    [in]Yinterpolation coordinate in 12.20 format.
    +
    +
    +
    Returns
    out interpolated value.
    + +

    References arm_bilinear_interp_instance_q15::numCols, arm_bilinear_interp_instance_q15::numRows, and arm_bilinear_interp_instance_q15::pData.

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE q31_t arm_bilinear_interp_q31 (arm_bilinear_interp_instance_q31 * S,
    q31_t X,
    q31_t Y 
    )
    +     		+static
    +
    +
    Parameters
    + + + + +
    [in,out]Spoints to an instance of the interpolation structure.
    [in]Xinterpolation coordinate in 12.20 format.
    [in]Yinterpolation coordinate in 12.20 format.
    +
    +
    +
    Returns
    out interpolated value.
    + +

    References arm_bilinear_interp_instance_q31::numCols, arm_bilinear_interp_instance_q31::numRows, and arm_bilinear_interp_instance_q31::pData.

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE q7_t arm_bilinear_interp_q7 (arm_bilinear_interp_instance_q7 * S,
    q31_t X,
    q31_t Y 
    )
    +     		+static
    +
    +
    Parameters
    + + + + +
    [in,out]Spoints to an instance of the interpolation structure.
    [in]Xinterpolation coordinate in 12.20 format.
    [in]Yinterpolation coordinate in 12.20 format.
    +
    +
    +
    Returns
    out interpolated value.
    + +

    References arm_bilinear_interp_instance_q7::numCols, arm_bilinear_interp_instance_q7::numRows, and arm_bilinear_interp_instance_q7::pData.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___bilinear_interpolate.js b/Documentation/DSP/html/group___bilinear_interpolate.js new file mode 100644 index 0000000..b75cdc4 --- /dev/null +++ b/Documentation/DSP/html/group___bilinear_interpolate.js @@ -0,0 +1,7 @@ +var group___bilinear_interpolate = +[ + [ "arm_bilinear_interp_f32", "group___bilinear_interpolate.html#gab49a4c0f64854903d996d01ba38f711a", null ], + [ "arm_bilinear_interp_q15", "group___bilinear_interpolate.html#gaa8dffbc2a01bb7accf231384498ec85e", null ], + [ "arm_bilinear_interp_q31", "group___bilinear_interpolate.html#ga202a033c8a2ad3678b136f93153b6d13", null ], + [ "arm_bilinear_interp_q7", "group___bilinear_interpolate.html#gade8db9706a3ae9ad03b2750a239d2ee6", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___biquad_cascade_d_f1.html b/Documentation/DSP/html/group___biquad_cascade_d_f1.html new file mode 100644 index 0000000..1523e70 --- /dev/null +++ b/Documentation/DSP/html/group___biquad_cascade_d_f1.html @@ -0,0 +1,662 @@ + + + + + +Biquad Cascade IIR Filters Using Direct Form I Structure +CMSIS-DSP: Biquad Cascade IIR Filters Using Direct Form I Structure + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Biquad Cascade IIR Filters Using Direct Form I Structure
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point Biquad cascade filter.
     
    void arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
     
    void arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
     
    void arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point Biquad cascade filter.
     
    void arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 *S, uint8_t numStages, q15_t *pCoeffs, q15_t *pState, int8_t postShift)
     Initialization function for the Q15 Biquad cascade filter.
     
    void arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
     Initialization function for the Q31 Biquad cascade filter.
     
    void arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 Biquad cascade filter.
     
    void arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 Biquad cascade filter.
     
    +

    Description

    +

    This set of functions implements arbitrary order recursive (IIR) filters. The filters are implemented as a cascade of second order Biquad sections. The functions support Q15, Q31 and floating-point data types. Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.

    +

    The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc points to the array of input data and pDst points to the array of output data. Both arrays contain blockSize values.

    +
    Algorithm
    Each Biquad stage implements a second order filter using the difference equation: 
        
+    y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
+
    A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
    +Biquad.gif +
    +Single Biquad filter stage
    + Coefficients b0, b1 and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation 
        
+    y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
+
    In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
    +
    Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages.
    +BiquadCascade.gif +
    +8th order filter using a cascade of Biquad stages
    + A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
    +
    The pState points to state variables array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as: 
        
+    {x[n-1], x[n-2], y[n-1], y[n-2]}    
+
    +
    The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed, the coefficients are untouched.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Init Functions
    There is also an associated initialization function for each data type. The initialization function performs following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 3 different data type filter instance structures 
        
+    arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};    
+    arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};    
+    arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};    
+
    where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; postShift shift to be applied.
    +
    Fixed-Point Behavior
    Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions. Following issues must be considered:
      +
    • Scaling of coefficients
      • +
    • Filter gain
      • +
    • Overflow and saturation
      • +
    +
    +
    Scaling of coefficients: Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift which allow the filter coefficients to exceed the range [+1 -1). At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
    +BiquadPostshift.gif +
    +Fixed-point Biquad with shift by postShift bits after accumulator
    + This essentially scales the filter coefficients by 2^postShift. For example, to realize the coefficients 
        
+   {1.5, -0.8, 1.2, 1.6, -0.9}    
+
    set the pCoeffs array to: 
        
+   {0.75, -0.4, 0.6, 0.8, -0.45}    
+
    and set postShift=1
    +
    Filter gain: The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
    +
    Overflow and saturation: For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_f32 (const arm_biquad_casd_df1_inst_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point Biquad cascade structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    + +

    References blockSize, arm_biquad_casd_df1_inst_f32::numStages, arm_biquad_casd_df1_inst_f32::pCoeffs, and arm_biquad_casd_df1_inst_f32::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_fast_q15 (const arm_biquad_casd_df1_inst_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 Biquad cascade structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits.
    +
    Refer to the function arm_biquad_cascade_df1_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_biquad_cascade_df1_init_q15() to initialize the filter structure.
    + +

    References __SIMD32, arm_biquad_casd_df1_inst_q15::numStages, arm_biquad_casd_df1_inst_q15::pCoeffs, arm_biquad_casd_df1_inst_q15::postShift, and arm_biquad_casd_df1_inst_q15::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_fast_q31 (const arm_biquad_casd_df1_inst_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 Biquad cascade structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function arm_biquad_cascade_df1_init_q31() to initialize filter structure.
    +
    Refer to the function arm_biquad_cascade_df1_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_biquad_cascade_df1_init_q31() to initialize the filter structure.
    + +

    References mult_32x32_keep32_R, multAcc_32x32_keep32_R, arm_biquad_casd_df1_inst_q31::numStages, arm_biquad_casd_df1_inst_q31::pCoeffs, arm_biquad_casd_df1_inst_q31::postShift, and arm_biquad_casd_df1_inst_q31::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_init_f32 (arm_biquad_casd_df1_inst_f32 * S,
    uint8_t numStages,
    float32_t * pCoeffs,
    float32_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the floating-point Biquad cascade structure.
    [in]numStagesnumber of 2nd order stages in the filter.
    [in]*pCoeffspoints to the filter coefficients array.
    [in]*pStatepoints to the state array.
    +
    +
    +
    Returns
    none
    +

    Coefficient and State Ordering:

    +
    The coefficients are stored in the array pCoeffs in the following order: 
        
+    {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
+
    +
    where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
    +
    The pState is a pointer to state array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as: 
        
+    {x[n-1], x[n-2], y[n-1], y[n-2]}    
+
    The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    + +

    References arm_biquad_casd_df1_inst_f32::numStages, arm_biquad_casd_df1_inst_f32::pCoeffs, and arm_biquad_casd_df1_inst_f32::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_init_q15 (arm_biquad_casd_df1_inst_q15 * S,
    uint8_t numStages,
    q15_t * pCoeffs,
    q15_t * pState,
    int8_t postShift 
    )
    +
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the Q15 Biquad cascade structure.
    [in]numStagesnumber of 2nd order stages in the filter.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]postShiftShift to be applied to the accumulator result. Varies according to the coefficients format
    +
    +
    +
    Returns
    none
    +

    Coefficient and State Ordering:

    +
    The coefficients are stored in the array pCoeffs in the following order: 
        
+    {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}    
+
    where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 6*numStages values. The zero coefficient between b1 and b2 facilities use of 16-bit SIMD instructions on the Cortex-M4.
    +
    The state variables are stored in the array pState. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as: 
        
+    {x[n-1], x[n-2], y[n-1], y[n-2]}    
+
    The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    + +

    References arm_biquad_casd_df1_inst_q15::numStages, arm_biquad_casd_df1_inst_q15::pCoeffs, arm_biquad_casd_df1_inst_q15::postShift, and arm_biquad_casd_df1_inst_q15::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_init_q31 (arm_biquad_casd_df1_inst_q31 * S,
    uint8_t numStages,
    q31_t * pCoeffs,
    q31_t * pState,
    int8_t postShift 
    )
    +
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the Q31 Biquad cascade structure.
    [in]numStagesnumber of 2nd order stages in the filter.
    [in]*pCoeffspoints to the filter coefficients buffer.
    [in]*pStatepoints to the state buffer.
    [in]postShiftShift to be applied after the accumulator. Varies according to the coefficients format
    +
    +
    +
    Returns
    none
    +

    Coefficient and State Ordering:

    +
    The coefficients are stored in the array pCoeffs in the following order: 
        
+    {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
+
    where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
    +
    The pState points to state variables array. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the pState array as: 
        
+    {x[n-1], x[n-2], y[n-1], y[n-2]}    
+
    The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    References arm_biquad_casd_df1_inst_q31::numStages, arm_biquad_casd_df1_inst_q31::pCoeffs, arm_biquad_casd_df1_inst_q31::postShift, and arm_biquad_casd_df1_inst_q31::pState.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_q15 (const arm_biquad_casd_df1_inst_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 Biquad cascade structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the location where the output result is written.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits. Finally, the result is saturated to 1.15 format.
    +
    Refer to the function arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
    + +

    References __SIMD32, arm_biquad_casd_df1_inst_q15::numStages, arm_biquad_casd_df1_inst_q15::pCoeffs, arm_biquad_casd_df1_inst_q15::postShift, and arm_biquad_casd_df1_inst_q15::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df1_q31 (const arm_biquad_casd_df1_inst_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 Biquad cascade structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to 1.31 format by discarding the low 32 bits.
    +
    Refer to the function arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    References blockSize, arm_biquad_casd_df1_inst_q31::numStages, arm_biquad_casd_df1_inst_q31::pCoeffs, arm_biquad_casd_df1_inst_q31::postShift, and arm_biquad_casd_df1_inst_q31::pState.

    + +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___biquad_cascade_d_f1.js b/Documentation/DSP/html/group___biquad_cascade_d_f1.js new file mode 100644 index 0000000..34b1303 --- /dev/null +++ b/Documentation/DSP/html/group___biquad_cascade_d_f1.js @@ -0,0 +1,11 @@ +var group___biquad_cascade_d_f1 = +[ + [ "arm_biquad_cascade_df1_f32", "group___biquad_cascade_d_f1.html#gaa0dbe330d763e3c1d8030b3ef12d5bdc", null ], + [ "arm_biquad_cascade_df1_fast_q15", "group___biquad_cascade_d_f1.html#gaffb9792c0220882efd4c58f3c6a05fd7", null ], + [ "arm_biquad_cascade_df1_fast_q31", "group___biquad_cascade_d_f1.html#ga456390f5e448afad3a38bed7d6e380e3", null ], + [ "arm_biquad_cascade_df1_init_f32", "group___biquad_cascade_d_f1.html#ga8e73b69a788e681a61bccc8959d823c5", null ], + [ "arm_biquad_cascade_df1_init_q15", "group___biquad_cascade_d_f1.html#gad54c724132f6d742a444eb6df0e9c731", null ], + [ "arm_biquad_cascade_df1_init_q31", "group___biquad_cascade_d_f1.html#gaf42a44f9b16d61e636418c83eefe577b", null ], + [ "arm_biquad_cascade_df1_q15", "group___biquad_cascade_d_f1.html#gadd66a0aefdc645031d607b0a5b37a942", null ], + [ "arm_biquad_cascade_df1_q31", "group___biquad_cascade_d_f1.html#ga27b0c54da702713976e5202d20b4473f", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___biquad_cascade_d_f1__32x64.html b/Documentation/DSP/html/group___biquad_cascade_d_f1__32x64.html new file mode 100644 index 0000000..2dc3924 --- /dev/null +++ b/Documentation/DSP/html/group___biquad_cascade_d_f1__32x64.html @@ -0,0 +1,308 @@ + + + + + +High Precision Q31 Biquad Cascade Filter +CMSIS-DSP: High Precision Q31 Biquad Cascade Filter + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    High Precision Q31 Biquad Cascade Filter
    +
    Filtering Functions
    +
    + + + + + + +

    +Functions

    void arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 *S, uint8_t numStages, q31_t *pCoeffs, q63_t *pState, uint8_t postShift)
     
    void arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     
    +

    Description

    +

    This function implements a high precision Biquad cascade filter which operates on Q31 data values. The filter coefficients are in 1.31 format and the state variables are in 1.63 format. The double precision state variables reduce quantization noise in the filter and provide a cleaner output. These filters are particularly useful when implementing filters in which the singularities are close to the unit circle. This is common for low pass or high pass filters with very low cutoff frequencies.

    +

    The function operates on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays containing blockSize Q31 values.

    +
    Algorithm
    Each Biquad stage implements a second order filter using the difference equation: 
        
+    y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
+
    A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
    +Biquad.gif +
    +Single Biquad filter stage
    + Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools use the difference equation 
        
+    y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
+
    In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
    +
    Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages.
    +BiquadCascade.gif +
    +8th order filter using a cascade of Biquad stages
    + A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
    +
    The pState points to state variables array . Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision. The state variables are arranged in the array as: 
        
+    {x[n-1], x[n-2], y[n-1], y[n-2]}    
+
    +
    The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values of data in 1.63 format. The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
    +
    Init Function
    There is also an associated initialization function which performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the filter instance structure use 
        
+    arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};    
+
    where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; postShift shift to be applied which is described in detail below.
    +
    Fixed-Point Behavior
    Care must be taken while using Biquad Cascade 32x64 filter function. Following issues must be considered:
      +
    • Scaling of coefficients
      • +
    • Filter gain
      • +
    • Overflow and saturation
      • +
    +
    +
    Filter coefficients are represented as fractional values and restricted to lie in the range [-1 +1). The processing function has an additional scaling parameter postShift which allows the filter coefficients to exceed the range [+1 -1). At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
    +BiquadPostshift.gif +
    +Fixed-point Biquad with shift by postShift bits after accumulator
    + This essentially scales the filter coefficients by 2^postShift. For example, to realize the coefficients 
        
+   {1.5, -0.8, 1.2, 1.6, -0.9}    
+
    set the Coefficient array to: 
        
+   {0.75, -0.4, 0.6, 0.8, -0.45}    
+
    and set postShift=1
    +
    The second thing to keep in mind is the gain through the filter. The frequency response of a Biquad filter is a function of its coefficients. It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies. This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter. To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
    +
    The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version. This is described in the function specific documentation below.
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cas_df1_32x64_init_q31 (arm_biquad_cas_df1_32x64_ins_q31 * S,
    uint8_t numStages,
    q31_t * pCoeffs,
    q63_t * pState,
    uint8_t postShift 
    )
    +
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the high precision Q31 Biquad cascade filter structure.
    [in]numStagesnumber of 2nd order stages in the filter.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]postShiftShift to be applied after the accumulator. Varies according to the coefficients format.
    +
    +
    +
    Returns
    none
    +

    Coefficient and State Ordering:

    +
    The coefficients are stored in the array pCoeffs in the following order: 
        
+    {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
+
    where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
    +
    The pState points to state variables array and size of each state variable is 1.63 format. Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2]. The state variables are arranged in the state array as: 
        
+    {x[n-1], x[n-2], y[n-1], y[n-2]}    
+
    The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. The state array has a total length of 4*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    References arm_biquad_cas_df1_32x64_ins_q31::numStages, arm_biquad_cas_df1_32x64_ins_q31::pCoeffs, arm_biquad_cas_df1_32x64_ins_q31::postShift, and arm_biquad_cas_df1_32x64_ins_q31::pState.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cas_df1_32x64_q31 (const arm_biquad_cas_df1_32x64_ins_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the high precision Q31 Biquad cascade filter.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to 1.31 format by discarding the low 32 bits.
    +
    Two related functions are provided in the CMSIS DSP library. arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator. arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    References blockSize, mult32x64(), arm_biquad_cas_df1_32x64_ins_q31::numStages, arm_biquad_cas_df1_32x64_ins_q31::pCoeffs, arm_biquad_cas_df1_32x64_ins_q31::postShift, and arm_biquad_cas_df1_32x64_ins_q31::pState.

    + +

    Referenced by main().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___biquad_cascade_d_f1__32x64.js b/Documentation/DSP/html/group___biquad_cascade_d_f1__32x64.js new file mode 100644 index 0000000..a52d81f --- /dev/null +++ b/Documentation/DSP/html/group___biquad_cascade_d_f1__32x64.js @@ -0,0 +1,5 @@ +var group___biquad_cascade_d_f1__32x64 = +[ + [ "arm_biquad_cas_df1_32x64_init_q31", "group___biquad_cascade_d_f1__32x64.html#ga44900cecb8083afcaabf905ffcd656bb", null ], + [ "arm_biquad_cas_df1_32x64_q31", "group___biquad_cascade_d_f1__32x64.html#ga953a83e69685de6575cff37feb358a93", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___biquad_cascade_d_f2_t.html b/Documentation/DSP/html/group___biquad_cascade_d_f2_t.html new file mode 100644 index 0000000..070314f --- /dev/null +++ b/Documentation/DSP/html/group___biquad_cascade_d_f2_t.html @@ -0,0 +1,533 @@ + + + + + +Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure +CMSIS-DSP: Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + +

    +Functions

    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_df2T_f64 (const arm_biquad_cascade_df2T_instance_f64 *S, float64_t *pSrc, float64_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_biquad_cascade_df2T_init_f64 (arm_biquad_cascade_df2T_instance_f64 *S, uint8_t numStages, float64_t *pCoeffs, float64_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_stereo_df2T_f32 (const arm_biquad_cascade_stereo_df2T_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point transposed direct form II Biquad cascade filter.
     
    void arm_biquad_cascade_stereo_df2T_init_f32 (arm_biquad_cascade_stereo_df2T_instance_f32 *S, uint8_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point transposed direct form II Biquad cascade filter.
     
    +

    Description

    +

    This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. The filters are implemented as a cascade of second order Biquad sections. These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. Only floating-point data is supported.

    +

    This function operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc points to the array of input data and pDst points to the array of output data. Both arrays contain blockSize values.

    +
    Algorithm
    Each Biquad stage implements a second order filter using the difference equation: 
           
+   y[n] = b0 * x[n] + d1       
+   d1 = b1 * x[n] + a1 * y[n] + d2       
+   d2 = b2 * x[n] + a2 * y[n]       
+
    where d1 and d2 represent the two state values.
    +
    A Biquad filter using a transposed Direct Form II structure is shown below.
    +BiquadDF2Transposed.gif +
    +Single transposed Direct Form II Biquad
    + Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools flip the sign of the feedback coefficients: 
           
+   y[n] = b0 * x[n] + d1;       
+   d1 = b1 * x[n] - a1 * y[n] + d2;       
+   d2 = b2 * x[n] - a2 * y[n];       
+
    In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
    +
    Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages. A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
    +
    pState points to the state variable array. Each Biquad stage has 2 state variables d1 and d2. The state variables are arranged in the pState array as: 
           
+    {d11, d12, d21, d22, ...}       
+
    where d1x refers to the state variables for the first Biquad and d2x refers to the state variables for the second Biquad. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. That is why the Direct Form I structure supports Q15 and Q31 data types. The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2. Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
    +
    Init Functions
    There is also an associated initialization function. The initialization function performs following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the instance structure use 
           
+    arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
+
    where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer. pCoeffs is the address of the coefficient buffer;
    +

    This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure. The filters are implemented as a cascade of second order Biquad sections. These functions provide a slight memory savings as compared to the direct form I Biquad filter functions. Only floating-point data is supported.

    +

    This function operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc points to the array of input data and pDst points to the array of output data. Both arrays contain blockSize values.

    +
    Algorithm
    Each Biquad stage implements a second order filter using the difference equation: 
           
+   y[n] = b0 * x[n] + d1       
+   d1 = b1 * x[n] + a1 * y[n] + d2       
+   d2 = b2 * x[n] + a2 * y[n]       
+
    where d1 and d2 represent the two state values.
    +
    A Biquad filter using a transposed Direct Form II structure is shown below.
    +BiquadDF2Transposed.gif +
    +Single transposed Direct Form II Biquad
    + Coefficients b0, b1, and b2 multiply the input signal x[n] and are referred to as the feedforward coefficients. Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients. Pay careful attention to the sign of the feedback coefficients. Some design tools flip the sign of the feedback coefficients: 
           
+   y[n] = b0 * x[n] + d1;       
+   d1 = b1 * x[n] - a1 * y[n] + d2;       
+   d2 = b2 * x[n] - a2 * y[n];       
+
    In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
    +
    Higher order filters are realized as a cascade of second order sections. numStages refers to the number of second order stages used. For example, an 8th order filter would be realized with numStages=4 second order stages. A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
    +
    pState points to the state variable array. Each Biquad stage has 2 state variables d1 and d2. The state variables are arranged in the pState array as: 
           
+    {d11, d12, d21, d22, ...}       
+
    where d1x refers to the state variables for the first Biquad and d2x refers to the state variables for the second Biquad. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II. The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types. That is why the Direct Form I structure supports Q15 and Q31 data types. The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2. Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad. The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
    +
    Init Functions
    There is also an associated initialization function. The initialization function performs following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. For example, to statically initialize the instance structure use 
           
+    arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};       
+
    where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer. pCoeffs is the address of the coefficient buffer;
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_df2T_f32 (const arm_biquad_cascade_df2T_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the filter data structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References blockSize, arm_biquad_cascade_df2T_instance_f32::numStages, arm_biquad_cascade_df2T_instance_f32::pCoeffs, and arm_biquad_cascade_df2T_instance_f32::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_df2T_f64 (const arm_biquad_cascade_df2T_instance_f64 * S,
    float64_t * pSrc,
    float64_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the filter data structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References blockSize, arm_biquad_cascade_df2T_instance_f64::numStages, arm_biquad_cascade_df2T_instance_f64::pCoeffs, and arm_biquad_cascade_df2T_instance_f64::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df2T_init_f32 (arm_biquad_cascade_df2T_instance_f32 * S,
    uint8_t numStages,
    float32_t * pCoeffs,
    float32_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the filter data structure.
    [in]numStagesnumber of 2nd order stages in the filter.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    +
    +
    +
    Returns
    none
    +

    Coefficient and State Ordering:

    +
    The coefficients are stored in the array pCoeffs in the following order: 
        
+    {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
+
    +
    where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
    +
    The pState is a pointer to state array. Each Biquad stage has 2 state variables d1, and d2. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    + +

    References arm_biquad_cascade_df2T_instance_f32::numStages, arm_biquad_cascade_df2T_instance_f32::pCoeffs, and arm_biquad_cascade_df2T_instance_f32::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_df2T_init_f64 (arm_biquad_cascade_df2T_instance_f64 * S,
    uint8_t numStages,
    float64_t * pCoeffs,
    float64_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the filter data structure.
    [in]numStagesnumber of 2nd order stages in the filter.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    +
    +
    +
    Returns
    none
    +

    Coefficient and State Ordering:

    +
    The coefficients are stored in the array pCoeffs in the following order: 
        
+    {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
+
    +
    where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
    +
    The pState is a pointer to state array. Each Biquad stage has 2 state variables d1, and d2. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    + +

    References arm_biquad_cascade_df2T_instance_f64::numStages, arm_biquad_cascade_df2T_instance_f64::pCoeffs, and arm_biquad_cascade_df2T_instance_f64::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    LOW_OPTIMIZATION_ENTER void arm_biquad_cascade_stereo_df2T_f32 (const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +

    Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels.

    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the filter data structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References blockSize, arm_biquad_cascade_stereo_df2T_instance_f32::numStages, arm_biquad_cascade_stereo_df2T_instance_f32::pCoeffs, and arm_biquad_cascade_stereo_df2T_instance_f32::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_biquad_cascade_stereo_df2T_init_f32 (arm_biquad_cascade_stereo_df2T_instance_f32 * S,
    uint8_t numStages,
    float32_t * pCoeffs,
    float32_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the filter data structure.
    [in]numStagesnumber of 2nd order stages in the filter.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    +
    +
    +
    Returns
    none
    +

    Coefficient and State Ordering:

    +
    The coefficients are stored in the array pCoeffs in the following order: 
        
+    {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
+
    +
    where b1x and a1x are the coefficients for the first stage, b2x and a2x are the coefficients for the second stage, and so on. The pCoeffs array contains a total of 5*numStages values.
    +
    The pState is a pointer to state array. Each Biquad stage has 2 state variables d1, and d2 for each channel. The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on. The state array has a total length of 2*numStages values. The state variables are updated after each block of data is processed; the coefficients are untouched.
    + +

    References arm_biquad_cascade_stereo_df2T_instance_f32::numStages, arm_biquad_cascade_stereo_df2T_instance_f32::pCoeffs, and arm_biquad_cascade_stereo_df2T_instance_f32::pState.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___biquad_cascade_d_f2_t.js b/Documentation/DSP/html/group___biquad_cascade_d_f2_t.js new file mode 100644 index 0000000..7df3e57 --- /dev/null +++ b/Documentation/DSP/html/group___biquad_cascade_d_f2_t.js @@ -0,0 +1,9 @@ +var group___biquad_cascade_d_f2_t = +[ + [ "arm_biquad_cascade_df2T_f32", "group___biquad_cascade_d_f2_t.html#ga114f373fbc16a314e9f293c7c7649c7f", null ], + [ "arm_biquad_cascade_df2T_f64", "group___biquad_cascade_d_f2_t.html#gaa8735dda5f3f36d0936283794c2aa771", null ], + [ "arm_biquad_cascade_df2T_init_f32", "group___biquad_cascade_d_f2_t.html#ga70eaddf317a4a8bde6bd6a97df67fedd", null ], + [ "arm_biquad_cascade_df2T_init_f64", "group___biquad_cascade_d_f2_t.html#ga12dc5d8e8892806ad70e79ca2ff9f86e", null ], + [ "arm_biquad_cascade_stereo_df2T_f32", "group___biquad_cascade_d_f2_t.html#gac75de449c3e4f733477d81bd0ada5eec", null ], + [ "arm_biquad_cascade_stereo_df2T_init_f32", "group___biquad_cascade_d_f2_t.html#ga405197c89fe4d34003efd23786296425", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___c_f_f_t___c_i_f_f_t.html b/Documentation/DSP/html/group___c_f_f_t___c_i_f_f_t.html new file mode 100644 index 0000000..40eab00 --- /dev/null +++ b/Documentation/DSP/html/group___c_f_f_t___c_i_f_f_t.html @@ -0,0 +1,800 @@ + + + + + +Complex FFT Tables +CMSIS-DSP: Complex FFT Tables + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Variables
    +
    +
    Complex FFT Tables
    +
    Transform Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    const uint16_t armBitRevTable [1024]
     
    const float32_t twiddleCoef_16 [32]
     
    const float32_t twiddleCoef_32 [64]
     
    const float32_t twiddleCoef_64 [128]
     
    const float32_t twiddleCoef_128 [256]
     
    const float32_t twiddleCoef_256 [512]
     
    const float32_t twiddleCoef_512 [1024]
     
    const float32_t twiddleCoef_1024 [2048]
     
    const float32_t twiddleCoef_2048 [4096]
     
    const float32_t twiddleCoef_4096 [8192]
     
    const q31_t twiddleCoef_16_q31 [24]
     
    const q31_t twiddleCoef_32_q31 [48]
     
    const q31_t twiddleCoef_64_q31 [96]
     
    const q31_t twiddleCoef_128_q31 [192]
     
    const q31_t twiddleCoef_256_q31 [384]
     
    const q31_t twiddleCoef_512_q31 [768]
     
    const q31_t twiddleCoef_1024_q31 [1536]
     
    const q31_t twiddleCoef_2048_q31 [3072]
     
    const q31_t twiddleCoef_4096_q31 [6144]
     
    const q15_t twiddleCoef_16_q15 [24]
     
    const q15_t twiddleCoef_32_q15 [48]
     
    const q15_t twiddleCoef_64_q15 [96]
     
    const q15_t twiddleCoef_128_q15 [192]
     
    const q15_t twiddleCoef_256_q15 [384]
     
    const q15_t twiddleCoef_512_q15 [768]
     
    const q15_t twiddleCoef_1024_q15 [1536]
     
    const q15_t twiddleCoef_2048_q15 [3072]
     
    const q15_t twiddleCoef_4096_q15 [6144]
     
    +

    Description

    +

    Variable Documentation

    + +
    +
    + + + + +
    const uint16_t armBitRevTable[1024]
    +
    +
    Pseudo code for Generation of Bit reversal Table is
    +
    for(l=1;l <= N/4;l++)    
+{    
+  for(i=0;i<logN2;i++)    
+  {     
+    a[i]=l&(1<<i);    
+  }    
+  for(j=0; j<logN2; j++)    
+  {    
+    if (a[j]!=0)    
+    y[l]+=(1<<((logN2-1)-j));    
+  }    
+  y[l] = y[l] >> 1;    
+ }
    +
    where N = 4096 logN2 = 12
    +
    N is the maximum FFT Size supported
    + +

    Referenced by arm_cfft_radix2_init_f32(), arm_cfft_radix2_init_q15(), arm_cfft_radix2_init_q31(), arm_cfft_radix4_init_f32(), arm_cfft_radix4_init_q15(), and arm_cfft_radix4_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_1024[2048]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 1024 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_1024_q15[1536]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 1024 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_1024_q31[1536]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 1024 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_128[256]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 128 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_128_q15[192]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 128 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_128_q31[192]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 128 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_16[32]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 16 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_16_q15[24]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 16 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_16_q31[24]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 16 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_2048[4096]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 2048 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_2048_q15[3072]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 2048 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_2048_q31[3072]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 2048 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_256[512]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 256 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_256_q15[384]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 256 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_256_q31[384]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 256 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_32[64]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 32 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_32_q15[48]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 32 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_32_q31[48]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 32 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_4096[8192]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 4096 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_4096_q15[6144]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 4096 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +

    Referenced by arm_cfft_radix2_init_q15(), and arm_cfft_radix4_init_q15().

    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_4096_q31[6144]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 4096 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +

    Referenced by arm_cfft_radix2_init_q31(), and arm_cfft_radix4_init_q31().

    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_512[1024]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 512 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_512_q15[768]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 512 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_512_q31[768]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 512 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    + +
    +
    + + + + +
    const float32_t twiddleCoef_64[128]
    +
    +
    Example code for Floating-point Twiddle factors Generation:
    +
    for(i = 0; i< N/; i++)    
+{    
+      twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+      twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 64 and PI = 3.14159265358979
    +
    Cos and Sin values are in interleaved fashion
    + +

    Referenced by arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const q15_t twiddleCoef_64_q15[96]
    +
    +
    Example code for q15 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 64 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to q15(Fixed point 1.15): round(twiddleCoefq15(i) * pow(2, 15))
    + +
    +
    + +
    +
    + + + + +
    const q31_t twiddleCoef_64_q31[96]
    +
    +
    Example code for Q31 Twiddle factors Generation::
    +
    for(i = 0; i< 3N/4; i++)    
+{    
+   twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
+   twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
+}
    +
    where N = 64 and PI = 3.14159265358979
    +
    Cos and Sin values are interleaved fashion
    +
    Convert Floating point to Q31(Fixed point 1.31): round(twiddleCoefQ31(i) * pow(2, 31))
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___c_f_f_t___c_i_f_f_t.js b/Documentation/DSP/html/group___c_f_f_t___c_i_f_f_t.js new file mode 100644 index 0000000..28caf65 --- /dev/null +++ b/Documentation/DSP/html/group___c_f_f_t___c_i_f_f_t.js @@ -0,0 +1,31 @@ +var group___c_f_f_t___c_i_f_f_t = +[ + [ "armBitRevTable", "group___c_f_f_t___c_i_f_f_t.html#gae247e83ad50d474107254e25b36ad42b", null ], + [ "twiddleCoef_1024", "group___c_f_f_t___c_i_f_f_t.html#ga27c056eb130a4333d1cc5dd43ec738b1", null ], + [ "twiddleCoef_1024_q15", "group___c_f_f_t___c_i_f_f_t.html#ga8a0ec95d866fe96b740e77d6e1356b59", null ], + [ "twiddleCoef_1024_q31", "group___c_f_f_t___c_i_f_f_t.html#ga514443c44b62b8b3d240afefebcda310", null ], + [ "twiddleCoef_128", "group___c_f_f_t___c_i_f_f_t.html#ga948433536dafaac1381decfccf4e2d9c", null ], + [ "twiddleCoef_128_q15", "group___c_f_f_t___c_i_f_f_t.html#gabfdd1c5cd2b3f96da5fe5f07c707a8e5", null ], + [ "twiddleCoef_128_q31", "group___c_f_f_t___c_i_f_f_t.html#gafecf9ed9873415d9f5f17f37b30c7250", null ], + [ "twiddleCoef_16", "group___c_f_f_t___c_i_f_f_t.html#gae75e243ec61706427314270f222e0c8e", null ], + [ "twiddleCoef_16_q15", "group___c_f_f_t___c_i_f_f_t.html#ga8e4e2e05f4a3112184c96cb3308d6c39", null ], + [ "twiddleCoef_16_q31", "group___c_f_f_t___c_i_f_f_t.html#gaef4697e1ba348c4ac9358f2b9e279e93", null ], + [ "twiddleCoef_2048", "group___c_f_f_t___c_i_f_f_t.html#ga23e7f30421a7905b21c2015429779633", null ], + [ "twiddleCoef_2048_q15", "group___c_f_f_t___c_i_f_f_t.html#gadd16ce08ffd1048c385e0534a3b19cbb", null ], + [ "twiddleCoef_2048_q31", "group___c_f_f_t___c_i_f_f_t.html#ga9c5767de9f5a409fd0c2027e6ac67179", null ], + [ "twiddleCoef_256", "group___c_f_f_t___c_i_f_f_t.html#gafe813758a03a798e972359a092315be4", null ], + [ "twiddleCoef_256_q15", "group___c_f_f_t___c_i_f_f_t.html#ga6099ae5262a0a3a8d9ce1e6da02f0c2e", null ], + [ "twiddleCoef_256_q31", "group___c_f_f_t___c_i_f_f_t.html#gaef1ea005053b715b851cf5f908168ede", null ], + [ "twiddleCoef_32", "group___c_f_f_t___c_i_f_f_t.html#ga78a72c85d88185de98050c930cfc76e3", null ], + [ "twiddleCoef_32_q15", "group___c_f_f_t___c_i_f_f_t.html#gac194a4fe04a19051ae1811f69c6e5df2", null ], + [ "twiddleCoef_32_q31", "group___c_f_f_t___c_i_f_f_t.html#ga8ba78d5e6ef4bdc58e8f0044e0664a0a", null ], + [ "twiddleCoef_4096", "group___c_f_f_t___c_i_f_f_t.html#gae0182d1dd3b2f21aad4e38a815a0bd40", null ], + [ "twiddleCoef_4096_q15", "group___c_f_f_t___c_i_f_f_t.html#ga9b409d6995eab17805b1d1881d4bc652", null ], + [ "twiddleCoef_4096_q31", "group___c_f_f_t___c_i_f_f_t.html#ga67c0890317deab3391e276f22c1fc400", null ], + [ "twiddleCoef_512", "group___c_f_f_t___c_i_f_f_t.html#gad8830f0c068ab2cc19f2f87d220fa148", null ], + [ "twiddleCoef_512_q15", "group___c_f_f_t___c_i_f_f_t.html#ga6152621af210f847128c6f38958fa385", null ], + [ "twiddleCoef_512_q31", "group___c_f_f_t___c_i_f_f_t.html#ga416c61b2f08542a39111e06b0378bebe", null ], + [ "twiddleCoef_64", "group___c_f_f_t___c_i_f_f_t.html#ga4f3c6d98c7e66393b4ef3ac63746e43d", null ], + [ "twiddleCoef_64_q15", "group___c_f_f_t___c_i_f_f_t.html#gaa0cc411e0b3c82078e85cfdf1b84290f", null ], + [ "twiddleCoef_64_q31", "group___c_f_f_t___c_i_f_f_t.html#ga6e0a7e941a25a0d74b2e6590307de47e", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___class_marks.html b/Documentation/DSP/html/group___class_marks.html new file mode 100644 index 0000000..949a755 --- /dev/null +++ b/Documentation/DSP/html/group___class_marks.html @@ -0,0 +1,154 @@ + + + + + +Class Marks Example +CMSIS-DSP: Class Marks Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Class Marks Example
    +
    Examples
    +
    +
    Description:
    +
    Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance and Matrix functions to calculate statistical values of marks obtained in a class.
    +
    Note
    This example also demonstrates the usage of static initialization.
    +
    Variables Description:
    +
      +
    • testMarks_f32 points to the marks scored by 20 students in 4 subjects
      • +
    • max_marks Maximum of all marks
      • +
    • min_marks Minimum of all marks
      • +
    • mean Mean of all marks
      • +
    • var Variance of the marks
      • +
    • std Standard deviation of the marks
      • +
    • numStudents Total number of students in the class
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_class_marks_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___cmplx_by_cmplx_mult.html b/Documentation/DSP/html/group___cmplx_by_cmplx_mult.html new file mode 100644 index 0000000..9627fef --- /dev/null +++ b/Documentation/DSP/html/group___cmplx_by_cmplx_mult.html @@ -0,0 +1,306 @@ + + + + + +Complex-by-Complex Multiplication +CMSIS-DSP: Complex-by-Complex Multiplication + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex-by-Complex Multiplication
    +
    Complex Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_cmplx_mult_cmplx_f32 (float32_t *pSrcA, float32_t *pSrcB, float32_t *pDst, uint32_t numSamples)
     Floating-point complex-by-complex multiplication.
     
    void arm_cmplx_mult_cmplx_q15 (q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, uint32_t numSamples)
     Q15 complex-by-complex multiplication.
     
    void arm_cmplx_mult_cmplx_q31 (q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t numSamples)
     Q31 complex-by-complex multiplication.
     
    +

    Description

    +

    Multiplies a complex vector by another complex vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter numSamples represents the number of complex samples processed. The complex arrays have a total of 2*numSamples real values.

    +

    The underlying algorithm is used:

    +
            
+for(n=0; n<numSamples; n++) {        
+    pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];        
+    pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];        
+}        
+

    There are separate functions for floating-point, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mult_cmplx_f32 (float32_t * pSrcA,
    float32_t * pSrcB,
    float32_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]numSamplesnumber of complex samples in each vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mult_cmplx_q15 (q15_t * pSrcA,
    q15_t * pSrcB,
    q15_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]numSamplesnumber of complex samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mult_cmplx_q31 (q31_t * pSrcA,
    q31_t * pSrcB,
    q31_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [out]*pDstpoints to the output vector
    [in]numSamplesnumber of complex samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required.
    + +

    Referenced by arm_dct4_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___cmplx_by_cmplx_mult.js b/Documentation/DSP/html/group___cmplx_by_cmplx_mult.js new file mode 100644 index 0000000..7df1461 --- /dev/null +++ b/Documentation/DSP/html/group___cmplx_by_cmplx_mult.js @@ -0,0 +1,6 @@ +var group___cmplx_by_cmplx_mult = +[ + [ "arm_cmplx_mult_cmplx_f32", "group___cmplx_by_cmplx_mult.html#ga14b47080054a1ba1250a86805be1ff6b", null ], + [ "arm_cmplx_mult_cmplx_q15", "group___cmplx_by_cmplx_mult.html#ga67e96abfc9c3e30efb70a2ec9d0fe7e8", null ], + [ "arm_cmplx_mult_cmplx_q31", "group___cmplx_by_cmplx_mult.html#ga1829e50993a90742de225a0ce4213838", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___cmplx_by_real_mult.html b/Documentation/DSP/html/group___cmplx_by_real_mult.html new file mode 100644 index 0000000..00d70f0 --- /dev/null +++ b/Documentation/DSP/html/group___cmplx_by_real_mult.html @@ -0,0 +1,305 @@ + + + + + +Complex-by-Real Multiplication +CMSIS-DSP: Complex-by-Real Multiplication + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex-by-Real Multiplication
    +
    Complex Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_cmplx_mult_real_f32 (float32_t *pSrcCmplx, float32_t *pSrcReal, float32_t *pCmplxDst, uint32_t numSamples)
     Floating-point complex-by-real multiplication.
     
    void arm_cmplx_mult_real_q15 (q15_t *pSrcCmplx, q15_t *pSrcReal, q15_t *pCmplxDst, uint32_t numSamples)
     Q15 complex-by-real multiplication.
     
    void arm_cmplx_mult_real_q31 (q31_t *pSrcCmplx, q31_t *pSrcReal, q31_t *pCmplxDst, uint32_t numSamples)
     Q31 complex-by-real multiplication.
     
    +

    Description

    +

    Multiplies a complex vector by a real vector and generates a complex result. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). The parameter numSamples represents the number of complex samples processed. The complex arrays have a total of 2*numSamples real values while the real array has a total of numSamples real values.

    +

    The underlying algorithm is used:

    +
            
+for(n=0; n<numSamples; n++) {        
+    pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];        
+    pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];        
+}        
+

    There are separate functions for floating-point, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mult_real_f32 (float32_t * pSrcCmplx,
    float32_t * pSrcReal,
    float32_t * pCmplxDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcCmplxpoints to the complex input vector
    [in]*pSrcRealpoints to the real input vector
    [out]*pCmplxDstpoints to the complex output vector
    [in]numSamplesnumber of samples in each vector
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mult_real_q15 (q15_t * pSrcCmplx,
    q15_t * pSrcReal,
    q15_t * pCmplxDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcCmplxpoints to the complex input vector
    [in]*pSrcRealpoints to the real input vector
    [out]*pCmplxDstpoints to the complex output vector
    [in]numSamplesnumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    + +

    References __SIMD32.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mult_real_q31 (q31_t * pSrcCmplx,
    q31_t * pSrcReal,
    q31_t * pCmplxDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcCmplxpoints to the complex input vector
    [in]*pSrcRealpoints to the real input vector
    [out]*pCmplxDstpoints to the complex output vector
    [in]numSamplesnumber of samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
    + +

    References clip_q63_to_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___cmplx_by_real_mult.js b/Documentation/DSP/html/group___cmplx_by_real_mult.js new file mode 100644 index 0000000..440f773 --- /dev/null +++ b/Documentation/DSP/html/group___cmplx_by_real_mult.js @@ -0,0 +1,6 @@ +var group___cmplx_by_real_mult = +[ + [ "arm_cmplx_mult_real_f32", "group___cmplx_by_real_mult.html#ga9c18616f56cb4d3c0889ce0b339221ca", null ], + [ "arm_cmplx_mult_real_q15", "group___cmplx_by_real_mult.html#ga3bd8889dcb45980e1d3e53344df54e85", null ], + [ "arm_cmplx_mult_real_q31", "group___cmplx_by_real_mult.html#ga715e4bb8e945b8ca51ec5237611697ce", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___cmplx_matrix_mult.html b/Documentation/DSP/html/group___cmplx_matrix_mult.html new file mode 100644 index 0000000..f54ea74 --- /dev/null +++ b/Documentation/DSP/html/group___cmplx_matrix_mult.html @@ -0,0 +1,292 @@ + + + + + +Complex Matrix Multiplication +CMSIS-DSP: Complex Matrix Multiplication + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex Matrix Multiplication
    +
    Matrix Functions
    +
    + + + + + + + + + + + +

    +Functions

    arm_status arm_mat_cmplx_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point Complex matrix multiplication.
     
    arm_status arm_mat_cmplx_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pScratch)
     Q15 Complex matrix multiplication.
     
    arm_status arm_mat_cmplx_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 Complex matrix multiplication.
     
    +

    Description

    +

    Complex Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an M x N matrix with an N x P matrix results in an M x P matrix. When matrix size checking is enabled, the functions check: (1) that the inner dimensions of pSrcA and pSrcB are equal; and (2) that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_cmplx_mult_f32 (const arm_matrix_instance_f32 * pSrcA,
    const arm_matrix_instance_f32 * pSrcB,
    arm_matrix_instance_f32 * pDst 
    )
    +
    +

    Floating-point, complex, matrix multiplication.

    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input complex matrix structure
    [in]*pSrcBpoints to the second input complex matrix structure
    [out]*pDstpoints to output complex matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_cmplx_mult_q15 (const arm_matrix_instance_q15 * pSrcA,
    const arm_matrix_instance_q15 * pSrcB,
    arm_matrix_instance_q15 * pDst,
    q15_t * pScratch 
    )
    +
    +

    Q15, complex, matrix multiplication.

    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input complex matrix structure
    [in]*pSrcBpoints to the second input complex matrix structure
    [out]*pDstpoints to output complex matrix structure
    [in]*pScratchpoints to the array for storing intermediate results
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +
    Conditions for optimum performance
    Input, output and state buffers should be aligned by 32-bit
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
    +
    Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function.
    + +

    References __SIMD32, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_cmplx_mult_q31 (const arm_matrix_instance_q31 * pSrcA,
    const arm_matrix_instance_q31 * pSrcB,
    arm_matrix_instance_q31 * pDst 
    )
    +
    +

    Q31, complex, matrix multiplication.

    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input complex matrix structure
    [in]*pSrcBpoints to the second input complex matrix structure
    [out]*pDstpoints to output complex matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, clip_q63_to_q31(), arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___cmplx_matrix_mult.js b/Documentation/DSP/html/group___cmplx_matrix_mult.js new file mode 100644 index 0000000..cbe46be --- /dev/null +++ b/Documentation/DSP/html/group___cmplx_matrix_mult.js @@ -0,0 +1,6 @@ +var group___cmplx_matrix_mult = +[ + [ "arm_mat_cmplx_mult_f32", "group___cmplx_matrix_mult.html#ga1adb839ac84445b8c2f04efa43faef35", null ], + [ "arm_mat_cmplx_mult_q15", "group___cmplx_matrix_mult.html#ga63066615e7d6f6a44f4358725092419e", null ], + [ "arm_mat_cmplx_mult_q31", "group___cmplx_matrix_mult.html#gaaf3c0b171ca8412c77bab9fa90804737", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___complex_f_f_t.html b/Documentation/DSP/html/group___complex_f_f_t.html new file mode 100644 index 0000000..931574c --- /dev/null +++ b/Documentation/DSP/html/group___complex_f_f_t.html @@ -0,0 +1,1003 @@ + + + + + +Complex FFT Functions +CMSIS-DSP: Complex FFT Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex FFT Functions
    +
    Transform Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_cfft_f32 (const arm_cfft_instance_f32 *S, float32_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the floating-point complex FFT.
     
    void arm_cfft_q15 (const arm_cfft_instance_q15 *S, q15_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the Q15 complex FFT.
     
    void arm_cfft_q31 (const arm_cfft_instance_q31 *S, q31_t *p1, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Processing function for the fixed-point complex FFT in Q31 format.
     
    void arm_cfft_radix2_f32 (const arm_cfft_radix2_instance_f32 *S, float32_t *pSrc)
     Radix-2 CFFT/CIFFT.
     
    arm_status arm_cfft_radix2_init_f32 (arm_cfft_radix2_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the floating-point CFFT/CIFFT.
     
    arm_status arm_cfft_radix2_init_q15 (arm_cfft_radix2_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q15 CFFT/CIFFT.
     
    arm_status arm_cfft_radix2_init_q31 (arm_cfft_radix2_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q31 CFFT/CIFFT.
     
    void arm_cfft_radix2_q15 (const arm_cfft_radix2_instance_q15 *S, q15_t *pSrc)
     Processing function for the fixed-point CFFT/CIFFT.
     
    void arm_cfft_radix2_q31 (const arm_cfft_radix2_instance_q31 *S, q31_t *pSrc)
     Processing function for the fixed-point CFFT/CIFFT.
     
    void arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 *S, float32_t *pSrc)
     Processing function for the floating-point Radix-4 CFFT/CIFFT.
     
    arm_status arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the floating-point CFFT/CIFFT.
     
    arm_status arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q15 CFFT/CIFFT.
     
    arm_status arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 *S, uint16_t fftLen, uint8_t ifftFlag, uint8_t bitReverseFlag)
     Initialization function for the Q31 CFFT/CIFFT.
     
    void arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc)
     Processing function for the Q15 CFFT/CIFFT.
     
    void arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc)
     Processing function for the Q31 CFFT/CIFFT.
     
    +

    Description

    +
    The Fast Fourier Transform (FFT) is an efficient algorithm for computing the Discrete Fourier Transform (DFT). The FFT can be orders of magnitude faster than the DFT, especially for long lengths. The algorithms described in this section operate on complex data. A separate set of functions is devoted to handling of real sequences.
    +
    There are separate algorithms for handling floating-point, Q15, and Q31 data types. The algorithms available for each data type are described next.
    +
    The FFT functions operate in-place. That is, the array holding the input data will also be used to hold the corresponding result. The input data is complex and contains 2*fftLen interleaved values as shown below. 
     {real[0], imag[0], real[1], imag[1],..}
    The FFT result will be contained in the same array and the frequency domain values will have the same interleaving.
    +
    Floating-point
    The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-8 stages are performed along with a single radix-2 or radix-4 stage, as needed. The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses a different twiddle factor table.
    +
    The function uses the standard FFT definition and output values may grow by a factor of fftLen when computing the forward transform. The inverse transform includes a scale of 1/fftLen as part of the calculation and this matches the textbook definition of the inverse FFT.
    +
    Pre-initialized data structures containing twiddle factors and bit reversal tables are provided and defined in arm_const_structs.h. Include this header in your function and then pass one of the constant structures as an argument to arm_cfft_f32. For example:
    +
    arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)
    +
    computes a 64-point inverse complex FFT including bit reversal. The data structures are treated as constant data and not modified during the calculation. The same data structure can be reused for multiple transforms including mixing forward and inverse transforms.
    +
    Earlier releases of the library provided separate radix-2 and radix-4 algorithms that operated on floating-point data. These functions are still provided but are deprecated. The older functions are slower and less general than the new functions.
    +
    An example of initialization of the constants for the arm_cfft_f32 function follows:
    const static arm_cfft_instance_f32 *S;
    +
    ...
    +
    switch (length) {
    +
    case 16:
    +
    S = &arm_cfft_sR_f32_len16;
    +
    break;
    +
    case 32:
    +
    S = &arm_cfft_sR_f32_len32;
    +
    break;
    +
    case 64:
    +
    S = &arm_cfft_sR_f32_len64;
    +
    break;
    +
    case 128:
    +
    S = &arm_cfft_sR_f32_len128;
    +
    break;
    +
    case 256:
    +
    S = &arm_cfft_sR_f32_len256;
    +
    break;
    +
    case 512:
    +
    S = &arm_cfft_sR_f32_len512;
    +
    break;
    +
    case 1024:
    +
    S = &arm_cfft_sR_f32_len1024;
    +
    break;
    +
    case 2048:
    +
    S = &arm_cfft_sR_f32_len2048;
    +
    break;
    +
    case 4096:
    +
    S = &arm_cfft_sR_f32_len4096;
    +
    break;
    +
    }
    +
    +
    Q15 and Q31
    The floating-point complex FFT uses a mixed-radix algorithm. Multiple radix-4 stages are performed along with a single radix-2 stage, as needed. The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses a different twiddle factor table.
    +
    The function uses the standard FFT definition and output values may grow by a factor of fftLen when computing the forward transform. The inverse transform includes a scale of 1/fftLen as part of the calculation and this matches the textbook definition of the inverse FFT.
    +
    Pre-initialized data structures containing twiddle factors and bit reversal tables are provided and defined in arm_const_structs.h. Include this header in your function and then pass one of the constant structures as an argument to arm_cfft_q31. For example:
    +
    arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)
    +
    computes a 64-point inverse complex FFT including bit reversal. The data structures are treated as constant data and not modified during the calculation. The same data structure can be reused for multiple transforms including mixing forward and inverse transforms.
    +
    Earlier releases of the library provided separate radix-2 and radix-4 algorithms that operated on floating-point data. These functions are still provided but are deprecated. The older functions are slower and less general than the new functions.
    +
    An example of initialization of the constants for the arm_cfft_q31 function follows:
    const static arm_cfft_instance_q31 *S;
    +
    ...
    +
    switch (length) {
    +
    case 16:
    +
    S = &arm_cfft_sR_q31_len16;
    +
    break;
    +
    case 32:
    +
    S = &arm_cfft_sR_q31_len32;
    +
    break;
    +
    case 64:
    +
    S = &arm_cfft_sR_q31_len64;
    +
    break;
    +
    case 128:
    +
    S = &arm_cfft_sR_q31_len128;
    +
    break;
    +
    case 256:
    +
    S = &arm_cfft_sR_q31_len256;
    +
    break;
    +
    case 512:
    +
    S = &arm_cfft_sR_q31_len512;
    +
    break;
    +
    case 1024:
    +
    S = &arm_cfft_sR_q31_len1024;
    +
    break;
    +
    case 2048:
    +
    S = &arm_cfft_sR_q31_len2048;
    +
    break;
    +
    case 4096:
    +
    S = &arm_cfft_sR_q31_len4096;
    +
    break;
    +
    }
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cfft_f32 (const arm_cfft_instance_f32 * S,
    float32_t * p1,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point CFFT structure.
    [in,out]*p1points to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    References arm_bitreversal_32(), arm_cfft_radix8by2_f32(), arm_cfft_radix8by4_f32(), arm_radix8_butterfly_f32(), arm_cfft_instance_f32::bitRevLength, arm_cfft_instance_f32::fftLen, arm_cfft_instance_f32::pBitRevTable, and arm_cfft_instance_f32::pTwiddle.

    + +

    Referenced by arm_rfft_fast_f32(), and main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cfft_q15 (const arm_cfft_instance_q15 * S,
    q15_t * p1,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 CFFT structure.
    [in,out]*p1points to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    none.
    + +

    References arm_bitreversal_16(), arm_cfft_radix4by2_inverse_q15(), arm_cfft_radix4by2_q15(), arm_radix4_butterfly_inverse_q15(), arm_radix4_butterfly_q15(), arm_cfft_instance_q15::bitRevLength, arm_cfft_instance_q15::fftLen, arm_cfft_instance_q15::pBitRevTable, and arm_cfft_instance_q15::pTwiddle.

    + +

    Referenced by arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cfft_q31 (const arm_cfft_instance_q31 * S,
    q31_t * p1,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the fixed-point CFFT structure.
    [in,out]*p1points to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    none.
    + +

    References arm_bitreversal_32(), arm_cfft_radix4by2_inverse_q31(), arm_cfft_radix4by2_q31(), arm_radix4_butterfly_inverse_q31(), arm_radix4_butterfly_q31(), arm_cfft_instance_q31::bitRevLength, arm_cfft_instance_q31::fftLen, arm_cfft_instance_q31::pBitRevTable, and arm_cfft_instance_q31::pTwiddle.

    + +

    Referenced by arm_rfft_q31().

    + +
    +
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    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix2_f32 (const arm_cfft_radix2_instance_f32 * S,
    float32_t * pSrc 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_f32 and will be removed in the future.
    +
    Parameters
    + + + +
    [in]*Spoints to an instance of the floating-point Radix-2 CFFT/CIFFT structure.
    [in,out]*pSrcpoints to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    +
    +
    +
    Returns
    none.
    + +

    References arm_bitreversal_f32(), arm_radix2_butterfly_f32(), arm_radix2_butterfly_inverse_f32(), arm_cfft_radix2_instance_f32::bitReverseFlag, arm_cfft_radix2_instance_f32::bitRevFactor, arm_cfft_radix2_instance_f32::fftLen, arm_cfft_radix2_instance_f32::ifftFlag, arm_cfft_radix2_instance_f32::onebyfftLen, arm_cfft_radix2_instance_f32::pBitRevTable, arm_cfft_radix2_instance_f32::pTwiddle, and arm_cfft_radix2_instance_f32::twidCoefModifier.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_cfft_radix2_init_f32 (arm_cfft_radix2_instance_f32 * S,
    uint16_t fftLen,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_f32 and will be removed in the future.
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the floating-point CFFT/CIFFT structure.
    [in]fftLenlength of the FFT.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
    +
    Description:
    +
    The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
    +
    This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, armBitRevTable, arm_cfft_radix2_instance_f32::bitReverseFlag, arm_cfft_radix2_instance_f32::bitRevFactor, arm_cfft_radix2_instance_f32::fftLen, ifftFlag, arm_cfft_radix2_instance_f32::ifftFlag, arm_cfft_radix2_instance_f32::onebyfftLen, arm_cfft_radix2_instance_f32::pBitRevTable, arm_cfft_radix2_instance_f32::pTwiddle, status, arm_cfft_radix2_instance_f32::twidCoefModifier, and twiddleCoef.

    + +
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    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_cfft_radix2_init_q15 (arm_cfft_radix2_instance_q15 * S,
    uint16_t fftLen,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the Q15 CFFT/CIFFT structure.
    [in]fftLenlength of the FFT.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
    +
    Description:
    +
    The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
    +
    This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, armBitRevTable, arm_cfft_radix2_instance_q15::bitReverseFlag, arm_cfft_radix2_instance_q15::bitRevFactor, arm_cfft_radix2_instance_q15::fftLen, ifftFlag, arm_cfft_radix2_instance_q15::ifftFlag, arm_cfft_radix2_instance_q15::pBitRevTable, arm_cfft_radix2_instance_q15::pTwiddle, status, arm_cfft_radix2_instance_q15::twidCoefModifier, and twiddleCoef_4096_q15.

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    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_cfft_radix2_init_q31 (arm_cfft_radix2_instance_q31 * S,
    uint16_t fftLen,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the Q31 CFFT/CIFFT structure.
    [in]fftLenlength of the FFT.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
    +
    Description:
    +
    The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
    +
    This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, armBitRevTable, arm_cfft_radix2_instance_q31::bitReverseFlag, arm_cfft_radix2_instance_q31::bitRevFactor, arm_cfft_radix2_instance_q31::fftLen, ifftFlag, arm_cfft_radix2_instance_q31::ifftFlag, arm_cfft_radix2_instance_q31::pBitRevTable, arm_cfft_radix2_instance_q31::pTwiddle, status, arm_cfft_radix2_instance_q31::twidCoefModifier, and twiddleCoef_4096_q31.

    + +
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    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix2_q15 (const arm_cfft_radix2_instance_q15 * S,
    q15_t * pSrc 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Parameters
    + + + +
    [in]*Spoints to an instance of the fixed-point CFFT/CIFFT structure.
    [in,out]*pSrcpoints to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    +
    +
    +
    Returns
    none.
    + +

    References arm_bitreversal_q15(), arm_radix2_butterfly_inverse_q15(), arm_radix2_butterfly_q15(), arm_cfft_radix2_instance_q15::bitRevFactor, arm_cfft_radix2_instance_q15::fftLen, arm_cfft_radix2_instance_q15::ifftFlag, arm_cfft_radix2_instance_q15::pBitRevTable, arm_cfft_radix2_instance_q15::pTwiddle, and arm_cfft_radix2_instance_q15::twidCoefModifier.

    + +
    +
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    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix2_q31 (const arm_cfft_radix2_instance_q31 * S,
    q31_t * pSrc 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Parameters
    + + + +
    [in]*Spoints to an instance of the fixed-point CFFT/CIFFT structure.
    [in,out]*pSrcpoints to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    +
    +
    +
    Returns
    none.
    + +

    References arm_bitreversal_q31(), arm_radix2_butterfly_inverse_q31(), arm_radix2_butterfly_q31(), arm_cfft_radix2_instance_q31::bitRevFactor, arm_cfft_radix2_instance_q31::fftLen, arm_cfft_radix2_instance_q31::ifftFlag, arm_cfft_radix2_instance_q31::pBitRevTable, arm_cfft_radix2_instance_q31::pTwiddle, and arm_cfft_radix2_instance_q31::twidCoefModifier.

    + +
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    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix4_f32 (const arm_cfft_radix4_instance_f32 * S,
    float32_t * pSrc 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_f32 and will be removed in the future.
    +
    Parameters
    + + + +
    [in]*Spoints to an instance of the floating-point Radix-4 CFFT/CIFFT structure.
    [in,out]*pSrcpoints to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    References arm_bitreversal_f32(), arm_radix4_butterfly_f32(), arm_radix4_butterfly_inverse_f32(), arm_cfft_radix4_instance_f32::bitReverseFlag, arm_cfft_radix4_instance_f32::bitRevFactor, arm_cfft_radix4_instance_f32::fftLen, arm_cfft_radix4_instance_f32::ifftFlag, arm_cfft_radix4_instance_f32::onebyfftLen, arm_cfft_radix4_instance_f32::pBitRevTable, arm_cfft_radix4_instance_f32::pTwiddle, and arm_cfft_radix4_instance_f32::twidCoefModifier.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_cfft_radix4_init_f32 (arm_cfft_radix4_instance_f32 * S,
    uint16_t fftLen,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superceded by arm_cfft_f32 and will be removed in the future.
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the floating-point CFFT/CIFFT structure.
    [in]fftLenlength of the FFT.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
    +
    Description:
    +
    The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
    +
    This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
    +
    Examples:
    arm_convolution_example_f32.c.
    +
    +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, armBitRevTable, arm_cfft_radix4_instance_f32::bitReverseFlag, arm_cfft_radix4_instance_f32::bitRevFactor, arm_cfft_radix4_instance_f32::fftLen, ifftFlag, arm_cfft_radix4_instance_f32::ifftFlag, arm_cfft_radix4_instance_f32::onebyfftLen, arm_cfft_radix4_instance_f32::pBitRevTable, arm_cfft_radix4_instance_f32::pTwiddle, status, arm_cfft_radix4_instance_f32::twidCoefModifier, and twiddleCoef.

    + +

    Referenced by arm_rfft_init_f32(), and main().

    + +
    +
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    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_cfft_radix4_init_q15 (arm_cfft_radix4_instance_q15 * S,
    uint16_t fftLen,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the Q15 CFFT/CIFFT structure.
    [in]fftLenlength of the FFT.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
    +
    Description:
    +
    The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
    +
    This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, armBitRevTable, arm_cfft_radix4_instance_q15::bitReverseFlag, arm_cfft_radix4_instance_q15::bitRevFactor, arm_cfft_radix4_instance_q15::fftLen, ifftFlag, arm_cfft_radix4_instance_q15::ifftFlag, arm_cfft_radix4_instance_q15::pBitRevTable, arm_cfft_radix4_instance_q15::pTwiddle, status, arm_cfft_radix4_instance_q15::twidCoefModifier, and twiddleCoef_4096_q15.

    + +
    +
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    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_cfft_radix4_init_q31 (arm_cfft_radix4_instance_q31 * S,
    uint16_t fftLen,
    uint8_t ifftFlag,
    uint8_t bitReverseFlag 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the Q31 CFFT/CIFFT structure.
    [in]fftLenlength of the FFT.
    [in]ifftFlagflag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
    +
    Description:
    +
    The parameter ifftFlag controls whether a forward or inverse transform is computed. Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
    +
    This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, armBitRevTable, arm_cfft_radix4_instance_q31::bitReverseFlag, arm_cfft_radix4_instance_q31::bitRevFactor, arm_cfft_radix4_instance_q31::fftLen, ifftFlag, arm_cfft_radix4_instance_q31::ifftFlag, arm_cfft_radix4_instance_q31::pBitRevTable, arm_cfft_radix4_instance_q31::pTwiddle, status, arm_cfft_radix4_instance_q31::twidCoefModifier, and twiddleCoef_4096_q31.

    + +
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    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix4_q15 (const arm_cfft_radix4_instance_q15 * S,
    q15_t * pSrc 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q15 and will be removed
    +
    Parameters
    + + + +
    [in]*Spoints to an instance of the Q15 CFFT/CIFFT structure.
    [in,out]*pSrcpoints to the complex data buffer. Processing occurs in-place.
    +
    +
    +
    Returns
    none.
    +
    Input and output formats:
    +
    Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
    +
    +CFFTQ15.gif +
    +Input and Output Formats for Q15 CFFT
    +
    +CIFFTQ15.gif +
    +Input and Output Formats for Q15 CIFFT
    +
    + +

    References arm_bitreversal_q15(), arm_radix4_butterfly_inverse_q15(), arm_radix4_butterfly_q15(), arm_cfft_radix4_instance_q15::bitReverseFlag, arm_cfft_radix4_instance_q15::bitRevFactor, arm_cfft_radix4_instance_q15::fftLen, arm_cfft_radix4_instance_q15::ifftFlag, arm_cfft_radix4_instance_q15::pBitRevTable, arm_cfft_radix4_instance_q15::pTwiddle, and arm_cfft_radix4_instance_q15::twidCoefModifier.

    + +
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    +
    + + + + + + + + + + + + + + + + + + +
    void arm_cfft_radix4_q31 (const arm_cfft_radix4_instance_q31 * S,
    q31_t * pSrc 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superseded by arm_cfft_q31 and will be removed
    +
    Parameters
    + + + +
    [in]*Spoints to an instance of the Q31 CFFT/CIFFT structure.
    [in,out]*pSrcpoints to the complex data buffer of size 2*fftLen. Processing occurs in-place.
    +
    +
    +
    Returns
    none.
    +
    Input and output formats:
    +
    Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different FFT sizes. The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
    +
    +CFFTQ31.gif +
    +Input and Output Formats for Q31 CFFT
    +
    +CIFFTQ31.gif +
    +Input and Output Formats for Q31 CIFFT
    +
    + +

    References arm_bitreversal_q31(), arm_radix4_butterfly_inverse_q31(), arm_radix4_butterfly_q31(), arm_cfft_radix4_instance_q31::bitReverseFlag, arm_cfft_radix4_instance_q31::bitRevFactor, arm_cfft_radix4_instance_q31::fftLen, arm_cfft_radix4_instance_q31::ifftFlag, arm_cfft_radix4_instance_q31::pBitRevTable, arm_cfft_radix4_instance_q31::pTwiddle, and arm_cfft_radix4_instance_q31::twidCoefModifier.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___complex_f_f_t.js b/Documentation/DSP/html/group___complex_f_f_t.js new file mode 100644 index 0000000..e5af1b7 --- /dev/null +++ b/Documentation/DSP/html/group___complex_f_f_t.js @@ -0,0 +1,18 @@ +var group___complex_f_f_t = +[ + [ "arm_cfft_f32", "group___complex_f_f_t.html#gade0f9c4ff157b6b9c72a1eafd86ebf80", null ], + [ "arm_cfft_q15", "group___complex_f_f_t.html#ga68cdacd2267a2967955e40e6b7ec1229", null ], + [ "arm_cfft_q31", "group___complex_f_f_t.html#ga5a0008bd997ab6e2e299ef2fb272fb4b", null ], + [ "arm_cfft_radix2_f32", "group___complex_f_f_t.html#ga9fadd650b802f612ae558ddaab789a6d", null ], + [ "arm_cfft_radix2_init_f32", "group___complex_f_f_t.html#gac9565e6bc7229577ecf5e090313cafd7", null ], + [ "arm_cfft_radix2_init_q15", "group___complex_f_f_t.html#ga5c5b2127b3c4ea2d03692127f8543858", null ], + [ "arm_cfft_radix2_init_q31", "group___complex_f_f_t.html#gabec9611e77382f31e152668bf6b4b638", null ], + [ "arm_cfft_radix2_q15", "group___complex_f_f_t.html#ga55b424341dc3efd3fa0bcaaff4bdbf40", null ], + [ "arm_cfft_radix2_q31", "group___complex_f_f_t.html#ga6321f703ec87a274aedaab33d3e766b4", null ], + [ "arm_cfft_radix4_f32", "group___complex_f_f_t.html#ga521f670cd9c571bc61aff9bec89f4c26", null ], + [ "arm_cfft_radix4_init_f32", "group___complex_f_f_t.html#gaf336459f684f0b17bfae539ef1b1b78a", null ], + [ "arm_cfft_radix4_init_q15", "group___complex_f_f_t.html#ga0c2acfda3126c452e75b81669e8ad9ef", null ], + [ "arm_cfft_radix4_init_q31", "group___complex_f_f_t.html#gad5caaafeec900c8ff72321c01bbd462c", null ], + [ "arm_cfft_radix4_q15", "group___complex_f_f_t.html#ga8d66cdac41b8bf6cefdb895456eee84a", null ], + [ "arm_cfft_radix4_q31", "group___complex_f_f_t.html#gafde3ee1f58cf393b45a9073174fff548", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___conv.html b/Documentation/DSP/html/group___conv.html new file mode 100644 index 0000000..c623463 --- /dev/null +++ b/Documentation/DSP/html/group___conv.html @@ -0,0 +1,766 @@ + + + + + +Convolution +CMSIS-DSP: Convolution + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Convolution
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_conv_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
     Convolution of floating-point sequences.
     
    void arm_conv_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_conv_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_conv_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_conv_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q15 sequences.
     
    void arm_conv_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Convolution of Q7 sequences.
     
    void arm_conv_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Convolution of Q15 sequences.
     
    void arm_conv_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Convolution of Q31 sequences.
     
    void arm_conv_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
     Convolution of Q7 sequences.
     
    +

    Description

    +

    Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. Convolution is similar to correlation and is frequently used in filtering and data analysis. The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types. The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.

    +
    Algorithm
    Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. Then the convolution
    +
        
+                  c[n] = a[n] * b[n]    
+
    is defined as
    +ConvolutionEquation.gif +
    +
    +
    Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2. pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result.
    +
    Conceptually, when two signals a[n] and b[n] are convolved, the signal b[n] slides over a[n]. For each offset n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
    +
    Note that convolution is a commutative operation:
    +
        
+                  a[n] * b[n] = b[n] * a[n].    
+
    This means that switching the A and B arguments to the convolution functions has no effect.
    +

    Fixed-Point Behavior

    +
    Convolution requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.
    +

    Fast Versions

    +
    Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires the input signals should be scaled down to avoid intermediate overflows.
    +

    Opt Versions

    +
    Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions
    +

    Function Documentation

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    void arm_conv_f32 (float32_t * pSrcA,
    uint32_t srcALen,
    float32_t * pSrcB,
    uint32_t srcBLen,
    float32_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    +
    +
    +
    Returns
    none.
    + +

    References srcALen, and srcBLen.

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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_fast_opt_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    q15_t * pScratch1,
    q15_t * pScratch2 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    [in]*pScratch1points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    [in]*pScratch2points to scratch buffer of size min(srcALen, srcBLen).
    +
    +
    +
    Returns
    none.
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
    +
    See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_copy_q15(), arm_fill_q15(), srcALen, and srcBLen.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_fast_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
    +
    See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
    + +

    References __SIMD32, _SIMD32_OFFSET, srcALen, and srcBLen.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_fast_q31 (q31_t * pSrcA,
    uint32_t srcALen,
    q31_t * pSrcB,
    uint32_t srcBLen,
    q31_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
    +
    The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally.
    +
    See arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
    + +

    References srcALen, and srcBLen.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_opt_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    q15_t * pScratch1,
    q15_t * pScratch2 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    [in]*pScratch1points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    [in]*pScratch2points to scratch buffer of size min(srcALen, srcBLen).
    +
    +
    +
    Returns
    none.
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
    +
    Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_copy_q15(), arm_fill_q15(), srcALen, and srcBLen.

    + +
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    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_opt_q7 (q7_t * pSrcA,
    uint32_t srcALen,
    q7_t * pSrcB,
    uint32_t srcBLen,
    q7_t * pDst,
    q15_t * pScratch1,
    q15_t * pScratch2 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    [in]*pScratch1points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    [in]*pScratch2points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
    +
    +
    +
    Returns
    none.
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
    + +

    References __PACKq7, __SIMD32, _SIMD32_OFFSET, arm_fill_q15(), srcALen, and srcBLen.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
    +
    Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
    +
    Refer the function arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
    + +

    References __SIMD32, _SIMD32_OFFSET, srcALen, and srcBLen.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_q31 (q31_t * pSrcA,
    uint32_t srcALen,
    q31_t * pSrcB,
    uint32_t srcBLen,
    q31_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
    +
    See arm_conv_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
    + +

    References srcALen, and srcBLen.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_conv_q7 (q7_t * pSrcA,
    uint32_t srcALen,
    q7_t * pSrcB,
    uint32_t srcBLen,
    q7_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length srcALen+srcBLen-1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
    +
    Refer the function arm_conv_opt_q7() for a faster implementation of this function.
    + +

    References srcALen, and srcBLen.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___conv.js b/Documentation/DSP/html/group___conv.js new file mode 100644 index 0000000..407069e --- /dev/null +++ b/Documentation/DSP/html/group___conv.js @@ -0,0 +1,12 @@ +var group___conv = +[ + [ "arm_conv_f32", "group___conv.html#ga3f860dc98c6fc4cafc421e4a2aed3c89", null ], + [ "arm_conv_fast_opt_q15", "group___conv.html#gaf16f490d245391ec18a42adc73d6d749", null ], + [ "arm_conv_fast_q15", "group___conv.html#gad75ca978ce906e04abdf86a8d76306d4", null ], + [ "arm_conv_fast_q31", "group___conv.html#ga51112dcdf9b3624eb05182cdc4da9ec0", null ], + [ "arm_conv_opt_q15", "group___conv.html#gac77dbcaef5c754cac27eab96c4753a3c", null ], + [ "arm_conv_opt_q7", "group___conv.html#ga4c7cf073e89d6d57cc4e711f078c3f68", null ], + [ "arm_conv_q15", "group___conv.html#gaccd6a89b0ff7a94df64610598e6e6893", null ], + [ "arm_conv_q31", "group___conv.html#ga946b58da734f1e4e78c91fcaab4b12b6", null ], + [ "arm_conv_q7", "group___conv.html#gae2070cb792a167e78dbad8d06b97cdab", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___convolution_example.html b/Documentation/DSP/html/group___convolution_example.html new file mode 100644 index 0000000..ba4a6e7 --- /dev/null +++ b/Documentation/DSP/html/group___convolution_example.html @@ -0,0 +1,161 @@ + + + + + +Convolution Example +CMSIS-DSP: Convolution Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    Convolution Example
    +
    Examples
    +
    +
    Description:
    +
    Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex Multiplication, and Support Functions.
    +
    Algorithm:
    +
    The convolution theorem states that convolution in the time domain corresponds to multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of two signals is equal to the product of their individual Fourier transforms. The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT).
    +
    Two input signals, a[n] and b[n], with lengths n1 and n2 respectively, are zero padded so that their lengths become N, which is greater than or equal to (n1+n2-1) and is a power of 4 as FFT implementation is radix-4. The convolution of a[n] and b[n] is obtained by taking the FFT of the input signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of the multiplied result.
    +
    This is denoted by the following equations: 
     A[k] = FFT(a[n],N)
+B[k] = FFT(b[n],N)
+conv(a[n], b[n]) = IFFT(A[k] * B[k], N)
    where A[k] and B[k] are the N-point FFTs of the signals a[n] and b[n] respectively. The length of the convolved signal is (n1+n2-1).
    +
    Block Diagram:
    +
    +Convolution.gif +
    +
    +
    Variables Description:
    +
      +
    • testInputA_f32 points to the first input sequence
      • +
    • srcALen length of the first input sequence
      • +
    • testInputB_f32 points to the second input sequence
      • +
    • srcBLen length of the second input sequence
      • +
    • outLen length of convolution output sequence, (srcALen + srcBLen - 1)
      • +
    • AxB points to the output array where the product of individual FFTs of inputs is stored.
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_convolution_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___corr.html b/Documentation/DSP/html/group___corr.html new file mode 100644 index 0000000..a76b492 --- /dev/null +++ b/Documentation/DSP/html/group___corr.html @@ -0,0 +1,751 @@ + + + + + +Correlation +CMSIS-DSP: Correlation + + + + + + + + + + + + + + + +
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    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +Functions
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    Correlation
    +
    Filtering Functions
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_correlate_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst)
     Correlation of floating-point sequences.
     
    void arm_correlate_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch)
     Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_correlate_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_correlate_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    void arm_correlate_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch)
     Correlation of Q15 sequences.
     
    void arm_correlate_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2)
     Correlation of Q7 sequences.
     
    void arm_correlate_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst)
     Correlation of Q15 sequences.
     
    void arm_correlate_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst)
     Correlation of Q31 sequences.
     
    void arm_correlate_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst)
     Correlation of Q7 sequences.
     
    +

    Description

    +

    Correlation is a mathematical operation that is similar to convolution. As with convolution, correlation uses two signals to produce a third signal. The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution. Correlation is commonly used to measure the similarity between two signals. It has applications in pattern recognition, cryptanalysis, and searching. The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types. Fast versions of the Q15 and Q31 functions are also provided.

    +
    Algorithm
    Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively. The convolution of the two signals is denoted by 
        
+                  c[n] = a[n] * b[n]    
+
    In correlation, one of the signals is flipped in time 
        
+                  c[n] = a[n] * b[-n]    
+
    +
    and this is mathematically defined as
    +CorrelateEquation.gif +
    +
    +
    The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen. The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2). The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result.
    +

    Note

    +
    The pDst should be initialized to all zeros before being used.
    +

    Fixed-Point Behavior

    +
    Correlation requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.
    +

    Fast Versions

    +
    Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires the input signals should be scaled down to avoid intermediate overflows.
    +

    Opt Versions

    +
    Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate
    +

    Function Documentation

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_f32 (float32_t * pSrcA,
    uint32_t srcALen,
    float32_t * pSrcB,
    uint32_t srcBLen,
    float32_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    +
    +
    +
    Returns
    none.
    + +

    References srcALen, and srcBLen.

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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_fast_opt_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    q15_t * pScratch 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    [in]*pScratchpoints to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    +
    +
    +
    Returns
    none.
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
    +
    See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_copy_q15(), arm_fill_q15(), srcALen, and srcBLen.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_fast_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
    +
    See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
    + +

    References __SIMD32, _SIMD32_OFFSET, srcALen, and srcBLen.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_fast_q31 (q31_t * pSrcA,
    uint32_t srcALen,
    q31_t * pSrcB,
    uint32_t srcBLen,
    q31_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
    +
    The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally.
    +
    See arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
    + +

    References srcALen, and srcBLen.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_opt_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    q15_t * pScratch 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    [in]*pScratchpoints to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    +
    +
    +
    Returns
    none.
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
    +
    Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_copy_q15(), arm_fill_q15(), srcALen, and srcBLen.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_opt_q7 (q7_t * pSrcA,
    uint32_t srcALen,
    q7_t * pSrcB,
    uint32_t srcBLen,
    q7_t * pDst,
    q15_t * pScratch1,
    q15_t * pScratch2 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    [in]*pScratch1points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    [in]*pScratch2points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
    +
    +
    +
    Returns
    none.
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_fill_q15(), srcALen, and srcBLen.

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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
    +
    Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
    +
    Refer the function arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
    + +

    References __SIMD32, _SIMD32_OFFSET, srcALen, and srcBLen.

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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_q31 (q31_t * pSrcA,
    uint32_t srcALen,
    q31_t * pSrcB,
    uint32_t srcBLen,
    q31_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of additions is carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
    +
    See arm_correlate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
    + +

    References srcALen, and srcBLen.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_correlate_q7 (q7_t * pSrcA,
    uint32_t srcALen,
    q7_t * pSrcB,
    uint32_t srcBLen,
    q7_t * pDst 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written. Length 2 * max(srcALen, srcBLen) - 1.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
    +
    Refer the function arm_correlate_opt_q7() for a faster implementation of this function.
    + +

    References srcALen, and srcBLen.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___corr.js b/Documentation/DSP/html/group___corr.js new file mode 100644 index 0000000..a213e72 --- /dev/null +++ b/Documentation/DSP/html/group___corr.js @@ -0,0 +1,12 @@ +var group___corr = +[ + [ "arm_correlate_f32", "group___corr.html#ga22021e4222773f01e9960358a531cfb8", null ], + [ "arm_correlate_fast_opt_q15", "group___corr.html#ga40a0236b17220e8e22a22b5bc1c53c6b", null ], + [ "arm_correlate_fast_q15", "group___corr.html#gac8de3da44f58e86c2c86156276ca154f", null ], + [ "arm_correlate_fast_q31", "group___corr.html#gabecd3d7b077dbbef43f93e9e037815ed", null ], + [ "arm_correlate_opt_q15", "group___corr.html#gad71c0ec70ec69edbc48563d9a5f68451", null ], + [ "arm_correlate_opt_q7", "group___corr.html#ga746e8857cafe33ec5d6780729c18c311", null ], + [ "arm_correlate_q15", "group___corr.html#ga5ec96b8e420d68b0e626df0812274d46", null ], + [ "arm_correlate_q31", "group___corr.html#ga1367dc6c80476406c951e68d7fac4e8c", null ], + [ "arm_correlate_q7", "group___corr.html#ga284ddcc49e4ac532d52a70d0383c5992", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___d_c_t4___i_d_c_t4.html b/Documentation/DSP/html/group___d_c_t4___i_d_c_t4.html new file mode 100644 index 0000000..8d7d35f --- /dev/null +++ b/Documentation/DSP/html/group___d_c_t4___i_d_c_t4.html @@ -0,0 +1,1163 @@ + + + + + +DCT Type IV Functions +CMSIS-DSP: DCT Type IV Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
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    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions | +Variables
    +
    +
    DCT Type IV Functions
    +
    Transform Functions
    +
    + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_dct4_f32 (const arm_dct4_instance_f32 *S, float32_t *pState, float32_t *pInlineBuffer)
     Processing function for the floating-point DCT4/IDCT4.
     
    arm_status arm_dct4_init_f32 (arm_dct4_instance_f32 *S, arm_rfft_instance_f32 *S_RFFT, arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N, uint16_t Nby2, float32_t normalize)
     Initialization function for the floating-point DCT4/IDCT4.
     
    arm_status arm_dct4_init_q15 (arm_dct4_instance_q15 *S, arm_rfft_instance_q15 *S_RFFT, arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N, uint16_t Nby2, q15_t normalize)
     Initialization function for the Q15 DCT4/IDCT4.
     
    arm_status arm_dct4_init_q31 (arm_dct4_instance_q31 *S, arm_rfft_instance_q31 *S_RFFT, arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N, uint16_t Nby2, q31_t normalize)
     Initialization function for the Q31 DCT4/IDCT4.
     
    void arm_dct4_q15 (const arm_dct4_instance_q15 *S, q15_t *pState, q15_t *pInlineBuffer)
     Processing function for the Q15 DCT4/IDCT4.
     
    void arm_dct4_q31 (const arm_dct4_instance_q31 *S, q31_t *pState, q31_t *pInlineBuffer)
     Processing function for the Q31 DCT4/IDCT4.
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    static const float32_t Weights_128 [256]
     
    static const float32_t Weights_512 [1024]
     
    static const float32_t Weights_2048 [4096]
     
    static const float32_t Weights_8192 [16384]
     
    static const float32_t cos_factors_128 [128]
     
    static const float32_t cos_factors_512 [512]
     
    static const float32_t cos_factors_2048 [2048]
     
    static const float32_t cos_factors_8192 [8192]
     
    static const q15_t ALIGN4 WeightsQ15_128 [256]
     
    static const q15_t ALIGN4 WeightsQ15_512 [1024]
     
    static const q15_t ALIGN4 WeightsQ15_2048 [4096]
     
    static const q15_t ALIGN4 WeightsQ15_8192 [16384]
     
    static const q15_t ALIGN4 cos_factorsQ15_128 [128]
     
    static const q15_t ALIGN4 cos_factorsQ15_512 [512]
     
    static const q15_t ALIGN4 cos_factorsQ15_2048 [2048]
     
    static const q15_t ALIGN4 cos_factorsQ15_8192 [8192]
     
    static const q31_t WeightsQ31_128 [256]
     
    static const q31_t WeightsQ31_512 [1024]
     
    static const q31_t WeightsQ31_2048 [4096]
     
    static const q31_t WeightsQ31_8192 [16384]
     
    static const q31_t cos_factorsQ31_128 [128]
     
    static const q31_t cos_factorsQ31_512 [512]
     
    static const q31_t cos_factorsQ31_2048 [2048]
     
    static const q31_t cos_factorsQ31_8192 [8192]
     
    +

    Description

    +

    Representation of signals by minimum number of values is important for storage and transmission. The possibility of large discontinuity between the beginning and end of a period of a signal in DFT can be avoided by extending the signal so that it is even-symmetric. Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the spectrum and is very widely used in signal and image coding applications. The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions. DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.

    +

    DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal. Reordering of the input data makes the computation of DCT just a problem of computing the DFT of a real signal with a few additional operations. This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.

    +

    DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used. DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing. DCT2 implementation can be described in the following steps:

    +
      +
    • Re-ordering input
      • +
    • Calculating Real FFT
      • +
    • Multiplication of weights and Real FFT output and getting real part from the product.
      • +
    +

    This process is explained by the block diagram below:

    +
    +DCT4.gif +
    +Discrete Cosine Transform - type-IV
    +
    Algorithm:
    The N-point type-IV DCT is defined as a real, linear transformation by the formula:
    +DCT4Equation.gif +
    + where k = 0,1,2,.....N-1
    +
    Its inverse is defined as follows:
    +IDCT4Equation.gif +
    + where n = 0,1,2,.....N-1
    +
    The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N). The symmetry of the transform matrix indicates that the fast algorithms for the forward and inverse transform computation are identical. Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
    +
    Lengths supported by the transform:
    As DCT4 internally uses Real FFT, it supports all the lengths supported by arm_rfft_f32(). The library provides separate functions for Q15, Q31, and floating-point data types.
    +
    Instance Structure
    The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure. A separate instance structure must be defined for each transform. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Manually initialize the instance structure as follows: 
        
+*arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};    
+*arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
+*arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
+
    where N is the length of the DCT4; Nby2 is half of the length of the DCT4; normalize is normalizing factor used and is equal to sqrt(2/N); pTwiddle points to the twiddle factor table; pCosFactor points to the cosFactor table; pRfft points to the real FFT instance; pCfft points to the complex FFT instance; The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32() and arm_rfft_f32() respectively for details regarding static initialization.
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the DCT4 transform functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_dct4_f32 (const arm_dct4_instance_f32 * S,
    float32_t * pState,
    float32_t * pInlineBuffer 
    )
    +
    +
    Parameters
    + + + + +
    [in]*Spoints to an instance of the floating-point DCT4/IDCT4 structure.
    [in]*pStatepoints to state buffer.
    [in,out]*pInlineBufferpoints to the in-place input and output buffer.
    +
    +
    +
    Returns
    none.
    + +

    References arm_mult_f32(), arm_scale_f32(), arm_dct4_instance_f32::N, arm_dct4_instance_f32::Nby2, arm_dct4_instance_f32::pCosFactor, and arm_dct4_instance_f32::pTwiddle.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_dct4_init_f32 (arm_dct4_instance_f32 * S,
    arm_rfft_instance_f32 * S_RFFT,
    arm_cfft_radix4_instance_f32 * S_CFFT,
    uint16_t N,
    uint16_t Nby2,
    float32_t normalize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of floating-point DCT4/IDCT4 structure.
    [in]*S_RFFTpoints to an instance of floating-point RFFT/RIFFT structure.
    [in]*S_CFFTpoints to an instance of floating-point CFFT/CIFFT structure.
    [in]Nlength of the DCT4.
    [in]Nby2half of the length of the DCT4.
    [in]normalizenormalizing factor.
    +
    +
    +
    Returns
    arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
    +
    Normalizing factor:
    The normalizing factor is sqrt(2/N), which depends on the size of transform N. Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
    +dct4NormalizingF32Table.gif +
    +
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, arm_rfft_init_f32(), cos_factors_128, cos_factors_2048, cos_factors_512, cos_factors_8192, arm_dct4_instance_f32::N, arm_dct4_instance_f32::Nby2, arm_dct4_instance_f32::normalize, arm_dct4_instance_f32::pCfft, arm_dct4_instance_f32::pCosFactor, arm_dct4_instance_f32::pRfft, arm_dct4_instance_f32::pTwiddle, status, Weights_128, Weights_2048, Weights_512, and Weights_8192.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_dct4_init_q15 (arm_dct4_instance_q15 * S,
    arm_rfft_instance_q15 * S_RFFT,
    arm_cfft_radix4_instance_q15 * S_CFFT,
    uint16_t N,
    uint16_t Nby2,
    q15_t normalize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of Q15 DCT4/IDCT4 structure.
    [in]*S_RFFTpoints to an instance of Q15 RFFT/RIFFT structure.
    [in]*S_CFFTpoints to an instance of Q15 CFFT/CIFFT structure.
    [in]Nlength of the DCT4.
    [in]Nby2half of the length of the DCT4.
    [in]normalizenormalizing factor.
    +
    +
    +
    Returns
    arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
    +
    Normalizing factor:
    The normalizing factor is sqrt(2/N), which depends on the size of transform N. Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
    +dct4NormalizingQ15Table.gif +
    +
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, arm_rfft_init_q15(), cos_factorsQ15_128, cos_factorsQ15_2048, cos_factorsQ15_512, cos_factorsQ15_8192, arm_dct4_instance_q15::N, arm_dct4_instance_q15::Nby2, arm_dct4_instance_q15::normalize, arm_dct4_instance_q15::pCfft, arm_dct4_instance_q15::pCosFactor, arm_dct4_instance_q15::pRfft, arm_dct4_instance_q15::pTwiddle, status, WeightsQ15_128, WeightsQ15_2048, WeightsQ15_512, and WeightsQ15_8192.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_dct4_init_q31 (arm_dct4_instance_q31 * S,
    arm_rfft_instance_q31 * S_RFFT,
    arm_cfft_radix4_instance_q31 * S_CFFT,
    uint16_t N,
    uint16_t Nby2,
    q31_t normalize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of Q31 DCT4/IDCT4 structure.
    [in]*S_RFFTpoints to an instance of Q31 RFFT/RIFFT structure
    [in]*S_CFFTpoints to an instance of Q31 CFFT/CIFFT structure
    [in]Nlength of the DCT4.
    [in]Nby2half of the length of the DCT4.
    [in]normalizenormalizing factor.
    +
    +
    +
    Returns
    arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
    +
    Normalizing factor:
    The normalizing factor is sqrt(2/N), which depends on the size of transform N. Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
    +dct4NormalizingQ31Table.gif +
    +
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, arm_rfft_init_q31(), cos_factorsQ31_128, cos_factorsQ31_2048, cos_factorsQ31_512, cos_factorsQ31_8192, arm_dct4_instance_q31::N, arm_dct4_instance_q31::Nby2, arm_dct4_instance_q31::normalize, arm_dct4_instance_q31::pCfft, arm_dct4_instance_q31::pCosFactor, arm_dct4_instance_q31::pRfft, arm_dct4_instance_q31::pTwiddle, status, WeightsQ31_128, WeightsQ31_2048, WeightsQ31_512, and WeightsQ31_8192.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_dct4_q15 (const arm_dct4_instance_q15 * S,
    q15_t * pState,
    q15_t * pInlineBuffer 
    )
    +
    +
    Parameters
    + + + + +
    [in]*Spoints to an instance of the Q15 DCT4 structure.
    [in]*pStatepoints to state buffer.
    [in,out]*pInlineBufferpoints to the in-place input and output buffer.
    +
    +
    +
    Returns
    none.
    +
    Input an output formats:
    Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
    +
    +dct4FormatsQ15Table.gif +
    + +

    References arm_mult_q15(), arm_shift_q15(), arm_dct4_instance_q15::N, arm_dct4_instance_q15::Nby2, arm_dct4_instance_q15::pCosFactor, and arm_dct4_instance_q15::pTwiddle.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_dct4_q31 (const arm_dct4_instance_q31 * S,
    q31_t * pState,
    q31_t * pInlineBuffer 
    )
    +
    +
    Parameters
    + + + + +
    [in]*Spoints to an instance of the Q31 DCT4 structure.
    [in]*pStatepoints to state buffer.
    [in,out]*pInlineBufferpoints to the in-place input and output buffer.
    +
    +
    +
    Returns
    none.
    +
    Input an output formats:
    Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process, as the conversion from DCT2 to DCT4 involves one subtraction. Internally inputs are downscaled in the RFFT process function to avoid overflows. Number of bits downscaled, depends on the size of the transform. The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
    +
    +dct4FormatsQ31Table.gif +
    + +

    References arm_cmplx_mult_cmplx_q31(), arm_mult_q31(), arm_rfft_q31(), arm_shift_q31(), arm_dct4_instance_q31::N, arm_dct4_instance_q31::Nby2, arm_dct4_instance_q31::normalize, arm_dct4_instance_q31::pCosFactor, arm_dct4_instance_q31::pRfft, and arm_dct4_instance_q31::pTwiddle.

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + + +
    + + + + +
    const float32_t cos_factors_128[128]
    +     		+static
    +
    +
    cosFactor tables are generated using the formula : 
    cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    +
    C command to generate the table
    +
     for(i = 0; i< N; i++)    
+{    
+   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
+}
    +
    where N is the number of factors to generate and c is pi/(2*N)
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t cos_factors_2048[2048]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t cos_factors_512[512]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t cos_factors_8192[8192]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 cos_factorsQ15_128[128]
    +     		+static
    +
    +
    cosFactor tables are generated using the formula : 
     cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    +
    C command to generate the table 
        
+for(i = 0; i< N; i++)    
+{    
+  cos_factors[i]= 2 * cos((2*i+1)*c/2);    
+}
    +
    where N is the number of factors to generate and c is pi/(2*N)
    +
    Then converted to q15 format by multiplying with 2^31 and saturated if required.
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 cos_factorsQ15_2048[2048]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 cos_factorsQ15_512[512]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 cos_factorsQ15_8192[8192]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t cos_factorsQ31_128[128]
    +     		+static
    +
    +
    cosFactor tables are generated using the formula : 
    cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    +
    C command to generate the table 
        
+for(i = 0; i< N; i++)    
+{    
+  cos_factors[i]= 2 * cos((2*i+1)*c/2);    
+}
    +
    where N is the number of factors to generate and c is pi/(2*N)
    +
    Then converted to q31 format by multiplying with 2^31 and saturated if required.
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t cos_factorsQ31_2048[2048]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t cos_factorsQ31_512[512]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t cos_factorsQ31_8192[8192]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t Weights_128[256]
    +     		+static
    +
    +
    Weights tables are generated using the formula : 
    weights[n] = e^(-j*n*pi/(2*N))
    +
    C command to generate the table 
        
+for(i = 0; i< N; i++)    
+{    
+   weights[2*i]= cos(i*c);    
+   weights[(2*i)+1]= -sin(i * c);    
+}
    +
    Where N is the Number of weights to be calculated and c is pi/(2*N)
    +
    In the tables below the real and imaginary values are placed alternatively, hence the array length is 2*N.
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t Weights_2048[4096]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t Weights_512[1024]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t Weights_8192[16384]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 WeightsQ15_128[256]
    +     		+static
    +
    +
    Weights tables are generated using the formula : 
    weights[n] = e^(-j*n*pi/(2*N))
    +
    C command to generate the table 
        
+for(i = 0; i< N; i++)    
+{    
+  weights[2*i]= cos(i*c);    
+  weights[(2*i)+1]= -sin(i * c);    
+}
    +
    where N is the Number of weights to be calculated and c is pi/(2*N)
    +
    Converted the output to q15 format by multiplying with 2^31 and saturated if required.
    +
    In the tables below the real and imaginary values are placed alternatively, hence the array length is 2*N.
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 WeightsQ15_2048[4096]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 WeightsQ15_512[1024]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 WeightsQ15_8192[16384]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t WeightsQ31_128[256]
    +     		+static
    +
    +
    Weights tables are generated using the formula : 
    weights[n] = e^(-j*n*pi/(2*N))
    +
    C command to generate the table 
        
+for(i = 0; i< N; i++)    
+{    
+  weights[2*i]= cos(i*c);    
+  weights[(2*i)+1]= -sin(i * c);    
+}
    +
    where N is the Number of weights to be calculated and c is pi/(2*N)
    +
    Convert the output to q31 format by multiplying with 2^31 and saturated if required.
    +
    In the tables below the real and imaginary values are placed alternatively, hence the array length is 2*N.
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t WeightsQ31_2048[4096]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t WeightsQ31_512[1024]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t WeightsQ31_8192[16384]
    +     		+static
    +
    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___d_c_t4___i_d_c_t4.js b/Documentation/DSP/html/group___d_c_t4___i_d_c_t4.js new file mode 100644 index 0000000..6fdfca3 --- /dev/null +++ b/Documentation/DSP/html/group___d_c_t4___i_d_c_t4.js @@ -0,0 +1,33 @@ +var group___d_c_t4___i_d_c_t4 = +[ + [ "arm_dct4_f32", "group___d_c_t4___i_d_c_t4.html#gafd538d68886848bc090ec2b0d364cc81", null ], + [ "arm_dct4_init_f32", "group___d_c_t4___i_d_c_t4.html#gab094ad3bc6fa1b84e8b12a24e1850a06", null ], + [ "arm_dct4_init_q15", "group___d_c_t4___i_d_c_t4.html#ga966fd1b66a80873964533703ab5dc054", null ], + [ "arm_dct4_init_q31", "group___d_c_t4___i_d_c_t4.html#ga631bb59c7c97c814ff7147ecba6a716a", null ], + [ "arm_dct4_q15", "group___d_c_t4___i_d_c_t4.html#ga114cb9635059f678df291fcc887aaf2b", null ], + [ "arm_dct4_q31", "group___d_c_t4___i_d_c_t4.html#gad04d0baab6ed081d8e8afe02538eb80b", null ], + [ "cos_factors_128", "group___d_c_t4___i_d_c_t4.html#ga16248ed86161ef97538011b49f13e8b7", null ], + [ "cos_factors_2048", "group___d_c_t4___i_d_c_t4.html#ga1ba5306e0bc44730b40ab34cced45fd6", null ], + [ "cos_factors_512", "group___d_c_t4___i_d_c_t4.html#ga49fd288352ca5bb43f5cec52273b0d80", null ], + [ "cos_factors_8192", "group___d_c_t4___i_d_c_t4.html#gac12484542bc6aaecc754c855457411de", null ], + [ "cos_factorsQ15_128", "group___d_c_t4___i_d_c_t4.html#ga1477edd21c7b08b0b59a564f6c24d6c5", null ], + [ "cos_factorsQ15_2048", "group___d_c_t4___i_d_c_t4.html#gaeee5df7c1be2374441868ecbbc6c7e5d", null ], + [ "cos_factorsQ15_512", "group___d_c_t4___i_d_c_t4.html#gac056c3d026058eab3ba650828ff5642f", null ], + [ "cos_factorsQ15_8192", "group___d_c_t4___i_d_c_t4.html#ga988ff0563cc9df7848c9348871ac6c07", null ], + [ "cos_factorsQ31_128", "group___d_c_t4___i_d_c_t4.html#gabb8ee2004a3520fd08388db637d43875", null ], + [ "cos_factorsQ31_2048", "group___d_c_t4___i_d_c_t4.html#gaa15fc3fb058482defda371113cd12e74", null ], + [ "cos_factorsQ31_512", "group___d_c_t4___i_d_c_t4.html#ga3559569e603cb918911074be88523d0e", null ], + [ "cos_factorsQ31_8192", "group___d_c_t4___i_d_c_t4.html#gaf687c4bbdbc700a3ad5d807d28de63e4", null ], + [ "Weights_128", "group___d_c_t4___i_d_c_t4.html#gad00f29d896d64d6da7afbbb9d3e182a4", null ], + [ "Weights_2048", "group___d_c_t4___i_d_c_t4.html#gac3a2a00b3106dfcb5e0a582f50c65692", null ], + [ "Weights_512", "group___d_c_t4___i_d_c_t4.html#gaeb67b0be5b3c2139d660e02cedeed908", null ], + [ "Weights_8192", "group___d_c_t4___i_d_c_t4.html#ga45a8ec91e5da91790566105bc7e6f0c2", null ], + [ "WeightsQ15_128", "group___d_c_t4___i_d_c_t4.html#gaa4ff5e6f062efb1d1ec8c6c2207c3727", null ], + [ "WeightsQ15_2048", "group___d_c_t4___i_d_c_t4.html#ga2235ec700d0d6925d9733f48541d46f5", null ], + [ "WeightsQ15_512", "group___d_c_t4___i_d_c_t4.html#gadc8ee250fc217d6cb5c84dd7c1eb6d31", null ], + [ "WeightsQ15_8192", "group___d_c_t4___i_d_c_t4.html#ga4fdc60621eb306984a82ce8b2d645bb7", null ], + [ "WeightsQ31_128", "group___d_c_t4___i_d_c_t4.html#ga02d7024538a87214296b01d83ba36b02", null ], + [ "WeightsQ31_2048", "group___d_c_t4___i_d_c_t4.html#ga725b65c25a02b3cad329e18bb832f65e", null ], + [ "WeightsQ31_512", "group___d_c_t4___i_d_c_t4.html#ga31a8217a96f7d3171921e98398f31596", null ], + [ "WeightsQ31_8192", "group___d_c_t4___i_d_c_t4.html#ga16bf6bbe5c4c9b35f88253cf7bdcc435", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___dotproduct_example.html b/Documentation/DSP/html/group___dotproduct_example.html new file mode 100644 index 0000000..9c2c7b5 --- /dev/null +++ b/Documentation/DSP/html/group___dotproduct_example.html @@ -0,0 +1,152 @@ + + + + + +Dot Product Example +CMSIS-DSP: Dot Product Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Dot Product Example
    +
    Examples
    +
    +
    Description:
    +
    Demonstrates the use of the Multiply and Add functions to perform the dot product. The dot product of two vectors is obtained by multiplying corresponding elements and summing the products.
    +
    Algorithm:
    +
    The two input vectors A and B with length n, are multiplied element-by-element and then added to obtain dot product.
    +
    This is denoted by the following equation: 
      dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]
    +
    Block Diagram:
    +
    +dotProduct.gif +
    +
    +
    Variables Description:
    +
      +
    • srcA_buf_f32 points to first input vector
      • +
    • srcB_buf_f32 points to second input vector
      • +
    • testOutput stores dot product of the two input vectors.
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_dotproduct_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___f_i_r.html b/Documentation/DSP/html/group___f_i_r.html new file mode 100644 index 0000000..ecb8731 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r.html @@ -0,0 +1,776 @@ + + + + + +Finite Impulse Response (FIR) Filters +CMSIS-DSP: Finite Impulse Response (FIR) Filters + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Finite Impulse Response (FIR) Filters
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_fir_f32 (const arm_fir_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR filter.
     
    void arm_fir_fast_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
     
    IAR_ONLY_LOW_OPTIMIZATION_ENTER
    +void     		arm_fir_fast_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
     
    void arm_fir_init_f32 (arm_fir_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR filter.
     
    arm_status arm_fir_init_q15 (arm_fir_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR filter.
     
    void arm_fir_init_q31 (arm_fir_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR filter.
     
    void arm_fir_init_q7 (arm_fir_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, uint32_t blockSize)
     Initialization function for the Q7 FIR filter.
     
    void arm_fir_q15 (const arm_fir_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR filter.
     
    void arm_fir_q31 (const arm_fir_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR filter.
     
    void arm_fir_q7 (const arm_fir_instance_q7 *S, q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Processing function for the Q7 FIR filter.
     
    +

    Description

    +

    This set of functions implements Finite Impulse Response (FIR) filters for Q7, Q15, Q31, and floating-point data types. Fast versions of Q15 and Q31 are also provided. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays containing blockSize values.

    +
    Algorithm:
    The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations. Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n]. 
      
+     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]  
+
    +
    +FIR.gif +
    +Finite Impulse Response filter
    +
    +
    pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.
    +
      
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}  
+
    +
    pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the following order.
    +
      
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}  
+
    +
    Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1. The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures 
      
+*arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};  
+*arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};  
+*arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};  
+*arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};  
+
    +

    where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer.

    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_f32 (const arm_fir_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point FIR filter structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.
    +
    +

    References arm_fir_instance_f32::numTaps, arm_fir_instance_f32::pCoeffs, and arm_fir_instance_f32::pState.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_fast_q15 (const arm_fir_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 FIR filter structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
    +
    Refer to the function arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_init_q15() to initialize the filter structure.
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_fir_instance_q15::numTaps, arm_fir_instance_q15::pCoeffs, and arm_fir_instance_q15::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    IAR_ONLY_LOW_OPTIMIZATION_ENTER void arm_fir_fast_q31 (const arm_fir_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
    +
    Refer to the function arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_init_q31() to initialize the filter structure.
    + +

    References multAcc_32x32_keep32_R, arm_fir_instance_q31::numTaps, arm_fir_instance_q31::pCoeffs, and arm_fir_instance_q31::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_init_f32 (arm_fir_instance_f32 * S,
    uint16_t numTaps,
    float32_t * pCoeffs,
    float32_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the floating-point FIR filter structure.
    [in]numTapsNumber of filter coefficients in the filter.
    [in]*pCoeffspoints to the filter coefficients buffer.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of samples that are processed per call.
    +
    +
    +
    Returns
    none.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
    +
    Examples:
    arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.
    +
    +

    References arm_fir_instance_f32::numTaps, arm_fir_instance_f32::pCoeffs, and arm_fir_instance_f32::pState.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_fir_init_q15 (arm_fir_instance_q15 * S,
    uint16_t numTaps,
    q15_t * pCoeffs,
    q15_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the Q15 FIR filter structure.
    [in]numTapsNumber of filter coefficients in the filter. Must be even and greater than or equal to 4.
    [in]*pCoeffspoints to the filter coefficients buffer.
    [in]*pStatepoints to the state buffer.
    [in]blockSizeis number of samples processed per call.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if numTaps is not greater than or equal to 4 and even.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    Note that numTaps must be even and greater than or equal to 4. To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero. For example, to implement a filter with numTaps=3 and coefficients 
        
+    {0.3, -0.8, 0.3}    
+
    set numTaps=4 and use the coefficients: 
        
+    {0.3, -0.8, 0.3, 0}.    
+
    Similarly, to implement a two point filter 
        
+    {0.3, -0.3}    
+
    set numTaps=4 and use the coefficients: 
        
+    {0.3, -0.3, 0, 0}.    
+
    +
    pState points to the array of state variables. pState is of length numTaps+blockSize, when running on Cortex-M4 and Cortex-M3 and is of length numTaps+blockSize-1, when running on Cortex-M0 where blockSize is the number of input samples processed by each call to arm_fir_q15().
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, arm_fir_instance_q15::numTaps, arm_fir_instance_q15::pCoeffs, arm_fir_instance_q15::pState, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_init_q31 (arm_fir_instance_q31 * S,
    uint16_t numTaps,
    q31_t * pCoeffs,
    q31_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the Q31 FIR filter structure.
    [in]numTapsNumber of filter coefficients in the filter.
    [in]*pCoeffspoints to the filter coefficients buffer.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of samples that are processed per call.
    +
    +
    +
    Returns
    none.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().
    + +

    References arm_fir_instance_q31::numTaps, arm_fir_instance_q31::pCoeffs, and arm_fir_instance_q31::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_init_q7 (arm_fir_instance_q7 * S,
    uint16_t numTaps,
    q7_t * pCoeffs,
    q7_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the Q7 FIR filter structure.
    [in]numTapsNumber of filter coefficients in the filter.
    [in]*pCoeffspoints to the filter coefficients buffer.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of samples that are processed per call.
    +
    +
    +
    Returns
    none
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to the array of state variables. pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().
    + +

    References arm_fir_instance_q7::numTaps, arm_fir_instance_q7::pCoeffs, and arm_fir_instance_q7::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_q15 (const arm_fir_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 FIR structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, state buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
    +
    Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function.
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_fir_instance_q15::numTaps, arm_fir_instance_q15::pCoeffs, and arm_fir_instance_q15::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_q31 (const arm_fir_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 FIR filter structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
    +
    Refer to the function arm_fir_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
    + +

    References blockSize, arm_fir_instance_q31::numTaps, arm_fir_instance_q31::pCoeffs, and arm_fir_instance_q31::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_q7 (const arm_fir_instance_q7 * S,
    q7_t * pSrc,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q7 FIR filter structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format.
    + +

    References blockSize, arm_fir_instance_q7::numTaps, arm_fir_instance_q7::pCoeffs, and arm_fir_instance_q7::pState.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___f_i_r.js b/Documentation/DSP/html/group___f_i_r.js new file mode 100644 index 0000000..b8677bd --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r.js @@ -0,0 +1,13 @@ +var group___f_i_r = +[ + [ "arm_fir_f32", "group___f_i_r.html#gae8fb334ea67eb6ecbd31824ddc14cd6a", null ], + [ "arm_fir_fast_q15", "group___f_i_r.html#gac7d35e9472e49ccd88800f37f3476bd3", null ], + [ "arm_fir_fast_q31", "group___f_i_r.html#ga70d11af009dcd25594c58c75cdb5d6e3", null ], + [ "arm_fir_init_f32", "group___f_i_r.html#ga98d13def6427e29522829f945d0967db", null ], + [ "arm_fir_init_q15", "group___f_i_r.html#gae2a50f692f41ba57e44ed0719b1368bd", null ], + [ "arm_fir_init_q31", "group___f_i_r.html#gac00d53af87684cbbe135767b55e748a5", null ], + [ "arm_fir_init_q7", "group___f_i_r.html#ga88e48688224d42dc173dbcec702f0c1d", null ], + [ "arm_fir_q15", "group___f_i_r.html#ga262d173058d6f80fdf60404ba262a8f5", null ], + [ "arm_fir_q31", "group___f_i_r.html#gaadd938c68ab08967cbb5fc696f384bb5", null ], + [ "arm_fir_q7", "group___f_i_r.html#ga31c91a0bf0962327ef8f626fae68ea32", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___f_i_r___interpolate.html b/Documentation/DSP/html/group___f_i_r___interpolate.html new file mode 100644 index 0000000..e21a8ef --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r___interpolate.html @@ -0,0 +1,550 @@ + + + + + +Finite Impulse Response (FIR) Interpolator +CMSIS-DSP: Finite Impulse Response (FIR) Interpolator + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Finite Impulse Response (FIR) Interpolator
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR interpolator.
     
    arm_status arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 *S, uint8_t L, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR interpolator.
     
    arm_status arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 *S, uint8_t L, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR interpolator.
     
    arm_status arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 *S, uint8_t L, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR interpolator.
     
    void arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR interpolator.
     
    void arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR interpolator.
     
    +

    Description

    +

    These functions combine an upsampler (zero stuffer) and an FIR filter. They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images. Conceptually, the functions are equivalent to the block diagram below:

    +
    +FIRInterpolator.gif +
    +Components included in the FIR Interpolator functions
    +

    After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum. The user of the function is responsible for providing the filter coefficients.

    +

    The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner. The upsampler inserts L-1 zeros between each sample. Instead of multiplying by these zero values, the FIR filter is designed to skip them. This leads to an efficient implementation without any wasted effort. The functions operate on blocks of input and output data. pSrc points to an array of blockSize input values and pDst points to an array of blockSize*L output values.

    +

    The library provides separate functions for Q15, Q31, and floating-point data types.

    +
    Algorithm:
    The functions use a polyphase filter structure: 
        
+   y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]    
+   y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]    
+   ...    
+   y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]    
+
    This approach is more efficient than straightforward upsample-then-filter algorithms. With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter.
    +
    pCoeffs points to a coefficient array of size numTaps. numTaps must be a multiple of the interpolation factor L and this is checked by the initialization functions. Internally, the function divides the FIR filter's impulse response into shorter filters of length phaseLength=numTaps/L. Coefficients are stored in time reversed order.
    +
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to a state array of size blockSize + phaseLength - 1. Samples in the state buffer are stored in the order:
    +
        
+   {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}    
+
    The state variables are updated after each block of data is processed, the coefficients are untouched.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer.
      • +
    • Checks to make sure that the length of the filter is a multiple of the interpolation factor. To do this manually without calling the init function, assign the follow subfields of the instance structure: L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures 
        
+arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};    
+arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};    
+arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};    
+
    where L is the interpolation factor; phaseLength=numTaps/L is the length of each of the shorter FIR filters used internally, pCoeffs is the address of the coefficient buffer; pState is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the FIR interpolate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_interpolate_f32 (const arm_fir_interpolate_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point FIR interpolator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    + +

    References arm_fir_interpolate_instance_f32::L, arm_fir_interpolate_instance_f32::pCoeffs, arm_fir_interpolate_instance_f32::phaseLength, and arm_fir_interpolate_instance_f32::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_fir_interpolate_init_f32 (arm_fir_interpolate_instance_f32 * S,
    uint8_t L,
    uint16_t numTaps,
    float32_t * pCoeffs,
    float32_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of the floating-point FIR interpolator structure.
    [in]Lupsample factor.
    [in]numTapsnumber of filter coefficients in the filter.
    [in]*pCoeffspoints to the filter coefficient buffer.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
+
    The length of the filter numTaps must be a multiple of the interpolation factor L.
    +
    pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32().
    + +

    References ARM_MATH_LENGTH_ERROR, ARM_MATH_SUCCESS, arm_fir_interpolate_instance_f32::L, arm_fir_interpolate_instance_f32::pCoeffs, arm_fir_interpolate_instance_f32::phaseLength, arm_fir_interpolate_instance_f32::pState, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_fir_interpolate_init_q15 (arm_fir_interpolate_instance_q15 * S,
    uint8_t L,
    uint16_t numTaps,
    q15_t * pCoeffs,
    q15_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of the Q15 FIR interpolator structure.
    [in]Lupsample factor.
    [in]numTapsnumber of filter coefficients in the filter.
    [in]*pCoeffspoints to the filter coefficient buffer.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
+
    The length of the filter numTaps must be a multiple of the interpolation factor L.
    +
    pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15().
    + +

    References ARM_MATH_LENGTH_ERROR, ARM_MATH_SUCCESS, arm_fir_interpolate_instance_q15::L, arm_fir_interpolate_instance_q15::pCoeffs, arm_fir_interpolate_instance_q15::phaseLength, arm_fir_interpolate_instance_q15::pState, and status.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_fir_interpolate_init_q31 (arm_fir_interpolate_instance_q31 * S,
    uint8_t L,
    uint16_t numTaps,
    q31_t * pCoeffs,
    q31_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of the Q31 FIR interpolator structure.
    [in]Lupsample factor.
    [in]numTapsnumber of filter coefficients in the filter.
    [in]*pCoeffspoints to the filter coefficient buffer.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if the filter length numTaps is not a multiple of the interpolation factor L.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
+
    The length of the filter numTaps must be a multiple of the interpolation factor L.
    +
    pState points to the array of state variables. pState is of length (numTaps/L)+blockSize-1 words where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31().
    + +

    References ARM_MATH_LENGTH_ERROR, ARM_MATH_SUCCESS, arm_fir_interpolate_instance_q31::L, arm_fir_interpolate_instance_q31::pCoeffs, arm_fir_interpolate_instance_q31::phaseLength, arm_fir_interpolate_instance_q31::pState, and status.

    + +
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    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_interpolate_q15 (const arm_fir_interpolate_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 FIR interpolator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
    + +

    References __SIMD32, arm_fir_interpolate_instance_q15::L, arm_fir_interpolate_instance_q15::pCoeffs, arm_fir_interpolate_instance_q15::phaseLength, and arm_fir_interpolate_instance_q15::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_interpolate_q31 (const arm_fir_interpolate_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 FIR interpolator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L). since numTaps/L additions occur per output sample. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
    + +

    References arm_fir_interpolate_instance_q31::L, arm_fir_interpolate_instance_q31::pCoeffs, arm_fir_interpolate_instance_q31::phaseLength, and arm_fir_interpolate_instance_q31::pState.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___f_i_r___interpolate.js b/Documentation/DSP/html/group___f_i_r___interpolate.js new file mode 100644 index 0000000..c56fdc3 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r___interpolate.js @@ -0,0 +1,9 @@ +var group___f_i_r___interpolate = +[ + [ "arm_fir_interpolate_f32", "group___f_i_r___interpolate.html#ga9cae104c5cf60b4e7671c82264a8c12e", null ], + [ "arm_fir_interpolate_init_f32", "group___f_i_r___interpolate.html#ga0f857457a815946f7e4dca989ebf6ff6", null ], + [ "arm_fir_interpolate_init_q15", "group___f_i_r___interpolate.html#ga18e8c4a74ff1d0f88876cc63f675288f", null ], + [ "arm_fir_interpolate_init_q31", "group___f_i_r___interpolate.html#ga9d0ba38ce9f12a850dd242731d307476", null ], + [ "arm_fir_interpolate_q15", "group___f_i_r___interpolate.html#ga7962b5f9636e54899f75d0c5936800b5", null ], + [ "arm_fir_interpolate_q31", "group___f_i_r___interpolate.html#gaac9c0f01ed91c53f7083995d7411f5ee", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___f_i_r___lattice.html b/Documentation/DSP/html/group___f_i_r___lattice.html new file mode 100644 index 0000000..33f1aa9 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r___lattice.html @@ -0,0 +1,486 @@ + + + + + +Finite Impulse Response (FIR) Lattice Filters +CMSIS-DSP: Finite Impulse Response (FIR) Lattice Filters + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
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    +Functions
    +
    +
    Finite Impulse Response (FIR) Lattice Filters
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR lattice filter.
     
    void arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pCoeffs, float32_t *pState)
     Initialization function for the floating-point FIR lattice filter.
     
    void arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pCoeffs, q15_t *pState)
     Initialization function for the Q15 FIR lattice filter.
     
    void arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pCoeffs, q31_t *pState)
     Initialization function for the Q31 FIR lattice filter.
     
    void arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR lattice filter.
     
    void arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR lattice filter.
     
    +

    Description

    +

    This set of functions implements Finite Impulse Response (FIR) lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure is feedforward and the net impulse response is finite length. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst point to input and output arrays containing blockSize values.

    +
    Algorithm:
    +FIRLattice.gif +
    +Finite Impulse Response Lattice filter
    + The following difference equation is implemented: 
        
+     f0[n] = g0[n] = x[n]    
+     fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M    
+     gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M    
+     y[n] = fM[n]    
+
    +
    pCoeffs points to tha array of reflection coefficients of size numStages. Reflection Coefficients are stored in the following order.
    +
        
+     {k1, k2, ..., kM}    
+
    where M is number of stages
    +
    pState points to a state array of size numStages. The state variables (g values) hold previous inputs and are stored in the following order. 
        
+     {g0[n], g1[n], g2[n] ...gM-1[n]}    
+
    The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pCoeffs, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros and then manually initialize the instance structure as follows: 
        
+*arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};    
+*arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};    
+*arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};    
+
    +
    where numStages is the number of stages in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer.
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the FIR Lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_lattice_f32 (const arm_fir_lattice_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point FIR lattice structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References blockSize, arm_fir_lattice_instance_f32::numStages, arm_fir_lattice_instance_f32::pCoeffs, and arm_fir_lattice_instance_f32::pState.

    + +
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    void arm_fir_lattice_init_f32 (arm_fir_lattice_instance_f32 * S,
    uint16_t numStages,
    float32_t * pCoeffs,
    float32_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point FIR lattice structure.
    [in]numStagesnumber of filter stages.
    [in]*pCoeffspoints to the coefficient buffer. The array is of length numStages.
    [in]*pStatepoints to the state buffer. The array is of length numStages.
    +
    +
    +
    Returns
    none.
    + +

    References arm_fir_lattice_instance_f32::numStages, arm_fir_lattice_instance_f32::pCoeffs, and arm_fir_lattice_instance_f32::pState.

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    void arm_fir_lattice_init_q15 (arm_fir_lattice_instance_q15 * S,
    uint16_t numStages,
    q15_t * pCoeffs,
    q15_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 FIR lattice structure.
    [in]numStagesnumber of filter stages.
    [in]*pCoeffspoints to the coefficient buffer. The array is of length numStages.
    [in]*pStatepoints to the state buffer. The array is of length numStages.
    +
    +
    +
    Returns
    none.
    + +

    References arm_fir_lattice_instance_q15::numStages, arm_fir_lattice_instance_q15::pCoeffs, and arm_fir_lattice_instance_q15::pState.

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    void arm_fir_lattice_init_q31 (arm_fir_lattice_instance_q31 * S,
    uint16_t numStages,
    q31_t * pCoeffs,
    q31_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 FIR lattice structure.
    [in]numStagesnumber of filter stages.
    [in]*pCoeffspoints to the coefficient buffer. The array is of length numStages.
    [in]*pStatepoints to the state buffer. The array is of length numStages.
    +
    +
    +
    Returns
    none.
    + +

    References arm_fir_lattice_instance_q31::numStages, arm_fir_lattice_instance_q31::pCoeffs, and arm_fir_lattice_instance_q31::pState.

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    void arm_fir_lattice_q15 (const arm_fir_lattice_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 FIR lattice structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, blockSize, arm_fir_lattice_instance_q15::numStages, arm_fir_lattice_instance_q15::pCoeffs, and arm_fir_lattice_instance_q15::pState.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_lattice_q31 (const arm_fir_lattice_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 FIR lattice structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior: In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.

    + +

    References arm_fir_lattice_instance_q31::numStages, arm_fir_lattice_instance_q31::pCoeffs, and arm_fir_lattice_instance_q31::pState.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___f_i_r___lattice.js b/Documentation/DSP/html/group___f_i_r___lattice.js new file mode 100644 index 0000000..cb6cc67 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r___lattice.js @@ -0,0 +1,9 @@ +var group___f_i_r___lattice = +[ + [ "arm_fir_lattice_f32", "group___f_i_r___lattice.html#gae63a45a63a11a65f2eae8b8b1fe370a8", null ], + [ "arm_fir_lattice_init_f32", "group___f_i_r___lattice.html#ga86199a1590af2b8941c6532ee9d03229", null ], + [ "arm_fir_lattice_init_q15", "group___f_i_r___lattice.html#ga1b22f30ce1cc19bf5a5d7c9fca154d72", null ], + [ "arm_fir_lattice_init_q31", "group___f_i_r___lattice.html#gac05a17a0188bb851b58d19e572870a54", null ], + [ "arm_fir_lattice_q15", "group___f_i_r___lattice.html#gabb0ab07fd313b4d863070c3ddca51542", null ], + [ "arm_fir_lattice_q31", "group___f_i_r___lattice.html#ga2e36fd210e4a1a5dd333ce80dd6d9a88", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___f_i_r___sparse.html b/Documentation/DSP/html/group___f_i_r___sparse.html new file mode 100644 index 0000000..ccc3e46 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r___sparse.html @@ -0,0 +1,725 @@ + + + + + +Finite Impulse Response (FIR) Sparse Filters +CMSIS-DSP: Finite Impulse Response (FIR) Sparse Filters + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
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    +Functions
    +
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    Finite Impulse Response (FIR) Sparse Filters
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 *S, float32_t *pSrc, float32_t *pDst, float32_t *pScratchIn, uint32_t blockSize)
     Processing function for the floating-point sparse FIR filter.
     
    void arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the floating-point sparse FIR filter.
     
    void arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q15 sparse FIR filter.
     
    void arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q31 sparse FIR filter.
     
    void arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 *S, uint16_t numTaps, q7_t *pCoeffs, q7_t *pState, int32_t *pTapDelay, uint16_t maxDelay, uint32_t blockSize)
     Initialization function for the Q7 sparse FIR filter.
     
    void arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 *S, q15_t *pSrc, q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
     Processing function for the Q15 sparse FIR filter.
     
    void arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 *S, q31_t *pSrc, q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize)
     Processing function for the Q31 sparse FIR filter.
     
    void arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 *S, q7_t *pSrc, q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut, uint32_t blockSize)
     Processing function for the Q7 sparse FIR filter.
     
    +

    Description

    +

    This group of functions implements sparse FIR filters. Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero. Sparse filters are used for simulating reflections in communications and audio applications.

    +

    There are separate functions for Q7, Q15, Q31, and floating-point data types. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst points to input and output arrays respectively containing blockSize values.

    +
    Algorithm:
    The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients. This is in addition to the coefficient array b. The implementation essentially skips the multiplications by zero and leads to an efficient realization. 
       
+      y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]    
+
    +
    +FIRSparse.gif +
    +Sparse FIR filter. b[n] represents the filter coefficients
    +
    +
    pCoeffs points to a coefficient array of size numTaps; pTapDelay points to an array of nonzero indices and is also of size numTaps; pState points to a state array of size maxDelay + blockSize, where maxDelay is the largest offset value that is ever used in the pTapDelay array. Some of the processing functions also require temporary working buffers.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 4 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 4 different data type filter instance structures 
        
+*arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
+*arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
+*arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
+*arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
+
    +
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the sparse FIR filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_sparse_f32 (arm_fir_sparse_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    float32_t * pScratchIn,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*Spoints to an instance of the floating-point sparse FIR structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]*pScratchInpoints to a temporary buffer of size blockSize.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    + +

    References arm_circularRead_f32(), arm_circularWrite_f32(), blockSize, arm_fir_sparse_instance_f32::maxDelay, arm_fir_sparse_instance_f32::numTaps, arm_fir_sparse_instance_f32::pCoeffs, arm_fir_sparse_instance_f32::pState, arm_fir_sparse_instance_f32::pTapDelay, and arm_fir_sparse_instance_f32::stateIndex.

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    void arm_fir_sparse_init_f32 (arm_fir_sparse_instance_f32 * S,
    uint16_t numTaps,
    float32_t * pCoeffs,
    float32_t * pState,
    int32_t * pTapDelay,
    uint16_t maxDelay,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in,out]*Spoints to an instance of the floating-point sparse FIR structure.
    [in]numTapsnumber of nonzero coefficients in the filter.
    [in]*pCoeffspoints to the array of filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]*pTapDelaypoints to the array of offset times.
    [in]maxDelaymaximum offset time supported.
    [in]blockSizenumber of samples that will be processed per block.
    +
    +
    +
    Returns
    none
    +

    Description:

    +
    pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of samples processed by the arm_fir_sparse_f32() function.
    + +

    References arm_fir_sparse_instance_f32::maxDelay, arm_fir_sparse_instance_f32::numTaps, arm_fir_sparse_instance_f32::pCoeffs, arm_fir_sparse_instance_f32::pState, arm_fir_sparse_instance_f32::pTapDelay, and arm_fir_sparse_instance_f32::stateIndex.

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    void arm_fir_sparse_init_q15 (arm_fir_sparse_instance_q15 * S,
    uint16_t numTaps,
    q15_t * pCoeffs,
    q15_t * pState,
    int32_t * pTapDelay,
    uint16_t maxDelay,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in,out]*Spoints to an instance of the Q15 sparse FIR structure.
    [in]numTapsnumber of nonzero coefficients in the filter.
    [in]*pCoeffspoints to the array of filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]*pTapDelaypoints to the array of offset times.
    [in]maxDelaymaximum offset time supported.
    [in]blockSizenumber of samples that will be processed per block.
    +
    +
    +
    Returns
    none
    +

    Description:

    +
    pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of words processed by arm_fir_sparse_q15() function.
    + +

    References arm_fir_sparse_instance_q15::maxDelay, arm_fir_sparse_instance_q15::numTaps, arm_fir_sparse_instance_q15::pCoeffs, arm_fir_sparse_instance_q15::pState, arm_fir_sparse_instance_q15::pTapDelay, and arm_fir_sparse_instance_q15::stateIndex.

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    void arm_fir_sparse_init_q31 (arm_fir_sparse_instance_q31 * S,
    uint16_t numTaps,
    q31_t * pCoeffs,
    q31_t * pState,
    int32_t * pTapDelay,
    uint16_t maxDelay,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in,out]*Spoints to an instance of the Q31 sparse FIR structure.
    [in]numTapsnumber of nonzero coefficients in the filter.
    [in]*pCoeffspoints to the array of filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]*pTapDelaypoints to the array of offset times.
    [in]maxDelaymaximum offset time supported.
    [in]blockSizenumber of samples that will be processed per block.
    +
    +
    +
    Returns
    none
    +

    Description:

    +
    pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of words processed by arm_fir_sparse_q31() function.
    + +

    References arm_fir_sparse_instance_q31::maxDelay, arm_fir_sparse_instance_q31::numTaps, arm_fir_sparse_instance_q31::pCoeffs, arm_fir_sparse_instance_q31::pState, arm_fir_sparse_instance_q31::pTapDelay, and arm_fir_sparse_instance_q31::stateIndex.

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    void arm_fir_sparse_init_q7 (arm_fir_sparse_instance_q7 * S,
    uint16_t numTaps,
    q7_t * pCoeffs,
    q7_t * pState,
    int32_t * pTapDelay,
    uint16_t maxDelay,
    uint32_t blockSize 
    )
    +
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    Parameters
    + + + + + + + + +
    [in,out]*Spoints to an instance of the Q7 sparse FIR structure.
    [in]numTapsnumber of nonzero coefficients in the filter.
    [in]*pCoeffspoints to the array of filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]*pTapDelaypoints to the array of offset times.
    [in]maxDelaymaximum offset time supported.
    [in]blockSizenumber of samples that will be processed per block.
    +
    +
    +
    Returns
    none
    +

    Description:

    +
    pCoeffs holds the filter coefficients and has length numTaps. pState holds the filter's state variables and must be of length maxDelay + blockSize, where maxDelay is the maximum number of delay line values. blockSize is the number of samples processed by the arm_fir_sparse_q7() function.
    + +

    References arm_fir_sparse_instance_q7::maxDelay, arm_fir_sparse_instance_q7::numTaps, arm_fir_sparse_instance_q7::pCoeffs, arm_fir_sparse_instance_q7::pState, arm_fir_sparse_instance_q7::pTapDelay, and arm_fir_sparse_instance_q7::stateIndex.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_sparse_q15 (arm_fir_sparse_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    q15_t * pScratchIn,
    q31_t * pScratchOut,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q15 sparse FIR structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]*pScratchInpoints to a temporary buffer of size blockSize.
    [in]*pScratchOutpoints to a temporary buffer of size blockSize.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 32-bit accumulator. The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator. Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator. If the accumulator result overflows it will wrap around rather than saturate. After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
    + +

    References __SIMD32, arm_circularRead_q15(), arm_circularWrite_q15(), blockSize, arm_fir_sparse_instance_q15::maxDelay, arm_fir_sparse_instance_q15::numTaps, arm_fir_sparse_instance_q15::pCoeffs, arm_fir_sparse_instance_q15::pState, arm_fir_sparse_instance_q15::pTapDelay, and arm_fir_sparse_instance_q15::stateIndex.

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    void arm_fir_sparse_q31 (arm_fir_sparse_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    q31_t * pScratchIn,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*Spoints to an instance of the Q31 sparse FIR structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]*pScratchInpoints to a temporary buffer of size blockSize.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 32-bit accumulator. The 1.31 x 1.31 multiplications are truncated to 2.30 format. This leads to loss of precision on the intermediate multiplications and provides only a single guard bit. If the accumulator result overflows, it wraps around rather than saturate. In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
    + +

    References arm_circularRead_f32(), arm_circularWrite_f32(), blockSize, arm_fir_sparse_instance_q31::maxDelay, arm_fir_sparse_instance_q31::numTaps, arm_fir_sparse_instance_q31::pCoeffs, arm_fir_sparse_instance_q31::pState, arm_fir_sparse_instance_q31::pTapDelay, and arm_fir_sparse_instance_q31::stateIndex.

    + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_sparse_q7 (arm_fir_sparse_instance_q7 * S,
    q7_t * pSrc,
    q7_t * pDst,
    q7_t * pScratchIn,
    q31_t * pScratchOut,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q7 sparse FIR structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]*pScratchInpoints to a temporary buffer of size blockSize.
    [in]*pScratchOutpoints to a temporary buffer of size blockSize.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. The accumulator is then converted to 18.7 format by discarding the low 7 bits. Finally, the result is truncated to 1.7 format.
    + +

    References __PACKq7, __SIMD32, arm_circularRead_q7(), arm_circularWrite_q7(), blockSize, arm_fir_sparse_instance_q7::maxDelay, arm_fir_sparse_instance_q7::numTaps, arm_fir_sparse_instance_q7::pCoeffs, arm_fir_sparse_instance_q7::pState, arm_fir_sparse_instance_q7::pTapDelay, and arm_fir_sparse_instance_q7::stateIndex.

    + +
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    +
    + + + + diff --git a/Documentation/DSP/html/group___f_i_r___sparse.js b/Documentation/DSP/html/group___f_i_r___sparse.js new file mode 100644 index 0000000..8c6bb23 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r___sparse.js @@ -0,0 +1,11 @@ +var group___f_i_r___sparse = +[ + [ "arm_fir_sparse_f32", "group___f_i_r___sparse.html#ga23a9284de5ee39406713b91d18ac8838", null ], + [ "arm_fir_sparse_init_f32", "group___f_i_r___sparse.html#ga86378a08a9d9e1e0e5de77843b34d396", null ], + [ "arm_fir_sparse_init_q15", "group___f_i_r___sparse.html#ga5eaa80bf72bcccef5a2c5fc6648d1baa", null ], + [ "arm_fir_sparse_init_q31", "group___f_i_r___sparse.html#ga9a0bb2134bc85d3e55c6be6d946ee634", null ], + [ "arm_fir_sparse_init_q7", "group___f_i_r___sparse.html#ga98f5c1a097d4572ce4ff3b0c58ebcdbd", null ], + [ "arm_fir_sparse_q15", "group___f_i_r___sparse.html#ga2bffda2e156e72427e19276cd9c3d3cc", null ], + [ "arm_fir_sparse_q31", "group___f_i_r___sparse.html#ga03e9c2f0f35ad67d20bac66be9f920ec", null ], + [ "arm_fir_sparse_q7", "group___f_i_r___sparse.html#gae86c145efc2d9ec32dc6d8c1ad2ccb3c", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___f_i_r__decimate.html b/Documentation/DSP/html/group___f_i_r__decimate.html new file mode 100644 index 0000000..0f7e096 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r__decimate.html @@ -0,0 +1,662 @@ + + + + + +Finite Impulse Response (FIR) Decimator +CMSIS-DSP: Finite Impulse Response (FIR) Decimator + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
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    + + + +
    +
    + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Finite Impulse Response (FIR) Decimator
    +
    Filtering Functions
    +
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    +Functions

    void arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point FIR decimator.
     
    void arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
     
    void arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 *S, uint16_t numTaps, uint8_t M, float32_t *pCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point FIR decimator.
     
    arm_status arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 *S, uint16_t numTaps, uint8_t M, q15_t *pCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 FIR decimator.
     
    arm_status arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 *S, uint16_t numTaps, uint8_t M, q31_t *pCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 FIR decimator.
     
    void arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 FIR decimator.
     
    void arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 FIR decimator.
     
    +

    Description

    +

    These functions combine an FIR filter together with a decimator. They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion. Conceptually, the functions are equivalent to the block diagram below:

    +
    +FIRDecimator.gif +
    +Components included in the FIR Decimator functions
    +

    When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized cutoff frequency of 1/M in order to prevent aliasing distortion. The user of the function is responsible for providing the filter coefficients.

    +

    The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner. Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the samples output by the decimator are computed. The functions operate on blocks of input and output data. pSrc points to an array of blockSize input values and pDst points to an array of blockSize/M output values. In order to have an integer number of output samples blockSize must always be a multiple of the decimation factor M.

    +

    The library provides separate functions for Q15, Q31 and floating-point data types.

    +
    Algorithm:
    The FIR portion of the algorithm uses the standard form filter: 
        
+     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
+
    where, b[n] are the filter coefficients.
    +
    The pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.
    +
        
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:
    +
        
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
+
    The state variables are updated after each block of data is processed, the coefficients are untouched.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable array should be allocated separately. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer.
      • +
    • Checks to make sure that the size of the input is a multiple of the decimation factor. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. The code below statically initializes each of the 3 different data type filter instance structures 
        
+*arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};    
+*arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};    
+*arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};    
+
    where M is the decimation factor; numTaps is the number of filter coefficients in the filter; pCoeffs is the address of the coefficient buffer; pState is the address of the state buffer. Be sure to set the values in the state buffer to zeros when doing static initialization.
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the FIR decimate filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

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    void arm_fir_decimate_f32 (const arm_fir_decimate_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point FIR decimator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    + +

    References arm_fir_decimate_instance_f32::M, arm_fir_decimate_instance_f32::numTaps, arm_fir_decimate_instance_f32::pCoeffs, and arm_fir_decimate_instance_f32::pState.

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    void arm_fir_decimate_fast_q15 (const arm_fir_decimate_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 FIR decimator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, state buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    This fast version uses a 32-bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2). The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
    +
    Refer to the function arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_decimate_init_q15() to initialize the filter structure.
    + +

    References __SIMD32, arm_fir_decimate_instance_q15::M, arm_fir_decimate_instance_q15::numTaps, arm_fir_decimate_instance_q15::pCoeffs, and arm_fir_decimate_instance_q15::pState.

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    void arm_fir_decimate_fast_q31 (arm_fir_decimate_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 FIR decimator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none
    +

    Scaling and Overflow Behavior:

    +
    This function is optimized for speed at the expense of fixed-point precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are added to a 2.30 accumulator. Finally, the accumulator is saturated and converted to a 1.31 result. The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
    +
    Refer to the function arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision. Both the slow and the fast versions use the same instance structure. Use the function arm_fir_decimate_init_q31() to initialize the filter structure.
    + +

    References arm_fir_decimate_instance_q31::M, arm_fir_decimate_instance_q31::numTaps, arm_fir_decimate_instance_q31::pCoeffs, and arm_fir_decimate_instance_q31::pState.

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    arm_status arm_fir_decimate_init_f32 (arm_fir_decimate_instance_f32 * S,
    uint16_t numTaps,
    uint8_t M,
    float32_t * pCoeffs,
    float32_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of the floating-point FIR decimator structure.
    [in]numTapsnumber of coefficients in the filter.
    [in]Mdecimation factor.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32(). M is the decimation factor.
    + +

    References ARM_MATH_LENGTH_ERROR, ARM_MATH_SUCCESS, arm_fir_decimate_instance_f32::M, arm_fir_decimate_instance_f32::numTaps, arm_fir_decimate_instance_f32::pCoeffs, arm_fir_decimate_instance_f32::pState, and status.

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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_fir_decimate_init_q15 (arm_fir_decimate_instance_q15 * S,
    uint16_t numTaps,
    uint8_t M,
    q15_t * pCoeffs,
    q15_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of the Q15 FIR decimator structure.
    [in]numTapsnumber of coefficients in the filter.
    [in]Mdecimation factor.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples to the call arm_fir_decimate_q15(). M is the decimation factor.
    + +

    References ARM_MATH_LENGTH_ERROR, ARM_MATH_SUCCESS, arm_fir_decimate_instance_q15::M, arm_fir_decimate_instance_q15::numTaps, arm_fir_decimate_instance_q15::pCoeffs, arm_fir_decimate_instance_q15::pState, and status.

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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_fir_decimate_init_q31 (arm_fir_decimate_instance_q31 * S,
    uint16_t numTaps,
    uint8_t M,
    q31_t * pCoeffs,
    q31_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in,out]*Spoints to an instance of the Q31 FIR decimator structure.
    [in]numTapsnumber of coefficients in the filter.
    [in]Mdecimation factor.
    [in]*pCoeffspoints to the filter coefficients.
    [in]*pStatepoints to the state buffer.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if blockSize is not a multiple of M.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to the array of state variables. pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31(). M is the decimation factor.
    + +

    References ARM_MATH_LENGTH_ERROR, ARM_MATH_SUCCESS, arm_fir_decimate_instance_q31::M, arm_fir_decimate_instance_q31::numTaps, arm_fir_decimate_instance_q31::pCoeffs, arm_fir_decimate_instance_q31::pState, and status.

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    void arm_fir_decimate_q15 (const arm_fir_decimate_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 FIR decimator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the location where the output result is written.
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
    +
    Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
    + +

    References __SIMD32, arm_fir_decimate_instance_q15::M, arm_fir_decimate_instance_q15::numTaps, arm_fir_decimate_instance_q15::pCoeffs, and arm_fir_decimate_instance_q15::pState.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fir_decimate_q31 (const arm_fir_decimate_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 FIR decimator structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data
    [in]blockSizenumber of input samples to process per call.
    +
    +
    +
    Returns
    none
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2). After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
    +
    Refer to the function arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
    + +

    References arm_fir_decimate_instance_q31::M, arm_fir_decimate_instance_q31::numTaps, arm_fir_decimate_instance_q31::pCoeffs, and arm_fir_decimate_instance_q31::pState.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___f_i_r__decimate.js b/Documentation/DSP/html/group___f_i_r__decimate.js new file mode 100644 index 0000000..a2cbc91 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r__decimate.js @@ -0,0 +1,11 @@ +var group___f_i_r__decimate = +[ + [ "arm_fir_decimate_f32", "group___f_i_r__decimate.html#ga25aa3d58a90bf91b6a82272a0bc518f7", null ], + [ "arm_fir_decimate_fast_q15", "group___f_i_r__decimate.html#ga3f434c9a5d3b4e68061feac0714ea2ac", null ], + [ "arm_fir_decimate_fast_q31", "group___f_i_r__decimate.html#ga3c18cc3d0548a410c577f1bead9582b7", null ], + [ "arm_fir_decimate_init_f32", "group___f_i_r__decimate.html#gaaa2524b08220fd6c3f753e692ffc7d3b", null ], + [ "arm_fir_decimate_init_q15", "group___f_i_r__decimate.html#gada660e54b93d5d32178c6f5e1c6f368d", null ], + [ "arm_fir_decimate_init_q31", "group___f_i_r__decimate.html#ga9ed47c4e0f58affa935d84e0508a7f39", null ], + [ "arm_fir_decimate_q15", "group___f_i_r__decimate.html#gab8bef6d0f6a26fdbfce9485727713ce5", null ], + [ "arm_fir_decimate_q31", "group___f_i_r__decimate.html#gaef8e86add28f15fdc5ecc484e9dd7a4e", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___f_i_r_l_p_f.html b/Documentation/DSP/html/group___f_i_r_l_p_f.html new file mode 100644 index 0000000..bd28b78 --- /dev/null +++ b/Documentation/DSP/html/group___f_i_r_l_p_f.html @@ -0,0 +1,177 @@ + + + + + +FIR Lowpass Filter Example +CMSIS-DSP: FIR Lowpass Filter Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
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    + + + +
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    +
    FIR Lowpass Filter Example
    +
    Examples
    +
    +
    Description:
    +
    Removes high frequency signal components from the input using an FIR lowpass filter. The example demonstrates how to configure an FIR filter and then pass data through it in a block-by-block fashion.
    +FIRLPF_signalflow.gif +
    +
    +
    Algorithm:
    +
    The input signal is a sum of two sine waves: 1 kHz and 15 kHz. This is processed by an FIR lowpass filter with cutoff frequency 6 kHz. The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output.
    +
    The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and a length of 29 points. The MATLAB code to generate the filter coefficients is shown below: 
    +    h = fir1(28, 6/24);
+
    The first argument is the "order" of the filter and is always one less than the desired length. The second argument is the normalized cutoff frequency. This is in the range 0 (DC) to 1.0 (Nyquist). A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25. The CMSIS FIR filter function requires the coefficients to be in time reversed order. 
    +    fliplr(h)
+
    The resulting filter coefficients and are shown below. Note that the filter is symmetric (a property of linear phase FIR filters) and the point of symmetry is sample 14. Thus the filter will have a delay of 14 samples for all frequencies.
    +
    +FIRLPF_coeffs.gif +
    +
    +
    The frequency response of the filter is shown next. The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz.
    +
    +FIRLPF_response.gif +
    +
    +
    The input signal is shown below. The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation. The two sine wave components can be clearly seen.
    +
    +FIRLPF_input.gif +
    +
    +
    The output of the filter is shown below. The 15 kHz component has been eliminated.
    +
    +FIRLPF_output.gif +
    +
    +
    Variables Description:
    +
      +
    • testInput_f32_1kHz_15kHz points to the input data
      • +
    • refOutput points to the reference output data
      • +
    • testOutput points to the test output data
      • +
    • firStateF32 points to state buffer
      • +
    • firCoeffs32 points to coefficient buffer
      • +
    • blockSize number of samples processed at a time
      • +
    • numBlocks number of frames
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_fir_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___fast.html b/Documentation/DSP/html/group___fast.html new file mode 100644 index 0000000..755d463 --- /dev/null +++ b/Documentation/DSP/html/group___fast.html @@ -0,0 +1,185 @@ + + + + + +Real FFT Functions +CMSIS-DSP: Real FFT Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
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    + + + +
    +
    + +
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    + +
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    + +
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    +
    Real FFT Functions
    +
    Transform Functions
    +
    +
    The CMSIS DSP library includes specialized algorithms for computing the FFT of real data sequences. The FFT is defined over complex data but in many applications the input is real. Real FFT algorithms take advantage of the symmetry properties of the FFT and have a speed advantage over complex algorithms of the same length.
    +
    The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
    +
    The real length N forward FFT of a sequence is computed using the steps shown below.
    +
    +RFFT.gif +
    +Real Fast Fourier Transform
    +
    +
    The real sequence is initially treated as if it were complex to perform a CFFT. Later, a processing stage reshapes the data to obtain half of the frequency spectrum in complex format. Except the first complex number that contains the two real numbers X[0] and X[N/2] all the data is complex. In other words, the first complex sample contains two real values packed.
    +
    The input for the inverse RFFT should keep the same format as the output of the forward RFFT. A first processing stage pre-process the data to later perform an inverse CFFT.
    +
    +RIFFT.gif +
    +Real Inverse Fast Fourier Transform
    +
    +
    The algorithms for floating-point, Q15, and Q31 data are slightly different and we describe each algorithm in turn.
    +
    Floating-point
    The main functions are arm_rfft_fast_f32() and arm_rfft_fast_init_f32(). The older functions arm_rfft_f32() and arm_rfft_init_f32() have been deprecated but are still documented.
    +
    The FFT of a real N-point sequence has even symmetry in the frequency domain. The second half of the data equals the conjugate of the first half flipped in frequency: 
    +*X[0] - real data
+*X[1] - complex data
+*X[2] - complex data
+ ... 
+*X[fftLen/2-1] - complex data
+*X[fftLen/2] - real data
+*X[fftLen/2+1] - conjugate of X[fftLen/2-1]
+*X[fftLen/2+2] - conjugate of X[fftLen/2-2]
+ ... 
+*X[fftLen-1] - conjugate of X[1]
+
    Looking at the data, we see that we can uniquely represent the FFT using only 
    +*N/2+1 samples:
+*X[0] - real data
+*X[1] - complex data
+*X[2] - complex data
+ ... 
+*X[fftLen/2-1] - complex data
+*X[fftLen/2] - real data
+
    Looking more closely we see that the first and last samples are real valued. They can be packed together and we can thus represent the FFT of an N-point real sequence by N/2 complex values: 
    +*X[0],X[N/2] - packed real data: X[0] + jX[N/2]
+*X[1] - complex data
+*X[2] - complex data
+ ... 
+*X[fftLen/2-1] - complex data
+
    The real FFT functions pack the frequency domain data in this fashion. The forward transform outputs the data in this form and the inverse transform expects input data in this form. The function always performs the needed bitreversal so that the input and output data is always in normal order. The functions support lengths of [32, 64, 128, ..., 4096] samples.
    +
    The forward and inverse real FFT functions apply the standard FFT scaling; no scaling on the forward transform and 1/fftLen scaling on the inverse transform.
    +
    Q15 and Q31
    The real algorithms are defined in a similar manner and utilize N/2 complex transforms behind the scenes.
    +
    The complex transforms used internally include scaling to prevent fixed-point overflows. The overall scaling equals 1/(fftLen/2).
    +
    A separate instance structure must be defined for each transform used but twiddle factor and bit reversal tables can be reused.
    +
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Initializes twiddle factor table and bit reversal table pointers.
      • +
    • Initializes the internal complex FFT data structure.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure should be manually initialized as follows: 
    +*arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
+*arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
+
    where fftLenReal is the length of the real transform; fftLenBy2 length of the internal complex transform. ifftFlagR Selects forward (=0) or inverse (=1) transform. bitReverseFlagR Selects bit reversed output (=0) or normal order output (=1). twidCoefRModifier stride modifier for the twiddle factor table. The value is based on the FFT length; pTwiddleARealpoints to the A array of twiddle coefficients; pTwiddleBRealpoints to the B array of twiddle coefficients; pCfft points to the CFFT Instance structure. The CFFT structure must also be initialized. Refer to arm_cfft_radix4_f32() for details regarding static initialization of the complex FFT instance structure.
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___fill.html b/Documentation/DSP/html/group___fill.html new file mode 100644 index 0000000..879397e --- /dev/null +++ b/Documentation/DSP/html/group___fill.html @@ -0,0 +1,329 @@ + + + + + +Vector Fill +CMSIS-DSP: Vector Fill + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    + +
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    + +
    + +
    +
    +Functions
    +
    +
    Vector Fill
    +
    Support Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_fill_f32 (float32_t value, float32_t *pDst, uint32_t blockSize)
     Fills a constant value into a floating-point vector.
     
    void arm_fill_q15 (q15_t value, q15_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q15 vector.
     
    void arm_fill_q31 (q31_t value, q31_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q31 vector.
     
    void arm_fill_q7 (q7_t value, q7_t *pDst, uint32_t blockSize)
     Fills a constant value into a Q7 vector.
     
    +

    Description

    +

    Fills the destination vector with a constant value.

    +
        
+        pDst[n] = value;   0 <= n < blockSize.    
+

    There are separate functions for floating point, Q31, Q15, and Q7 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fill_f32 (float32_t value,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]valueinput value to be filled
    [out]*pDstpoints to output vector
    [in]blockSizelength of the output vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_convolution_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fill_q15 (q15_t value,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]valueinput value to be filled
    [out]*pDstpoints to output vector
    [in]blockSizelength of the output vector
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, and blockSize.

    + +

    Referenced by arm_conv_fast_opt_q15(), arm_conv_opt_q15(), arm_conv_opt_q7(), arm_conv_partial_fast_opt_q15(), arm_conv_partial_opt_q15(), arm_conv_partial_opt_q7(), arm_correlate_fast_opt_q15(), arm_correlate_opt_q15(), and arm_correlate_opt_q7().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fill_q31 (q31_t value,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]valueinput value to be filled
    [out]*pDstpoints to output vector
    [in]blockSizelength of the output vector
    +
    +
    +
    Returns
    none.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_fill_q7 (q7_t value,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]valueinput value to be filled
    [out]*pDstpoints to output vector
    [in]blockSizelength of the output vector
    +
    +
    +
    Returns
    none.
    + +

    References __PACKq7, __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___fill.js b/Documentation/DSP/html/group___fill.js new file mode 100644 index 0000000..b4f098c --- /dev/null +++ b/Documentation/DSP/html/group___fill.js @@ -0,0 +1,7 @@ +var group___fill = +[ + [ "arm_fill_f32", "group___fill.html#ga2248e8d3901b4afb7827163132baad94", null ], + [ "arm_fill_q15", "group___fill.html#ga76b21c32a3783a2b3334d930a646e5d8", null ], + [ "arm_fill_q31", "group___fill.html#ga69cc781cf337bd0a31bb85c772a35f7f", null ], + [ "arm_fill_q7", "group___fill.html#ga0465cf326ada039ed792f94b033d9ec5", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___frequency_bin.html b/Documentation/DSP/html/group___frequency_bin.html new file mode 100644 index 0000000..22783dc --- /dev/null +++ b/Documentation/DSP/html/group___frequency_bin.html @@ -0,0 +1,166 @@ + + + + + +Frequency Bin Example +CMSIS-DSP: Frequency Bin Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
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    + + + +
    +
    + +
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    + +
    + +
    +
    +
    Frequency Bin Example
    +
    Examples
    +
    +
    Description
    +
    Demonstrates the calculation of the maximum energy bin in the frequency domain of the input signal with the use of Complex FFT, Complex Magnitude, and Maximum functions.
    +
    Algorithm:
    +
    The input test signal contains a 10 kHz signal with uniformly distributed white noise. Calculating the FFT of the input signal will give us the maximum energy of the bin corresponding to the input frequency of 10 kHz.
    +
    Block Diagram:
    +FFTBin.gif +
    +Block Diagram
    +
    +
    The figure below shows the time domain signal of 10 kHz signal with uniformly distributed white noise, and the next figure shows the input in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal.
    +
    +FFTBinInput.gif +
    +Input signal in Time domain
    +
    +FFTBinOutput.gif +
    +Input signal in Frequency domain
    +
    +
    Variables Description:
    +
      +
    • testInput_f32_10khz points to the input data
      • +
    • testOutput points to the output data
      • +
    • fftSize length of FFT
      • +
    • ifftFlag flag for the selection of CFFT/CIFFT
      • +
    • doBitReverse Flag for selection of normal order or bit reversed order
      • +
    • refIndex reference index value at which maximum energy of bin ocuurs
      • +
    • testIndex calculated index value at which maximum energy of bin ocuurs
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_fft_bin_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___g_e_q5_band.html b/Documentation/DSP/html/group___g_e_q5_band.html new file mode 100644 index 0000000..0180936 --- /dev/null +++ b/Documentation/DSP/html/group___g_e_q5_band.html @@ -0,0 +1,186 @@ + + + + + +Graphic Audio Equalizer Example +CMSIS-DSP: Graphic Audio Equalizer Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    +
    Graphic Audio Equalizer Example
    +
    Examples
    +
    +
    Description:
    +
    This example demonstrates how a 5-band graphic equalizer can be constructed using the Biquad cascade functions. A graphic equalizer is used in audio applications to vary the tonal quality of the audio.
    +
    Block Diagram:
    +
    The design is based on a cascade of 5 filter sections.
    +GEQ_signalflow.gif +
    + Each filter section is 4th order and consists of a cascade of two Biquads. Each filter has a nominal gain of 0 dB (1.0 in linear units) and boosts or cuts signals within a specific frequency range. The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz. Each band has an adjustable boost or cut in the range of +/- 9 dB. For example, the band that extends from 500 to 2000 Hz has the response shown below:
    +
    +GEQ_bandresponse.gif +
    +
    +
    With 1 dB steps, each filter has a total of 19 different settings. The filter coefficients for all possible 19 settings were precomputed in MATLAB and stored in a table. With 5 different tables, there are a total of 5 x 19 = 95 different 4th order filters. All 95 responses are shown below:
    +
    +GEQ_allbandresponse.gif +
    +
    +
    Each 4th order filter has 10 coefficents for a grand total of 950 different filter coefficients that must be tabulated. The input and output data is in Q31 format. For better noise performance, the two low frequency bands are implemented using the high precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp.
    +
    +GEQ_inputchirp.gif +
    +
    +
    The array bandGains specifies the gain in dB to apply in each band. For example, if bandGains={0, -3, 6, 4, -6}; then the output signal will be:
    +
    +GEQ_outputchirp.gif +
    +
    +
    +
    Note
    The output chirp signal follows the gain or boost of each band.
    +
    +
    Variables Description:
    +
      +
    • testInput_f32 points to the input data
      • +
    • testRefOutput_f32 points to the reference output data
      • +
    • testOutput points to the test output data
      • +
    • inputQ31 temporary input buffer
      • +
    • outputQ31 temporary output buffer
      • +
    • biquadStateBand1Q31 points to state buffer for band1
      • +
    • biquadStateBand2Q31 points to state buffer for band2
      • +
    • biquadStateBand3Q31 points to state buffer for band3
      • +
    • biquadStateBand4Q31 points to state buffer for band4
      • +
    • biquadStateBand5Q31 points to state buffer for band5
      • +
    • coeffTable points to coefficient buffer for all bands
      • +
    • gainDB gain buffer which has gains applied for all the bands
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_graphic_equalizer_example_q31.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___i_i_r___lattice.html b/Documentation/DSP/html/group___i_i_r___lattice.html new file mode 100644 index 0000000..6ba3818 --- /dev/null +++ b/Documentation/DSP/html/group___i_i_r___lattice.html @@ -0,0 +1,531 @@ + + + + + +Infinite Impulse Response (IIR) Lattice Filters +CMSIS-DSP: Infinite Impulse Response (IIR) Lattice Filters + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +Functions
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    Infinite Impulse Response (IIR) Lattice Filters
    +
    Filtering Functions
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    +Functions

    void arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 *S, float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Processing function for the floating-point IIR lattice filter.
     
    void arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 *S, uint16_t numStages, float32_t *pkCoeffs, float32_t *pvCoeffs, float32_t *pState, uint32_t blockSize)
     Initialization function for the floating-point IIR lattice filter.
     
    void arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 *S, uint16_t numStages, q15_t *pkCoeffs, q15_t *pvCoeffs, q15_t *pState, uint32_t blockSize)
     Initialization function for the Q15 IIR lattice filter.
     
    void arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 *S, uint16_t numStages, q31_t *pkCoeffs, q31_t *pvCoeffs, q31_t *pState, uint32_t blockSize)
     Initialization function for the Q31 IIR lattice filter.
     
    void arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 *S, q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Processing function for the Q15 IIR lattice filter.
     
    void arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 *S, q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Processing function for the Q31 IIR lattice filter.
     
    +

    Description

    +

    This set of functions implements lattice filters for Q15, Q31 and floating-point data types. Lattice filters are used in a variety of adaptive filter applications. The filter structure has feedforward and feedback components and the net impulse response is infinite length. The functions operate on blocks of input and output data and each call to the function processes blockSize samples through the filter. pSrc and pDst point to input and output arrays containing blockSize values.

    +
    Algorithm:
    +IIRLattice.gif +
    +Infinite Impulse Response Lattice filter
    + 
        
+     fN(n)   =  x(n)    
+     fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1    
+     gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1    
+     y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)    
+
    +
    pkCoeffs points to array of reflection coefficients of size numStages. Reflection coefficients are stored in time-reversed order.
    +
        
+     {kN, kN-1, ....k1}    
+
    pvCoeffs points to the array of ladder coefficients of size (numStages+1). Ladder coefficients are stored in time-reversed order.
    +
        
+     {vN, vN-1, ...v0}    
+
    pState points to a state array of size numStages + blockSize. The state variables shown in the figure above (the g values) are stored in the pState array. The state variables are updated after each block of data is processed; the coefficients are untouched.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter. Coefficient arrays may be shared among several instances while state variable arrays cannot be shared. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros and then manually initialize the instance structure as follows: 
        
+*arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};    
+*arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};    
+*arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};    
+
    +
    where numStages is the number of stages in the filter; pState points to the state buffer array; pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients.
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the IIR lattice filter functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

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    void arm_iir_lattice_f32 (const arm_iir_lattice_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the floating-point IIR lattice structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References blockSize, arm_iir_lattice_instance_f32::numStages, arm_iir_lattice_instance_f32::pkCoeffs, arm_iir_lattice_instance_f32::pState, and arm_iir_lattice_instance_f32::pvCoeffs.

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    void arm_iir_lattice_init_f32 (arm_iir_lattice_instance_f32 * S,
    uint16_t numStages,
    float32_t * pkCoeffs,
    float32_t * pvCoeffs,
    float32_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the floating-point IIR lattice structure.
    [in]numStagesnumber of stages in the filter.
    [in]*pkCoeffspoints to the reflection coefficient buffer. The array is of length numStages.
    [in]*pvCoeffspoints to the ladder coefficient buffer. The array is of length numStages+1.
    [in]*pStatepoints to the state buffer. The array is of length numStages+blockSize.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References arm_iir_lattice_instance_f32::numStages, arm_iir_lattice_instance_f32::pkCoeffs, arm_iir_lattice_instance_f32::pState, and arm_iir_lattice_instance_f32::pvCoeffs.

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    void arm_iir_lattice_init_q15 (arm_iir_lattice_instance_q15 * S,
    uint16_t numStages,
    q15_t * pkCoeffs,
    q15_t * pvCoeffs,
    q15_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q15 IIR lattice structure.
    [in]numStagesnumber of stages in the filter.
    [in]*pkCoeffspoints to reflection coefficient buffer. The array is of length numStages.
    [in]*pvCoeffspoints to ladder coefficient buffer. The array is of length numStages+1.
    [in]*pStatepoints to state buffer. The array is of length numStages+blockSize.
    [in]blockSizenumber of samples to process per call.
    +
    +
    +
    Returns
    none.
    + +

    References arm_iir_lattice_instance_q15::numStages, arm_iir_lattice_instance_q15::pkCoeffs, arm_iir_lattice_instance_q15::pState, and arm_iir_lattice_instance_q15::pvCoeffs.

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    void arm_iir_lattice_init_q31 (arm_iir_lattice_instance_q31 * S,
    uint16_t numStages,
    q31_t * pkCoeffs,
    q31_t * pvCoeffs,
    q31_t * pState,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q31 IIR lattice structure.
    [in]numStagesnumber of stages in the filter.
    [in]*pkCoeffspoints to the reflection coefficient buffer. The array is of length numStages.
    [in]*pvCoeffspoints to the ladder coefficient buffer. The array is of length numStages+1.
    [in]*pStatepoints to the state buffer. The array is of length numStages+blockSize.
    [in]blockSizenumber of samples to process.
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    +
    +
    Returns
    none.
    + +

    References arm_iir_lattice_instance_q31::numStages, arm_iir_lattice_instance_q31::pkCoeffs, arm_iir_lattice_instance_q31::pState, and arm_iir_lattice_instance_q31::pvCoeffs.

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    void arm_iir_lattice_q15 (const arm_iir_lattice_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q15 IIR lattice structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
    + +

    References __SIMD32, blockSize, arm_iir_lattice_instance_q15::numStages, arm_iir_lattice_instance_q15::pkCoeffs, arm_iir_lattice_instance_q15::pState, and arm_iir_lattice_instance_q15::pvCoeffs.

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    void arm_iir_lattice_q31 (const arm_iir_lattice_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an instance of the Q31 IIR lattice structure.
    [in]*pSrcpoints to the block of input data.
    [out]*pDstpoints to the block of output data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits. After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
    + +

    References blockSize, clip_q63_to_q31(), arm_iir_lattice_instance_q31::numStages, arm_iir_lattice_instance_q31::pkCoeffs, arm_iir_lattice_instance_q31::pState, and arm_iir_lattice_instance_q31::pvCoeffs.

    + +
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    + + + + diff --git a/Documentation/DSP/html/group___i_i_r___lattice.js b/Documentation/DSP/html/group___i_i_r___lattice.js new file mode 100644 index 0000000..43f007e --- /dev/null +++ b/Documentation/DSP/html/group___i_i_r___lattice.js @@ -0,0 +1,9 @@ +var group___i_i_r___lattice = +[ + [ "arm_iir_lattice_f32", "group___i_i_r___lattice.html#ga56164a0fe48619b8ceec160347bdd2ff", null ], + [ "arm_iir_lattice_init_f32", "group___i_i_r___lattice.html#gaed3b0230bb77439dc902daa625985e04", null ], + [ "arm_iir_lattice_init_q15", "group___i_i_r___lattice.html#ga1f4bc2dd3d5641e96815d3a5aad58998", null ], + [ "arm_iir_lattice_init_q31", "group___i_i_r___lattice.html#gab686c14175581797d9c3ad7bf1d5cc1e", null ], + [ "arm_iir_lattice_q15", "group___i_i_r___lattice.html#gaeb9e9599a288832ed123183eaa8b294a", null ], + [ "arm_iir_lattice_q31", "group___i_i_r___lattice.html#ga123b26fa9156cd8d3622dd85931741ed", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___l_m_s.html b/Documentation/DSP/html/group___l_m_s.html new file mode 100644 index 0000000..16064ff --- /dev/null +++ b/Documentation/DSP/html/group___l_m_s.html @@ -0,0 +1,610 @@ + + + + + +Least Mean Square (LMS) Filters +CMSIS-DSP: Least Mean Square (LMS) Filters + + + + + + + + + + + + + + + +
    +
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    CMSIS-DSP +  Version 1.4.7 +
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    CMSIS DSP Software Library
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    +Functions
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    Least Mean Square (LMS) Filters
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_lms_f32 (const arm_lms_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
     Processing function for floating-point LMS filter.
     
    void arm_lms_init_f32 (arm_lms_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
     Initialization function for floating-point LMS filter.
     
    void arm_lms_init_q15 (arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint32_t postShift)
     Initialization function for the Q15 LMS filter.
     
    void arm_lms_init_q31 (arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint32_t postShift)
     Initialization function for Q31 LMS filter.
     
    void arm_lms_q15 (const arm_lms_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
     Processing function for Q15 LMS filter.
     
    void arm_lms_q31 (const arm_lms_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
     Processing function for Q31 LMS filter.
     
    +

    Description

    +

    LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions. LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal. Adaptive filters are often used in communication systems, equalizers, and noise removal. The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types. The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.

    +

    An LMS filter consists of two components as shown below. The first component is a standard transversal or FIR filter. The second component is a coefficient update mechanism. The LMS filter has two input signals. The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. This "error signal" tends towards zero as the filter adapts. The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.

    +
    +LMS.gif +
    +Internal structure of the Least Mean Square filter
    +

    The functions operate on blocks of data and each call to the function processes blockSize samples through the filter. pSrc points to input signal, pRef points to reference signal, pOut points to output signal and pErr points to error signal. All arrays contain blockSize values.

    +

    The functions operate on a block-by-block basis. Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.

    +
    Algorithm:
    The output signal y[n] is computed by a standard FIR filter: 
        
+     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
+
    +
    The error signal equals the difference between the reference signal d[n] and the filter output: 
        
+     e[n] = d[n] - y[n].    
+
    +
    After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis: 
        
+     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1    
+
    where mu is the step size and controls the rate of coefficient convergence.
    +
    In the APIs, pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.
    +
        
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:
    +
        
+    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
+
    +
    Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
      • +
    +
    +
    Use of the initialization function is optional. However, if the initialization function is used, then the instance structure cannot be placed into a const data section. To place an instance structure into a const data section, the instance structure must be manually initialized. Set the values in the state buffer to zeros before static initialization. The code below statically initializes each of the 3 different data type filter instance structures 
        
+    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};    
+    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};    
+    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};    
+
    where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer; pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients.
    +
    Fixed-Point Behavior:
    Care must be taken when using the Q15 and Q31 versions of the LMS filter. The following issues must be considered:
      +
    • Scaling of coefficients
      • +
    • Overflow and saturation
      • +
    +
    +
    Scaling of Coefficients:
    Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift. At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. This essentially scales the filter coefficients by 2^postShift and allows the filter coefficients to exceed the range [+1 -1). The value of postShift is set by the user based on the expected gain through the system being modeled.
    +
    Overflow and Saturation:
    Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below.
    +

    Function Documentation

    + +
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    void arm_lms_f32 (const arm_lms_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pRef,
    float32_t * pOut,
    float32_t * pErr,
    uint32_t blockSize 
    )
    +
    +

    This function operates on floating-point data types.

    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the floating-point LMS filter structure.
    [in]*pSrcpoints to the block of input data.
    [in]*pRefpoints to the block of reference data.
    [out]*pOutpoints to the block of output data.
    [out]*pErrpoints to the block of error data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    + +

    References blockSize, arm_lms_instance_f32::mu, arm_lms_instance_f32::numTaps, arm_lms_instance_f32::pCoeffs, and arm_lms_instance_f32::pState.

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    void arm_lms_init_f32 (arm_lms_instance_f32 * S,
    uint16_t numTaps,
    float32_t * pCoeffs,
    float32_t * pState,
    float32_t mu,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the floating-point LMS filter structure.
    [in]numTapsnumber of filter coefficients.
    [in]*pCoeffspoints to the coefficient buffer.
    [in]*pStatepoints to state buffer.
    [in]mustep size that controls filter coefficient updates.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +
    Description:
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().
    + +

    References arm_lms_instance_f32::mu, arm_lms_instance_f32::numTaps, arm_lms_instance_f32::pCoeffs, and arm_lms_instance_f32::pState.

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    void arm_lms_init_q15 (arm_lms_instance_q15 * S,
    uint16_t numTaps,
    q15_t * pCoeffs,
    q15_t * pState,
    q15_t mu,
    uint32_t blockSize,
    uint32_t postShift 
    )
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    Parameters
    + + + + + + + + +
    [in]*Spoints to an instance of the Q15 LMS filter structure.
    [in]numTapsnumber of filter coefficients.
    [in]*pCoeffspoints to the coefficient buffer.
    [in]*pStatepoints to the state buffer.
    [in]mustep size that controls filter coefficient updates.
    [in]blockSizenumber of samples to process.
    [in]postShiftbit shift applied to coefficients.
    +
    +
    +
    Returns
    none.
    +
    Description:
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    The initial filter coefficients serve as a starting point for the adaptive filter. pState points to the array of state variables and size of array is numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_q15().
    + +

    References arm_lms_instance_q15::mu, arm_lms_instance_q15::numTaps, arm_lms_instance_q15::pCoeffs, arm_lms_instance_q15::postShift, and arm_lms_instance_q15::pState.

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    void arm_lms_init_q31 (arm_lms_instance_q31 * S,
    uint16_t numTaps,
    q31_t * pCoeffs,
    q31_t * pState,
    q31_t mu,
    uint32_t blockSize,
    uint32_t postShift 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*Spoints to an instance of the Q31 LMS filter structure.
    [in]numTapsnumber of filter coefficients.
    [in]*pCoeffspoints to coefficient buffer.
    [in]*pStatepoints to state buffer.
    [in]mustep size that controls filter coefficient updates.
    [in]blockSizenumber of samples to process.
    [in]postShiftbit shift applied to coefficients.
    +
    +
    +
    Returns
    none.
    +
    Description:
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_q31().
    + +

    References arm_lms_instance_q31::mu, arm_lms_instance_q31::numTaps, arm_lms_instance_q31::pCoeffs, arm_lms_instance_q31::postShift, and arm_lms_instance_q31::pState.

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    void arm_lms_q15 (const arm_lms_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pRef,
    q15_t * pOut,
    q15_t * pErr,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q15 LMS filter structure.
    [in]*pSrcpoints to the block of input data.
    [in]*pRefpoints to the block of reference data.
    [out]*pOutpoints to the block of output data.
    [out]*pErrpoints to the block of error data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +
    Scaling and Overflow Behavior:
    The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
    +
    In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
    + +

    References __SIMD32, blockSize, arm_lms_instance_q15::mu, arm_lms_instance_q15::numTaps, arm_lms_instance_q15::pCoeffs, arm_lms_instance_q15::postShift, and arm_lms_instance_q15::pState.

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    void arm_lms_q31 (const arm_lms_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pRef,
    q31_t * pOut,
    q31_t * pErr,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q15 LMS filter structure.
    [in]*pSrcpoints to the block of input data.
    [in]*pRefpoints to the block of reference data.
    [out]*pOutpoints to the block of output data.
    [out]*pErrpoints to the block of error data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +
    Scaling and Overflow Behavior:
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clips. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.
    +
    In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
    + +

    References blockSize, clip_q63_to_q31(), arm_lms_instance_q31::mu, arm_lms_instance_q31::numTaps, arm_lms_instance_q31::pCoeffs, arm_lms_instance_q31::postShift, and arm_lms_instance_q31::pState.

    + +
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    + + + + diff --git a/Documentation/DSP/html/group___l_m_s.js b/Documentation/DSP/html/group___l_m_s.js new file mode 100644 index 0000000..63100cc --- /dev/null +++ b/Documentation/DSP/html/group___l_m_s.js @@ -0,0 +1,9 @@ +var group___l_m_s = +[ + [ "arm_lms_f32", "group___l_m_s.html#gae266d009e682180421601627c79a3843", null ], + [ "arm_lms_init_f32", "group___l_m_s.html#ga9fc7adca0966ff2cec1746fca8364cee", null ], + [ "arm_lms_init_q15", "group___l_m_s.html#ga9544cc26f18cd4465cfbed371be822b3", null ], + [ "arm_lms_init_q31", "group___l_m_s.html#ga8d4bc251169f4b102355097a9f7530d6", null ], + [ "arm_lms_q15", "group___l_m_s.html#gacde16c17eb75979f81b34e2e2a58c7ac", null ], + [ "arm_lms_q31", "group___l_m_s.html#ga6a0abfe6041253a6f91c63b383a64257", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___l_m_s___n_o_r_m.html b/Documentation/DSP/html/group___l_m_s___n_o_r_m.html new file mode 100644 index 0000000..e7f2ddb --- /dev/null +++ b/Documentation/DSP/html/group___l_m_s___n_o_r_m.html @@ -0,0 +1,617 @@ + + + + + +Normalized LMS Filters +CMSIS-DSP: Normalized LMS Filters + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    + +
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    + +
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    + +
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    + +
    + +
    +
    +Functions
    +
    +
    Normalized LMS Filters
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_lms_norm_f32 (arm_lms_norm_instance_f32 *S, float32_t *pSrc, float32_t *pRef, float32_t *pOut, float32_t *pErr, uint32_t blockSize)
     Processing function for floating-point normalized LMS filter.
     
    void arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 *S, uint16_t numTaps, float32_t *pCoeffs, float32_t *pState, float32_t mu, uint32_t blockSize)
     Initialization function for floating-point normalized LMS filter.
     
    void arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs, q15_t *pState, q15_t mu, uint32_t blockSize, uint8_t postShift)
     Initialization function for Q15 normalized LMS filter.
     
    void arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs, q31_t *pState, q31_t mu, uint32_t blockSize, uint8_t postShift)
     Initialization function for Q31 normalized LMS filter.
     
    void arm_lms_norm_q15 (arm_lms_norm_instance_q15 *S, q15_t *pSrc, q15_t *pRef, q15_t *pOut, q15_t *pErr, uint32_t blockSize)
     Processing function for Q15 normalized LMS filter.
     
    void arm_lms_norm_q31 (arm_lms_norm_instance_q31 *S, q31_t *pSrc, q31_t *pRef, q31_t *pOut, q31_t *pErr, uint32_t blockSize)
     Processing function for Q31 normalized LMS filter.
     
    +

    Description

    +

    This set of functions implements a commonly used adaptive filter. It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization factor which increases the adaptation rate of the filter. The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.

    +

    A normalized least mean square (NLMS) filter consists of two components as shown below. The first component is a standard transversal or FIR filter. The second component is a coefficient update mechanism. The NLMS filter has two input signals. The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter. That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input. The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input. This "error signal" tends towards zero as the filter adapts. The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.

    +
    +LMS.gif +
    +Internal structure of the NLMS adaptive filter
    +

    The functions operate on blocks of data and each call to the function processes blockSize samples through the filter. pSrc points to input signal, pRef points to reference signal, pOut points to output signal and pErr points to error signal. All arrays contain blockSize values.

    +

    The functions operate on a block-by-block basis. Internally, the filter coefficients b[n] are updated on a sample-by-sample basis. The convergence of the LMS filter is slower compared to the normalized LMS algorithm.

    +
    Algorithm:
    The output signal y[n] is computed by a standard FIR filter: 
        
+     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
+
    +
    The error signal equals the difference between the reference signal d[n] and the filter output: 
        
+     e[n] = d[n] - y[n].    
+
    +
    After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated: 
        
+    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.    
+
    The filter coefficients b[k] are then updated on a sample-by-sample basis: 
        
+     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1    
+
    where mu is the step size and controls the rate of coefficient convergence.
    +
    In the APIs, pCoeffs points to a coefficient array of size numTaps. Coefficients are stored in time reversed order.
    +
        
+    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    +
    pState points to a state array of size numTaps + blockSize - 1. Samples in the state buffer are stored in the order:
    +
        
+    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
+
    +
    Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples. The increased state buffer length allows circular addressing, which is traditionally used in FIR filters, to be avoided and yields a significant speed improvement. The state variables are updated after each block of data is processed.
    +
    Instance Structure
    The coefficients and state variables for a filter are stored together in an instance data structure. A separate instance structure must be defined for each filter and coefficient and state arrays cannot be shared among instances. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Sets the values of the internal structure fields.
      • +
    • Zeros out the values in the state buffer. To do this manually without calling the init function, assign the follow subfields of the instance structure: numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero. For Q7, Q15, and Q31 the following fields must also be initialized; recipTable, postShift
      • +
    +
    +
    Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
    +
    Fixed-Point Behavior:
    Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter. The following issues must be considered:
      +
    • Scaling of coefficients
      • +
    • Overflow and saturation
      • +
    +
    +
    Scaling of Coefficients:
    Filter coefficients are represented as fractional values and coefficients are restricted to lie in the range [-1 +1). The fixed-point functions have an additional scaling parameter postShift. At the output of the filter's accumulator is a shift register which shifts the result by postShift bits. This essentially scales the filter coefficients by 2^postShift and allows the filter coefficients to exceed the range [+1 -1). The value of postShift is set by the user based on the expected gain through the system being modeled.
    +
    Overflow and Saturation:
    Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are described separately as part of the function specific documentation below.
    +

    Function Documentation

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    void arm_lms_norm_f32 (arm_lms_norm_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pRef,
    float32_t * pOut,
    float32_t * pErr,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the floating-point normalized LMS filter structure.
    [in]*pSrcpoints to the block of input data.
    [in]*pRefpoints to the block of reference data.
    [out]*pOutpoints to the block of output data.
    [out]*pErrpoints to the block of error data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    References blockSize, arm_lms_norm_instance_f32::energy, arm_lms_norm_instance_f32::mu, arm_lms_norm_instance_f32::numTaps, arm_lms_norm_instance_f32::pCoeffs, arm_lms_norm_instance_f32::pState, and arm_lms_norm_instance_f32::x0.

    + +

    Referenced by main().

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    void arm_lms_norm_init_f32 (arm_lms_norm_instance_f32 * S,
    uint16_t numTaps,
    float32_t * pCoeffs,
    float32_t * pState,
    float32_t mu,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the floating-point LMS filter structure.
    [in]numTapsnumber of filter coefficients.
    [in]*pCoeffspoints to coefficient buffer.
    [in]*pStatepoints to state buffer.
    [in]mustep size that controls filter coefficient updates.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +
    Description:
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().
    +
    Examples:
    arm_signal_converge_example_f32.c.
    +
    +

    References arm_lms_norm_instance_f32::energy, arm_lms_norm_instance_f32::mu, arm_lms_norm_instance_f32::numTaps, arm_lms_norm_instance_f32::pCoeffs, arm_lms_norm_instance_f32::pState, and arm_lms_norm_instance_f32::x0.

    + +

    Referenced by main().

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    void arm_lms_norm_init_q15 (arm_lms_norm_instance_q15 * S,
    uint16_t numTaps,
    q15_t * pCoeffs,
    q15_t * pState,
    q15_t mu,
    uint32_t blockSize,
    uint8_t postShift 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*Spoints to an instance of the Q15 normalized LMS filter structure.
    [in]numTapsnumber of filter coefficients.
    [in]*pCoeffspoints to coefficient buffer.
    [in]*pStatepoints to state buffer.
    [in]mustep size that controls filter coefficient updates.
    [in]blockSizenumber of samples to process.
    [in]postShiftbit shift applied to coefficients.
    +
    +
    +
    Returns
    none.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    The initial filter coefficients serve as a starting point for the adaptive filter. pState points to the array of state variables and size of array is numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_q15().
    + +

    References armRecipTableQ15, arm_lms_norm_instance_q15::energy, arm_lms_norm_instance_q15::mu, arm_lms_norm_instance_q15::numTaps, arm_lms_norm_instance_q15::pCoeffs, arm_lms_norm_instance_q15::postShift, arm_lms_norm_instance_q15::pState, arm_lms_norm_instance_q15::recipTable, and arm_lms_norm_instance_q15::x0.

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    void arm_lms_norm_init_q31 (arm_lms_norm_instance_q31 * S,
    uint16_t numTaps,
    q31_t * pCoeffs,
    q31_t * pState,
    q31_t mu,
    uint32_t blockSize,
    uint8_t postShift 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*Spoints to an instance of the Q31 normalized LMS filter structure.
    [in]numTapsnumber of filter coefficients.
    [in]*pCoeffspoints to coefficient buffer.
    [in]*pStatepoints to state buffer.
    [in]mustep size that controls filter coefficient updates.
    [in]blockSizenumber of samples to process.
    [in]postShiftbit shift applied to coefficients.
    +
    +
    +
    Returns
    none.
    +

    Description:

    +
    pCoeffs points to the array of filter coefficients stored in time reversed order: 
        
+   {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
+
    The initial filter coefficients serve as a starting point for the adaptive filter. pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().
    + +

    References armRecipTableQ31, arm_lms_norm_instance_q31::energy, arm_lms_norm_instance_q31::mu, arm_lms_norm_instance_q31::numTaps, arm_lms_norm_instance_q31::pCoeffs, arm_lms_norm_instance_q31::postShift, arm_lms_norm_instance_q31::pState, arm_lms_norm_instance_q31::recipTable, and arm_lms_norm_instance_q31::x0.

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    void arm_lms_norm_q15 (arm_lms_norm_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pRef,
    q15_t * pOut,
    q15_t * pErr,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q15 normalized LMS filter structure.
    [in]*pSrcpoints to the block of input data.
    [in]*pRefpoints to the block of reference data.
    [out]*pOutpoints to the block of output data.
    [out]*pErrpoints to the block of error data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
    +
    In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
    + +

    References __SIMD32, arm_recip_q15(), blockSize, DELTA_Q15, arm_lms_norm_instance_q15::energy, arm_lms_norm_instance_q15::mu, arm_lms_norm_instance_q15::numTaps, arm_lms_norm_instance_q15::pCoeffs, arm_lms_norm_instance_q15::postShift, arm_lms_norm_instance_q15::pState, arm_lms_norm_instance_q15::recipTable, and arm_lms_norm_instance_q15::x0.

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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_lms_norm_q31 (arm_lms_norm_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pRef,
    q31_t * pOut,
    q31_t * pErr,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + + +
    [in]*Spoints to an instance of the Q31 normalized LMS filter structure.
    [in]*pSrcpoints to the block of input data.
    [in]*pRefpoints to the block of reference data.
    [out]*pOutpoints to the block of output data.
    [out]*pErrpoints to the block of error data.
    [in]blockSizenumber of samples to process.
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits. The reference signal should not be scaled down. After all multiply-accumulates are performed, the 2.62 accumulator is shifted and saturated to 1.31 format to yield the final result. The output signal and error signal are in 1.31 format.
    +
    In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
    + +

    References arm_recip_q31(), blockSize, clip_q63_to_q31(), DELTA_Q31, arm_lms_norm_instance_q31::energy, arm_lms_norm_instance_q31::mu, arm_lms_norm_instance_q31::numTaps, arm_lms_norm_instance_q31::pCoeffs, arm_lms_norm_instance_q31::postShift, arm_lms_norm_instance_q31::pState, arm_lms_norm_instance_q31::recipTable, and arm_lms_norm_instance_q31::x0.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___l_m_s___n_o_r_m.js b/Documentation/DSP/html/group___l_m_s___n_o_r_m.js new file mode 100644 index 0000000..78b209d --- /dev/null +++ b/Documentation/DSP/html/group___l_m_s___n_o_r_m.js @@ -0,0 +1,9 @@ +var group___l_m_s___n_o_r_m = +[ + [ "arm_lms_norm_f32", "group___l_m_s___n_o_r_m.html#ga2418c929087c6eba719758eaae3f3300", null ], + [ "arm_lms_norm_init_f32", "group___l_m_s___n_o_r_m.html#gac7ccbaea863882056eee815456464670", null ], + [ "arm_lms_norm_init_q15", "group___l_m_s___n_o_r_m.html#ga213ab1ee2e154cc2fa30d667b1994b89", null ], + [ "arm_lms_norm_init_q31", "group___l_m_s___n_o_r_m.html#ga1d9659dbbea4c89a7a9d14d5fc0dd490", null ], + [ "arm_lms_norm_q15", "group___l_m_s___n_o_r_m.html#gad47486a399dedb0bc85a5990ec5cf981", null ], + [ "arm_lms_norm_q31", "group___l_m_s___n_o_r_m.html#ga7128775e99817c183a7d7ad34e8b6e05", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___linear_interp_example.html b/Documentation/DSP/html/group___linear_interp_example.html new file mode 100644 index 0000000..2609270 --- /dev/null +++ b/Documentation/DSP/html/group___linear_interp_example.html @@ -0,0 +1,158 @@ + + + + + +Linear Interpolate Example +CMSIS-DSP: Linear Interpolate Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
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    + +
    + + + + +
    + +
    + +
    +
    +
    Linear Interpolate Example
    +
    Examples
    +
    +

    CMSIS DSP Software Library – Linear Interpolate Example

    +

    Description This example demonstrates usage of linear interpolate modules and fast math modules. Method 1 uses fast math sine function to calculate sine values using cubic interpolation and method 2 uses linear interpolation function and results are compared to reference output. Example shows linear interpolation function can be used to get higher precision compared to fast math sin calculation.

    +
    Block Diagram:
    +
    +linearInterpExampleMethod1.gif +
    +Method 1: Sine caluclation using fast math
    +
    +
    +linearInterpExampleMethod2.gif +
    +Method 2: Sine caluclation using interpolation function
    +
    +
    Variables Description:
    +
      +
    • testInputSin_f32 points to the input values for sine calculation
      • +
    • testRefSinOutput32_f32 points to the reference values caculated from sin() matlab function
      • +
    • testOutput points to output buffer calculation from cubic interpolation
      • +
    • testLinIntOutput points to output buffer calculation from linear interpolation
      • +
    • snr1 Signal to noise ratio for reference and cubic interpolation output
      • +
    • snr2 Signal to noise ratio for reference and linear interpolation output
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_linear_interp_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___linear_interpolate.html b/Documentation/DSP/html/group___linear_interpolate.html new file mode 100644 index 0000000..4ea8f7f --- /dev/null +++ b/Documentation/DSP/html/group___linear_interpolate.html @@ -0,0 +1,359 @@ + + + + + +Linear Interpolation +CMSIS-DSP: Linear Interpolation + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Linear Interpolation
    +
    Interpolation Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    static __INLINE float32_t arm_linear_interp_f32 (arm_linear_interp_instance_f32 *S, float32_t x)
     Process function for the floating-point Linear Interpolation Function.
     
    static __INLINE q31_t arm_linear_interp_q31 (q31_t *pYData, q31_t x, uint32_t nValues)
     Process function for the Q31 Linear Interpolation Function.
     
    static __INLINE q15_t arm_linear_interp_q15 (q15_t *pYData, q31_t x, uint32_t nValues)
     Process function for the Q15 Linear Interpolation Function.
     
    static __INLINE q7_t arm_linear_interp_q7 (q7_t *pYData, q31_t x, uint32_t nValues)
     Process function for the Q7 Linear Interpolation Function.
     
    +

    Description

    +

    Linear interpolation is a method of curve fitting using linear polynomials. Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line

    +
    +LinearInterp.gif +
    +Linear interpolation
    +
    +
    A Linear Interpolate function calculates an output value(y), for the input(x) using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
    +
    Algorithm:
    +      y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+      where x0, x1 are nearest values of input x
+            y0, y1 are nearest values to output y
+
    +
    This set of functions implements Linear interpolation process for Q7, Q15, Q31, and floating-point data types. The functions operate on a single sample of data and each call to the function returns a single processed value. S points to an instance of the Linear Interpolate function data structure. x is the input sample value. The functions returns the output value.
    +
    if x is outside of the table boundary, Linear interpolation returns first value of the table if x is below input range and returns last value of table if x is above range.
    +

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + +
    static __INLINE float32_t arm_linear_interp_f32 (arm_linear_interp_instance_f32 * S,
    float32_t x 
    )
    +     		+static
    +
    +
    Parameters
    + + + +
    [in,out]Sis an instance of the floating-point Linear Interpolation structure
    [in]xinput sample to process
    +
    +
    +
    Returns
    y processed output sample.
    +
    Examples:
    arm_linear_interp_example_f32.c.
    +
    +

    References arm_linear_interp_instance_f32::nValues, arm_linear_interp_instance_f32::pYData, arm_linear_interp_instance_f32::x1, and arm_linear_interp_instance_f32::xSpacing.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE q15_t arm_linear_interp_q15 (q15_t * pYData,
    q31_t x,
    uint32_t nValues 
    )
    +     		+static
    +
    +
    Parameters
    + + + + +
    [in]pYDatapointer to Q15 Linear Interpolation table
    [in]xinput sample to process
    [in]nValuesnumber of table values
    +
    +
    +
    Returns
    y processed output sample.
    +
    Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. This function can support maximum of table size 2^12.
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE q31_t arm_linear_interp_q31 (q31_t * pYData,
    q31_t x,
    uint32_t nValues 
    )
    +     		+static
    +
    +
    Parameters
    + + + + +
    [in]pYDatapointer to Q31 Linear Interpolation table
    [in]xinput sample to process
    [in]nValuesnumber of table values
    +
    +
    +
    Returns
    y processed output sample.
    +
    Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. This function can support maximum of table size 2^12.
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE q7_t arm_linear_interp_q7 (q7_t * pYData,
    q31_t x,
    uint32_t nValues 
    )
    +     		+static
    +
    +
    Parameters
    + + + + +
    [in]pYDatapointer to Q7 Linear Interpolation table
    [in]xinput sample to process
    [in]nValuesnumber of table values
    +
    +
    +
    Returns
    y processed output sample.
    +
    Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part. This function can support maximum of table size 2^12.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___linear_interpolate.js b/Documentation/DSP/html/group___linear_interpolate.js new file mode 100644 index 0000000..8e1a1bd --- /dev/null +++ b/Documentation/DSP/html/group___linear_interpolate.js @@ -0,0 +1,7 @@ +var group___linear_interpolate = +[ + [ "arm_linear_interp_f32", "group___linear_interpolate.html#ga2269263d810cafcd19681957b37d5cf6", null ], + [ "arm_linear_interp_q15", "group___linear_interpolate.html#ga42c9206e5d2d22b8808716dc30622846", null ], + [ "arm_linear_interp_q31", "group___linear_interpolate.html#ga690e63e9a513ca0a741b1b174805d031", null ], + [ "arm_linear_interp_q7", "group___linear_interpolate.html#gacb0d44fe00aca0ba1d036d469a1763fc", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___matrix_add.html b/Documentation/DSP/html/group___matrix_add.html new file mode 100644 index 0000000..9a5dddd --- /dev/null +++ b/Documentation/DSP/html/group___matrix_add.html @@ -0,0 +1,284 @@ + + + + + +Matrix Addition +CMSIS-DSP: Matrix Addition + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
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    + +
    + +
    +
    +Functions
    +
    +
    Matrix Addition
    +
    Matrix Functions
    +
    + + + + + + + + + + + +

    +Functions

    arm_status arm_mat_add_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix addition.
     
    arm_status arm_mat_add_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
     Q15 matrix addition.
     
    arm_status arm_mat_add_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix addition.
     
    +

    Description

    +

    Adds two matrices.

    +
    +MatrixAddition.gif +
    +Addition of two 3 x 3 matrices
    +

    The functions check to make sure that pSrcA, pSrcB, and pDst have the same number of rows and columns.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_add_f32 (const arm_matrix_instance_f32 * pSrcA,
    const arm_matrix_instance_f32 * pSrcB,
    arm_matrix_instance_f32 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_add_q15 (const arm_matrix_instance_q15 * pSrcA,
    const arm_matrix_instance_q15 * pSrcB,
    arm_matrix_instance_q15 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    + +

    References __SIMD32, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_add_q31 (const arm_matrix_instance_q31 * pSrcA,
    const arm_matrix_instance_q31 * pSrcB,
    arm_matrix_instance_q31 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_add.js b/Documentation/DSP/html/group___matrix_add.js new file mode 100644 index 0000000..67e3e7c --- /dev/null +++ b/Documentation/DSP/html/group___matrix_add.js @@ -0,0 +1,6 @@ +var group___matrix_add = +[ + [ "arm_mat_add_f32", "group___matrix_add.html#ga04bbf64a5f9c9e57dd1efb26a768aba1", null ], + [ "arm_mat_add_q15", "group___matrix_add.html#ga147e90b7c12a162735ab8824127a33ee", null ], + [ "arm_mat_add_q31", "group___matrix_add.html#ga7d9d7d81a0832a17b831aad1e4a5dc16", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___matrix_example.html b/Documentation/DSP/html/group___matrix_example.html new file mode 100644 index 0000000..0122398 --- /dev/null +++ b/Documentation/DSP/html/group___matrix_example.html @@ -0,0 +1,156 @@ + + + + + +Matrix Example +CMSIS-DSP: Matrix Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Matrix Example
    +
    Examples
    +
    +
    Description:
    +
    Demonstrates the use of Matrix Transpose, Matrix Muliplication, and Matrix Inverse functions to apply least squares fitting to input data. Least squares fitting is the procedure for finding the best-fitting curve that minimizes the sum of the squares of the offsets (least square error) from a given set of data.
    +
    Algorithm:
    +
    The linear combination of parameters considered is as follows:
    +
    A * X = B, where X is the unknown value and can be estimated from A & B.
    +
    The least squares estimate X is given by the following equation:
    +
    X = Inverse(AT * A) * AT * B
    +
    Block Diagram:
    +
    +matrixExample.gif +
    +
    +
    Variables Description:
    +
      +
    • A_f32 input matrix in the linear combination equation
      • +
    • B_f32 output matrix in the linear combination equation
      • +
    • X_f32 unknown matrix estimated using A_f32 & B_f32 matrices
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_matrix_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_init.html b/Documentation/DSP/html/group___matrix_init.html new file mode 100644 index 0000000..69bc4b1 --- /dev/null +++ b/Documentation/DSP/html/group___matrix_init.html @@ -0,0 +1,299 @@ + + + + + +Matrix Initialization +CMSIS-DSP: Matrix Initialization + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Matrix Initialization
    +
    Matrix Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_mat_init_f32 (arm_matrix_instance_f32 *S, uint16_t nRows, uint16_t nColumns, float32_t *pData)
     Floating-point matrix initialization.
     
    void arm_mat_init_q15 (arm_matrix_instance_q15 *S, uint16_t nRows, uint16_t nColumns, q15_t *pData)
     Q15 matrix initialization.
     
    void arm_mat_init_q31 (arm_matrix_instance_q31 *S, uint16_t nRows, uint16_t nColumns, q31_t *pData)
     Q31 matrix initialization.
     
    +

    Description

    +

    Initializes the underlying matrix data structure. The functions set the numRows, numCols, and pData fields of the matrix data structure.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mat_init_f32 (arm_matrix_instance_f32 * S,
    uint16_t nRows,
    uint16_t nColumns,
    float32_t * pData 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the floating-point matrix structure.
    [in]nRowsnumber of rows in the matrix.
    [in]nColumnsnumber of columns in the matrix.
    [in]*pDatapoints to the matrix data array.
    +
    +
    +
    Returns
    none
    +
    Examples:
    arm_class_marks_example_f32.c, and arm_matrix_example_f32.c.
    +
    +

    References arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, and arm_matrix_instance_f32::pData.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mat_init_q15 (arm_matrix_instance_q15 * S,
    uint16_t nRows,
    uint16_t nColumns,
    q15_t * pData 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the floating-point matrix structure.
    [in]nRowsnumber of rows in the matrix.
    [in]nColumnsnumber of columns in the matrix.
    [in]*pDatapoints to the matrix data array.
    +
    +
    +
    Returns
    none
    + +

    References arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, and arm_matrix_instance_q15::pData.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mat_init_q31 (arm_matrix_instance_q31 * S,
    uint16_t nRows,
    uint16_t nColumns,
    q31_t * pData 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the floating-point matrix structure.
    [in]nRowsnumber of rows in the matrix.
    [in]nColumnsnumber of columns in the matrix.
    [in]*pDatapoints to the matrix data array.
    +
    +
    +
    Returns
    none
    + +

    References arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, and arm_matrix_instance_q31::pData.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_init.js b/Documentation/DSP/html/group___matrix_init.js new file mode 100644 index 0000000..014342a --- /dev/null +++ b/Documentation/DSP/html/group___matrix_init.js @@ -0,0 +1,6 @@ +var group___matrix_init = +[ + [ "arm_mat_init_f32", "group___matrix_init.html#ga11e3dc41592a6401c13182fef9416a27", null ], + [ "arm_mat_init_q15", "group___matrix_init.html#ga31a7c2b991803d49719393eb2d53dc26", null ], + [ "arm_mat_init_q31", "group___matrix_init.html#ga48a5e5d37e1f062cc57fcfaf683343cc", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___matrix_inv.html b/Documentation/DSP/html/group___matrix_inv.html new file mode 100644 index 0000000..0f930c5 --- /dev/null +++ b/Documentation/DSP/html/group___matrix_inv.html @@ -0,0 +1,225 @@ + + + + + +Matrix Inverse +CMSIS-DSP: Matrix Inverse + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Matrix Inverse
    +
    Matrix Functions
    +
    + + + + + + + + +

    +Functions

    arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
     Floating-point matrix inverse.
     
    arm_status arm_mat_inverse_f64 (const arm_matrix_instance_f64 *pSrc, arm_matrix_instance_f64 *pDst)
     Floating-point matrix inverse.
     
    +

    Description

    +

    Computes the inverse of a matrix.

    +

    The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero). The function checks that the input and output matrices are square and of the same size.

    +

    Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix inversion of floating-point matrices.

    +
    Algorithm
    The Gauss-Jordan method is used to find the inverse. The algorithm performs a sequence of elementary row-operations until it reduces the input matrix to an identity matrix. Applying the same sequence of elementary row-operations to an identity matrix yields the inverse matrix. If the input matrix is singular, then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
    +MatrixInverse.gif +
    +Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method
    +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_inverse_f32 (const arm_matrix_instance_f32 * pSrc,
    arm_matrix_instance_f32 * pDst 
    )
    +
    +
    Parameters
    + + + +
    [in]*pSrcpoints to input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size of the output matrix does not match the size of the input matrix. If the input matrix is found to be singular (non-invertible), then the function returns ARM_MATH_SINGULAR. Otherwise, the function returns ARM_MATH_SUCCESS.
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    References ARM_MATH_SINGULAR, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_inverse_f64 (const arm_matrix_instance_f64 * pSrc,
    arm_matrix_instance_f64 * pDst 
    )
    +
    +
    Parameters
    + + + +
    [in]*pSrcpoints to input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size of the output matrix does not match the size of the input matrix. If the input matrix is found to be singular (non-invertible), then the function returns ARM_MATH_SINGULAR. Otherwise, the function returns ARM_MATH_SUCCESS.
    + +

    References ARM_MATH_SINGULAR, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f64::numCols, arm_matrix_instance_f64::numRows, arm_matrix_instance_f64::pData, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_inv.js b/Documentation/DSP/html/group___matrix_inv.js new file mode 100644 index 0000000..86de966 --- /dev/null +++ b/Documentation/DSP/html/group___matrix_inv.js @@ -0,0 +1,5 @@ +var group___matrix_inv = +[ + [ "arm_mat_inverse_f32", "group___matrix_inv.html#ga542be7aabbf7a2297a4b62cf212910e3", null ], + [ "arm_mat_inverse_f64", "group___matrix_inv.html#gaede2367c02df083cc915ddd5d8fae838", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___matrix_mult.html b/Documentation/DSP/html/group___matrix_mult.html new file mode 100644 index 0000000..0e41662 --- /dev/null +++ b/Documentation/DSP/html/group___matrix_mult.html @@ -0,0 +1,403 @@ + + + + + +Matrix Multiplication +CMSIS-DSP: Matrix Multiplication + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Matrix Multiplication
    +
    Matrix Functions
    +
    + + + + + + + + + + + + + + + + + +

    +Functions

    arm_status arm_mat_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix multiplication.
     
    arm_status arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState)
     Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_mat_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pState CMSIS_UNUSED)
     Q15 matrix multiplication.
     
    arm_status arm_mat_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix multiplication.
     
    +

    Description

    +

    Multiplies two matrices.

    +
    +MatrixMultiplication.gif +
    +Multiplication of two 3 x 3 matrices
    +

    Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an M x N matrix with an N x P matrix results in an M x P matrix. When matrix size checking is enabled, the functions check: (1) that the inner dimensions of pSrcA and pSrcB are equal; and (2) that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_mult_f32 (const arm_matrix_instance_f32 * pSrcA,
    const arm_matrix_instance_f32 * pSrcB,
    arm_matrix_instance_f32 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +
    Examples:
    arm_class_marks_example_f32.c, and arm_matrix_example_f32.c.
    +
    +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_mult_fast_q15 (const arm_matrix_instance_q15 * pSrcA,
    const arm_matrix_instance_q15 * pSrcB,
    arm_matrix_instance_q15 * pDst,
    q15_t * pState 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    [in]*pStatepoints to the array for storing intermediate results
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The difference between the function arm_mat_mult_q15() and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.15 x 1.15 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.15 result.
    +
    The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 16 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.
    +
    See arm_mat_mult_q15() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
    + +

    References __SIMD32, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_mult_fast_q31 (const arm_matrix_instance_q31 * pSrcA,
    const arm_matrix_instance_q31 * pSrcB,
    arm_matrix_instance_q31 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The difference between the function arm_mat_mult_q31() and this fast variant is that the fast variant use a 32-bit rather than a 64-bit accumulator. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
    +
    The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down one of the input matrices by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are computed internally for each output element.
    +
    See arm_mat_mult_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_mult_q15 (const arm_matrix_instance_q15 * pSrcA,
    const arm_matrix_instance_q15 * pSrcB,
    arm_matrix_instance_q15 * pDst,
    q15_t *pState CMSIS_UNUSED 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    [in]*pStatepoints to the array for storing intermediate results (Unused)
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
    +
    Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
    + +

    References __SIMD32, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_mult_q31 (const arm_matrix_instance_q31 * pSrcA,
    const arm_matrix_instance_q31 * pSrcB,
    arm_matrix_instance_q31 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
    +
    See arm_mat_mult_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, clip_q63_to_q31(), arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_mult.js b/Documentation/DSP/html/group___matrix_mult.js new file mode 100644 index 0000000..9f60cbe --- /dev/null +++ b/Documentation/DSP/html/group___matrix_mult.js @@ -0,0 +1,8 @@ +var group___matrix_mult = +[ + [ "arm_mat_mult_f32", "group___matrix_mult.html#ga917bf0270310c1d3f0eda1fc7c0026a0", null ], + [ "arm_mat_mult_fast_q15", "group___matrix_mult.html#ga08f37d93a5bfef0c5000dc5e0a411f93", null ], + [ "arm_mat_mult_fast_q31", "group___matrix_mult.html#ga2785e8c1b785348b0c439b56aaf585a3", null ], + [ "arm_mat_mult_q15", "group___matrix_mult.html#ga3657b99a9667945373e520dbac0f4516", null ], + [ "arm_mat_mult_q31", "group___matrix_mult.html#ga2ec612a8c2c4916477fb9bc1ab548a6e", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___matrix_scale.html b/Documentation/DSP/html/group___matrix_scale.html new file mode 100644 index 0000000..62ba64c --- /dev/null +++ b/Documentation/DSP/html/group___matrix_scale.html @@ -0,0 +1,301 @@ + + + + + +Matrix Scale +CMSIS-DSP: Matrix Scale + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Matrix Scale
    +
    Matrix Functions
    +
    + + + + + + + + + + + +

    +Functions

    arm_status arm_mat_scale_f32 (const arm_matrix_instance_f32 *pSrc, float32_t scale, arm_matrix_instance_f32 *pDst)
     Floating-point matrix scaling.
     
    arm_status arm_mat_scale_q15 (const arm_matrix_instance_q15 *pSrc, q15_t scaleFract, int32_t shift, arm_matrix_instance_q15 *pDst)
     Q15 matrix scaling.
     
    arm_status arm_mat_scale_q31 (const arm_matrix_instance_q31 *pSrc, q31_t scaleFract, int32_t shift, arm_matrix_instance_q31 *pDst)
     Q31 matrix scaling.
     
    +

    Description

    +

    Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the matrix by the scalar. For example:

    +
    +MatrixScale.gif +
    +Matrix Scaling of a 3 x 3 matrix
    +

    The function checks to make sure that the input and output matrices are of the same size.

    +

    In the fixed-point Q15 and Q31 functions, scale is represented by a fractional multiplication scaleFract and an arithmetic shift shift. The shift allows the gain of the scaling operation to exceed 1.0. The overall scale factor applied to the fixed-point data is

    +
            
+    scale = scaleFract * 2^shift.        
+

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_scale_f32 (const arm_matrix_instance_f32 * pSrc,
    float32_t scale,
    arm_matrix_instance_f32 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to input matrix structure
    [in]scalescale factor to be applied
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_scale_q15 (const arm_matrix_instance_q15 * pSrc,
    q15_t scaleFract,
    int32_t shift,
    arm_matrix_instance_q15 * pDst 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to input matrix
    [in]scaleFractfractional portion of the scale factor
    [in]shiftnumber of bits to shift the result by
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The input data *pSrc and scaleFract are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
    + +

    References _SIMD32_OFFSET, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_scale_q31 (const arm_matrix_instance_q31 * pSrc,
    q31_t scaleFract,
    int32_t shift,
    arm_matrix_instance_q31 * pDst 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to input matrix
    [in]scaleFractfractional portion of the scale factor
    [in]shiftnumber of bits to shift the result by
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The input data *pSrc and scaleFract are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_scale.js b/Documentation/DSP/html/group___matrix_scale.js new file mode 100644 index 0000000..e9ed5b2 --- /dev/null +++ b/Documentation/DSP/html/group___matrix_scale.js @@ -0,0 +1,6 @@ +var group___matrix_scale = +[ + [ "arm_mat_scale_f32", "group___matrix_scale.html#ga9cb4e385b18c9a0b9cbc940c1067ca12", null ], + [ "arm_mat_scale_q15", "group___matrix_scale.html#ga7521769e2cf1c3d9c4656138cd2ae2ca", null ], + [ "arm_mat_scale_q31", "group___matrix_scale.html#ga609743821ee81fa8c34c4bcdc1ed9744", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___matrix_sub.html b/Documentation/DSP/html/group___matrix_sub.html new file mode 100644 index 0000000..724518a --- /dev/null +++ b/Documentation/DSP/html/group___matrix_sub.html @@ -0,0 +1,284 @@ + + + + + +Matrix Subtraction +CMSIS-DSP: Matrix Subtraction + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Matrix Subtraction
    +
    Matrix Functions
    +
    + + + + + + + + + + + +

    +Functions

    arm_status arm_mat_sub_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
     Floating-point matrix subtraction.
     
    arm_status arm_mat_sub_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst)
     Q15 matrix subtraction.
     
    arm_status arm_mat_sub_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
     Q31 matrix subtraction.
     
    +

    Description

    +

    Subtract two matrices.

    +
    +MatrixSubtraction.gif +
    +Subraction of two 3 x 3 matrices
    +

    The functions check to make sure that pSrcA, pSrcB, and pDst have the same number of rows and columns.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_sub_f32 (const arm_matrix_instance_f32 * pSrcA,
    const arm_matrix_instance_f32 * pSrcB,
    arm_matrix_instance_f32 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_sub_q15 (const arm_matrix_instance_q15 * pSrcA,
    const arm_matrix_instance_q15 * pSrcB,
    arm_matrix_instance_q15 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    + +

    References __SIMD32, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_sub_q31 (const arm_matrix_instance_q31 * pSrcA,
    const arm_matrix_instance_q31 * pSrcB,
    arm_matrix_instance_q31 * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcApoints to the first input matrix structure
    [in]*pSrcBpoints to the second input matrix structure
    [out]*pDstpoints to output matrix structure
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_sub.js b/Documentation/DSP/html/group___matrix_sub.js new file mode 100644 index 0000000..e5ab3cb --- /dev/null +++ b/Documentation/DSP/html/group___matrix_sub.js @@ -0,0 +1,6 @@ +var group___matrix_sub = +[ + [ "arm_mat_sub_f32", "group___matrix_sub.html#gac8b72fb70246ccfee3b372002345732c", null ], + [ "arm_mat_sub_q15", "group___matrix_sub.html#gaf647776a425b7f9dd0aca3e11d81f02f", null ], + [ "arm_mat_sub_q31", "group___matrix_sub.html#ga39f42e0e3b7f115fbb909d6ff4e1329d", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___matrix_trans.html b/Documentation/DSP/html/group___matrix_trans.html new file mode 100644 index 0000000..a14247f --- /dev/null +++ b/Documentation/DSP/html/group___matrix_trans.html @@ -0,0 +1,261 @@ + + + + + +Matrix Transpose +CMSIS-DSP: Matrix Transpose + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Matrix Transpose
    +
    Matrix Functions
    +
    + + + + + + + + + + + +

    +Functions

    arm_status arm_mat_trans_f32 (const arm_matrix_instance_f32 *pSrc, arm_matrix_instance_f32 *pDst)
     Floating-point matrix transpose.
     
    arm_status arm_mat_trans_q15 (const arm_matrix_instance_q15 *pSrc, arm_matrix_instance_q15 *pDst)
     Q15 matrix transpose.
     
    arm_status arm_mat_trans_q31 (const arm_matrix_instance_q31 *pSrc, arm_matrix_instance_q31 *pDst)
     Q31 matrix transpose.
     
    +

    Description

    +

    Tranposes a matrix. Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix.

    +
    +MatrixTranspose.gif +
    +Transpose of a 3 x 3 matrix
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_trans_f32 (const arm_matrix_instance_f32 * pSrc,
    arm_matrix_instance_f32 * pDst 
    )
    +
    +
    Parameters
    + + + +
    [in]*pSrcpoints to the input matrix
    [out]*pDstpoints to the output matrix
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    +
    Examples:
    arm_matrix_example_f32.c.
    +
    +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_trans_q15 (const arm_matrix_instance_q15 * pSrc,
    arm_matrix_instance_q15 * pDst 
    )
    +
    +
    Parameters
    + + + +
    [in]pSrcpoints to the input matrix
    [out]pDstpoints to the output matrix
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    + +

    References __SIMD32, ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status arm_mat_trans_q31 (const arm_matrix_instance_q31 * pSrc,
    arm_matrix_instance_q31 * pDst 
    )
    +
    +
    Parameters
    + + + +
    [in]pSrcpoints to the input matrix
    [out]pDstpoints to the output matrix
    +
    +
    +
    Returns
    The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    + +

    References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___matrix_trans.js b/Documentation/DSP/html/group___matrix_trans.js new file mode 100644 index 0000000..117dd28 --- /dev/null +++ b/Documentation/DSP/html/group___matrix_trans.js @@ -0,0 +1,6 @@ +var group___matrix_trans = +[ + [ "arm_mat_trans_f32", "group___matrix_trans.html#gad7dd9f108429da13d3864696ceeec789", null ], + [ "arm_mat_trans_q15", "group___matrix_trans.html#ga4f4f821cc695fd0ef9061d702e08050a", null ], + [ "arm_mat_trans_q31", "group___matrix_trans.html#ga30a4d49489ac67ff98a46b9f58f73bf1", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___max.html b/Documentation/DSP/html/group___max.html new file mode 100644 index 0000000..ea44a89 --- /dev/null +++ b/Documentation/DSP/html/group___max.html @@ -0,0 +1,344 @@ + + + + + +Maximum +CMSIS-DSP: Maximum + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Maximum
    +
    Statistics Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_max_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
     Maximum value of a floating-point vector.
     
    void arm_max_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
     Maximum value of a Q15 vector.
     
    void arm_max_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
     Maximum value of a Q31 vector.
     
    void arm_max_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
     Maximum value of a Q7 vector.
     
    +

    Description

    +

    Computes the maximum value of an array of data. The function returns both the maximum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_max_f32 (float32_t * pSrc,
    uint32_t blockSize,
    float32_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmaximum value returned here
    [out]*pIndexindex of maximum value returned here
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_class_marks_example_f32.c, and arm_fft_bin_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_max_q15 (q15_t * pSrc,
    uint32_t blockSize,
    q15_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmaximum value returned here
    [out]*pIndexindex of maximum value returned here
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_max_q31 (q31_t * pSrc,
    uint32_t blockSize,
    q31_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmaximum value returned here
    [out]*pIndexindex of maximum value returned here
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_max_q7 (q7_t * pSrc,
    uint32_t blockSize,
    q7_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmaximum value returned here
    [out]*pIndexindex of maximum value returned here
    +
    +
    +
    Returns
    none.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___max.js b/Documentation/DSP/html/group___max.js new file mode 100644 index 0000000..6ac948c --- /dev/null +++ b/Documentation/DSP/html/group___max.js @@ -0,0 +1,7 @@ +var group___max = +[ + [ "arm_max_f32", "group___max.html#ga5b89d1b04575aeec494f678695fb87d8", null ], + [ "arm_max_q15", "group___max.html#gac132856c68f4bf2a056eaad5921c7880", null ], + [ "arm_max_q31", "group___max.html#gaff7cbd4e955382def06724cc4cc85795", null ], + [ "arm_max_q7", "group___max.html#ga6afd64d381b5c232de59163ebfe71e35", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___min.html b/Documentation/DSP/html/group___min.html new file mode 100644 index 0000000..ff27f76 --- /dev/null +++ b/Documentation/DSP/html/group___min.html @@ -0,0 +1,344 @@ + + + + + +Minimum +CMSIS-DSP: Minimum + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Minimum
    +
    Statistics Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_min_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult, uint32_t *pIndex)
     Minimum value of a floating-point vector.
     
    void arm_min_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult, uint32_t *pIndex)
     Minimum value of a Q15 vector.
     
    void arm_min_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult, uint32_t *pIndex)
     Minimum value of a Q31 vector.
     
    void arm_min_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult, uint32_t *pIndex)
     Minimum value of a Q7 vector.
     
    +

    Description

    +

    Computes the minimum value of an array of data. The function returns both the minimum value and its position within the array. There are separate functions for floating-point, Q31, Q15, and Q7 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_min_f32 (float32_t * pSrc,
    uint32_t blockSize,
    float32_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultminimum value returned here
    [out]*pIndexindex of minimum value returned here
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_class_marks_example_f32.c, and arm_signal_converge_example_f32.c.
    +
    +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_min_q15 (q15_t * pSrc,
    uint32_t blockSize,
    q15_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultminimum value returned here
    [out]*pIndexindex of minimum value returned here
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_min_q31 (q31_t * pSrc,
    uint32_t blockSize,
    q31_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultminimum value returned here
    [out]*pIndexindex of minimum value returned here
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_min_q7 (q7_t * pSrc,
    uint32_t blockSize,
    q7_t * pResult,
    uint32_t * pIndex 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultminimum value returned here
    [out]*pIndexindex of minimum value returned here
    +
    +
    +
    Returns
    none.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___min.js b/Documentation/DSP/html/group___min.js new file mode 100644 index 0000000..7cf62b9 --- /dev/null +++ b/Documentation/DSP/html/group___min.js @@ -0,0 +1,7 @@ +var group___min = +[ + [ "arm_min_f32", "group___min.html#gaf62b1673740fc516ea64daf777b7d74a", null ], + [ "arm_min_q15", "group___min.html#gad065e37535ebb726750ac1545cb3fa6f", null ], + [ "arm_min_q31", "group___min.html#gab20faeceb5ff5d2d9dd628c2ecf41303", null ], + [ "arm_min_q7", "group___min.html#ga3631d38ac8d715fc14f6f1b343f4c4ed", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___p_i_d.html b/Documentation/DSP/html/group___p_i_d.html new file mode 100644 index 0000000..184d62c --- /dev/null +++ b/Documentation/DSP/html/group___p_i_d.html @@ -0,0 +1,517 @@ + + + + + +PID Motor Control +CMSIS-DSP: PID Motor Control + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    PID Motor Control
    +
    Controller Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_pid_init_f32 (arm_pid_instance_f32 *S, int32_t resetStateFlag)
     Initialization function for the floating-point PID Control.
     
    void arm_pid_init_q15 (arm_pid_instance_q15 *S, int32_t resetStateFlag)
     Initialization function for the Q15 PID Control.
     
    void arm_pid_init_q31 (arm_pid_instance_q31 *S, int32_t resetStateFlag)
     Initialization function for the Q31 PID Control.
     
    void arm_pid_reset_f32 (arm_pid_instance_f32 *S)
     Reset function for the floating-point PID Control.
     
    void arm_pid_reset_q15 (arm_pid_instance_q15 *S)
     Reset function for the Q15 PID Control.
     
    void arm_pid_reset_q31 (arm_pid_instance_q31 *S)
     Reset function for the Q31 PID Control.
     
    static __INLINE float32_t arm_pid_f32 (arm_pid_instance_f32 *S, float32_t in)
     Process function for the floating-point PID Control.
     
    static __INLINE q31_t arm_pid_q31 (arm_pid_instance_q31 *S, q31_t in)
     Process function for the Q31 PID Control.
     
    static __INLINE q15_t arm_pid_q15 (arm_pid_instance_q15 *S, q15_t in)
     Process function for the Q15 PID Control.
     
    +

    Description

    +

    A Proportional Integral Derivative (PID) controller is a generic feedback control loop mechanism widely used in industrial control systems. A PID controller is the most commonly used type of feedback controller.

    +

    This set of functions implements (PID) controllers for Q15, Q31, and floating-point data types. The functions operate on a single sample of data and each call to the function returns a single processed value. S points to an instance of the PID control data structure. in is the input sample value. The functions return the output value.

    +
    Algorithm:
    +   y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
+   A0 = Kp + Ki + Kd
+   A1 = (-Kp ) - (2 * Kd )
+   A2 = Kd
    +
    where Kp is proportional constant, Ki is Integral constant and Kd is Derivative constant
    +
    +PID.gif +
    +Proportional Integral Derivative Controller
    +
    +
    The PID controller calculates an "error" value as the difference between the measured output and the reference input. The controller attempts to minimize the error by adjusting the process control inputs. The proportional value determines the reaction to the current error, the integral value determines the reaction based on the sum of recent errors, and the derivative value determines the reaction based on the rate at which the error has been changing.
    +
    Instance Structure
    The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. A separate instance structure must be defined for each PID Controller. There are separate instance structure declarations for each of the 3 supported data types.
    +
    Reset Functions
    There is also an associated reset function for each data type which clears the state array.
    +
    Initialization Functions
    There is also an associated initialization function for each data type. The initialization function performs the following operations:
      +
    • Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
      • +
    • Zeros out the values in the state buffer.
      • +
    +
    +
    Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the PID Controller functions. In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + +
    static __INLINE float32_t arm_pid_f32 (arm_pid_instance_f32 * S,
    float32_t in 
    )
    +     		+static
    +
    +
    Parameters
    + + + +
    [in,out]Sis an instance of the floating-point PID Control structure
    [in]ininput sample to process
    +
    +
    +
    Returns
    out processed output sample.
    + +

    References arm_pid_instance_f32::A0, arm_pid_instance_f32::A1, arm_pid_instance_f32::A2, and arm_pid_instance_f32::state.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_pid_init_f32 (arm_pid_instance_f32 * S,
    int32_t resetStateFlag 
    )
    +
    +
    Parameters
    + + + +
    [in,out]*Spoints to an instance of the PID structure.
    [in]resetStateFlagflag to reset the state. 0 = no change in state & 1 = reset the state.
    +
    +
    +
    Returns
    none.
    +
    Description:
    +
    The resetStateFlag specifies whether to set state to zero or not.
    + The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.
    + +

    References arm_pid_instance_f32::A0, arm_pid_instance_f32::A1, arm_pid_instance_f32::A2, arm_pid_instance_f32::Kd, arm_pid_instance_f32::Ki, arm_pid_instance_f32::Kp, and arm_pid_instance_f32::state.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_pid_init_q15 (arm_pid_instance_q15 * S,
    int32_t resetStateFlag 
    )
    +
    +
    Parameters
    + + + +
    [in,out]*Spoints to an instance of the Q15 PID structure.
    [in]resetStateFlagflag to reset the state. 0 = no change in state 1 = reset the state.
    +
    +
    +
    Returns
    none.
    +
    Description:
    +
    The resetStateFlag specifies whether to set state to zero or not.
    + The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.
    + +

    References arm_pid_instance_q15::A0, arm_pid_instance_q15::A1, arm_pid_instance_q15::Kd, arm_pid_instance_q15::Ki, arm_pid_instance_q15::Kp, and arm_pid_instance_q15::state.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void arm_pid_init_q31 (arm_pid_instance_q31 * S,
    int32_t resetStateFlag 
    )
    +
    +
    Parameters
    + + + +
    [in,out]*Spoints to an instance of the Q31 PID structure.
    [in]resetStateFlagflag to reset the state. 0 = no change in state 1 = reset the state.
    +
    +
    +
    Returns
    none.
    +
    Description:
    +
    The resetStateFlag specifies whether to set state to zero or not.
    + The function computes the structure fields: A0, A1 A2 using the proportional gain( Kp), integral gain( Ki) and derivative gain( Kd) also sets the state variables to all zeros.
    + +

    References arm_pid_instance_q31::A0, arm_pid_instance_q31::A1, arm_pid_instance_q31::A2, clip_q63_to_q31(), arm_pid_instance_q31::Kd, arm_pid_instance_q31::Ki, arm_pid_instance_q31::Kp, and arm_pid_instance_q31::state.

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + +
    static __INLINE q15_t arm_pid_q15 (arm_pid_instance_q15 * S,
    q15_t in 
    )
    +     		+static
    +
    +
    Parameters
    + + + +
    [in,out]Spoints to an instance of the Q15 PID Control structure
    [in]ininput sample to process
    +
    +
    +
    Returns
    out processed output sample.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the accumulator is saturated to yield a result in 1.15 format.
    + +

    References __SIMD32_CONST, arm_pid_instance_q15::A0, arm_pid_instance_q15::A1, and arm_pid_instance_q15::state.

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + +
    static __INLINE q31_t arm_pid_q31 (arm_pid_instance_q31 * S,
    q31_t in 
    )
    +     		+static
    +
    +
    Parameters
    + + + +
    [in,out]Spoints to an instance of the Q31 PID Control structure
    [in]ininput sample to process
    +
    +
    +
    Returns
    out processed output sample.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. Thus, if the accumulator result overflows it wraps around rather than clip. In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
    + +

    References arm_pid_instance_q31::A0, arm_pid_instance_q31::A1, arm_pid_instance_q31::A2, and arm_pid_instance_q31::state.

    + +
    +
    + +
    +
    + + + + + + + + +
    void arm_pid_reset_f32 (arm_pid_instance_f32 * S)
    +
    +
    Parameters
    + + +
    [in]*SInstance pointer of PID control data structure.
    +
    +
    +
    Returns
    none.
    +
    Description:
    The function resets the state buffer to zeros.
    + +

    References arm_pid_instance_f32::state.

    + +
    +
    + +
    +
    + + + + + + + + +
    void arm_pid_reset_q15 (arm_pid_instance_q15 * S)
    +
    +
    Parameters
    + + +
    [in]*SInstance pointer of PID control data structure.
    +
    +
    +
    Returns
    none.
    +
    Description:
    The function resets the state buffer to zeros.
    + +

    References arm_pid_instance_q15::state.

    + +
    +
    + +
    +
    + + + + + + + + +
    void arm_pid_reset_q31 (arm_pid_instance_q31 * S)
    +
    +
    Parameters
    + + +
    [in]*SInstance pointer of PID control data structure.
    +
    +
    +
    Returns
    none.
    +
    Description:
    The function resets the state buffer to zeros.
    + +

    References arm_pid_instance_q31::state.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___p_i_d.js b/Documentation/DSP/html/group___p_i_d.js new file mode 100644 index 0000000..3265e7f --- /dev/null +++ b/Documentation/DSP/html/group___p_i_d.js @@ -0,0 +1,12 @@ +var group___p_i_d = +[ + [ "arm_pid_f32", "group___p_i_d.html#gac5c79ed46abf2d72b8cf41fa6c708bda", null ], + [ "arm_pid_init_f32", "group___p_i_d.html#gae31536b19b82b93ed184fb1ab73cfcb3", null ], + [ "arm_pid_init_q15", "group___p_i_d.html#ga2cb1e3d3ebb167348fdabec74653d5c3", null ], + [ "arm_pid_init_q31", "group___p_i_d.html#gad9d88485234fa9460b1ce9e64989ac86", null ], + [ "arm_pid_q15", "group___p_i_d.html#ga084f646bbb20d55f225c3efafcf7fc1f", null ], + [ "arm_pid_q31", "group___p_i_d.html#ga5f6f941e7ae981728dd3a662f8f4ecd7", null ], + [ "arm_pid_reset_f32", "group___p_i_d.html#ga9ec860bcb6f8ca31205bf0f1b51ab723", null ], + [ "arm_pid_reset_q15", "group___p_i_d.html#ga408566dacb4fa6e0458b2c75672e525f", null ], + [ "arm_pid_reset_q31", "group___p_i_d.html#gaeecbacd3fb37c608ec25474d3a0dffa9", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___partial_conv.html b/Documentation/DSP/html/group___partial_conv.html new file mode 100644 index 0000000..ae7f369 --- /dev/null +++ b/Documentation/DSP/html/group___partial_conv.html @@ -0,0 +1,862 @@ + + + + + +Partial Convolution +CMSIS-DSP: Partial Convolution + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Partial Convolution
    +
    Filtering Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    arm_status arm_conv_partial_f32 (float32_t *pSrcA, uint32_t srcALen, float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of floating-point sequences.
     
    arm_status arm_conv_partial_fast_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_conv_partial_fast_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_conv_partial_fast_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.
     
    arm_status arm_conv_partial_opt_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q15 sequences.
     
    arm_status arm_conv_partial_opt_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints, q15_t *pScratch1, q15_t *pScratch2)
     Partial convolution of Q7 sequences.
     
    arm_status arm_conv_partial_q15 (q15_t *pSrcA, uint32_t srcALen, q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q15 sequences.
     
    arm_status arm_conv_partial_q31 (q31_t *pSrcA, uint32_t srcALen, q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q31 sequences.
     
    arm_status arm_conv_partial_q7 (q7_t *pSrcA, uint32_t srcALen, q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, uint32_t firstIndex, uint32_t numPoints)
     Partial convolution of Q7 sequences.
     
    +

    Description

    +

    Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated. Each function has two additional arguments. firstIndex specifies the starting index of the subset of output samples. numPoints is the number of output samples to compute. The function computes the output in the range [firstIndex, ..., firstIndex+numPoints-1]. The output array pDst contains numPoints values.

    +

    The allowable range of output indices is [0 srcALen+srcBLen-2]. If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR. Otherwise the functions return ARM_MATH_SUCCESS.

    +
    Note
    Refer arm_conv_f32() for details on fixed point behavior.
    +

    Fast Versions

    +
    Fast versions are supported for Q31 and Q15 of partial convolution. Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires the input signals should be scaled down to avoid intermediate overflows.
    +

    Opt Versions

    +
    Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_f32 (float32_t * pSrcA,
    uint32_t srcALen,
    float32_t * pSrcB,
    uint32_t srcBLen,
    float32_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_fast_opt_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints,
    q15_t * pScratch1,
    q15_t * pScratch2 
    )
    +
    +
    Parameters
    + + + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    [in]*pScratch1points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    [in]*pScratch2points to scratch buffer of size min(srcALen, srcBLen).
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +

    See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.

    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
    + +

    References __SIMD32, _SIMD32_OFFSET, arm_copy_q15(), arm_fill_q15(), ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_fast_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +

    See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.

    + +

    References __SIMD32, _SIMD32_OFFSET, ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_fast_q31 (q31_t * pSrcA,
    uint32_t srcALen,
    q31_t * pSrcB,
    uint32_t srcBLen,
    q31_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +
    See arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
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    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_opt_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints,
    q15_t * pScratch1,
    q15_t * pScratch2 
    )
    +
    +
    Parameters
    + + + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    [in]*pScratch1points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    [in]*pScratch2points to scratch buffer of size min(srcALen, srcBLen).
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, state buffers should be aligned by 32-bit
    +

    Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

    + +

    References __SIMD32, _SIMD32_OFFSET, arm_copy_q15(), arm_fill_q15(), ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_opt_q7 (q7_t * pSrcA,
    uint32_t srcALen,
    q7_t * pSrcB,
    uint32_t srcBLen,
    q7_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints,
    q15_t * pScratch1,
    q15_t * pScratch2 
    )
    +
    +
    Parameters
    + + + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    [in]*pScratch1points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    [in]*pScratch2points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +
    Restrictions
    If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit
    + +

    References __PACKq7, __SIMD32, _SIMD32_OFFSET, arm_fill_q15(), ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
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    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_q15 (q15_t * pSrcA,
    uint32_t srcALen,
    q15_t * pSrcB,
    uint32_t srcBLen,
    q15_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +

    Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.

    +
    Refer the function arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
    + +

    References __SIMD32, _SIMD32_OFFSET, ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
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    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_q31 (q31_t * pSrcA,
    uint32_t srcALen,
    q31_t * pSrcB,
    uint32_t srcBLen,
    q31_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +

    See arm_conv_partial_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.

    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

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    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    arm_status arm_conv_partial_q7 (q7_t * pSrcA,
    uint32_t srcALen,
    q7_t * pSrcB,
    uint32_t srcBLen,
    q7_t * pDst,
    uint32_t firstIndex,
    uint32_t numPoints 
    )
    +
    +
    Parameters
    + + + + + + + + +
    [in]*pSrcApoints to the first input sequence.
    [in]srcALenlength of the first input sequence.
    [in]*pSrcBpoints to the second input sequence.
    [in]srcBLenlength of the second input sequence.
    [out]*pDstpoints to the location where the output result is written.
    [in]firstIndexis the first output sample to start with.
    [in]numPointsis the number of output points to be computed.
    +
    +
    +
    Returns
    Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    +
    Refer the function arm_conv_partial_opt_q7() for a faster implementation of this function.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, srcALen, srcBLen, and status.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___partial_conv.js b/Documentation/DSP/html/group___partial_conv.js new file mode 100644 index 0000000..c8d14b0 --- /dev/null +++ b/Documentation/DSP/html/group___partial_conv.js @@ -0,0 +1,12 @@ +var group___partial_conv = +[ + [ "arm_conv_partial_f32", "group___partial_conv.html#ga16d10f32072cd79fc5fb6e785df45f5e", null ], + [ "arm_conv_partial_fast_opt_q15", "group___partial_conv.html#ga3de9c4ddcc7886de25b70d875099a8d9", null ], + [ "arm_conv_partial_fast_q15", "group___partial_conv.html#ga1e4d43385cb62262a78c6752fe1fafb2", null ], + [ "arm_conv_partial_fast_q31", "group___partial_conv.html#ga10c5294cda8c4985386f4e3944be7650", null ], + [ "arm_conv_partial_opt_q15", "group___partial_conv.html#ga834b23b4ade8682beeb55778399101f8", null ], + [ "arm_conv_partial_opt_q7", "group___partial_conv.html#ga3707e16af1435b215840006a7ab0c98f", null ], + [ "arm_conv_partial_q15", "group___partial_conv.html#ga209a2a913a0c5e5679c5988da8f46b03", null ], + [ "arm_conv_partial_q31", "group___partial_conv.html#ga78e73a5f02d103168a09821fb461e77a", null ], + [ "arm_conv_partial_q7", "group___partial_conv.html#ga8567259fe18396dd972242c41741ebf4", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___r_m_s.html b/Documentation/DSP/html/group___r_m_s.html new file mode 100644 index 0000000..b7add6c --- /dev/null +++ b/Documentation/DSP/html/group___r_m_s.html @@ -0,0 +1,282 @@ + + + + + +Root mean square (RMS) +CMSIS-DSP: Root mean square (RMS) + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    + +
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    + +
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    +
    +Functions
    +
    +
    Root mean square (RMS)
    +
    Statistics Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Root Mean Square of the elements of a floating-point vector.
     
    void arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Root Mean Square of the elements of a Q15 vector.
     
    void arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Root Mean Square of the elements of a Q31 vector.
     
    +

    Description

    +

    Calculates the Root Mean Sqaure of the elements in the input vector. The underlying algorithm is used:

    +
        
+        Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
+

    There are separate functions for floating point, Q31, and Q15 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_rms_f32 (float32_t * pSrc,
    uint32_t blockSize,
    float32_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultrms value returned here
    +
    +
    +
    Returns
    none.
    + +

    References arm_sqrt_f32(), and blockSize.

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    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_rms_q15 (q15_t * pSrc,
    uint32_t blockSize,
    q15_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultrms value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.
    + +

    References __SIMD32, arm_sqrt_q15(), and blockSize.

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    void arm_rms_q31 (q31_t * pSrc,
    uint32_t blockSize,
    q31_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultrms value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows, it wraps around and distorts the result. In order to avoid overflows completely, the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
    + +

    References arm_sqrt_q31(), blockSize, and clip_q63_to_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___r_m_s.js b/Documentation/DSP/html/group___r_m_s.js new file mode 100644 index 0000000..1fa2dd7 --- /dev/null +++ b/Documentation/DSP/html/group___r_m_s.js @@ -0,0 +1,6 @@ +var group___r_m_s = +[ + [ "arm_rms_f32", "group___r_m_s.html#ga0e3ab1b57da32d45388d1fa90d7fd88c", null ], + [ "arm_rms_q15", "group___r_m_s.html#gaf5b836b72dda9e5dfbbd17c7906fd13f", null ], + [ "arm_rms_q31", "group___r_m_s.html#gae33015fda23fc44e7ead5e5ed7e8d314", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___radix8___c_f_f_t___c_i_f_f_t.html b/Documentation/DSP/html/group___radix8___c_f_f_t___c_i_f_f_t.html new file mode 100644 index 0000000..b803d9e --- /dev/null +++ b/Documentation/DSP/html/group___radix8___c_f_f_t___c_i_f_f_t.html @@ -0,0 +1,171 @@ + + + + + +Radix-8 Complex FFT Functions +CMSIS-DSP: Radix-8 Complex FFT Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    + +
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    + +
    + +
    +
    +
    Radix-8 Complex FFT Functions
    +
    Transform Functions
    +
    +
    Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT). Computational complexity of CFFT reduces drastically when compared to DFT.
    +
    This set of functions implements CFFT/CIFFT for floating-point data types. The functions operates on in-place buffer which uses same buffer for input and output. Complex input is stored in input buffer in an interleaved fashion.
    +
    The functions operate on blocks of input and output data and each call to the function processes 2*fftLen samples through the transform. pSrc points to In-place arrays containing 2*fftLen values.
    +
    The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below. 
     {real[0], imag[0], real[1], imag[1],..}
    +
    Lengths supported by the transform:
    +
    Internally, the function utilize a Radix-8 decimation in frequency(DIF) algorithm and the size of the FFT supported are of the lengths [ 64, 512, 4096].
    +
    Algorithm:
    +

    Complex Fast Fourier Transform:

    +
    Input real and imaginary data: 
        
+x(n) = xa + j * ya    
+x(n+N/4 ) = xb + j * yb    
+x(n+N/2 ) = xc + j * yc    
+x(n+3N 4) = xd + j * yd    
+
    where N is length of FFT
    +
    Output real and imaginary data: 
        
+X(4r) = xa'+ j * ya'    
+X(4r+1) = xb'+ j * yb'    
+X(4r+2) = xc'+ j * yc'    
+X(4r+3) = xd'+ j * yd'    
+
    +
    Twiddle factors for Radix-8 FFT: 
        
+Wn = co1 + j * (- si1)    
+W2n = co2 + j * (- si2)    
+W3n = co3 + j * (- si3)    
+
    +
    +CFFT.gif +
    +Radix-8 Decimation-in Frequency Complex Fast Fourier Transform
    +
    +
    Output from Radix-8 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.
    +
    Butterfly CFFT equations: 
        
+xa' = xa + xb + xc + xd    
+ya' = ya + yb + yc + yd    
+xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
+yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
+xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
+yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
+xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
+yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
+
    +
    where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT); bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order); pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table. twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table; pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table. onebyfftLen value of 1/fftLen to calculate CIFFT;
    +
    Fixed-Point Behavior
    Care must be taken when using the fixed-point versions of the CFFT/CIFFT function. Refer to the function specific documentation below for usage guidelines.
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___real_f_f_t.html b/Documentation/DSP/html/group___real_f_f_t.html new file mode 100644 index 0000000..15611b2 --- /dev/null +++ b/Documentation/DSP/html/group___real_f_f_t.html @@ -0,0 +1,773 @@ + + + + + +RealFFT +CMSIS-DSP: RealFFT + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions | +Variables
    +
    +
    RealFFT
    +
    Transform Functions
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void arm_rfft_f32 (const arm_rfft_instance_f32 *S, float32_t *pSrc, float32_t *pDst)
     Processing function for the floating-point RFFT/RIFFT.
     
    void arm_rfft_fast_f32 (arm_rfft_fast_instance_f32 *S, float32_t *p, float32_t *pOut, uint8_t ifftFlag)
     Processing function for the floating-point real FFT.
     
    arm_status arm_rfft_fast_init_f32 (arm_rfft_fast_instance_f32 *S, uint16_t fftLen)
     Initialization function for the floating-point real FFT.
     
    arm_status arm_rfft_init_f32 (arm_rfft_instance_f32 *S, arm_cfft_radix4_instance_f32 *S_CFFT, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the floating-point RFFT/RIFFT.
     
    arm_status arm_rfft_init_q15 (arm_rfft_instance_q15 *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the Q15 RFFT/RIFFT.
     
    arm_status arm_rfft_init_q31 (arm_rfft_instance_q31 *S, uint32_t fftLenReal, uint32_t ifftFlagR, uint32_t bitReverseFlag)
     Initialization function for the Q31 RFFT/RIFFT.
     
    void arm_rfft_q15 (const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst)
     Processing function for the Q15 RFFT/RIFFT.
     
    void arm_rfft_q31 (const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst)
     Processing function for the Q31 RFFT/RIFFT.
     
    + + + + + + + + + + + + + +

    +Variables

    static const float32_t realCoefA [8192]
     
    static const float32_t realCoefB [8192]
     
    static const q15_t ALIGN4 realCoefAQ15 [8192]
     
    static const q15_t ALIGN4 realCoefBQ15 [8192]
     
    static const q31_t realCoefAQ31 [8192]
     
    static const q31_t realCoefBQ31 [8192]
     
    +

    Description

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_rfft_f32 (const arm_rfft_instance_f32 * S,
    float32_t * pSrc,
    float32_t * pDst 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superceded by arm_rfft_fast_f32 and will be removed in the future.
    +
    Parameters
    + + + + +
    [in]*Spoints to an instance of the floating-point RFFT/RIFFT structure.
    [in]*pSrcpoints to the input buffer.
    [out]*pDstpoints to the output buffer.
    +
    +
    +
    Returns
    none.
    + +

    References arm_bitreversal_f32(), arm_radix4_butterfly_f32(), arm_radix4_butterfly_inverse_f32(), arm_split_rfft_f32(), arm_split_rifft_f32(), arm_rfft_instance_f32::bitReverseFlagR, arm_cfft_radix4_instance_f32::bitRevFactor, arm_cfft_radix4_instance_f32::fftLen, arm_rfft_instance_f32::fftLenBy2, arm_rfft_instance_f32::ifftFlagR, arm_cfft_radix4_instance_f32::onebyfftLen, arm_cfft_radix4_instance_f32::pBitRevTable, arm_rfft_instance_f32::pCfft, arm_cfft_radix4_instance_f32::pTwiddle, arm_rfft_instance_f32::pTwiddleAReal, arm_rfft_instance_f32::pTwiddleBReal, arm_cfft_radix4_instance_f32::twidCoefModifier, and arm_rfft_instance_f32::twidCoefRModifier.

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    void arm_rfft_fast_f32 (arm_rfft_fast_instance_f32 * S,
    float32_t * p,
    float32_t * pOut,
    uint8_t ifftFlag 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*Spoints to an arm_rfft_fast_instance_f32 structure.
    [in]*ppoints to the input buffer.
    [in]*pOutpoints to the output buffer.
    [in]ifftFlagRFFT if flag is 0, RIFFT if flag is 1
    +
    +
    +
    Returns
    none.
    + +

    References arm_cfft_f32(), arm_cfft_instance_f32::fftLen, arm_rfft_fast_instance_f32::fftLenRFFT, merge_rfft_f32(), arm_rfft_fast_instance_f32::Sint, and stage_rfft_f32().

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    arm_status arm_rfft_fast_init_f32 (arm_rfft_fast_instance_f32 * S,
    uint16_t fftLen 
    )
    +
    +
    Parameters
    + + + +
    [in,out]*Spoints to an arm_rfft_fast_instance_f32 structure.
    [in]fftLenlength of the Real Sequence.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
    +
    Description:
    +
    The parameter fftLen Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
    +
    This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
    + +

    References ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH, armBitRevIndexTable128, armBitRevIndexTable16, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH, armBitRevIndexTable256, armBitRevIndexTable32, armBitRevIndexTable512, armBitRevIndexTable64, ARMBITREVINDEXTABLE_128_TABLE_LENGTH, ARMBITREVINDEXTABLE_256_TABLE_LENGTH, ARMBITREVINDEXTABLE_512_TABLE_LENGTH, ARMBITREVINDEXTABLE__16_TABLE_LENGTH, ARMBITREVINDEXTABLE__32_TABLE_LENGTH, ARMBITREVINDEXTABLE__64_TABLE_LENGTH, arm_cfft_instance_f32::bitRevLength, arm_cfft_instance_f32::fftLen, arm_rfft_fast_instance_f32::fftLenRFFT, arm_cfft_instance_f32::pBitRevTable, arm_cfft_instance_f32::pTwiddle, arm_rfft_fast_instance_f32::pTwiddleRFFT, arm_rfft_fast_instance_f32::Sint, status, twiddleCoef_1024, twiddleCoef_128, twiddleCoef_16, twiddleCoef_2048, twiddleCoef_256, twiddleCoef_32, twiddleCoef_512, twiddleCoef_64, twiddleCoef_rfft_1024, twiddleCoef_rfft_128, twiddleCoef_rfft_2048, twiddleCoef_rfft_256, twiddleCoef_rfft_32, twiddleCoef_rfft_4096, twiddleCoef_rfft_512, and twiddleCoef_rfft_64.

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    arm_status arm_rfft_init_f32 (arm_rfft_instance_f32 * S,
    arm_cfft_radix4_instance_f32 * S_CFFT,
    uint32_t fftLenReal,
    uint32_t ifftFlagR,
    uint32_t bitReverseFlag 
    )
    +
    +
    Deprecated:
    Do not use this function. It has been superceded by arm_rfft_fast_init_f32 and will be removed in the future.
    +
    Parameters
    + + + + + + +
    [in,out]*Spoints to an instance of the floating-point RFFT/RIFFT structure.
    [in,out]*S_CFFTpoints to an instance of the floating-point CFFT/CIFFT structure.
    [in]fftLenReallength of the FFT.
    [in]ifftFlagRflag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
    +
    Description:
    +
    The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.
    +
    The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    This function also initializes Twiddle factor table.
    + +

    References arm_cfft_radix4_init_f32(), ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, arm_rfft_instance_f32::bitReverseFlagR, arm_rfft_instance_f32::fftLenBy2, arm_rfft_instance_f32::fftLenReal, arm_rfft_instance_f32::ifftFlagR, arm_rfft_instance_f32::pCfft, arm_rfft_instance_f32::pTwiddleAReal, arm_rfft_instance_f32::pTwiddleBReal, realCoefA, realCoefB, status, and arm_rfft_instance_f32::twidCoefRModifier.

    + +

    Referenced by arm_dct4_init_f32().

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    arm_status arm_rfft_init_q15 (arm_rfft_instance_q15 * S,
    uint32_t fftLenReal,
    uint32_t ifftFlagR,
    uint32_t bitReverseFlag 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the Q15 RFFT/RIFFT structure.
    [in]fftLenReallength of the FFT.
    [in]ifftFlagRflag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
    +
    Description:
    +
    The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
    +
    The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    This function also initializes Twiddle factor table.
    + +

    References arm_cfft_sR_q15_len1024, arm_cfft_sR_q15_len128, arm_cfft_sR_q15_len16, arm_cfft_sR_q15_len2048, arm_cfft_sR_q15_len256, arm_cfft_sR_q15_len32, arm_cfft_sR_q15_len4096, arm_cfft_sR_q15_len512, arm_cfft_sR_q15_len64, ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, arm_rfft_instance_q15::bitReverseFlagR, arm_rfft_instance_q15::fftLenReal, arm_rfft_instance_q15::ifftFlagR, arm_rfft_instance_q15::pCfft, arm_rfft_instance_q15::pTwiddleAReal, arm_rfft_instance_q15::pTwiddleBReal, realCoefAQ15, realCoefBQ15, status, and arm_rfft_instance_q15::twidCoefRModifier.

    + +

    Referenced by arm_dct4_init_q15().

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    arm_status arm_rfft_init_q31 (arm_rfft_instance_q31 * S,
    uint32_t fftLenReal,
    uint32_t ifftFlagR,
    uint32_t bitReverseFlag 
    )
    +
    +
    Parameters
    + + + + + +
    [in,out]*Spoints to an instance of the Q31 RFFT/RIFFT structure.
    [in]fftLenReallength of the FFT.
    [in]ifftFlagRflag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
    [in]bitReverseFlagflag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
    +
    Description:
    +
    The parameter fftLenReal Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
    +
    The parameter ifftFlagR controls whether a forward or inverse transform is computed. Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
    +
    The parameter bitReverseFlag controls whether output is in normal order or bit reversed order. Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
    +
    7
    This function also initializes Twiddle factor table.
    + +

    References arm_cfft_sR_q31_len1024, arm_cfft_sR_q31_len128, arm_cfft_sR_q31_len16, arm_cfft_sR_q31_len2048, arm_cfft_sR_q31_len256, arm_cfft_sR_q31_len32, arm_cfft_sR_q31_len4096, arm_cfft_sR_q31_len512, arm_cfft_sR_q31_len64, ARM_MATH_ARGUMENT_ERROR, ARM_MATH_SUCCESS, arm_rfft_instance_q31::bitReverseFlagR, arm_rfft_instance_q31::fftLenReal, arm_rfft_instance_q31::ifftFlagR, arm_rfft_instance_q31::pCfft, arm_rfft_instance_q31::pTwiddleAReal, arm_rfft_instance_q31::pTwiddleBReal, realCoefAQ31, realCoefBQ31, status, and arm_rfft_instance_q31::twidCoefRModifier.

    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_rfft_q15 (const arm_rfft_instance_q15 * S,
    q15_t * pSrc,
    q15_t * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*Spoints to an instance of the Q15 RFFT/RIFFT structure.
    [in]*pSrcpoints to the input buffer.
    [out]*pDstpoints to the output buffer.
    +
    +
    +
    Returns
    none.
    +
    Input an output formats:
    +
    Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
    +
    +RFFTQ15.gif +
    +Input and Output Formats for Q15 RFFT
    +
    +
    +RIFFTQ15.gif +
    +Input and Output Formats for Q15 RIFFT
    +
    + +

    References arm_cfft_q15(), arm_split_rfft_q15(), arm_split_rifft_q15(), arm_rfft_instance_q15::bitReverseFlagR, arm_rfft_instance_q15::fftLenReal, arm_rfft_instance_q15::ifftFlagR, arm_rfft_instance_q15::pCfft, arm_rfft_instance_q15::pTwiddleAReal, arm_rfft_instance_q15::pTwiddleBReal, and arm_rfft_instance_q15::twidCoefRModifier.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_rfft_q31 (const arm_rfft_instance_q31 * S,
    q31_t * pSrc,
    q31_t * pDst 
    )
    +
    +
    Parameters
    + + + + +
    [in]*Spoints to an instance of the Q31 RFFT/RIFFT structure.
    [in]*pSrcpoints to the input buffer.
    [out]*pDstpoints to the output buffer.
    +
    +
    +
    Returns
    none.
    +
    Input an output formats:
    +
    Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process. Hence the output format is different for different RFFT sizes. The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
    +
    +RFFTQ31.gif +
    +Input and Output Formats for Q31 RFFT
    +
    +
    +RIFFTQ31.gif +
    +Input and Output Formats for Q31 RIFFT
    +
    + +

    References arm_cfft_q31(), arm_split_rfft_q31(), arm_split_rifft_q31(), arm_rfft_instance_q31::bitReverseFlagR, arm_rfft_instance_q31::fftLenReal, arm_rfft_instance_q31::ifftFlagR, arm_rfft_instance_q31::pCfft, arm_rfft_instance_q31::pTwiddleAReal, arm_rfft_instance_q31::pTwiddleBReal, and arm_rfft_instance_q31::twidCoefRModifier.

    + +

    Referenced by arm_dct4_q31().

    + +
    +
    +

    Variable Documentation

    + +
    +
    + + + + + +
    + + + + +
    const float32_t realCoefA[8192]
    +     		+static
    +
    +
    Generation of realCoefA array:
    +
    n = 4096 
    for (i = 0; i < n; i++)    
+ {    
+   pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
+   pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
+ }
    + +

    Referenced by arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 realCoefAQ15[8192]
    +     		+static
    +
    +
    Generation fixed-point realCoefAQ15 array in Q15 format:
    +
    n = 4096 
    for (i = 0; i < n; i++)    
+ {    
+   pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
+   pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
+ }
    +
    Convert to fixed point Q15 format round(pATable[i] * pow(2, 15))
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t realCoefAQ31[8192]
    +     		+static
    +
    +
    Generation fixed-point realCoefAQ31 array in Q31 format:
    +
    n = 4096 
    for (i = 0; i < n; i++)    
+{    
+   pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
+   pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
+}
    +
    Convert to fixed point Q31 format round(pATable[i] * pow(2, 31))
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const float32_t realCoefB[8192]
    +     		+static
    +
    +
    Generation of realCoefB array:
    +
    n = 4096 
    for (i = 0; i < n; i++)    
+{    
+   pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
+   pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
+ }
    + +

    Referenced by arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q15_t ALIGN4 realCoefBQ15[8192]
    +     		+static
    +
    +
    Generation of real_CoefB array:
    +
    n = 4096 
    for (i = 0; i < n; i++)    
+ {    
+   pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
+   pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
+ }
    +
    Convert to fixed point Q15 format round(pBTable[i] * pow(2, 15))
    + +

    Referenced by arm_rfft_init_q15().

    + +
    +
    + +
    +
    + + + + + +
    + + + + +
    const q31_t realCoefBQ31[8192]
    +     		+static
    +
    +
    Generation of realCoefBQ31 array:
    +
    n = 4096 
    for (i = 0; i < n; i++)    
+{    
+   pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
+   pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
+}
    +
    Convert to fixed point Q31 format round(pBTable[i] * pow(2, 31))
    + +

    Referenced by arm_rfft_init_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___real_f_f_t.js b/Documentation/DSP/html/group___real_f_f_t.js new file mode 100644 index 0000000..7f2aa94 --- /dev/null +++ b/Documentation/DSP/html/group___real_f_f_t.js @@ -0,0 +1,17 @@ +var group___real_f_f_t = +[ + [ "arm_rfft_f32", "group___real_f_f_t.html#ga3df1766d230532bc068fc4ed69d0fcdc", null ], + [ "arm_rfft_fast_f32", "group___real_f_f_t.html#ga180d8b764d59cbb85d37a2d5f7cd9799", null ], + [ "arm_rfft_fast_init_f32", "group___real_f_f_t.html#gac5fceb172551e7c11eb4d0e17ef15aa3", null ], + [ "arm_rfft_init_f32", "group___real_f_f_t.html#ga10717ee326bf50832ef1c25b85a23068", null ], + [ "arm_rfft_init_q15", "group___real_f_f_t.html#ga053450cc600a55410ba5b5605e96245d", null ], + [ "arm_rfft_init_q31", "group___real_f_f_t.html#ga5abde938abbe72e95c5bab080eb33c45", null ], + [ "arm_rfft_q15", "group___real_f_f_t.html#ga00e615f5db21736ad5b27fb6146f3fc5", null ], + [ "arm_rfft_q31", "group___real_f_f_t.html#gabaeab5646aeea9844e6d42ca8c73fe3a", null ], + [ "realCoefA", "group___real_f_f_t.html#ga8b1ad947c470596674fa3364e16045c6", null ], + [ "realCoefAQ15", "group___real_f_f_t.html#ga11e84d0ee257a547f749b37dd0078d36", null ], + [ "realCoefAQ31", "group___real_f_f_t.html#gaf1592a6cf0504675205074a43c3728a2", null ], + [ "realCoefB", "group___real_f_f_t.html#gac52f98b52a1f03bfac8b57a67ba07397", null ], + [ "realCoefBQ15", "group___real_f_f_t.html#gac871666f018b70938b2b98017628cb97", null ], + [ "realCoefBQ31", "group___real_f_f_t.html#ga1eb5745728a61c3715755f5d69a4a960", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___s_q_r_t.html b/Documentation/DSP/html/group___s_q_r_t.html new file mode 100644 index 0000000..14eb154 --- /dev/null +++ b/Documentation/DSP/html/group___s_q_r_t.html @@ -0,0 +1,290 @@ + + + + + +Square Root +CMSIS-DSP: Square Root + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Square Root
    +
    Fast Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    arm_status arm_sqrt_q15 (q15_t in, q15_t *pOut)
     Q15 square root function.
     
    arm_status arm_sqrt_q31 (q31_t in, q31_t *pOut)
     Q31 square root function.
     
    static __INLINE arm_status arm_sqrt_f32 (float32_t in, float32_t *pOut)
     Floating-point square root function.
     
    +

    Description

    +

    Computes the square root of a number. There are separate functions for Q15, Q31, and floating-point data types. The square root function is computed using the Newton-Raphson algorithm. This is an iterative algorithm of the form:

    +
    +     x1 = x0 - f(x0)/f'(x0)
+

    where x1 is the current estimate, x0 is the previous estimate, and f'(x0) is the derivative of f() evaluated at x0. For the square root function, the algorithm reduces to:

    +
    +    x0 = in/2                         [initial guess]
+    x1 = 1/2 * ( x0 + in / x0)        [each iteration]
+

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + +
    static __INLINE arm_status arm_sqrt_f32 (float32_t in,
    float32_t * pOut 
    )
    +     		+static
    +
    +
    Parameters
    + + + +
    [in]ininput value.
    [out]pOutsquare root of input value.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.
    + +

    References ARM_MATH_ARGUMENT_ERROR, and ARM_MATH_SUCCESS.

    + +

    Referenced by arm_cmplx_mag_f32(), arm_rms_f32(), and arm_std_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status arm_sqrt_q15 (q15_t in,
    q15_t * pOut 
    )
    +
    +
    Parameters
    + + + +
    [in]ininput value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
    [out]*pOutsquare root of input value.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if the input value is positive and ARM_MATH_ARGUMENT_ERROR if the input is negative. For negative inputs, the function returns *pOut = 0.
    +
    Parameters
    + + + +
    [in]ininput value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
    [out]pOutsquare root of input value.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.
    + +

    References ARM_MATH_ARGUMENT_ERROR, and ARM_MATH_SUCCESS.

    + +

    Referenced by arm_cmplx_mag_q15(), arm_rms_q15(), and arm_std_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + +
    arm_status arm_sqrt_q31 (q31_t in,
    q31_t * pOut 
    )
    +
    +
    Parameters
    + + + +
    [in]ininput value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
    [out]*pOutsquare root of input value.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if the input value is positive and ARM_MATH_ARGUMENT_ERROR if the input is negative. For negative inputs, the function returns *pOut = 0.
    +
    Parameters
    + + + +
    [in]ininput value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
    [out]pOutsquare root of input value.
    +
    +
    +
    Returns
    The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if in is negative value and returns zero output for negative values.
    + +

    References ARM_MATH_ARGUMENT_ERROR, and ARM_MATH_SUCCESS.

    + +

    Referenced by arm_cmplx_mag_q31(), arm_rms_q31(), and arm_std_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___s_q_r_t.js b/Documentation/DSP/html/group___s_q_r_t.js new file mode 100644 index 0000000..912d1d7 --- /dev/null +++ b/Documentation/DSP/html/group___s_q_r_t.js @@ -0,0 +1,6 @@ +var group___s_q_r_t = +[ + [ "arm_sqrt_f32", "group___s_q_r_t.html#ga56a40d1cf842b0b45267df6761975da0", null ], + [ "arm_sqrt_q15", "group___s_q_r_t.html#ga5abe5ca724f3e15849662b03752c1238", null ], + [ "arm_sqrt_q31", "group___s_q_r_t.html#ga119e25831e141d734d7ef10636670058", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___s_t_d.html b/Documentation/DSP/html/group___s_t_d.html new file mode 100644 index 0000000..12d38bb --- /dev/null +++ b/Documentation/DSP/html/group___s_t_d.html @@ -0,0 +1,285 @@ + + + + + +Standard deviation +CMSIS-DSP: Standard deviation + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Standard deviation
    +
    Statistics Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_std_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Standard deviation of the elements of a floating-point vector.
     
    void arm_std_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Standard deviation of the elements of a Q15 vector.
     
    void arm_std_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Standard deviation of the elements of a Q31 vector.
     
    +

    Description

    +

    Calculates the standard deviation of the elements in the input vector. The underlying algorithm is used:

    +
        
+        Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))
            where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
                            sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
+

    There are separate functions for floating point, Q31, and Q15 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_std_f32 (float32_t * pSrc,
    uint32_t blockSize,
    float32_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultstandard deviation value returned here
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    References arm_sqrt_f32(), blockSize, mean, and var.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_std_q15 (q15_t * pSrc,
    uint32_t blockSize,
    q15_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultstandard deviation value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.
    + +

    References __SIMD32, arm_sqrt_q15(), and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_std_q31 (q31_t * pSrc,
    uint32_t blockSize,
    q31_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultstandard deviation value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
    + +

    References arm_sqrt_q31(), and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___s_t_d.js b/Documentation/DSP/html/group___s_t_d.js new file mode 100644 index 0000000..9375c07 --- /dev/null +++ b/Documentation/DSP/html/group___s_t_d.js @@ -0,0 +1,6 @@ +var group___s_t_d = +[ + [ "arm_std_f32", "group___s_t_d.html#ga4969b5b5f3d001377bc401a3ee99dfc2", null ], + [ "arm_std_q15", "group___s_t_d.html#gaf9d27afa9928ff28a63cd98ea9218a72", null ], + [ "arm_std_q31", "group___s_t_d.html#ga39495e74f96116178be085c9dc7742f5", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___signal_convergence.html b/Documentation/DSP/html/group___signal_convergence.html new file mode 100644 index 0000000..5efb226 --- /dev/null +++ b/Documentation/DSP/html/group___signal_convergence.html @@ -0,0 +1,163 @@ + + + + + +Signal Convergence Example +CMSIS-DSP: Signal Convergence Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Signal Convergence Example
    +
    Examples
    +
    +
    Description:
    +
    Demonstrates the ability of an adaptive filter to "learn" the transfer function of a FIR lowpass filter using the Normalized LMS Filter, Finite Impulse Response (FIR) Filter, and Basic Math Functions.
    +
    Algorithm:
    +
    The figure below illustrates the signal flow in this example. Uniformly distributed white noise is passed through an FIR lowpass filter. The output of the FIR filter serves as the reference input of the adaptive filter (normalized LMS filter). The white noise is input to the adaptive filter. The adaptive filter learns the transfer function of the FIR filter. The filter outputs two signals: (1) the output of the internal adaptive FIR filter, and (2) the error signal which is the difference between the adaptive filter and the reference output of the FIR filter. Over time as the adaptive filter learns the transfer function of the FIR filter, the first output approaches the reference output of the FIR filter, and the error signal approaches zero.
    +
    The adaptive filter converges properly even if the input signal has a large dynamic range (i.e., varies from small to large values). The coefficients of the adaptive filter are initially zero, and then converge over 1536 samples. The internal function test_signal_converge() implements the stopping condition. The function checks if all of the values of the error signal have a magnitude below a threshold DELTA.
    +
    Block Diagram:
    +
    +SignalFlow.gif +
    +
    +
    Variables Description:
    +
      +
    • testInput_f32 points to the input data
      • +
    • firStateF32 points to FIR state buffer
      • +
    • lmsStateF32 points to Normalised Least mean square FIR filter state buffer
      • +
    • FIRCoeff_f32 points to coefficient buffer
      • +
    • lmsNormCoeff_f32 points to Normalised Least mean square FIR filter coefficient buffer
      • +
    • wire1, wir2, wire3 temporary buffers
      • +
    • errOutput, err_signal temporary error buffers
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_signal_converge_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___sin_cos.html b/Documentation/DSP/html/group___sin_cos.html new file mode 100644 index 0000000..fba5c91 --- /dev/null +++ b/Documentation/DSP/html/group___sin_cos.html @@ -0,0 +1,240 @@ + + + + + +Sine Cosine +CMSIS-DSP: Sine Cosine + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Sine Cosine
    +
    Controller Functions
    +
    + + + + + + + + +

    +Functions

    void arm_sin_cos_f32 (float32_t theta, float32_t *pSinVal, float32_t *pCosVal)
     Floating-point sin_cos function.
     
    void arm_sin_cos_q31 (q31_t theta, q31_t *pSinVal, q31_t *pCosVal)
     Q31 sin_cos function.
     
    +

    Description

    +

    Computes the trigonometric sine and cosine values using a combination of table lookup and linear interpolation. There are separate functions for Q31 and floating-point data types. The input to the floating-point version is in degrees while the fixed-point Q31 have a scaled input with the range [-1 0.9999] mapping to [-180 +180] degrees.

    +

    The floating point function also allows values that are out of the usual range. When this happens, the function will take extra time to adjust the input value to the range of [-180 180].

    +

    The implementation is based on table lookup using 360 values together with linear interpolation. The steps used are:

    +
      +
    1. Calculation of the nearest integer table index.
      2. +
    2. Compute the fractional portion (fract) of the input.
      3. +
    3. Fetch the value corresponding to index from sine table to y0 and also value from index+1 to y1.
      4. +
    4. Sine value is computed as *psinVal = y0 + (fract * (y1 - y0)).
      5. +
    5. Fetch the value corresponding to index from cosine table to y0 and also value from index+1 to y1.
      6. +
    6. Cosine value is computed as *pcosVal = y0 + (fract * (y1 - y0)).
      7. +
    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_sin_cos_f32 (float32_t theta,
    float32_t * pSinVal,
    float32_t * pCosVal 
    )
    +
    +
    Parameters
    + + + + +
    [in]thetainput value in degrees
    [out]*pSinValpoints to the processed sine output.
    [out]*pCosValpoints to the processed cos output.
    +
    +
    +
    Returns
    none.
    + +

    References FAST_MATH_TABLE_SIZE, and sinTable_f32.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_sin_cos_q31 (q31_t theta,
    q31_t * pSinVal,
    q31_t * pCosVal 
    )
    +
    +
    Parameters
    + + + + +
    [in]thetascaled input value in degrees
    [out]*pSinValpoints to the processed sine output.
    [out]*pCosValpoints to the processed cosine output.
    +
    +
    +
    Returns
    none.
    +

    The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].

    + +

    References clip_q63_to_q31(), CONTROLLER_Q31_SHIFT, and sinTable_q31.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___sin_cos.js b/Documentation/DSP/html/group___sin_cos.js new file mode 100644 index 0000000..c2af45c --- /dev/null +++ b/Documentation/DSP/html/group___sin_cos.js @@ -0,0 +1,5 @@ +var group___sin_cos = +[ + [ "arm_sin_cos_f32", "group___sin_cos.html#ga4420d45c37d58c310ef9ae1b5fe58020", null ], + [ "arm_sin_cos_q31", "group___sin_cos.html#gae9e4ddebff9d4eb5d0a093e28e0bc504", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group___sin_cos_example.html b/Documentation/DSP/html/group___sin_cos_example.html new file mode 100644 index 0000000..2bc6c53 --- /dev/null +++ b/Documentation/DSP/html/group___sin_cos_example.html @@ -0,0 +1,152 @@ + + + + + +SineCosine Example +CMSIS-DSP: SineCosine Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    SineCosine Example
    +
    Examples
    +
    +
    Description:
    +
    Demonstrates the Pythagorean trignometric identity with the use of Cosine, Sine, Vector Multiplication, and Vector Addition functions.
    +
    Algorithm:
    +
    Mathematically, the Pythagorean trignometric identity is defined by the following equation: 
    sin(x) * sin(x) + cos(x) * cos(x) = 1
    where x is the angle in radians.
    +
    Block Diagram:
    +
    +sinCos.gif +
    +
    +
    Variables Description:
    +
      +
    • testInput_f32 array of input angle in radians
      • +
    • testOutput stores sum of the squares of sine and cosine values of input angle
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_sin_cos_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group___variance_example.html b/Documentation/DSP/html/group___variance_example.html new file mode 100644 index 0000000..f10bf98 --- /dev/null +++ b/Documentation/DSP/html/group___variance_example.html @@ -0,0 +1,157 @@ + + + + + +Variance Example +CMSIS-DSP: Variance Example + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Variance Example
    +
    Examples
    +
    +
    Description:
    +
    Demonstrates the use of Basic Math and Support Functions to calculate the variance of an input sequence with N samples. Uniformly distributed white noise is taken as input.
    +
    Algorithm:
    +
    The variance of a sequence is the mean of the squared deviation of the sequence from its mean.
    +
    This is denoted by the following equation: 
     variance = ((x[0] - x') * (x[0] - x') + (x[1] - x') * (x[1] - x') + ... + * (x[n-1] - x') * (x[n-1] - x')) / (N-1)
    where, x[n] is the input sequence, N is the number of input samples, and x' is the mean value of the input sequence, x[n].
    +
    The mean value x' is defined as: 
     x' = (x[0] + x[1] + ... + x[n-1]) / N
    +
    Block Diagram:
    +
    +Variance.gif +
    +
    +
    Variables Description:
    +
      +
    • testInput_f32 points to the input data
      • +
    • wire1, wir2, wire3 temporary buffers
      • +
    • blockSize number of samples processed at a time
      • +
    • refVarianceOut reference variance value
      • +
    +
    +
    CMSIS DSP Software Library Functions Used:
    +
    +
    +

    Refer arm_variance_example_f32.c

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__clarke.html b/Documentation/DSP/html/group__clarke.html new file mode 100644 index 0000000..da411f2 --- /dev/null +++ b/Documentation/DSP/html/group__clarke.html @@ -0,0 +1,266 @@ + + + + + +Vector Clarke Transform +CMSIS-DSP: Vector Clarke Transform + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Clarke Transform
    +
    Controller Functions
    +
    + + + + + + + + +

    +Functions

    static __INLINE void arm_clarke_f32 (float32_t Ia, float32_t Ib, float32_t *pIalpha, float32_t *pIbeta)
     Floating-point Clarke transform.
     
    static __INLINE void arm_clarke_q31 (q31_t Ia, q31_t Ib, q31_t *pIalpha, q31_t *pIbeta)
     Clarke transform for Q31 version.
     
    +

    Description

    +

    Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector. Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents in the two-phase orthogonal stator axis Ialpha and Ibeta. When Ialpha is superposed with Ia as shown in the figure below

    +
    +clarke.gif +
    +Stator current space vector and its components in (a,b).
    +

    and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta can be calculated using only Ia and Ib.

    +

    The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

    +
    Algorithm
    +clarkeFormula.gif +
    + where Ia and Ib are the instantaneous stator phases and pIalpha and pIbeta are the two coordinates of time invariant vector.
    +
    Fixed-Point Behavior
    Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_clarke_f32 (float32_t Ia,
    float32_t Ib,
    float32_t * pIalpha,
    float32_t * pIbeta 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + +
    [in]Iainput three-phase coordinate a
    [in]Ibinput three-phase coordinate b
    [out]pIalphapoints to output two-phase orthogonal vector axis alpha
    [out]pIbetapoints to output two-phase orthogonal vector axis beta
    +
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_clarke_q31 (q31_t Ia,
    q31_t Ib,
    q31_t * pIalpha,
    q31_t * pIbeta 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + +
    [in]Iainput three-phase coordinate a
    [in]Ibinput three-phase coordinate b
    [out]pIalphapoints to output two-phase orthogonal vector axis alpha
    [out]pIbetapoints to output two-phase orthogonal vector axis beta
    +
    +
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__clarke.js b/Documentation/DSP/html/group__clarke.js new file mode 100644 index 0000000..3650a13 --- /dev/null +++ b/Documentation/DSP/html/group__clarke.js @@ -0,0 +1,5 @@ +var group__clarke = +[ + [ "arm_clarke_f32", "group__clarke.html#ga2b4ebec76215e1277c970c269ffdbd76", null ], + [ "arm_clarke_q31", "group__clarke.html#ga7fd106ca8d346a2a472842e0656014c1", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__cmplx__conj.html b/Documentation/DSP/html/group__cmplx__conj.html new file mode 100644 index 0000000..2e0fa43 --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__conj.html @@ -0,0 +1,282 @@ + + + + + +Complex Conjugate +CMSIS-DSP: Complex Conjugate + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex Conjugate
    +
    Complex Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_cmplx_conj_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex conjugate.
     
    void arm_cmplx_conj_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex conjugate.
     
    void arm_cmplx_conj_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex conjugate.
     
    +

    Description

    +

    Conjugates the elements of a complex data vector.

    +

    The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of 2*numSamples values. The underlying algorithm is used:

    +
            
+for(n=0; n<numSamples; n++) {        
+    pDst[(2*n)+0)] = pSrc[(2*n)+0];     // real part        
+    pDst[(2*n)+1)] = -pSrc[(2*n)+1];    // imag part        
+}        
+

    There are separate functions for floating-point, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_conj_f32 (float32_t * pSrc,
    float32_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    *pSrcpoints to the input vector
    *pDstpoints to the output vector
    numSamplesnumber of complex samples in each vector
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_conj_q15 (q15_t * pSrc,
    q15_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    *pSrcpoints to the input vector
    *pDstpoints to the output vector
    numSamplesnumber of complex samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
    + +

    References __SIMD32.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_conj_q31 (q31_t * pSrc,
    q31_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    *pSrcpoints to the input vector
    *pDstpoints to the output vector
    numSamplesnumber of complex samples in each vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__cmplx__conj.js b/Documentation/DSP/html/group__cmplx__conj.js new file mode 100644 index 0000000..589b391 --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__conj.js @@ -0,0 +1,6 @@ +var group__cmplx__conj = +[ + [ "arm_cmplx_conj_f32", "group__cmplx__conj.html#ga3a102aead6460ad9fcb0626f6b226ffb", null ], + [ "arm_cmplx_conj_q15", "group__cmplx__conj.html#gaf47689ae07962acaecb8ddde556df4a4", null ], + [ "arm_cmplx_conj_q31", "group__cmplx__conj.html#gafecc94879a383c5208ec3ef99485e4b5", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__cmplx__dot__prod.html b/Documentation/DSP/html/group__cmplx__dot__prod.html new file mode 100644 index 0000000..ad70f91 --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__dot__prod.html @@ -0,0 +1,325 @@ + + + + + +Complex Dot Product +CMSIS-DSP: Complex Dot Product + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex Dot Product
    +
    Complex Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_cmplx_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t numSamples, float32_t *realResult, float32_t *imagResult)
     Floating-point complex dot product.
     
    void arm_cmplx_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
     Q15 complex dot product.
     
    void arm_cmplx_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t numSamples, q63_t *realResult, q63_t *imagResult)
     Q31 complex dot product.
     
    +

    Description

    +

    Computes the dot product of two complex vectors. The vectors are multiplied element-by-element and then summed.

    +

    The pSrcA points to the first complex input vector and pSrcB points to the second complex input vector. numSamples specifies the number of complex samples and the data in each array is stored in an interleaved fashion (real, imag, real, imag, ...). Each array has a total of 2*numSamples values.

    +

    The underlying algorithm is used:

    +
        
+realResult=0;    
+imagResult=0;    
+for(n=0; n<numSamples; n++) {    
+    realResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+0] - pSrcA[(2*n)+1]*pSrcB[(2*n)+1];    
+    imagResult += pSrcA[(2*n)+0]*pSrcB[(2*n)+1] + pSrcA[(2*n)+1]*pSrcB[(2*n)+0];    
+}    
+

    There are separate functions for floating-point, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_dot_prod_f32 (float32_t * pSrcA,
    float32_t * pSrcB,
    uint32_t numSamples,
    float32_t * realResult,
    float32_t * imagResult 
    )
    +
    +
    Parameters
    + + + + + + +
    *pSrcApoints to the first input vector
    *pSrcBpoints to the second input vector
    numSamplesnumber of complex samples in each vector
    *realResultreal part of the result returned here
    *imagResultimaginary part of the result returned here
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_dot_prod_q15 (q15_t * pSrcA,
    q15_t * pSrcB,
    uint32_t numSamples,
    q31_t * realResult,
    q31_t * imagResult 
    )
    +
    +
    Parameters
    + + + + + + +
    *pSrcApoints to the first input vector
    *pSrcBpoints to the second input vector
    numSamplesnumber of complex samples in each vector
    *realResultreal part of the result returned here
    *imagResultimaginary part of the result returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result. These are accumulated in a 64-bit accumulator with 34.30 precision. As a final step, the accumulators are converted to 8.24 format. The return results realResult and imagResult are in 8.24 format.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_dot_prod_q31 (q31_t * pSrcA,
    q31_t * pSrcB,
    uint32_t numSamples,
    q63_t * realResult,
    q63_t * imagResult 
    )
    +
    +
    Parameters
    + + + + + + +
    *pSrcApoints to the first input vector
    *pSrcBpoints to the second input vector
    numSamplesnumber of complex samples in each vector
    *realResultreal part of the result returned here
    *imagResultimaginary part of the result returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768. The return results realResult and imagResult are in 16.48 format. Input down scaling is not required.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__cmplx__dot__prod.js b/Documentation/DSP/html/group__cmplx__dot__prod.js new file mode 100644 index 0000000..b85b1a8 --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__dot__prod.js @@ -0,0 +1,6 @@ +var group__cmplx__dot__prod = +[ + [ "arm_cmplx_dot_prod_f32", "group__cmplx__dot__prod.html#gadcfaf567a25eb641da4043eafb9bb076", null ], + [ "arm_cmplx_dot_prod_q15", "group__cmplx__dot__prod.html#ga2b08b5e8001d2c15204639d00893fc70", null ], + [ "arm_cmplx_dot_prod_q31", "group__cmplx__dot__prod.html#ga5b731a59db062a9ad84562ef68a6c8af", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__cmplx__mag.html b/Documentation/DSP/html/group__cmplx__mag.html new file mode 100644 index 0000000..7d91cb1 --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__mag.html @@ -0,0 +1,288 @@ + + + + + +Complex Magnitude +CMSIS-DSP: Complex Magnitude + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex Magnitude
    +
    Complex Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_cmplx_mag_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex magnitude.
     
    void arm_cmplx_mag_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex magnitude.
     
    void arm_cmplx_mag_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex magnitude.
     
    +

    Description

    +

    Computes the magnitude of the elements of a complex data vector.

    +

    The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of 2*numSamples values; the output array has a total of numSamples values. The underlying algorithm is used:

    +
        
+for(n=0; n<numSamples; n++) {    
+    pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);    
+}    
+

    There are separate functions for floating-point, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mag_f32 (float32_t * pSrc,
    float32_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to complex input buffer
    [out]*pDstpoints to real output buffer
    [in]numSamplesnumber of complex samples in the input vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_fft_bin_example_f32.c.
    +
    +

    References arm_sqrt_f32().

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mag_q15 (q15_t * pSrc,
    q15_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    *pSrcpoints to the complex input vector
    *pDstpoints to the real output vector
    numSamplesnumber of complex samples in the input vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
    + +

    References __SIMD32, and arm_sqrt_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mag_q31 (q31_t * pSrc,
    q31_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    *pSrcpoints to the complex input vector
    *pDstpoints to the real output vector
    numSamplesnumber of complex samples in the input vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format. Input down scaling is not required.
    + +

    References arm_sqrt_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__cmplx__mag.js b/Documentation/DSP/html/group__cmplx__mag.js new file mode 100644 index 0000000..fb76dde --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__mag.js @@ -0,0 +1,6 @@ +var group__cmplx__mag = +[ + [ "arm_cmplx_mag_f32", "group__cmplx__mag.html#gae45024c497392cde2ae358a76d435213", null ], + [ "arm_cmplx_mag_q15", "group__cmplx__mag.html#ga0a4a8f77a6a51d9b3f3b9d729f85b7a4", null ], + [ "arm_cmplx_mag_q31", "group__cmplx__mag.html#ga14f82f9230e9d96d5b9774e2fefcb7be", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__cmplx__mag__squared.html b/Documentation/DSP/html/group__cmplx__mag__squared.html new file mode 100644 index 0000000..466b69a --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__mag__squared.html @@ -0,0 +1,282 @@ + + + + + +Complex Magnitude Squared +CMSIS-DSP: Complex Magnitude Squared + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Complex Magnitude Squared
    +
    Complex Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_cmplx_mag_squared_f32 (float32_t *pSrc, float32_t *pDst, uint32_t numSamples)
     Floating-point complex magnitude squared.
     
    void arm_cmplx_mag_squared_q15 (q15_t *pSrc, q15_t *pDst, uint32_t numSamples)
     Q15 complex magnitude squared.
     
    void arm_cmplx_mag_squared_q31 (q31_t *pSrc, q31_t *pDst, uint32_t numSamples)
     Q31 complex magnitude squared.
     
    +

    Description

    +

    Computes the magnitude squared of the elements of a complex data vector.

    +

    The pSrc points to the source data and pDst points to the where the result should be written. numSamples specifies the number of complex samples in the input array and the data is stored in an interleaved fashion (real, imag, real, imag, ...). The input array has a total of 2*numSamples values; the output array has a total of numSamples values.

    +

    The underlying algorithm is used:

    +
            
+for(n=0; n<numSamples; n++) {        
+    pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;        
+}        
+

    There are separate functions for floating-point, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mag_squared_f32 (float32_t * pSrc,
    float32_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the complex input vector
    [out]*pDstpoints to the real output vector
    [in]numSamplesnumber of complex samples in the input vector
    +
    +
    +
    Returns
    none.
    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mag_squared_q15 (q15_t * pSrc,
    q15_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    *pSrcpoints to the complex input vector
    *pDstpoints to the real output vector
    numSamplesnumber of complex samples in the input vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
    + +

    References __SIMD32.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_cmplx_mag_squared_q31 (q31_t * pSrc,
    q31_t * pDst,
    uint32_t numSamples 
    )
    +
    +
    Parameters
    + + + + +
    *pSrcpoints to the complex input vector
    *pDstpoints to the real output vector
    numSamplesnumber of complex samples in the input vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format. Input down scaling is not required.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__cmplx__mag__squared.js b/Documentation/DSP/html/group__cmplx__mag__squared.js new file mode 100644 index 0000000..cd69d41 --- /dev/null +++ b/Documentation/DSP/html/group__cmplx__mag__squared.js @@ -0,0 +1,6 @@ +var group__cmplx__mag__squared = +[ + [ "arm_cmplx_mag_squared_f32", "group__cmplx__mag__squared.html#gaa7faccc0d96b061d8b7d0d7d82045074", null ], + [ "arm_cmplx_mag_squared_q15", "group__cmplx__mag__squared.html#ga45537f576102d960d467eb722b8431f2", null ], + [ "arm_cmplx_mag_squared_q31", "group__cmplx__mag__squared.html#ga384b0538101e8c03fa4fa14271e63b04", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__copy.html b/Documentation/DSP/html/group__copy.html new file mode 100644 index 0000000..1f5eaab --- /dev/null +++ b/Documentation/DSP/html/group__copy.html @@ -0,0 +1,329 @@ + + + + + +Vector Copy +CMSIS-DSP: Vector Copy + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Copy
    +
    Support Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_copy_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Copies the elements of a floating-point vector.
     
    void arm_copy_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Copies the elements of a Q15 vector.
     
    void arm_copy_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Copies the elements of a Q31 vector.
     
    void arm_copy_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Copies the elements of a Q7 vector.
     
    +

    Description

    +

    Copies sample by sample from source vector to destination vector.

    +
        
+        pDst[n] = pSrc[n];   0 <= n < blockSize.    
+

    There are separate functions for floating point, Q31, Q15, and Q7 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_copy_f32 (float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to input vector
    [out]*pDstpoints to output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_convolution_example_f32.c, arm_signal_converge_example_f32.c, and arm_variance_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_copy_q15 (q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to input vector
    [out]*pDstpoints to output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, and blockSize.

    + +

    Referenced by arm_conv_fast_opt_q15(), arm_conv_opt_q15(), arm_conv_partial_fast_opt_q15(), arm_conv_partial_opt_q15(), arm_correlate_fast_opt_q15(), and arm_correlate_opt_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_copy_q31 (q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to input vector
    [out]*pDstpoints to output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_copy_q7 (q7_t * pSrc,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to input vector
    [out]*pDstpoints to output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__copy.js b/Documentation/DSP/html/group__copy.js new file mode 100644 index 0000000..a0c09b0 --- /dev/null +++ b/Documentation/DSP/html/group__copy.js @@ -0,0 +1,7 @@ +var group__copy = +[ + [ "arm_copy_f32", "group__copy.html#gadd1f737e677e0e6ca31767c7001417b3", null ], + [ "arm_copy_q15", "group__copy.html#ga872ca4cfc18c680b8991ccd569a5fda0", null ], + [ "arm_copy_q31", "group__copy.html#gaddf70be7e3f87e535c324862b501f3f9", null ], + [ "arm_copy_q7", "group__copy.html#ga467579beda492aa92797529d794c88fb", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__cos.html b/Documentation/DSP/html/group__cos.html new file mode 100644 index 0000000..3a14513 --- /dev/null +++ b/Documentation/DSP/html/group__cos.html @@ -0,0 +1,236 @@ + + + + + +Cosine +CMSIS-DSP: Cosine + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Cosine
    +
    Fast Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    float32_t arm_cos_f32 (float32_t x)
     Fast approximation to the trigonometric cosine function for floating-point data.
     
    q15_t arm_cos_q15 (q15_t x)
     Fast approximation to the trigonometric cosine function for Q15 data.
     
    q31_t arm_cos_q31 (q31_t x)
     Fast approximation to the trigonometric cosine function for Q31 data.
     
    +

    Description

    +

    Computes the trigonometric cosine function using a combination of table lookup and linear interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a value of 2*pi wraps around to 0.

    +

    The implementation is based on table lookup using 256 values together with linear interpolation. The steps used are:

    +
      +
    1. Calculation of the nearest integer table index
      2. +
    2. Compute the fractional portion (fract) of the table index.
      3. +
    3. The final result equals (1.0f-fract)*a + fract*b;
      4. +
    +

    where

    +
    +   b=Table[index+0];
+   c=Table[index+1];
+

    Function Documentation

    + +
    +
    + + + + + + + + +
    float32_t arm_cos_f32 (float32_t x)
    +
    +
    Parameters
    + + +
    [in]xinput value in radians.
    +
    +
    +
    Returns
    cos(x).
    +
    Examples:
    arm_sin_cos_example_f32.c.
    +
    +

    References FAST_MATH_TABLE_SIZE, and sinTable_f32.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + +
    q15_t arm_cos_q15 (q15_t x)
    +
    +
    Parameters
    + + +
    [in]xScaled input value in radians.
    +
    +
    +
    Returns
    cos(x).
    +

    The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).

    + +

    References FAST_MATH_Q15_SHIFT, and sinTable_q15.

    + +
    +
    + +
    +
    + + + + + + + + +
    q31_t arm_cos_q31 (q31_t x)
    +
    +
    Parameters
    + + +
    [in]xScaled input value in radians.
    +
    +
    +
    Returns
    cos(x).
    +

    The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).

    + +

    References FAST_MATH_Q31_SHIFT, and sinTable_q31.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__cos.js b/Documentation/DSP/html/group__cos.js new file mode 100644 index 0000000..6e72aa5 --- /dev/null +++ b/Documentation/DSP/html/group__cos.js @@ -0,0 +1,6 @@ +var group__cos = +[ + [ "arm_cos_f32", "group__cos.html#gace15287f9c64b9b4084d1c797d4c49d8", null ], + [ "arm_cos_q15", "group__cos.html#gadfd60c24def501638c0d5db20f4c869b", null ], + [ "arm_cos_q31", "group__cos.html#gad80f121949ef885a77d83ab36e002567", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__dot__prod.html b/Documentation/DSP/html/group__dot__prod.html new file mode 100644 index 0000000..a017d67 --- /dev/null +++ b/Documentation/DSP/html/group__dot__prod.html @@ -0,0 +1,361 @@ + + + + + +Vector Dot Product +CMSIS-DSP: Vector Dot Product + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Dot Product
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
     Dot product of floating-point vectors.
     
    void arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
     Dot product of Q15 vectors.
     
    void arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
     Dot product of Q31 vectors.
     
    void arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
     Dot product of Q7 vectors.
     
    +

    Description

    +

    Computes the dot product of two vectors. The vectors are multiplied element-by-element and then summed.

    +
    +    sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+

    There are separate functions for floating-point, Q7, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_dot_prod_f32 (float32_t * pSrcA,
    float32_t * pSrcB,
    uint32_t blockSize,
    float32_t * result 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [in]blockSizenumber of samples in each vector
    [out]*resultoutput result returned here
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_variance_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_dot_prod_q15 (q15_t * pSrcA,
    q15_t * pSrcB,
    uint32_t blockSize,
    q63_t * result 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [in]blockSizenumber of samples in each vector
    [out]*resultoutput result returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these results are added to a 64-bit accumulator in 34.30 format. Nonsaturating additions are used and given that there are 33 guard bits in the accumulator there is no risk of overflow. The return result is in 34.30 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_dot_prod_q31 (q31_t * pSrcA,
    q31_t * pSrcB,
    uint32_t blockSize,
    q63_t * result 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [in]blockSizenumber of samples in each vector
    [out]*resultoutput result returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these are truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. There are 15 guard bits in the accumulator and there is no risk of overflow as long as the length of the vectors is less than 2^16 elements. The return result is in 16.48 format.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_dot_prod_q7 (q7_t * pSrcA,
    q7_t * pSrcB,
    uint32_t blockSize,
    q31_t * result 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcApoints to the first input vector
    [in]*pSrcBpoints to the second input vector
    [in]blockSizenumber of samples in each vector
    [out]*resultoutput result returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these results are added to an accumulator in 18.14 format. Nonsaturating additions are used and there is no danger of wrap around as long as the vectors are less than 2^18 elements long. The return result is in 18.14 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__dot__prod.js b/Documentation/DSP/html/group__dot__prod.js new file mode 100644 index 0000000..beb0e56 --- /dev/null +++ b/Documentation/DSP/html/group__dot__prod.js @@ -0,0 +1,7 @@ +var group__dot__prod = +[ + [ "arm_dot_prod_f32", "group__dot__prod.html#ga55418d4362f6ba84c327f9b4f089a8c3", null ], + [ "arm_dot_prod_q15", "group__dot__prod.html#ga436d5bed28a4b73b24acbde436a3044b", null ], + [ "arm_dot_prod_q31", "group__dot__prod.html#gab15d8fa060fc85b4d948d091b7deaa11", null ], + [ "arm_dot_prod_q7", "group__dot__prod.html#ga9c3293a50ac7ec8ba928bf8e3aaea6c1", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__float__to__x.html b/Documentation/DSP/html/group__float__to__x.html new file mode 100644 index 0000000..3fe0347 --- /dev/null +++ b/Documentation/DSP/html/group__float__to__x.html @@ -0,0 +1,298 @@ + + + + + +Convert 32-bit floating point value +CMSIS-DSP: Convert 32-bit floating point value + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Convert 32-bit floating point value
    +
    Support Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_float_to_q15 (float32_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q15 vector.
     
    void arm_float_to_q31 (float32_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q31 vector.
     
    void arm_float_to_q7 (float32_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the floating-point vector to Q7 vector.
     
    +

    Description

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q15 (float32_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the floating-point input vector
    [out]*pDstpoints to the Q15 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +
    The equation used for the conversion process is: 
        
+        pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.    
+
    +
    Scaling and Overflow Behavior:
    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    +
    Note
    In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q31 (float32_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the floating-point input vector
    [out]*pDstpoints to the Q31 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +
    The equation used for the conversion process is:
    +
        
+        pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.    
+

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
    +
    Note
    In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    References blockSize, and clip_q63_to_q31().

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_float_to_q7 (float32_t * pSrc,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the floating-point input vector
    [out]*pDstpoints to the Q7 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +
    The equation used for the conversion process is: 
        
+        pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.    
+
    +
    Scaling and Overflow Behavior:
    +
    The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
    +
    Note
    In order to apply rounding, the library should be rebuilt with the ROUNDING macro defined in the preprocessor section of project options.
    + +

    References blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__float__to__x.js b/Documentation/DSP/html/group__float__to__x.js new file mode 100644 index 0000000..c312cd1 --- /dev/null +++ b/Documentation/DSP/html/group__float__to__x.js @@ -0,0 +1,6 @@ +var group__float__to__x = +[ + [ "arm_float_to_q15", "group__float__to__x.html#ga215456e35a18db86882e1d3f0d24e1f2", null ], + [ "arm_float_to_q31", "group__float__to__x.html#ga177704107f94564e9abe4daaa36f4554", null ], + [ "arm_float_to_q7", "group__float__to__x.html#ga44a393818cdee8dce80f2d66add25411", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_cmplx_math.html b/Documentation/DSP/html/group__group_cmplx_math.html new file mode 100644 index 0000000..fe212b9 --- /dev/null +++ b/Documentation/DSP/html/group__group_cmplx_math.html @@ -0,0 +1,148 @@ + + + + + +Complex Math Functions +CMSIS-DSP: Complex Math Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content
    +
    +
    Complex Math Functions
    +
    +
    + + + + + + + + + + + + + + +

    +Content

     Complex Conjugate
     
     Complex Dot Product
     
     Complex Magnitude
     
     Complex Magnitude Squared
     
     Complex-by-Complex Multiplication
     
     Complex-by-Real Multiplication
     
    +

    Description

    +

    This set of functions operates on complex data vectors. The data in the complex arrays is stored in an interleaved fashion (real, imag, real, imag, ...). In the API functions, the number of samples in a complex array refers to the number of complex values; the array contains twice this number of real values.

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_cmplx_math.js b/Documentation/DSP/html/group__group_cmplx_math.js new file mode 100644 index 0000000..88c2704 --- /dev/null +++ b/Documentation/DSP/html/group__group_cmplx_math.js @@ -0,0 +1,9 @@ +var group__group_cmplx_math = +[ + [ "Complex Conjugate", "group__cmplx__conj.html", "group__cmplx__conj" ], + [ "Complex Dot Product", "group__cmplx__dot__prod.html", "group__cmplx__dot__prod" ], + [ "Complex Magnitude", "group__cmplx__mag.html", "group__cmplx__mag" ], + [ "Complex Magnitude Squared", "group__cmplx__mag__squared.html", "group__cmplx__mag__squared" ], + [ "Complex-by-Complex Multiplication", "group___cmplx_by_cmplx_mult.html", "group___cmplx_by_cmplx_mult" ], + [ "Complex-by-Real Multiplication", "group___cmplx_by_real_mult.html", "group___cmplx_by_real_mult" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_controller.html b/Documentation/DSP/html/group__group_controller.html new file mode 100644 index 0000000..b935efd --- /dev/null +++ b/Documentation/DSP/html/group__group_controller.html @@ -0,0 +1,147 @@ + + + + + +Controller Functions +CMSIS-DSP: Controller Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content
    +
    +
    Controller Functions
    +
    +
    + + + + + + + + + + + + + + +

    +Content

     Sine Cosine
     
     PID Motor Control
     
     Vector Clarke Transform
     
     Vector Inverse Clarke Transform
     
     Vector Park Transform
     
     Vector Inverse Park transform
     
    +

    Description

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_controller.js b/Documentation/DSP/html/group__group_controller.js new file mode 100644 index 0000000..59a1a0f --- /dev/null +++ b/Documentation/DSP/html/group__group_controller.js @@ -0,0 +1,9 @@ +var group__group_controller = +[ + [ "Sine Cosine", "group___sin_cos.html", "group___sin_cos" ], + [ "PID Motor Control", "group___p_i_d.html", "group___p_i_d" ], + [ "Vector Clarke Transform", "group__clarke.html", "group__clarke" ], + [ "Vector Inverse Clarke Transform", "group__inv__clarke.html", "group__inv__clarke" ], + [ "Vector Park Transform", "group__park.html", "group__park" ], + [ "Vector Inverse Park transform", "group__inv__park.html", "group__inv__park" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_examples.html b/Documentation/DSP/html/group__group_examples.html new file mode 100644 index 0000000..f7275b5 --- /dev/null +++ b/Documentation/DSP/html/group__group_examples.html @@ -0,0 +1,157 @@ + + + + + +Examples +CMSIS-DSP: Examples + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content
    +
    +
    Examples
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +

    +Content

     Class Marks Example
     
     Convolution Example
     
     Dot Product Example
     
     Frequency Bin Example
     
     FIR Lowpass Filter Example
     
     Graphic Audio Equalizer Example
     
     Linear Interpolate Example
     
     Matrix Example
     
     Signal Convergence Example
     
     SineCosine Example
     
     Variance Example
     
    +

    Description

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_examples.js b/Documentation/DSP/html/group__group_examples.js new file mode 100644 index 0000000..08848f0 --- /dev/null +++ b/Documentation/DSP/html/group__group_examples.js @@ -0,0 +1,14 @@ +var group__group_examples = +[ + [ "Class Marks Example", "group___class_marks.html", null ], + [ "Convolution Example", "group___convolution_example.html", null ], + [ "Dot Product Example", "group___dotproduct_example.html", null ], + [ "Frequency Bin Example", "group___frequency_bin.html", null ], + [ "FIR Lowpass Filter Example", "group___f_i_r_l_p_f.html", null ], + [ "Graphic Audio Equalizer Example", "group___g_e_q5_band.html", null ], + [ "Linear Interpolate Example", "group___linear_interp_example.html", null ], + [ "Matrix Example", "group___matrix_example.html", null ], + [ "Signal Convergence Example", "group___signal_convergence.html", null ], + [ "SineCosine Example", "group___sin_cos_example.html", null ], + [ "Variance Example", "group___variance_example.html", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_fast_math.html b/Documentation/DSP/html/group__group_fast_math.html new file mode 100644 index 0000000..702d4b5 --- /dev/null +++ b/Documentation/DSP/html/group__group_fast_math.html @@ -0,0 +1,142 @@ + + + + + +Fast Math Functions +CMSIS-DSP: Fast Math Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content
    +
    +
    Fast Math Functions
    +
    +
    + + + + + + + + +

    +Content

     Cosine
     
     Sine
     
     Square Root
     
    +

    Description

    +

    This set of functions provides a fast approximation to sine, cosine, and square root. As compared to most of the other functions in the CMSIS math library, the fast math functions operate on individual values and not arrays. There are separate functions for Q15, Q31, and floating-point data.

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_fast_math.js b/Documentation/DSP/html/group__group_fast_math.js new file mode 100644 index 0000000..1250529 --- /dev/null +++ b/Documentation/DSP/html/group__group_fast_math.js @@ -0,0 +1,6 @@ +var group__group_fast_math = +[ + [ "Cosine", "group__cos.html", "group__cos" ], + [ "Sine", "group__sin.html", "group__sin" ], + [ "Square Root", "group___s_q_r_t.html", "group___s_q_r_t" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_filters.html b/Documentation/DSP/html/group__group_filters.html new file mode 100644 index 0000000..e2c56da --- /dev/null +++ b/Documentation/DSP/html/group__group_filters.html @@ -0,0 +1,163 @@ + + + + + +Filtering Functions +CMSIS-DSP: Filtering Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content
    +
    +
    Filtering Functions
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Content

     High Precision Q31 Biquad Cascade Filter
     
     Biquad Cascade IIR Filters Using Direct Form I Structure
     
     Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
     
     Convolution
     
     Partial Convolution
     
     Correlation
     
     Finite Impulse Response (FIR) Decimator
     
     Finite Impulse Response (FIR) Filters
     
     Finite Impulse Response (FIR) Lattice Filters
     
     Finite Impulse Response (FIR) Sparse Filters
     
     Infinite Impulse Response (IIR) Lattice Filters
     
     Least Mean Square (LMS) Filters
     
     Normalized LMS Filters
     
     Finite Impulse Response (FIR) Interpolator
     
    +

    Description

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_filters.js b/Documentation/DSP/html/group__group_filters.js new file mode 100644 index 0000000..f854e02 --- /dev/null +++ b/Documentation/DSP/html/group__group_filters.js @@ -0,0 +1,17 @@ +var group__group_filters = +[ + [ "High Precision Q31 Biquad Cascade Filter", "group___biquad_cascade_d_f1__32x64.html", "group___biquad_cascade_d_f1__32x64" ], + [ "Biquad Cascade IIR Filters Using Direct Form I Structure", "group___biquad_cascade_d_f1.html", "group___biquad_cascade_d_f1" ], + [ "Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure", "group___biquad_cascade_d_f2_t.html", "group___biquad_cascade_d_f2_t" ], + [ "Convolution", "group___conv.html", "group___conv" ], + [ "Partial Convolution", "group___partial_conv.html", "group___partial_conv" ], + [ "Correlation", "group___corr.html", "group___corr" ], + [ "Finite Impulse Response (FIR) Decimator", "group___f_i_r__decimate.html", "group___f_i_r__decimate" ], + [ "Finite Impulse Response (FIR) Filters", "group___f_i_r.html", "group___f_i_r" ], + [ "Finite Impulse Response (FIR) Lattice Filters", "group___f_i_r___lattice.html", "group___f_i_r___lattice" ], + [ "Finite Impulse Response (FIR) Sparse Filters", "group___f_i_r___sparse.html", "group___f_i_r___sparse" ], + [ "Infinite Impulse Response (IIR) Lattice Filters", "group___i_i_r___lattice.html", "group___i_i_r___lattice" ], + [ "Least Mean Square (LMS) Filters", "group___l_m_s.html", "group___l_m_s" ], + [ "Normalized LMS Filters", "group___l_m_s___n_o_r_m.html", "group___l_m_s___n_o_r_m" ], + [ "Finite Impulse Response (FIR) Interpolator", "group___f_i_r___interpolate.html", "group___f_i_r___interpolate" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_interpolation.html b/Documentation/DSP/html/group__group_interpolation.html new file mode 100644 index 0000000..3f966cd --- /dev/null +++ b/Documentation/DSP/html/group__group_interpolation.html @@ -0,0 +1,140 @@ + + + + + +Interpolation Functions +CMSIS-DSP: Interpolation Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content
    +
    +
    Interpolation Functions
    +
    +
    + + + + + + +

    +Content

     Linear Interpolation
     
     Bilinear Interpolation
     
    +

    Description

    +

    These functions perform 1- and 2-dimensional interpolation of data. Linear interpolation is used for 1-dimensional data and bilinear interpolation is used for 2-dimensional data.

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_interpolation.js b/Documentation/DSP/html/group__group_interpolation.js new file mode 100644 index 0000000..b564602 --- /dev/null +++ b/Documentation/DSP/html/group__group_interpolation.js @@ -0,0 +1,5 @@ +var group__group_interpolation = +[ + [ "Linear Interpolation", "group___linear_interpolate.html", "group___linear_interpolate" ], + [ "Bilinear Interpolation", "group___bilinear_interpolate.html", "group___bilinear_interpolate" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_math.html b/Documentation/DSP/html/group__group_math.html new file mode 100644 index 0000000..9760f27 --- /dev/null +++ b/Documentation/DSP/html/group__group_math.html @@ -0,0 +1,153 @@ + + + + + +Basic Math Functions +CMSIS-DSP: Basic Math Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content
    +
    +
    Basic Math Functions
    +
    +
    + + + + + + + + + + + + + + + + + + + + +

    +Content

     Vector Absolute Value
     
     Vector Addition
     
     Vector Dot Product
     
     Vector Multiplication
     
     Vector Negate
     
     Vector Offset
     
     Vector Scale
     
     Vector Shift
     
     Vector Subtraction
     
    +

    Description

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_math.js b/Documentation/DSP/html/group__group_math.js new file mode 100644 index 0000000..c0e2da2 --- /dev/null +++ b/Documentation/DSP/html/group__group_math.js @@ -0,0 +1,12 @@ +var group__group_math = +[ + [ "Vector Absolute Value", "group___basic_abs.html", "group___basic_abs" ], + [ "Vector Addition", "group___basic_add.html", "group___basic_add" ], + [ "Vector Dot Product", "group__dot__prod.html", "group__dot__prod" ], + [ "Vector Multiplication", "group___basic_mult.html", "group___basic_mult" ], + [ "Vector Negate", "group__negate.html", "group__negate" ], + [ "Vector Offset", "group__offset.html", "group__offset" ], + [ "Vector Scale", "group__scale.html", "group__scale" ], + [ "Vector Shift", "group__shift.html", "group__shift" ], + [ "Vector Subtraction", "group___basic_sub.html", "group___basic_sub" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_matrix.html b/Documentation/DSP/html/group__group_matrix.html new file mode 100644 index 0000000..935d3b2 --- /dev/null +++ b/Documentation/DSP/html/group__group_matrix.html @@ -0,0 +1,176 @@ + + + + + +Matrix Functions +CMSIS-DSP: Matrix Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
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    +
    + +
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    +Content
    +
    +
    Matrix Functions
    +
    +
    + + + + + + + + + + + + + + + + + + +

    +Content

     Matrix Addition
     
     Complex Matrix Multiplication
     
     Matrix Initialization
     
     Matrix Inverse
     
     Matrix Multiplication
     
     Matrix Scale
     
     Matrix Subtraction
     
     Matrix Transpose
     
    +

    Description

    +

    This set of functions provides basic matrix math operations. The functions operate on matrix data structures. For example, the type definition for the floating-point matrix structure is shown below:

    +
    +    typedef struct
+    {
+      uint16_t numRows;     // number of rows of the matrix.
+      uint16_t numCols;     // number of columns of the matrix.
+      float32_t *pData;     // points to the data of the matrix.
+    } arm_matrix_instance_f32;
+

    There are similar definitions for Q15 and Q31 data types.

    +

    The structure specifies the size of the matrix and then points to an array of data. The array is of size numRows X numCols and the values are arranged in row order. That is, the matrix element (i, j) is stored at:

    +
    +    pData[i*numCols + j]
+
    Init Functions
    There is an associated initialization function for each type of matrix data structure. The initialization function sets the values of the internal structure fields. Refer to the function arm_mat_init_f32(), arm_mat_init_q31() and arm_mat_init_q15() for floating-point, Q31 and Q15 types, respectively.
    +
    Use of the initialization function is optional. However, if initialization function is used then the instance structure cannot be placed into a const data section. To place the instance structure in a const data section, manually initialize the data structure. For example: 
    +arm_matrix_instance_f32 S = {nRows, nColumns, pData};
+arm_matrix_instance_q31 S = {nRows, nColumns, pData};
+arm_matrix_instance_q15 S = {nRows, nColumns, pData};
+
    where nRows specifies the number of rows, nColumns specifies the number of columns, and pData points to the data array.
    +
    Size Checking
    By default all of the matrix functions perform size checking on the input and output matrices. For example, the matrix addition function verifies that the two input matrices and the output matrix all have the same number of rows and columns. If the size check fails the functions return: 
    +    ARM_MATH_SIZE_MISMATCH
+
    Otherwise the functions return 
    +    ARM_MATH_SUCCESS
+
    There is some overhead associated with this matrix size checking. The matrix size checking is enabled via the #define 
    +    ARM_MATH_MATRIX_CHECK
+
    within the library project settings. By default this macro is defined and size checking is enabled. By changing the project settings and undefining this macro size checking is eliminated and the functions run a bit faster. With size checking disabled the functions always return ARM_MATH_SUCCESS.
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_matrix.js b/Documentation/DSP/html/group__group_matrix.js new file mode 100644 index 0000000..20a2cca --- /dev/null +++ b/Documentation/DSP/html/group__group_matrix.js @@ -0,0 +1,11 @@ +var group__group_matrix = +[ + [ "Matrix Addition", "group___matrix_add.html", "group___matrix_add" ], + [ "Complex Matrix Multiplication", "group___cmplx_matrix_mult.html", "group___cmplx_matrix_mult" ], + [ "Matrix Initialization", "group___matrix_init.html", "group___matrix_init" ], + [ "Matrix Inverse", "group___matrix_inv.html", "group___matrix_inv" ], + [ "Matrix Multiplication", "group___matrix_mult.html", "group___matrix_mult" ], + [ "Matrix Scale", "group___matrix_scale.html", "group___matrix_scale" ], + [ "Matrix Subtraction", "group___matrix_sub.html", "group___matrix_sub" ], + [ "Matrix Transpose", "group___matrix_trans.html", "group___matrix_trans" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_stats.html b/Documentation/DSP/html/group__group_stats.html new file mode 100644 index 0000000..4364840 --- /dev/null +++ b/Documentation/DSP/html/group__group_stats.html @@ -0,0 +1,149 @@ + + + + + +Statistics Functions +CMSIS-DSP: Statistics Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
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    +Content
    +
    +
    Statistics Functions
    +
    +
    + + + + + + + + + + + + + + + + +

    +Content

     Maximum
     
     Mean
     
     Minimum
     
     Power
     
     Root mean square (RMS)
     
     Standard deviation
     
     Variance
     
    +

    Description

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_stats.js b/Documentation/DSP/html/group__group_stats.js new file mode 100644 index 0000000..7aafce9 --- /dev/null +++ b/Documentation/DSP/html/group__group_stats.js @@ -0,0 +1,10 @@ +var group__group_stats = +[ + [ "Maximum", "group___max.html", "group___max" ], + [ "Mean", "group__mean.html", "group__mean" ], + [ "Minimum", "group___min.html", "group___min" ], + [ "Power", "group__power.html", "group__power" ], + [ "Root mean square (RMS)", "group___r_m_s.html", "group___r_m_s" ], + [ "Standard deviation", "group___s_t_d.html", "group___s_t_d" ], + [ "Variance", "group__variance.html", "group__variance" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_support.html b/Documentation/DSP/html/group__group_support.html new file mode 100644 index 0000000..c09249b --- /dev/null +++ b/Documentation/DSP/html/group__group_support.html @@ -0,0 +1,147 @@ + + + + + +Support Functions +CMSIS-DSP: Support Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
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    +Content
    +
    +
    Support Functions
    +
    +
    + + + + + + + + + + + + + + +

    +Content

     Vector Copy
     
     Vector Fill
     
     Convert 32-bit floating point value
     
     Convert 16-bit Integer value
     
     Convert 32-bit Integer value
     
     Convert 8-bit Integer value
     
    +

    Description

    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_support.js b/Documentation/DSP/html/group__group_support.js new file mode 100644 index 0000000..a13c551 --- /dev/null +++ b/Documentation/DSP/html/group__group_support.js @@ -0,0 +1,9 @@ +var group__group_support = +[ + [ "Vector Copy", "group__copy.html", "group__copy" ], + [ "Vector Fill", "group___fill.html", "group___fill" ], + [ "Convert 32-bit floating point value", "group__float__to__x.html", "group__float__to__x" ], + [ "Convert 16-bit Integer value", "group__q15__to__x.html", "group__q15__to__x" ], + [ "Convert 32-bit Integer value", "group__q31__to__x.html", "group__q31__to__x" ], + [ "Convert 8-bit Integer value", "group__q7__to__x.html", "group__q7__to__x" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__group_transforms.html b/Documentation/DSP/html/group__group_transforms.html new file mode 100644 index 0000000..b61a936 --- /dev/null +++ b/Documentation/DSP/html/group__group_transforms.html @@ -0,0 +1,262 @@ + + + + + +Transform Functions +CMSIS-DSP: Transform Functions + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Content | +Functions
    +
    +
    Transform Functions
    +
    +
    + + + + + + + + + + + + + + +

    +Content

     Complex FFT Functions
     
     Radix-8 Complex FFT Functions
     
     DCT Type IV Functions
     
     Real FFT Functions
     
     Complex FFT Tables
     
     RealFFT
     
    + + + + + + +

    +Functions

    void arm_radix4_butterfly_f32 (float32_t *pSrc, uint16_t fftLen, float32_t *pCoef, uint16_t twidCoefModifier)
     
    void arm_split_rfft_f32 (float32_t *pSrc, uint32_t fftLen, float32_t *pATable, float32_t *pBTable, float32_t *pDst, uint32_t modifier)
     Core Real FFT process.
     
    +

    Description

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_radix4_butterfly_f32 (float32_t * pSrc,
    uint16_t fftLen,
    float32_t * pCoef,
    uint16_t twidCoefModifier 
    )
    +
    + +

    Referenced by arm_cfft_radix4_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_split_rfft_f32 (float32_t * pSrc,
    uint32_t fftLen,
    float32_t * pATable,
    float32_t * pBTable,
    float32_t * pDst,
    uint32_t modifier 
    )
    +
    +

    end of RealFFT group

    +
    Parameters
    + + + + + + + +
    [in]*pSrcpoints to the input buffer.
    [in]fftLenlength of FFT.
    [in]*pATablepoints to the twiddle Coef A buffer.
    [in]*pBTablepoints to the twiddle Coef B buffer.
    [out]*pDstpoints to the output buffer.
    [in]modifiertwiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
    +
    +
    +
    Returns
    none.
    + +

    Referenced by arm_rfft_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__group_transforms.js b/Documentation/DSP/html/group__group_transforms.js new file mode 100644 index 0000000..20efb6a --- /dev/null +++ b/Documentation/DSP/html/group__group_transforms.js @@ -0,0 +1,11 @@ +var group__group_transforms = +[ + [ "Complex FFT Functions", "group___complex_f_f_t.html", "group___complex_f_f_t" ], + [ "Radix-8 Complex FFT Functions", "group___radix8___c_f_f_t___c_i_f_f_t.html", null ], + [ "DCT Type IV Functions", "group___d_c_t4___i_d_c_t4.html", "group___d_c_t4___i_d_c_t4" ], + [ "Real FFT Functions", "group___fast.html", null ], + [ "Complex FFT Tables", "group___c_f_f_t___c_i_f_f_t.html", "group___c_f_f_t___c_i_f_f_t" ], + [ "RealFFT", "group___real_f_f_t.html", "group___real_f_f_t" ], + [ "arm_radix4_butterfly_f32", "group__group_transforms.html#gae239ddf995d1607115f9e84d5c069b9c", null ], + [ "arm_split_rfft_f32", "group__group_transforms.html#ga6cfdb6bdc66b13732ef2351caf98fdbb", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__inv__clarke.html b/Documentation/DSP/html/group__inv__clarke.html new file mode 100644 index 0000000..76ad1e3 --- /dev/null +++ b/Documentation/DSP/html/group__inv__clarke.html @@ -0,0 +1,261 @@ + + + + + +Vector Inverse Clarke Transform +CMSIS-DSP: Vector Inverse Clarke Transform + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Inverse Clarke Transform
    +
    Controller Functions
    +
    + + + + + + + + +

    +Functions

    static __INLINE void arm_inv_clarke_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pIa, float32_t *pIb)
     Floating-point Inverse Clarke transform.
     
    static __INLINE void arm_inv_clarke_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pIa, q31_t *pIb)
     Inverse Clarke transform for Q31 version.
     
    +

    Description

    +

    Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.

    +

    The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

    +
    Algorithm
    +clarkeInvFormula.gif +
    + where pIa and pIb are the instantaneous stator phases and Ialpha and Ibeta are the two coordinates of time invariant vector.
    +
    Fixed-Point Behavior
    Care must be taken when using the Q31 version of the Clarke transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_inv_clarke_f32 (float32_t Ialpha,
    float32_t Ibeta,
    float32_t * pIa,
    float32_t * pIb 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + +
    [in]Ialphainput two-phase orthogonal vector axis alpha
    [in]Ibetainput two-phase orthogonal vector axis beta
    [out]pIapoints to output three-phase coordinate a
    [out]pIbpoints to output three-phase coordinate b
    +
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_inv_clarke_q31 (q31_t Ialpha,
    q31_t Ibeta,
    q31_t * pIa,
    q31_t * pIb 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + +
    [in]Ialphainput two-phase orthogonal vector axis alpha
    [in]Ibetainput two-phase orthogonal vector axis beta
    [out]pIapoints to output three-phase coordinate a
    [out]pIbpoints to output three-phase coordinate b
    +
    +
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the subtraction, hence there is no risk of overflow.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__inv__clarke.js b/Documentation/DSP/html/group__inv__clarke.js new file mode 100644 index 0000000..bc13304 --- /dev/null +++ b/Documentation/DSP/html/group__inv__clarke.js @@ -0,0 +1,5 @@ +var group__inv__clarke = +[ + [ "arm_inv_clarke_f32", "group__inv__clarke.html#ga137f0396d837477b899ecae89f075a50", null ], + [ "arm_inv_clarke_q31", "group__inv__clarke.html#ga2d0c60f114f095a2f27442d98781ba02", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__inv__park.html b/Documentation/DSP/html/group__inv__park.html new file mode 100644 index 0000000..5a1e8fe --- /dev/null +++ b/Documentation/DSP/html/group__inv__park.html @@ -0,0 +1,289 @@ + + + + + +Vector Inverse Park transform +CMSIS-DSP: Vector Inverse Park transform + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Inverse Park transform
    +
    Controller Functions
    +
    + + + + + + + + +

    +Functions

    static __INLINE void arm_inv_park_f32 (float32_t Id, float32_t Iq, float32_t *pIalpha, float32_t *pIbeta, float32_t sinVal, float32_t cosVal)
     Floating-point Inverse Park transform.
     
    static __INLINE void arm_inv_park_q31 (q31_t Id, q31_t Iq, q31_t *pIalpha, q31_t *pIbeta, q31_t sinVal, q31_t cosVal)
     Inverse Park transform for Q31 version.
     
    +

    Description

    +

    Inverse Park transform converts the input flux and torque components to two-coordinate vector.

    +

    The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

    +
    Algorithm
    +parkInvFormula.gif +
    + where pIalpha and pIbeta are the stator vector components, Id and Iq are rotor vector components and cosVal and sinVal are the cosine and sine values of theta (rotor flux position).
    +
    Fixed-Point Behavior
    Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_inv_park_f32 (float32_t Id,
    float32_t Iq,
    float32_t * pIalpha,
    float32_t * pIbeta,
    float32_t sinVal,
    float32_t cosVal 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + + + +
    [in]Idinput coordinate of rotor reference frame d
    [in]Iqinput coordinate of rotor reference frame q
    [out]pIalphapoints to output two-phase orthogonal vector axis alpha
    [out]pIbetapoints to output two-phase orthogonal vector axis beta
    [in]sinValsine value of rotation angle theta
    [in]cosValcosine value of rotation angle theta
    +
    +
    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_inv_park_q31 (q31_t Id,
    q31_t Iq,
    q31_t * pIalpha,
    q31_t * pIbeta,
    q31_t sinVal,
    q31_t cosVal 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + + + +
    [in]Idinput coordinate of rotor reference frame d
    [in]Iqinput coordinate of rotor reference frame q
    [out]pIalphapoints to output two-phase orthogonal vector axis alpha
    [out]pIbetapoints to output two-phase orthogonal vector axis beta
    [in]sinValsine value of rotation angle theta
    [in]cosValcosine value of rotation angle theta
    +
    +
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition, hence there is no risk of overflow.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__inv__park.js b/Documentation/DSP/html/group__inv__park.js new file mode 100644 index 0000000..5995930 --- /dev/null +++ b/Documentation/DSP/html/group__inv__park.js @@ -0,0 +1,5 @@ +var group__inv__park = +[ + [ "arm_inv_park_f32", "group__inv__park.html#gaaf6bef0de21946f774d49df050dd8b05", null ], + [ "arm_inv_park_q31", "group__inv__park.html#ga0b33822b988a15455773d28440c5579a", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__mean.html b/Documentation/DSP/html/group__mean.html new file mode 100644 index 0000000..2b507f5 --- /dev/null +++ b/Documentation/DSP/html/group__mean.html @@ -0,0 +1,333 @@ + + + + + +Mean +CMSIS-DSP: Mean + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Mean
    +
    Statistics Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_mean_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Mean value of a floating-point vector.
     
    void arm_mean_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Mean value of a Q15 vector.
     
    void arm_mean_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Mean value of a Q31 vector.
     
    void arm_mean_q7 (q7_t *pSrc, uint32_t blockSize, q7_t *pResult)
     Mean value of a Q7 vector.
     
    +

    Description

    +

    Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector. The underlying algorithm is used:

    +
        
+        Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;    
+

    There are separate functions for floating-point, Q31, Q15, and Q7 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mean_f32 (float32_t * pSrc,
    uint32_t blockSize,
    float32_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmean value returned here
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mean_q15 (q15_t * pSrc,
    uint32_t blockSize,
    q15_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmean value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. The input is represented in 1.15 format and is accumulated in a 32-bit accumulator in 17.15 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mean_q31 (q31_t * pSrc,
    uint32_t blockSize,
    q31_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmean value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format and is accumulated in a 64-bit accumulator in 33.31 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.31 format.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_mean_q7 (q7_t * pSrc,
    uint32_t blockSize,
    q7_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultmean value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format and is accumulated in a 32-bit accumulator in 25.7 format. There is no risk of internal overflow with this approach, and the full precision of intermediate result is preserved. Finally, the accumulator is truncated to yield a result of 1.7 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__mean.js b/Documentation/DSP/html/group__mean.js new file mode 100644 index 0000000..89c0ce0 --- /dev/null +++ b/Documentation/DSP/html/group__mean.js @@ -0,0 +1,7 @@ +var group__mean = +[ + [ "arm_mean_f32", "group__mean.html#ga74ce08c49ab61e57bd50c3a0ca1fdb2b", null ], + [ "arm_mean_q15", "group__mean.html#gac882495d5f098819fd3939c1ef7795b3", null ], + [ "arm_mean_q31", "group__mean.html#gacf2526d8c2d75e486e8f0b0e31877ad0", null ], + [ "arm_mean_q7", "group__mean.html#gaebc707ee539020357c25da4c75b52eb7", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__negate.html b/Documentation/DSP/html/group__negate.html new file mode 100644 index 0000000..dc65456 --- /dev/null +++ b/Documentation/DSP/html/group__negate.html @@ -0,0 +1,331 @@ + + + + + +Vector Negate +CMSIS-DSP: Vector Negate + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Negate
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_negate_f32 (float32_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Negates the elements of a floating-point vector.
     
    void arm_negate_q15 (q15_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Negates the elements of a Q15 vector.
     
    void arm_negate_q31 (q31_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Negates the elements of a Q31 vector.
     
    void arm_negate_q7 (q7_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Negates the elements of a Q7 vector.
     
    +

    Description

    +

    Negates the elements of a vector.

    +
            
+    pDst[n] = -pSrc[n],   0 <= n < blockSize.        
+

    The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_negate_f32 (float32_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_negate_q15 (q15_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +
    Conditions for optimum performance
    Input and output buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
    + +

    References _SIMD32_OFFSET, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_negate_q31 (q31_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_negate_q7 (q7_t * pSrc,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__negate.js b/Documentation/DSP/html/group__negate.js new file mode 100644 index 0000000..636b4ed --- /dev/null +++ b/Documentation/DSP/html/group__negate.js @@ -0,0 +1,7 @@ +var group__negate = +[ + [ "arm_negate_f32", "group__negate.html#ga2e169c4de6cc6e3ba4be9473531e6657", null ], + [ "arm_negate_q15", "group__negate.html#ga0239a833d72cf00290b9723c394e5042", null ], + [ "arm_negate_q31", "group__negate.html#ga2784c6887686a73dc7c364e2e41c776c", null ], + [ "arm_negate_q7", "group__negate.html#gaae78fc079a43bdaa3055f9b32e2a1f4c", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__offset.html b/Documentation/DSP/html/group__offset.html new file mode 100644 index 0000000..c20dcea --- /dev/null +++ b/Documentation/DSP/html/group__offset.html @@ -0,0 +1,358 @@ + + + + + +Vector Offset +CMSIS-DSP: Vector Offset + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Offset
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_offset_f32 (float32_t *pSrc, float32_t offset, float32_t *pDst, uint32_t blockSize)
     Adds a constant offset to a floating-point vector.
     
    void arm_offset_q15 (q15_t *pSrc, q15_t offset, q15_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q15 vector.
     
    void arm_offset_q31 (q31_t *pSrc, q31_t offset, q31_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q31 vector.
     
    void arm_offset_q7 (q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
     Adds a constant offset to a Q7 vector.
     
    +

    Description

    +

    Adds a constant offset to each element of a vector.

    +
            
+    pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
+

    The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer. There are separate functions for floating-point, Q7, Q15, and Q31 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_offset_f32 (float32_t * pSrc,
    float32_t offset,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]offsetis the offset to be added
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_offset_q15 (q15_t * pSrc,
    q15_t offset,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]offsetis the offset to be added
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_offset_q31 (q31_t * pSrc,
    q31_t offset,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]offsetis the offset to be added
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
    + +

    References blockSize, and clip_q63_to_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_offset_q7 (q7_t * pSrc,
    q7_t offset,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]offsetis the offset to be added
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
    + +

    References __PACKq7, __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__offset.js b/Documentation/DSP/html/group__offset.js new file mode 100644 index 0000000..1c48653 --- /dev/null +++ b/Documentation/DSP/html/group__offset.js @@ -0,0 +1,7 @@ +var group__offset = +[ + [ "arm_offset_f32", "group__offset.html#ga989dfae15235799d82f62ef9d356abb4", null ], + [ "arm_offset_q15", "group__offset.html#gab4c1d2391b599549e5a06fdfbc2747bf", null ], + [ "arm_offset_q31", "group__offset.html#gac84ec42cbbebc5c197a87d0221819acf", null ], + [ "arm_offset_q7", "group__offset.html#ga00bd9cc17c5bf905e76c91ad50886393", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__park.html b/Documentation/DSP/html/group__park.html new file mode 100644 index 0000000..c0d5a8c --- /dev/null +++ b/Documentation/DSP/html/group__park.html @@ -0,0 +1,294 @@ + + + + + +Vector Park Transform +CMSIS-DSP: Vector Park Transform + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Park Transform
    +
    Controller Functions
    +
    + + + + + + + + +

    +Functions

    static __INLINE void arm_park_f32 (float32_t Ialpha, float32_t Ibeta, float32_t *pId, float32_t *pIq, float32_t sinVal, float32_t cosVal)
     Floating-point Park transform.
     
    static __INLINE void arm_park_q31 (q31_t Ialpha, q31_t Ibeta, q31_t *pId, q31_t *pIq, q31_t sinVal, q31_t cosVal)
     Park transform for Q31 version.
     
    +

    Description

    +

    Forward Park transform converts the input two-coordinate vector to flux and torque components. The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents from the stationary to the moving reference frame and control the spatial relationship between the stator vector current and rotor flux vector. If we consider the d axis aligned with the rotor flux, the diagram below shows the current vector and the relationship from the two reference frames:

    +
    +park.gif +
    +Stator current space vector and its component in (a,b) and in the d,q rotating reference frame
    +

    The function operates on a single sample of data and each call to the function returns the processed output. The library provides separate functions for Q31 and floating-point data types.

    +
    Algorithm
    +parkFormula.gif +
    + where Ialpha and Ibeta are the stator vector components, pId and pIq are rotor vector components and cosVal and sinVal are the cosine and sine values of theta (rotor flux position).
    +
    Fixed-Point Behavior
    Care must be taken when using the Q31 version of the Park transform. In particular, the overflow and saturation behavior of the accumulator used must be considered. Refer to the function specific documentation below for usage guidelines.
    +

    Function Documentation

    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_park_f32 (float32_t Ialpha,
    float32_t Ibeta,
    float32_t * pId,
    float32_t * pIq,
    float32_t sinVal,
    float32_t cosVal 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + + + +
    [in]Ialphainput two-phase vector coordinate alpha
    [in]Ibetainput two-phase vector coordinate beta
    [out]pIdpoints to output rotor reference frame d
    [out]pIqpoints to output rotor reference frame q
    [in]sinValsine value of rotation angle theta
    [in]cosValcosine value of rotation angle theta
    +
    +
    +

    The function implements the forward Park transform.

    + +
    +
    + +
    +
    + + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    static __INLINE void arm_park_q31 (q31_t Ialpha,
    q31_t Ibeta,
    q31_t * pId,
    q31_t * pIq,
    q31_t sinVal,
    q31_t cosVal 
    )
    +     		+static
    +
    +
    Parameters
    + + + + + + + +
    [in]Ialphainput two-phase vector coordinate alpha
    [in]Ibetainput two-phase vector coordinate beta
    [out]pIdpoints to output rotor reference frame d
    [out]pIqpoints to output rotor reference frame q
    [in]sinValsine value of rotation angle theta
    [in]cosValcosine value of rotation angle theta
    +
    +
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 32-bit accumulator. The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format. There is saturation on the addition and subtraction, hence there is no risk of overflow.
    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__park.js b/Documentation/DSP/html/group__park.js new file mode 100644 index 0000000..350b164 --- /dev/null +++ b/Documentation/DSP/html/group__park.js @@ -0,0 +1,5 @@ +var group__park = +[ + [ "arm_park_f32", "group__park.html#ga08b3a683197de7e143fb00497787683c", null ], + [ "arm_park_q31", "group__park.html#gaf4cc6370c0cfc14ea66774ed3c5bb10f", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__power.html b/Documentation/DSP/html/group__power.html new file mode 100644 index 0000000..7c058d5 --- /dev/null +++ b/Documentation/DSP/html/group__power.html @@ -0,0 +1,330 @@ + + + + + +Power +CMSIS-DSP: Power + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Power
    +
    Statistics Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Sum of the squares of the elements of a floating-point vector.
     
    void arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
     Sum of the squares of the elements of a Q15 vector.
     
    void arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
     Sum of the squares of the elements of a Q31 vector.
     
    void arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Sum of the squares of the elements of a Q7 vector.
     
    +

    Description

    +

    Calculates the sum of the squares of the elements in the input vector. The underlying algorithm is used:

    +
        
+        Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
+

    There are separate functions for floating point, Q31, Q15, and Q7 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_power_f32 (float32_t * pSrc,
    uint32_t blockSize,
    float32_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultsum of the squares value returned here
    +
    +
    +
    Returns
    none.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_power_q15 (q15_t * pSrc,
    uint32_t blockSize,
    q63_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultsum of the squares value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_power_q31 (q31_t * pSrc,
    uint32_t blockSize,
    q63_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultsum of the squares value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format.
    + +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_power_q7 (q7_t * pSrc,
    uint32_t blockSize,
    q31_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultsum of the squares value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__power.js b/Documentation/DSP/html/group__power.js new file mode 100644 index 0000000..fd7010b --- /dev/null +++ b/Documentation/DSP/html/group__power.js @@ -0,0 +1,7 @@ +var group__power = +[ + [ "arm_power_f32", "group__power.html#ga993c00dd7f661d66bdb6e58426e893aa", null ], + [ "arm_power_q15", "group__power.html#ga7050c04b7515e01a75c38f1abbaf71ba", null ], + [ "arm_power_q31", "group__power.html#ga0b93d31bb5b5ed214c2b94d8a7744cd2", null ], + [ "arm_power_q7", "group__power.html#gaf969c85c5655e3d72d7b99ff188f92c9", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__q15__to__x.html b/Documentation/DSP/html/group__q15__to__x.html new file mode 100644 index 0000000..1fa9624 --- /dev/null +++ b/Documentation/DSP/html/group__q15__to__x.html @@ -0,0 +1,286 @@ + + + + + +Convert 16-bit Integer value +CMSIS-DSP: Convert 16-bit Integer value + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Convert 16-bit Integer value
    +
    Support Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_q15_to_float (q15_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to floating-point vector.
     
    void arm_q15_to_q31 (q15_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to Q31 vector.
     
    void arm_q15_to_q7 (q15_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the Q15 vector to Q7 vector.
     
    +

    Description

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q15_to_float (q15_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q15 input vector
    [out]*pDstpoints to the floating-point output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.    
+
    +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q15_to_q31 (q15_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q15 input vector
    [out]*pDstpoints to the Q31 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.    
+
    +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q15_to_q7 (q15_t * pSrc,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q15 input vector
    [out]*pDstpoints to the Q7 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.    
+
    +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__q15__to__x.js b/Documentation/DSP/html/group__q15__to__x.js new file mode 100644 index 0000000..776d6fc --- /dev/null +++ b/Documentation/DSP/html/group__q15__to__x.js @@ -0,0 +1,6 @@ +var group__q15__to__x = +[ + [ "arm_q15_to_float", "group__q15__to__x.html#gaf8b0d2324de273fc430b0e61ad4e9eb2", null ], + [ "arm_q15_to_q31", "group__q15__to__x.html#ga7ba2d87366990ad5380439e2b4a4c0a5", null ], + [ "arm_q15_to_q7", "group__q15__to__x.html#ga8fb31855ff8cce09c2ec9308f48ded69", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__q31__to__x.html b/Documentation/DSP/html/group__q31__to__x.html new file mode 100644 index 0000000..e0b7a57 --- /dev/null +++ b/Documentation/DSP/html/group__q31__to__x.html @@ -0,0 +1,289 @@ + + + + + +Convert 32-bit Integer value +CMSIS-DSP: Convert 32-bit Integer value + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Convert 32-bit Integer value
    +
    Support Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_q31_to_float (q31_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to floating-point vector.
     
    void arm_q31_to_q15 (q31_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to Q15 vector.
     
    void arm_q31_to_q7 (q31_t *pSrc, q7_t *pDst, uint32_t blockSize)
     Converts the elements of the Q31 vector to Q7 vector.
     
    +

    Description

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q31_to_float (q31_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q31 input vector
    [out]*pDstpoints to the floating-point output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.    
+
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q31_to_q15 (q31_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q31 input vector
    [out]*pDstpoints to the Q15 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.    
+
    +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q31_to_q7 (q31_t * pSrc,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q31 input vector
    [out]*pDstpoints to the Q7 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.     
+
    +

    References __PACKq7, __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__q31__to__x.js b/Documentation/DSP/html/group__q31__to__x.js new file mode 100644 index 0000000..96ff84d --- /dev/null +++ b/Documentation/DSP/html/group__q31__to__x.js @@ -0,0 +1,6 @@ +var group__q31__to__x = +[ + [ "arm_q31_to_float", "group__q31__to__x.html#gacf407b007a37da18e99dabd9023c56b4", null ], + [ "arm_q31_to_q15", "group__q31__to__x.html#ga901dede4661365c9e7c630d3eb31c32c", null ], + [ "arm_q31_to_q7", "group__q31__to__x.html#ga7f297d1a7d776805395095fdb24a8071", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__q7__to__x.html b/Documentation/DSP/html/group__q7__to__x.html new file mode 100644 index 0000000..0185838 --- /dev/null +++ b/Documentation/DSP/html/group__q7__to__x.html @@ -0,0 +1,286 @@ + + + + + +Convert 8-bit Integer value +CMSIS-DSP: Convert 8-bit Integer value + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Convert 8-bit Integer value
    +
    Support Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_q7_to_float (q7_t *pSrc, float32_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to floating-point vector.
     
    void arm_q7_to_q15 (q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to Q15 vector.
     
    void arm_q7_to_q31 (q7_t *pSrc, q31_t *pDst, uint32_t blockSize)
     Converts the elements of the Q7 vector to Q31 vector.
     
    +

    Description

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q7_to_float (q7_t * pSrc,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q7 input vector
    [out]*pDstpoints to the floating-point output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.    
+
    +

    References blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q7_to_q15 (q7_t * pSrc,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q7 input vector
    [out]*pDstpoints to the Q15 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.    
+
    +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_q7_to_q31 (q7_t * pSrc,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the Q7 input vector
    [out]*pDstpoints to the Q31 output vector
    [in]blockSizelength of the input vector
    +
    +
    +
    Returns
    none.
    +
    Description:
    +

    The equation used for the conversion process is:

    +
        
+        pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.   
+
    +

    References __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__q7__to__x.js b/Documentation/DSP/html/group__q7__to__x.js new file mode 100644 index 0000000..41345e1 --- /dev/null +++ b/Documentation/DSP/html/group__q7__to__x.js @@ -0,0 +1,6 @@ +var group__q7__to__x = +[ + [ "arm_q7_to_float", "group__q7__to__x.html#ga656620f957b65512ed83db03fd455ec5", null ], + [ "arm_q7_to_q15", "group__q7__to__x.html#gabc02597fc3f01033daf43ec0547a2f78", null ], + [ "arm_q7_to_q31", "group__q7__to__x.html#gad8958cd3cb7f521466168b46a25b7908", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__scale.html b/Documentation/DSP/html/group__scale.html new file mode 100644 index 0000000..ffb6abe --- /dev/null +++ b/Documentation/DSP/html/group__scale.html @@ -0,0 +1,391 @@ + + + + + +Vector Scale +CMSIS-DSP: Vector Scale + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Scale
    +
    Basic Math Functions
    +
    + + + + + + + + + + + + + + +

    +Functions

    void arm_scale_f32 (float32_t *pSrc, float32_t scale, float32_t *pDst, uint32_t blockSize)
     Multiplies a floating-point vector by a scalar.
     
    void arm_scale_q15 (q15_t *pSrc, q15_t scaleFract, int8_t shift, q15_t *pDst, uint32_t blockSize)
     Multiplies a Q15 vector by a scalar.
     
    void arm_scale_q31 (q31_t *pSrc, q31_t scaleFract, int8_t shift, q31_t *pDst, uint32_t blockSize)
     Multiplies a Q31 vector by a scalar.
     
    void arm_scale_q7 (q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst, uint32_t blockSize)
     Multiplies a Q7 vector by a scalar.
     
    +

    Description

    +

    Multiply a vector by a scalar value. For floating-point data, the algorithm used is:

    +
            
+    pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.        
+

    In the fixed-point Q7, Q15, and Q31 functions, scale is represented by a fractional multiplication scaleFract and an arithmetic shift shift. The shift allows the gain of the scaling operation to exceed 1.0. The algorithm used with fixed-point data is:

    +
            
+    pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.        
+

    The overall scale factor applied to the fixed-point data is

    +
            
+    scale = scaleFract * 2^shift.        
+

    The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_scale_f32 (float32_t * pSrc,
    float32_t scale,
    float32_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]scalescale factor to be applied
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_graphic_equalizer_example_q31.c, and arm_signal_converge_example_f32.c.
    +
    +

    References blockSize.

    + +

    Referenced by arm_dct4_f32(), and main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_scale_q15 (q15_t * pSrc,
    q15_t scaleFract,
    int8_t shift,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcpoints to the input vector
    [in]scaleFractfractional portion of the scale value
    [in]shiftnumber of bits to shift the result by
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The input data *pSrc and scaleFract are in 1.15 format. These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_scale_q31 (q31_t * pSrc,
    q31_t scaleFract,
    int8_t shift,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcpoints to the input vector
    [in]scaleFractfractional portion of the scale value
    [in]shiftnumber of bits to shift the result by
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The input data *pSrc and scaleFract are in 1.31 format. These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +
    +

    References blockSize.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_scale_q7 (q7_t * pSrc,
    q7_t scaleFract,
    int8_t shift,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + + +
    [in]*pSrcpoints to the input vector
    [in]scaleFractfractional portion of the scale value
    [in]shiftnumber of bits to shift the result by
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The input data *pSrc and scaleFract are in 1.7 format. These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
    + +

    References __PACKq7, __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__scale.js b/Documentation/DSP/html/group__scale.js new file mode 100644 index 0000000..c2c8733 --- /dev/null +++ b/Documentation/DSP/html/group__scale.js @@ -0,0 +1,7 @@ +var group__scale = +[ + [ "arm_scale_f32", "group__scale.html#ga3487af88b112f682ee90589cd419e123", null ], + [ "arm_scale_q15", "group__scale.html#gafaac0e1927daffeb68a42719b53ea780", null ], + [ "arm_scale_q31", "group__scale.html#ga83e36cd82bf51ce35406a199e477d47c", null ], + [ "arm_scale_q7", "group__scale.html#gabc9fd3d37904c58df56492b351d21fb0", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__shift.html b/Documentation/DSP/html/group__shift.html new file mode 100644 index 0000000..7f4f2ad --- /dev/null +++ b/Documentation/DSP/html/group__shift.html @@ -0,0 +1,311 @@ + + + + + +Vector Shift +CMSIS-DSP: Vector Shift + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Vector Shift
    +
    Basic Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_shift_q15 (q15_t *pSrc, int8_t shiftBits, q15_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q15 vector a specified number of bits.
     
    void arm_shift_q31 (q31_t *pSrc, int8_t shiftBits, q31_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q31 vector a specified number of bits.
     
    void arm_shift_q7 (q7_t *pSrc, int8_t shiftBits, q7_t *pDst, uint32_t blockSize)
     Shifts the elements of a Q7 vector a specified number of bits.
     
    +

    Description

    +

    Shifts the elements of a fixed-point vector by a specified number of bits. There are separate functions for Q7, Q15, and Q31 data types. The underlying algorithm used is:

    +
            
+    pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.        
+

    If shift is positive then the elements of the vector are shifted to the left. If shift is negative then the elements of the vector are shifted to the right.

    +

    The functions support in-place computation allowing the source and destination pointers to reference the same memory buffer.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_shift_q15 (q15_t * pSrc,
    int8_t shiftBits,
    q15_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]shiftBitsnumber of bits to shift. A positive value shifts left; a negative value shifts right.
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
    + +

    References __SIMD32, and blockSize.

    + +

    Referenced by arm_dct4_q15().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_shift_q31 (q31_t * pSrc,
    int8_t shiftBits,
    q31_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]shiftBitsnumber of bits to shift. A positive value shifts left; a negative value shifts right.
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
    + +

    References blockSize, and clip_q63_to_q31().

    + +

    Referenced by arm_dct4_q31().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_shift_q7 (q7_t * pSrc,
    int8_t shiftBits,
    q7_t * pDst,
    uint32_t blockSize 
    )
    +
    +
    Parameters
    + + + + + +
    [in]*pSrcpoints to the input vector
    [in]shiftBitsnumber of bits to shift. A positive value shifts left; a negative value shifts right.
    [out]*pDstpoints to the output vector
    [in]blockSizenumber of samples in the vector
    +
    +
    +
    Returns
    none.
    +
    Conditions for optimum performance
    Input and output buffers should be aligned by 32-bit
    +

    Scaling and Overflow Behavior:

    +
    The function uses saturating arithmetic. Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
    + +

    References __PACKq7, __SIMD32, and blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__shift.js b/Documentation/DSP/html/group__shift.js new file mode 100644 index 0000000..1b19868 --- /dev/null +++ b/Documentation/DSP/html/group__shift.js @@ -0,0 +1,6 @@ +var group__shift = +[ + [ "arm_shift_q15", "group__shift.html#gaa1757e53279780107acc92cf100adb61", null ], + [ "arm_shift_q31", "group__shift.html#ga387dd8b7b87377378280978f16cdb13d", null ], + [ "arm_shift_q7", "group__shift.html#ga47295d08a685f7de700a48dafb4db6fb", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__sin.html b/Documentation/DSP/html/group__sin.html new file mode 100644 index 0000000..8916259 --- /dev/null +++ b/Documentation/DSP/html/group__sin.html @@ -0,0 +1,236 @@ + + + + + +Sine +CMSIS-DSP: Sine + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Sine
    +
    Fast Math Functions
    +
    + + + + + + + + + + + +

    +Functions

    float32_t arm_sin_f32 (float32_t x)
     Fast approximation to the trigonometric sine function for floating-point data.
     
    q15_t arm_sin_q15 (q15_t x)
     Fast approximation to the trigonometric sine function for Q15 data.
     
    q31_t arm_sin_q31 (q31_t x)
     Fast approximation to the trigonometric sine function for Q31 data.
     
    +

    Description

    +

    Computes the trigonometric sine function using a combination of table lookup and linear interpolation. There are separate functions for Q15, Q31, and floating-point data types. The input to the floating-point version is in radians while the fixed-point Q15 and Q31 have a scaled input with the range [0 +0.9999] mapping to [0 2*pi). The fixed-point range is chosen so that a value of 2*pi wraps around to 0.

    +

    The implementation is based on table lookup using 256 values together with linear interpolation. The steps used are:

    +
      +
    1. Calculation of the nearest integer table index
      2. +
    2. Compute the fractional portion (fract) of the table index.
      3. +
    3. The final result equals (1.0f-fract)*a + fract*b;
      4. +
    +

    where

    +
    +   b=Table[index+0];
+   c=Table[index+1];
+

    Function Documentation

    + +
    +
    + + + + + + + + +
    float32_t arm_sin_f32 (float32_t x)
    +
    +
    Parameters
    + + +
    [in]xinput value in radians.
    +
    +
    +
    Returns
    sin(x).
    +
    Examples:
    arm_linear_interp_example_f32.c, and arm_sin_cos_example_f32.c.
    +
    +

    References FAST_MATH_TABLE_SIZE, and sinTable_f32.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + +
    q15_t arm_sin_q15 (q15_t x)
    +
    +
    Parameters
    + + +
    [in]xScaled input value in radians.
    +
    +
    +
    Returns
    sin(x).
    +

    The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).

    + +

    References FAST_MATH_Q15_SHIFT, and sinTable_q15.

    + +
    +
    + +
    +
    + + + + + + + + +
    q31_t arm_sin_q31 (q31_t x)
    +
    +
    Parameters
    + + +
    [in]xScaled input value in radians.
    +
    +
    +
    Returns
    sin(x).
    +

    The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).

    + +

    References FAST_MATH_Q31_SHIFT, and sinTable_q31.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__sin.js b/Documentation/DSP/html/group__sin.js new file mode 100644 index 0000000..11e645e --- /dev/null +++ b/Documentation/DSP/html/group__sin.js @@ -0,0 +1,6 @@ +var group__sin = +[ + [ "arm_sin_f32", "group__sin.html#gae164899c4a3fc0e946dc5d55555fe541", null ], + [ "arm_sin_q15", "group__sin.html#ga1fc6d6640be6cfa688a8bea0a48397ee", null ], + [ "arm_sin_q31", "group__sin.html#ga57aade7d8892585992cdc6375bd82f9c", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/group__variance.html b/Documentation/DSP/html/group__variance.html new file mode 100644 index 0000000..8aa2768 --- /dev/null +++ b/Documentation/DSP/html/group__variance.html @@ -0,0 +1,285 @@ + + + + + +Variance +CMSIS-DSP: Variance + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Functions
    +
    +
    Variance
    +
    Statistics Functions
    +
    + + + + + + + + + + + +

    +Functions

    void arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
     Variance of the elements of a floating-point vector.
     
    void arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
     Variance of the elements of a Q15 vector.
     
    void arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
     Variance of the elements of a Q31 vector.
     
    +

    Description

    +

    Calculates the variance of the elements in the input vector. The underlying algorithm is used:

    +
        
+        Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)
            where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
                            sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
+

    There are separate functions for floating point, Q31, and Q15 data types.

    +

    Function Documentation

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_var_f32 (float32_t * pSrc,
    uint32_t blockSize,
    float32_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultvariance value returned here
    +
    +
    +
    Returns
    none.
    +
    Examples:
    arm_class_marks_example_f32.c.
    +
    +

    References blockSize, and mean.

    + +

    Referenced by main().

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_var_q15 (q15_t * pSrc,
    uint32_t blockSize,
    q15_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultvariance value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.
    + +

    References __SIMD32, and blockSize.

    + +
    +
    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    void arm_var_q31 (q31_t * pSrc,
    uint32_t blockSize,
    q31_t * pResult 
    )
    +
    +
    Parameters
    + + + + +
    [in]*pSrcpoints to the input vector
    [in]blockSizelength of the input vector
    [out]*pResultvariance value returned here
    +
    +
    +
    Returns
    none.
    +

    Scaling and Overflow Behavior:

    +
    The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
    + +

    References blockSize.

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/group__variance.js b/Documentation/DSP/html/group__variance.js new file mode 100644 index 0000000..8adebf2 --- /dev/null +++ b/Documentation/DSP/html/group__variance.js @@ -0,0 +1,6 @@ +var group__variance = +[ + [ "arm_var_f32", "group__variance.html#ga393f26c5a3bfa05624fb8d32232a6d96", null ], + [ "arm_var_q15", "group__variance.html#ga79dce009ed2de28a125aeb3f19631654", null ], + [ "arm_var_q31", "group__variance.html#gac02873f1c2cc80adfd799305f0e6465d", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/index.html b/Documentation/DSP/html/index.html new file mode 100644 index 0000000..2c46801 --- /dev/null +++ b/Documentation/DSP/html/index.html @@ -0,0 +1,219 @@ + + + + + +CMSIS DSP Software Library +CMSIS-DSP: CMSIS DSP Software Library + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    CMSIS DSP Software Library
    +
    +
    +

    Introduction

    +

    This user manual describes the CMSIS DSP software library, a suite of common signal processing functions for use on Cortex-M processor based devices.

    +

    The library is divided into a number of functions each covering a specific category:

    +
      +
    • Basic math functions
      • +
    • Fast math functions
      • +
    • Complex math functions
      • +
    • Filters
      • +
    • Matrix functions
      • +
    • Transforms
      • +
    • Motor control functions
      • +
    • Statistical functions
      • +
    • Support functions
      • +
    • Interpolation functions
      • +
    +

    The library has separate functions for operating on 8-bit integers, 16-bit integers, 32-bit integer and 32-bit floating-point values.

    +

    Using the Library

    +

    The library installer contains prebuilt versions of the libraries in the Lib folder.

    +
      +
    • arm_cortexM7lfdp_math.lib (Little endian and Double Precision Floating Point Unit on Cortex-M7)
      • +
    • arm_cortexM7bfdp_math.lib (Big endian and Double Precision Floating Point Unit on Cortex-M7)
      • +
    • arm_cortexM7lfsp_math.lib (Little endian and Single Precision Floating Point Unit on Cortex-M7)
      • +
    • arm_cortexM7bfsp_math.lib (Big endian and Single Precision Floating Point Unit on Cortex-M7)
      • +
    • arm_cortexM7l_math.lib (Little endian on Cortex-M7)
      • +
    • arm_cortexM7b_math.lib (Big endian on Cortex-M7)
      • +
    • arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4)
      • +
    • arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4)
      • +
    • arm_cortexM4l_math.lib (Little endian on Cortex-M4)
      • +
    • arm_cortexM4b_math.lib (Big endian on Cortex-M4)
      • +
    • arm_cortexM3l_math.lib (Little endian on Cortex-M3)
      • +
    • arm_cortexM3b_math.lib (Big endian on Cortex-M3)
      • +
    • arm_cortexM0l_math.lib (Little endian on Cortex-M0 / CortexM0+)
      • +
    • arm_cortexM0b_math.lib (Big endian on Cortex-M0 / CortexM0+)
      • +
    +

    The library functions are declared in the public file arm_math.h which is placed in the Include folder. Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single public header file arm_math.h for Cortex-M7/M4/M3/M0/M0+ with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. Define the appropriate pre processor MACRO ARM_MATH_CM7 or ARM_MATH_CM4 or ARM_MATH_CM3 or ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.

    +

    Examples

    +

    The library ships with a number of examples which demonstrate how to use the library functions.

    +

    Toolchain Support

    +

    The library has been developed and tested with MDK-ARM version 5.14.0.0 The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.

    +

    Building the Library

    +

    The library installer contains a project file to re build libraries on MDK-ARM Tool chain in the CMSIS\DSP_Lib\Source\ARM folder.

    +
      +
    • arm_cortexM_math.uvprojx
      • +
    +

    The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional pre processor MACROs detailed above.

    +

    Pre-processor Macros

    +

    Each library project have differant pre-processor macros.

    +
      +
    • UNALIGNED_SUPPORT_DISABLE:
      • +
    +

    Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access

    +
      +
    • ARM_MATH_BIG_ENDIAN:
      • +
    +

    Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.

    +
      +
    • ARM_MATH_MATRIX_CHECK:
      • +
    +

    Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices

    +
      +
    • ARM_MATH_ROUNDING:
      • +
    +

    Define macro ARM_MATH_ROUNDING for rounding on support functions

    +
      +
    • ARM_MATH_CMx:
      • +
    +

    Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and ARM_MATH_CM7 for building the library on cortex-M7.

    +
      +
    • __FPU_PRESENT:
      • +
    +

    Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries

    +
    +

    CMSIS-DSP in ARM::CMSIS Pack

    +

    The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories:

    + + + + + + + + + + + +
    File/Folder Content
    CMSIS\Documentation\DSP This documentation
    CMSIS\DSP_Lib Software license agreement (license.txt)
    CMSIS\DSP_Lib\Examples Example projects demonstrating the usage of the library functions
    CMSIS\DSP_Lib\Source Source files for rebuilding the library
    +
    +

    Revision History of CMSIS-DSP

    +

    Please refer to Change Log.

    +

    Copyright Notice

    +

    Copyright (C) 2010-2015 ARM Limited. All rights reserved.

    +
    +
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b.preventDefault()}this._mouseDistanceMet(b)&&this._mouseDelayMet(b)&&(this._mouseStarted=this._mouseStart(this._mouseDownEvent,b)!==!1,this._mouseStarted?this._mouseDrag(b):this._mouseUp(b));return!this._mouseStarted},_mouseUp:function(b){a(document).unbind("mousemove."+this.widgetName,this._mouseMoveDelegate).unbind("mouseup."+this.widgetName,this._mouseUpDelegate),this._mouseStarted&&(this._mouseStarted=!1,b.target==this._mouseDownEvent.target&&a.data(b.target,this.widgetName+".preventClickEvent",!0),this._mouseStop(b));return!1},_mouseDistanceMet:function(a){return Math.max(Math.abs(this._mouseDownEvent.pageX-a.pageX),Math.abs(this._mouseDownEvent.pageY-a.pageY))>=this.options.distance},_mouseDelayMet:function(a){return this.mouseDelayMet},_mouseStart:function(a){},_mouseDrag:function(a){},_mouseStop:function(a){},_mouseCapture:function(a){return!0}})})(jQuery); +/* + * jQuery UI Resizable 1.8.18 + * + * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about) + * Dual licensed under the MIT or GPL Version 2 licenses. + * http://jquery.org/license + * + * http://docs.jquery.com/UI/Resizables + * + * Depends: + * jquery.ui.core.js + * jquery.ui.mouse.js + * jquery.ui.widget.js + */ +(function(a,b){a.widget("ui.resizable",a.ui.mouse,{widgetEventPrefix:"resize",options:{alsoResize:!1,animate:!1,animateDuration:"slow",animateEasing:"swing",aspectRatio:!1,autoHide:!1,containment:!1,ghost:!1,grid:!1,handles:"e,s,se",helper:!1,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:1e3},_create:function(){var b=this,c=this.options;this.element.addClass("ui-resizable"),a.extend(this,{_aspectRatio:!!c.aspectRatio,aspectRatio:c.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:c.helper||c.ghost||c.animate?c.helper||"ui-resizable-helper":null}),this.element[0].nodeName.match(/canvas|textarea|input|select|button|img/i)&&(this.element.wrap(a('
    ').css({position:this.element.css("position"),width:this.element.outerWidth(),height:this.element.outerHeight(),top:this.element.css("top"),left:this.element.css("left")})),this.element=this.element.parent().data("resizable",this.element.data("resizable")),this.elementIsWrapper=!0,this.element.css({marginLeft:this.originalElement.css("marginLeft"),marginTop:this.originalElement.css("marginTop"),marginRight:this.originalElement.css("marginRight"),marginBottom:this.originalElement.css("marginBottom")}),this.originalElement.css({marginLeft:0,marginTop:0,marginRight:0,marginBottom:0}),this.originalResizeStyle=this.originalElement.css("resize"),this.originalElement.css("resize","none"),this._proportionallyResizeElements.push(this.originalElement.css({position:"static",zoom:1,display:"block"})),this.originalElement.css({margin:this.originalElement.css("margin")}),this._proportionallyResize()),this.handles=c.handles||(a(".ui-resizable-handle",this.element).length?{n:".ui-resizable-n",e:".ui-resizable-e",s:".ui-resizable-s",w:".ui-resizable-w",se:".ui-resizable-se",sw:".ui-resizable-sw",ne:".ui-resizable-ne",nw:".ui-resizable-nw"}:"e,s,se");if(this.handles.constructor==String){this.handles=="all"&&(this.handles="n,e,s,w,se,sw,ne,nw");var d=this.handles.split(",");this.handles={};for(var e=0;e
    ');/sw|se|ne|nw/.test(f)&&h.css({zIndex:++c.zIndex}),"se"==f&&h.addClass("ui-icon ui-icon-gripsmall-diagonal-se"),this.handles[f]=".ui-resizable-"+f,this.element.append(h)}}this._renderAxis=function(b){b=b||this.element;for(var c in this.handles){this.handles[c].constructor==String&&(this.handles[c]=a(this.handles[c],this.element).show());if(this.elementIsWrapper&&this.originalElement[0].nodeName.match(/textarea|input|select|button/i)){var d=a(this.handles[c],this.element),e=0;e=/sw|ne|nw|se|n|s/.test(c)?d.outerHeight():d.outerWidth();var f=["padding",/ne|nw|n/.test(c)?"Top":/se|sw|s/.test(c)?"Bottom":/^e$/.test(c)?"Right":"Left"].join("");b.css(f,e),this._proportionallyResize()}if(!a(this.handles[c]).length)continue}},this._renderAxis(this.element),this._handles=a(".ui-resizable-handle",this.element).disableSelection(),this._handles.mouseover(function(){if(!b.resizing){if(this.className)var a=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i);b.axis=a&&a[1]?a[1]:"se"}}),c.autoHide&&(this._handles.hide(),a(this.element).addClass("ui-resizable-autohide").hover(function(){c.disabled||(a(this).removeClass("ui-resizable-autohide"),b._handles.show())},function(){c.disabled||b.resizing||(a(this).addClass("ui-resizable-autohide"),b._handles.hide())})),this._mouseInit()},destroy:function(){this._mouseDestroy();var b=function(b){a(b).removeClass("ui-resizable ui-resizable-disabled ui-resizable-resizing").removeData("resizable").unbind(".resizable").find(".ui-resizable-handle").remove()};if(this.elementIsWrapper){b(this.element);var c=this.element;c.after(this.originalElement.css({position:c.css("position"),width:c.outerWidth(),height:c.outerHeight(),top:c.css("top"),left:c.css("left")})).remove()}this.originalElement.css("resize",this.originalResizeStyle),b(this.originalElement);return this},_mouseCapture:function(b){var c=!1;for(var d in this.handles)a(this.handles[d])[0]==b.target&&(c=!0);return!this.options.disabled&&c},_mouseStart:function(b){var d=this.options,e=this.element.position(),f=this.element;this.resizing=!0,this.documentScroll={top:a(document).scrollTop(),left:a(document).scrollLeft()},(f.is(".ui-draggable")||/absolute/.test(f.css("position")))&&f.css({position:"absolute",top:e.top,left:e.left}),this._renderProxy();var g=c(this.helper.css("left")),h=c(this.helper.css("top"));d.containment&&(g+=a(d.containment).scrollLeft()||0,h+=a(d.containment).scrollTop()||0),this.offset=this.helper.offset(),this.position={left:g,top:h},this.size=this._helper?{width:f.outerWidth(),height:f.outerHeight()}:{width:f.width(),height:f.height()},this.originalSize=this._helper?{width:f.outerWidth(),height:f.outerHeight()}:{width:f.width(),height:f.height()},this.originalPosition={left:g,top:h},this.sizeDiff={width:f.outerWidth()-f.width(),height:f.outerHeight()-f.height()},this.originalMousePosition={left:b.pageX,top:b.pageY},this.aspectRatio=typeof d.aspectRatio=="number"?d.aspectRatio:this.originalSize.width/this.originalSize.height||1;var i=a(".ui-resizable-"+this.axis).css("cursor");a("body").css("cursor",i=="auto"?this.axis+"-resize":i),f.addClass("ui-resizable-resizing"),this._propagate("start",b);return!0},_mouseDrag:function(b){var c=this.helper,d=this.options,e={},f=this,g=this.originalMousePosition,h=this.axis,i=b.pageX-g.left||0,j=b.pageY-g.top||0,k=this._change[h];if(!k)return!1;var l=k.apply(this,[b,i,j]),m=a.browser.msie&&a.browser.version<7,n=this.sizeDiff;this._updateVirtualBoundaries(b.shiftKey);if(this._aspectRatio||b.shiftKey)l=this._updateRatio(l,b);l=this._respectSize(l,b),this._propagate("resize",b),c.css({top:this.position.top+"px",left:this.position.left+"px",width:this.size.width+"px",height:this.size.height+"px"}),!this._helper&&this._proportionallyResizeElements.length&&this._proportionallyResize(),this._updateCache(l),this._trigger("resize",b,this.ui());return!1},_mouseStop:function(b){this.resizing=!1;var c=this.options,d=this;if(this._helper){var e=this._proportionallyResizeElements,f=e.length&&/textarea/i.test(e[0].nodeName),g=f&&a.ui.hasScroll(e[0],"left")?0:d.sizeDiff.height,h=f?0:d.sizeDiff.width,i={width:d.helper.width()-h,height:d.helper.height()-g},j=parseInt(d.element.css("left"),10)+(d.position.left-d.originalPosition.left)||null,k=parseInt(d.element.css("top"),10)+(d.position.top-d.originalPosition.top)||null;c.animate||this.element.css(a.extend(i,{top:k,left:j})),d.helper.height(d.size.height),d.helper.width(d.size.width),this._helper&&!c.animate&&this._proportionallyResize()}a("body").css("cursor","auto"),this.element.removeClass("ui-resizable-resizing"),this._propagate("stop",b),this._helper&&this.helper.remove();return!1},_updateVirtualBoundaries:function(a){var b=this.options,c,e,f,g,h;h={minWidth:d(b.minWidth)?b.minWidth:0,maxWidth:d(b.maxWidth)?b.maxWidth:Infinity,minHeight:d(b.minHeight)?b.minHeight:0,maxHeight:d(b.maxHeight)?b.maxHeight:Infinity};if(this._aspectRatio||a)c=h.minHeight*this.aspectRatio,f=h.minWidth/this.aspectRatio,e=h.maxHeight*this.aspectRatio,g=h.maxWidth/this.aspectRatio,c>h.minWidth&&(h.minWidth=c),f>h.minHeight&&(h.minHeight=f),ea.width,k=d(a.height)&&e.minHeight&&e.minHeight>a.height;j&&(a.width=e.minWidth),k&&(a.height=e.minHeight),h&&(a.width=e.maxWidth),i&&(a.height=e.maxHeight);var l=this.originalPosition.left+this.originalSize.width,m=this.position.top+this.size.height,n=/sw|nw|w/.test(g),o=/nw|ne|n/.test(g);j&&n&&(a.left=l-e.minWidth),h&&n&&(a.left=l-e.maxWidth),k&&o&&(a.top=m-e.minHeight),i&&o&&(a.top=m-e.maxHeight);var p=!a.width&&!a.height;p&&!a.left&&a.top?a.top=null:p&&!a.top&&a.left&&(a.left=null);return a},_proportionallyResize:function(){var b=this.options;if(!!this._proportionallyResizeElements.length){var c=this.helper||this.element;for(var d=0;d');var d=a.browser.msie&&a.browser.version<7,e=d?1:0,f=d?2:-1;this.helper.addClass(this._helper).css({width:this.element.outerWidth()+f,height:this.element.outerHeight()+f,position:"absolute",left:this.elementOffset.left-e+"px",top:this.elementOffset.top-e+"px",zIndex:++c.zIndex}),this.helper.appendTo("body").disableSelection()}else this.helper=this.element},_change:{e:function(a,b,c){return{width:this.originalSize.width+b}},w:function(a,b,c){var d=this.options,e=this.originalSize,f=this.originalPosition;return{left:f.left+b,width:e.width-b}},n:function(a,b,c){var d=this.options,e=this.originalSize,f=this.originalPosition;return{top:f.top+c,height:e.height-c}},s:function(a,b,c){return{height:this.originalSize.height+c}},se:function(b,c,d){return a.extend(this._change.s.apply(this,arguments),this._change.e.apply(this,[b,c,d]))},sw:function(b,c,d){return a.extend(this._change.s.apply(this,arguments),this._change.w.apply(this,[b,c,d]))},ne:function(b,c,d){return a.extend(this._change.n.apply(this,arguments),this._change.e.apply(this,[b,c,d]))},nw:function(b,c,d){return a.extend(this._change.n.apply(this,arguments),this._change.w.apply(this,[b,c,d]))}},_propagate:function(b,c){a.ui.plugin.call(this,b,[c,this.ui()]),b!="resize"&&this._trigger(b,c,this.ui())},plugins:{},ui:function(){return{originalElement:this.originalElement,element:this.element,helper:this.helper,position:this.position,size:this.size,originalSize:this.originalSize,originalPosition:this.originalPosition}}}),a.extend(a.ui.resizable,{version:"1.8.18"}),a.ui.plugin.add("resizable","alsoResize",{start:function(b,c){var d=a(this).data("resizable"),e=d.options,f=function(b){a(b).each(function(){var b=a(this);b.data("resizable-alsoresize",{width:parseInt(b.width(),10),height:parseInt(b.height(),10),left:parseInt(b.css("left"),10),top:parseInt(b.css("top"),10)})})};typeof e.alsoResize=="object"&&!e.alsoResize.parentNode?e.alsoResize.length?(e.alsoResize=e.alsoResize[0],f(e.alsoResize)):a.each(e.alsoResize,function(a){f(a)}):f(e.alsoResize)},resize:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.originalSize,g=d.originalPosition,h={height:d.size.height-f.height||0,width:d.size.width-f.width||0,top:d.position.top-g.top||0,left:d.position.left-g.left||0},i=function(b,d){a(b).each(function(){var b=a(this),e=a(this).data("resizable-alsoresize"),f={},g=d&&d.length?d:b.parents(c.originalElement[0]).length?["width","height"]:["width","height","top","left"];a.each(g,function(a,b){var c=(e[b]||0)+(h[b]||0);c&&c>=0&&(f[b]=c||null)}),b.css(f)})};typeof e.alsoResize=="object"&&!e.alsoResize.nodeType?a.each(e.alsoResize,function(a,b){i(a,b)}):i(e.alsoResize)},stop:function(b,c){a(this).removeData("resizable-alsoresize")}}),a.ui.plugin.add("resizable","animate",{stop:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d._proportionallyResizeElements,g=f.length&&/textarea/i.test(f[0].nodeName),h=g&&a.ui.hasScroll(f[0],"left")?0:d.sizeDiff.height,i=g?0:d.sizeDiff.width,j={width:d.size.width-i,height:d.size.height-h},k=parseInt(d.element.css("left"),10)+(d.position.left-d.originalPosition.left)||null,l=parseInt(d.element.css("top"),10)+(d.position.top-d.originalPosition.top)||null;d.element.animate(a.extend(j,l&&k?{top:l,left:k}:{}),{duration:e.animateDuration,easing:e.animateEasing,step:function(){var c={width:parseInt(d.element.css("width"),10),height:parseInt(d.element.css("height"),10),top:parseInt(d.element.css("top"),10),left:parseInt(d.element.css("left"),10)};f&&f.length&&a(f[0]).css({width:c.width,height:c.height}),d._updateCache(c),d._propagate("resize",b)}})}}),a.ui.plugin.add("resizable","containment",{start:function(b,d){var e=a(this).data("resizable"),f=e.options,g=e.element,h=f.containment,i=h instanceof a?h.get(0):/parent/.test(h)?g.parent().get(0):h;if(!!i){e.containerElement=a(i);if(/document/.test(h)||h==document)e.containerOffset={left:0,top:0},e.containerPosition={left:0,top:0},e.parentData={element:a(document),left:0,top:0,width:a(document).width(),height:a(document).height()||document.body.parentNode.scrollHeight};else{var j=a(i),k=[];a(["Top","Right","Left","Bottom"]).each(function(a,b){k[a]=c(j.css("padding"+b))}),e.containerOffset=j.offset(),e.containerPosition=j.position(),e.containerSize={height:j.innerHeight()-k[3],width:j.innerWidth()-k[1]};var l=e.containerOffset,m=e.containerSize.height,n=e.containerSize.width,o=a.ui.hasScroll(i,"left")?i.scrollWidth:n,p=a.ui.hasScroll(i)?i.scrollHeight:m;e.parentData={element:i,left:l.left,top:l.top,width:o,height:p}}}},resize:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.containerSize,g=d.containerOffset,h=d.size,i=d.position,j=d._aspectRatio||b.shiftKey,k={top:0,left:0},l=d.containerElement;l[0]!=document&&/static/.test(l.css("position"))&&(k=g),i.left<(d._helper?g.left:0)&&(d.size.width=d.size.width+(d._helper?d.position.left-g.left:d.position.left-k.left),j&&(d.size.height=d.size.width/e.aspectRatio),d.position.left=e.helper?g.left:0),i.top<(d._helper?g.top:0)&&(d.size.height=d.size.height+(d._helper?d.position.top-g.top:d.position.top),j&&(d.size.width=d.size.height*e.aspectRatio),d.position.top=d._helper?g.top:0),d.offset.left=d.parentData.left+d.position.left,d.offset.top=d.parentData.top+d.position.top;var m=Math.abs((d._helper?d.offset.left-k.left:d.offset.left-k.left)+d.sizeDiff.width),n=Math.abs((d._helper?d.offset.top-k.top:d.offset.top-g.top)+d.sizeDiff.height),o=d.containerElement.get(0)==d.element.parent().get(0),p=/relative|absolute/.test(d.containerElement.css("position"));o&&p +&&(m-=d.parentData.left),m+d.size.width>=d.parentData.width&&(d.size.width=d.parentData.width-m,j&&(d.size.height=d.size.width/d.aspectRatio)),n+d.size.height>=d.parentData.height&&(d.size.height=d.parentData.height-n,j&&(d.size.width=d.size.height*d.aspectRatio))},stop:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.position,g=d.containerOffset,h=d.containerPosition,i=d.containerElement,j=a(d.helper),k=j.offset(),l=j.outerWidth()-d.sizeDiff.width,m=j.outerHeight()-d.sizeDiff.height;d._helper&&!e.animate&&/relative/.test(i.css("position"))&&a(this).css({left:k.left-h.left-g.left,width:l,height:m}),d._helper&&!e.animate&&/static/.test(i.css("position"))&&a(this).css({left:k.left-h.left-g.left,width:l,height:m})}}),a.ui.plugin.add("resizable","ghost",{start:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.size;d.ghost=d.originalElement.clone(),d.ghost.css({opacity:.25,display:"block",position:"relative",height:f.height,width:f.width,margin:0,left:0,top:0}).addClass("ui-resizable-ghost").addClass(typeof e.ghost=="string"?e.ghost:""),d.ghost.appendTo(d.helper)},resize:function(b,c){var d=a(this).data("resizable"),e=d.options;d.ghost&&d.ghost.css({position:"relative",height:d.size.height,width:d.size.width})},stop:function(b,c){var d=a(this).data("resizable"),e=d.options;d.ghost&&d.helper&&d.helper.get(0).removeChild(d.ghost.get(0))}}),a.ui.plugin.add("resizable","grid",{resize:function(b,c){var d=a(this).data("resizable"),e=d.options,f=d.size,g=d.originalSize,h=d.originalPosition,i=d.axis,j=e._aspectRatio||b.shiftKey;e.grid=typeof e.grid=="number"?[e.grid,e.grid]:e.grid;var k=Math.round((f.width-g.width)/(e.grid[0]||1))*(e.grid[0]||1),l=Math.round((f.height-g.height)/(e.grid[1]||1))*(e.grid[1]||1);/^(se|s|e)$/.test(i)?(d.size.width=g.width+k,d.size.height=g.height+l):/^(ne)$/.test(i)?(d.size.width=g.width+k,d.size.height=g.height+l,d.position.top=h.top-l):/^(sw)$/.test(i)?(d.size.width=g.width+k,d.size.height=g.height+l,d.position.left=h.left-k):(d.size.width=g.width+k,d.size.height=g.height+l,d.position.top=h.top-l,d.position.left=h.left-k)}});var c=function(a){return parseInt(a,10)||0},d=function(a){return!isNaN(parseInt(a,10))}})(jQuery); +/* + * jQuery hashchange event - v1.3 - 7/21/2010 + * http://benalman.com/projects/jquery-hashchange-plugin/ + * + * Copyright (c) 2010 "Cowboy" Ben Alman + * Dual licensed under the MIT and GPL licenses. + * http://benalman.com/about/license/ + */ +(function($,e,b){var c="hashchange",h=document,f,g=$.event.special,i=h.documentMode,d="on"+c in e&&(i===b||i>7);function a(j){j=j||location.href;return"#"+j.replace(/^[^#]*#?(.*)$/,"$1")}$.fn[c]=function(j){return j?this.bind(c,j):this.trigger(c)};$.fn[c].delay=50;g[c]=$.extend(g[c],{setup:function(){if(d){return false}$(f.start)},teardown:function(){if(d){return false}$(f.stop)}});f=(function(){var j={},p,m=a(),k=function(q){return q},l=k,o=k;j.start=function(){p||n()};j.stop=function(){p&&clearTimeout(p);p=b};function n(){var r=a(),q=o(m);if(r!==m){l(m=r,q);$(e).trigger(c)}else{if(q!==m){location.href=location.href.replace(/#.*/,"")+q}}p=setTimeout(n,$.fn[c].delay)}$.browser.msie&&!d&&(function(){var q,r;j.start=function(){if(!q){r=$.fn[c].src;r=r&&r+a();q=$(' + + +
    +
    +
    Reference
    +
    +
    +
    Here is a list of all modules:
    +
    [detail level 12]
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    oBasic Math Functions
    |oVector Absolute Value
    |oVector Addition
    |oVector Dot Product
    |oVector Multiplication
    |oVector Negate
    |oVector Offset
    |oVector Scale
    |oVector Shift
    |\Vector Subtraction
    oFast Math Functions
    |oCosine
    |oSine
    |\Square Root
    oComplex Math Functions
    |oComplex Conjugate
    |oComplex Dot Product
    |oComplex Magnitude
    |oComplex Magnitude Squared
    |oComplex-by-Complex Multiplication
    |\Complex-by-Real Multiplication
    oFiltering Functions
    |oHigh Precision Q31 Biquad Cascade Filter
    |oBiquad Cascade IIR Filters Using Direct Form I Structure
    |oBiquad Cascade IIR Filters Using a Direct Form II Transposed Structure
    |oConvolution
    |oPartial Convolution
    |oCorrelation
    |oFinite Impulse Response (FIR) Decimator
    |oFinite Impulse Response (FIR) Filters
    |oFinite Impulse Response (FIR) Lattice Filters
    |oFinite Impulse Response (FIR) Sparse Filters
    |oInfinite Impulse Response (IIR) Lattice Filters
    |oLeast Mean Square (LMS) Filters
    |oNormalized LMS Filters
    |\Finite Impulse Response (FIR) Interpolator
    oMatrix Functions
    |oMatrix Addition
    |oComplex Matrix Multiplication
    |oMatrix Initialization
    |oMatrix Inverse
    |oMatrix Multiplication
    |oMatrix Scale
    |oMatrix Subtraction
    |\Matrix Transpose
    oTransform Functions
    |oComplex FFT Functions
    |oRadix-8 Complex FFT Functions
    |oDCT Type IV Functions
    |oReal FFT Functions
    |oComplex FFT Tables
    |\RealFFT
    oController Functions
    |oSine Cosine
    |oPID Motor Control
    |oVector Clarke Transform
    |oVector Inverse Clarke Transform
    |oVector Park Transform
    |\Vector Inverse Park transform
    oStatistics Functions
    |oMaximum
    |oMean
    |oMinimum
    |oPower
    |oRoot mean square (RMS)
    |oStandard deviation
    |\Variance
    oSupport Functions
    |oVector Copy
    |oVector Fill
    |oConvert 32-bit floating point value
    |oConvert 16-bit Integer value
    |oConvert 32-bit Integer value
    |\Convert 8-bit Integer value
    oInterpolation Functions
    |oLinear Interpolation
    |\Bilinear Interpolation
    \Examples
     oClass Marks Example
     oConvolution Example
     oDot Product Example
     oFrequency Bin Example
     oFIR Lowpass Filter Example
     oGraphic Audio Equalizer Example
     oLinear Interpolate Example
     oMatrix Example
     oSignal Convergence Example
     oSineCosine Example
     \Variance Example
    + + + + + + + diff --git a/Documentation/DSP/html/modules.js b/Documentation/DSP/html/modules.js new file mode 100644 index 0000000..dce4f5e --- /dev/null +++ b/Documentation/DSP/html/modules.js @@ -0,0 +1,14 @@ +var modules = +[ + [ "Basic Math Functions", "group__group_math.html", "group__group_math" ], + [ "Fast Math Functions", "group__group_fast_math.html", "group__group_fast_math" ], + [ "Complex Math Functions", "group__group_cmplx_math.html", "group__group_cmplx_math" ], + [ "Filtering Functions", "group__group_filters.html", "group__group_filters" ], + [ "Matrix Functions", "group__group_matrix.html", "group__group_matrix" ], + [ "Transform Functions", "group__group_transforms.html", "group__group_transforms" ], + [ "Controller Functions", "group__group_controller.html", "group__group_controller" ], + [ "Statistics Functions", "group__group_stats.html", "group__group_stats" ], + [ "Support Functions", "group__group_support.html", "group__group_support" ], + [ "Interpolation Functions", "group__group_interpolation.html", "group__group_interpolation" ], + [ "Examples", "group__group_examples.html", "group__group_examples" ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/nav_f.png b/Documentation/DSP/html/nav_f.png new file mode 100644 index 0000000..72a58a5 Binary files /dev/null and b/Documentation/DSP/html/nav_f.png differ diff --git a/Documentation/DSP/html/nav_g.png b/Documentation/DSP/html/nav_g.png new file mode 100644 index 0000000..2093a23 Binary files /dev/null and b/Documentation/DSP/html/nav_g.png differ diff --git a/Documentation/DSP/html/nav_h.png b/Documentation/DSP/html/nav_h.png new file mode 100644 index 0000000..33389b1 Binary files /dev/null and b/Documentation/DSP/html/nav_h.png differ diff --git a/Documentation/DSP/html/navtree.css b/Documentation/DSP/html/navtree.css new file mode 100644 index 0000000..8001f82 --- /dev/null +++ b/Documentation/DSP/html/navtree.css @@ -0,0 +1,143 @@ +#nav-tree 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overflow:auto; +} + +#doc-content { + overflow:auto; + display:block; + padding:0px; + margin:0px; + -webkit-overflow-scrolling : touch; /* iOS 5+ */ +} + +#side-nav { + padding:0 6px 0 0; + margin: 0px; + display:block; + position: absolute; + left: 0px; + width: 300px; +} + +.ui-resizable .ui-resizable-handle { + display:block; +} + +.ui-resizable-e { + background:url("ftv2splitbar.png") repeat scroll right center transparent; + cursor:e-resize; + height:100%; + right:0; + top:0; + width:6px; +} + +.ui-resizable-handle { + display:none; + font-size:0.1px; + position:absolute; + z-index:1; +} + +#nav-tree-contents { + margin: 6px 0px 0px 0px; +} + +#nav-tree { + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + -webkit-overflow-scrolling : touch; /* iOS 5+ */ +} + +#nav-sync { + position:absolute; + top:5px; + right:24px; + z-index:0; +} + +#nav-sync img { + opacity:0.3; +} + +#nav-sync img:hover { + opacity:0.9; +} + +@media print +{ + #nav-tree { display: none; } + div.ui-resizable-handle { display: none; position: relative; } +} + diff --git a/Documentation/DSP/html/navtree.js b/Documentation/DSP/html/navtree.js new file mode 100644 index 0000000..52f98f4 --- /dev/null +++ b/Documentation/DSP/html/navtree.js @@ -0,0 +1,521 @@ +var NAVTREE = +[ + [ "CMSIS-DSP", "index.html", [ + [ "CMSIS DSP Software Library", "index.html", null ], + [ "Change Log", "_change_log_pg.html", null ], + [ "Deprecated List", "deprecated.html", null ], + [ "Reference", "modules.html", "modules" ], + [ "Data Structures", "annotated.html", "annotated" ], + [ "Data Fields", "functions.html", [ + [ "All", "functions.html", "functions_dup" ], + [ "Variables", "functions_vars.html", "functions_vars" ] + ] ] + ] ] +]; + +var NAVTREEINDEX = +[ +"_change_log_pg.html", +"group___l_m_s.html#ga6a0abfe6041253a6f91c63b383a64257", +"structarm__biquad__cascade__df2_t__instance__f64.html", +"structarm__lms__norm__instance__q31.html" +]; + +var SYNCONMSG = 'click to disable panel synchronisation'; +var SYNCOFFMSG = 'click to enable panel synchronisation'; +var navTreeSubIndices = new Array(); + +function getData(varName) +{ + var i = varName.lastIndexOf('/'); + var n = i>=0 ? varName.substring(i+1) : varName; + return eval(n.replace(/\-/g,'_')); +} + +function stripPath(uri) +{ + return uri.substring(uri.lastIndexOf('/')+1); +} + +function stripPath2(uri) +{ + var i = uri.lastIndexOf('/'); + var s = uri.substring(i+1); + var m = uri.substring(0,i+1).match(/\/d\w\/d\w\w\/$/); + return m ? uri.substring(i-6) : s; +} + +function localStorageSupported() +{ + try { + return 'localStorage' in window && window['localStorage'] !== null && window.localStorage.getItem; + } + catch(e) { + return false; + } +} + + +function storeLink(link) +{ + if (!$("#nav-sync").hasClass('sync') && localStorageSupported()) { + window.localStorage.setItem('navpath',link); + } +} + +function deleteLink() +{ + if (localStorageSupported()) { + window.localStorage.setItem('navpath',''); + } +} + +function cachedLink() +{ + if (localStorageSupported()) { + return window.localStorage.getItem('navpath'); + } else { + return ''; + } +} + +function getScript(scriptName,func,show) +{ + var head = document.getElementsByTagName("head")[0]; + var script = document.createElement('script'); + script.id = scriptName; + script.type = 'text/javascript'; + script.onload = func; + script.src = scriptName+'.js'; + if ($.browser.msie && $.browser.version<=8) { + // script.onload does work with older versions of IE + script.onreadystatechange = function() { + if (script.readyState=='complete' || script.readyState=='loaded') { + func(); if (show) showRoot(); + } + } + } + head.appendChild(script); +} + +function createIndent(o,domNode,node,level) +{ + if (node.parentNode && node.parentNode.parentNode) { + createIndent(o,domNode,node.parentNode,level+1); + } + var imgNode = document.createElement("img"); + imgNode.width = 16; + imgNode.height = 22; + if (level==0 && node.childrenData) { + node.plus_img = imgNode; + node.expandToggle = document.createElement("a"); + node.expandToggle.href = "javascript:void(0)"; + node.expandToggle.onclick = function() { + if (node.expanded) { + $(node.getChildrenUL()).slideUp("fast"); + if (node.isLast) { + node.plus_img.src = node.relpath+"ftv2plastnode.png"; + } else { + node.plus_img.src = node.relpath+"ftv2pnode.png"; + } + node.expanded = false; + } else { + expandNode(o, node, false, false); + } + } + node.expandToggle.appendChild(imgNode); + domNode.appendChild(node.expandToggle); + } else { + domNode.appendChild(imgNode); + } + if (level==0) { + if (node.isLast) { + if (node.childrenData) { + imgNode.src = node.relpath+"ftv2plastnode.png"; + } else { + imgNode.src = node.relpath+"ftv2lastnode.png"; + domNode.appendChild(imgNode); + } + } else { + if (node.childrenData) { + imgNode.src = node.relpath+"ftv2pnode.png"; + } else { + imgNode.src = node.relpath+"ftv2node.png"; + domNode.appendChild(imgNode); + } + } + } else { + if (node.isLast) { + imgNode.src = node.relpath+"ftv2blank.png"; + } else { + imgNode.src = node.relpath+"ftv2vertline.png"; + } + } + imgNode.border = "0"; +} + +function newNode(o, po, text, link, childrenData, lastNode) +{ + var node = new Object(); + node.children = Array(); + node.childrenData = childrenData; + node.depth = po.depth + 1; + node.relpath = po.relpath; + node.isLast = lastNode; + + node.li = document.createElement("li"); + po.getChildrenUL().appendChild(node.li); + node.parentNode = po; + + node.itemDiv = document.createElement("div"); + node.itemDiv.className = "item"; + + node.labelSpan = document.createElement("span"); + node.labelSpan.className = "label"; + + createIndent(o,node.itemDiv,node,0); + node.itemDiv.appendChild(node.labelSpan); + node.li.appendChild(node.itemDiv); + + var a = document.createElement("a"); + node.labelSpan.appendChild(a); + node.label = document.createTextNode(text); + node.expanded = false; + a.appendChild(node.label); + if (link) { + var url; + if (link.substring(0,1)=='^') { + url = link.substring(1); + link = url; + } else { + url = node.relpath+link; + } + a.className = stripPath(link.replace('#',':')); + if (link.indexOf('#')!=-1) { + var aname = '#'+link.split('#')[1]; + var srcPage = stripPath($(location).attr('pathname')); + var targetPage = stripPath(link.split('#')[0]); + a.href = srcPage!=targetPage ? url : '#'; + a.onclick = function(){ + storeLink(link); + if (!$(a).parent().parent().hasClass('selected')) + { + $('.item').removeClass('selected'); + $('.item').removeAttr('id'); + $(a).parent().parent().addClass('selected'); + $(a).parent().parent().attr('id','selected'); + } + var pos, anchor = $(aname), docContent = $('#doc-content'); + if (anchor.parent().attr('class')=='memItemLeft') { + pos = anchor.parent().position().top; + } else if (anchor.position()) { + pos = anchor.position().top; + } + if (pos) { + var dist = Math.abs(Math.min( + pos-docContent.offset().top, + docContent[0].scrollHeight- + docContent.height()-docContent.scrollTop())); + docContent.animate({ + scrollTop: pos + docContent.scrollTop() - docContent.offset().top + },Math.max(50,Math.min(500,dist)),function(){ + window.location.replace(aname); + }); + } + }; + } else { + a.href = url; + a.onclick = function() { storeLink(link); } + } + } else { + if (childrenData != null) + { + a.className = "nolink"; + a.href = "javascript:void(0)"; + a.onclick = node.expandToggle.onclick; + } + } + + node.childrenUL = null; + node.getChildrenUL = function() { + if (!node.childrenUL) { + node.childrenUL = document.createElement("ul"); + node.childrenUL.className = "children_ul"; + node.childrenUL.style.display = "none"; + node.li.appendChild(node.childrenUL); + } + return node.childrenUL; + }; + + return node; +} + +function showRoot() +{ + var headerHeight = $("#top").height(); + var footerHeight = $("#nav-path").height(); + var windowHeight = $(window).height() - headerHeight - footerHeight; + (function (){ // retry until we can scroll to the selected item + try { + var navtree=$('#nav-tree'); + navtree.scrollTo('#selected',0,{offset:-windowHeight/2}); + } catch (err) { + setTimeout(arguments.callee, 0); + } + })(); +} + +function expandNode(o, node, imm, showRoot) +{ + if (node.childrenData && !node.expanded) { + if (typeof(node.childrenData)==='string') { + var varName = node.childrenData; + getScript(node.relpath+varName,function(){ + node.childrenData = getData(varName); + expandNode(o, node, imm, showRoot); + }, showRoot); + } else { + if (!node.childrenVisited) { + getNode(o, node); + } if (imm || ($.browser.msie && $.browser.version>8)) { + // somehow slideDown jumps to the start of tree for IE9 :-( + $(node.getChildrenUL()).show(); + } else { + $(node.getChildrenUL()).slideDown("fast"); + } + if (node.isLast) { + node.plus_img.src = node.relpath+"ftv2mlastnode.png"; + } else { + node.plus_img.src = node.relpath+"ftv2mnode.png"; + } + node.expanded = true; + } + } +} + +function glowEffect(n,duration) +{ + n.addClass('glow').delay(duration).queue(function(next){ + $(this).removeClass('glow');next(); + }); +} + +function highlightAnchor() +{ + var anchor = $($(location).attr('hash')); + if (anchor.parent().attr('class')=='memItemLeft'){ + var rows = $('.memberdecls tr[class$="'+ + window.location.hash.substring(1)+'"]'); + glowEffect(rows.children(),300); // member without details + } else if (anchor.parents().slice(2).prop('tagName')=='TR') { + glowEffect(anchor.parents('div.memitem'),1000); // enum value + } else if (anchor.parent().attr('class')=='fieldtype'){ + glowEffect(anchor.parent().parent(),1000); // struct field + } else if (anchor.parent().is(":header")) { + glowEffect(anchor.parent(),1000); // section header + } else { + glowEffect(anchor.next(),1000); // normal member + } +} + +function selectAndHighlight(hash,n) +{ + var a; + if (hash) { + var link=stripPath($(location).attr('pathname'))+':'+hash.substring(1); + a=$('.item a[class$="'+link+'"]'); + } + if (a && a.length) { + a.parent().parent().addClass('selected'); + a.parent().parent().attr('id','selected'); + highlightAnchor(); + } else if (n) { + $(n.itemDiv).addClass('selected'); + $(n.itemDiv).attr('id','selected'); + } + showRoot(); +} + +function showNode(o, node, index, hash) +{ + if (node && node.childrenData) { + if (typeof(node.childrenData)==='string') { + var varName = node.childrenData; + getScript(node.relpath+varName,function(){ + node.childrenData = getData(varName); + showNode(o,node,index,hash); + },true); + } else { + if (!node.childrenVisited) { + getNode(o, node); + } + $(node.getChildrenUL()).show(); + if (node.isLast) { + node.plus_img.src = node.relpath+"ftv2mlastnode.png"; + } else { + node.plus_img.src = node.relpath+"ftv2mnode.png"; + } + node.expanded = true; + var n = node.children[o.breadcrumbs[index]]; + if (index+11) hash = '#'+parts[1]; + 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storeLink(stripPath2($(location).attr('pathname'))+$(location).attr('hash')); + } else { + navSync.addClass('sync'); + showSyncOn(navSync,relpath); + deleteLink(); + } +} + +function initNavTree(toroot,relpath) +{ + var o = new Object(); + o.toroot = toroot; + o.node = new Object(); + o.node.li = document.getElementById("nav-tree-contents"); + o.node.childrenData = NAVTREE; + o.node.children = new Array(); + o.node.childrenUL = document.createElement("ul"); + o.node.getChildrenUL = function() { return o.node.childrenUL; }; + o.node.li.appendChild(o.node.childrenUL); + o.node.depth = 0; + o.node.relpath = relpath; + o.node.expanded = false; + o.node.isLast = true; + o.node.plus_img = document.createElement("img"); + o.node.plus_img.src = relpath+"ftv2pnode.png"; + o.node.plus_img.width = 16; + o.node.plus_img.height = 22; + + if (localStorageSupported()) { + var navSync = $('#nav-sync'); + if (cachedLink()) { + showSyncOff(navSync,relpath); + navSync.removeClass('sync'); + } else { + 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    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Usage and Description
    +
    +
    +
    Here is a list of all related documentation pages:
    + + + +
    oChange Log
    \Deprecated List
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/park.gif b/Documentation/DSP/html/park.gif new file mode 100644 index 0000000..db0fd40 Binary files /dev/null and b/Documentation/DSP/html/park.gif differ diff --git a/Documentation/DSP/html/parkFormula.gif b/Documentation/DSP/html/parkFormula.gif new file mode 100644 index 0000000..3b1861b Binary files /dev/null and b/Documentation/DSP/html/parkFormula.gif differ diff --git a/Documentation/DSP/html/parkInvFormula.gif b/Documentation/DSP/html/parkInvFormula.gif new file mode 100644 index 0000000..4cb89df Binary files /dev/null and b/Documentation/DSP/html/parkInvFormula.gif differ diff --git a/Documentation/DSP/html/printComponentTabs.js b/Documentation/DSP/html/printComponentTabs.js new file mode 100644 index 0000000..64d846b --- /dev/null +++ b/Documentation/DSP/html/printComponentTabs.js @@ -0,0 +1,36 @@ +var strgURL = location.pathname; // path of current component + +// constuctor for the array of objects +function tabElement(id, folderName, tabTxt ) { + this.id = id; // elementID as needed in html; + this.folderName = folderName; // folder name of the component + this.tabTxt = tabTxt; // Text displayed as menu on the web + this.currentListItem = '
  • ' + this.tabTxt + '
    • '; + this.listItem = '
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+} + +/*---------------- Search filter selection */ + +#MSearchSelectWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #90A5CE; + background-color: #F9FAFC; + z-index: 1; + padding-top: 4px; + padding-bottom: 4px; + -moz-border-radius: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; 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+ + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of . + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; 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evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? 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    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_bilinear_interp_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point bilinear interpolation function. +

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    float32_t * pData
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_f32::numCols
    +
    +

    number of columns in the data table.

    + +

    Referenced by arm_bilinear_interp_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_f32::numRows
    +
    +

    number of rows in the data table.

    + +

    Referenced by arm_bilinear_interp_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_bilinear_interp_instance_f32::pData
    +
    +

    points to the data table.

    + +

    Referenced by arm_bilinear_interp_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__bilinear__interp__instance__f32.js b/Documentation/DSP/html/structarm__bilinear__interp__instance__f32.js new file mode 100644 index 0000000..f6412fe --- /dev/null +++ b/Documentation/DSP/html/structarm__bilinear__interp__instance__f32.js @@ -0,0 +1,6 @@ +var structarm__bilinear__interp__instance__f32 = +[ + [ "numCols", "structarm__bilinear__interp__instance__f32.html#aede17bebfb1f835b61d71dd813eab3f8", null ], + [ "numRows", "structarm__bilinear__interp__instance__f32.html#a34f2b17cc57b95011960df9718af6ed6", null ], + [ "pData", "structarm__bilinear__interp__instance__f32.html#afd1e764591c991c212d56c893efb5ea4", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__bilinear__interp__instance__q15.html b/Documentation/DSP/html/structarm__bilinear__interp__instance__q15.html new file mode 100644 index 0000000..a3965cc --- /dev/null +++ b/Documentation/DSP/html/structarm__bilinear__interp__instance__q15.html @@ -0,0 +1,196 @@ + + + + + +arm_bilinear_interp_instance_q15 Struct Reference +CMSIS-DSP: arm_bilinear_interp_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_bilinear_interp_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 bilinear interpolation function. +

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    q15_t * pData
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_q15::numCols
    +
    +

    number of columns in the data table.

    + +

    Referenced by arm_bilinear_interp_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_q15::numRows
    +
    +

    number of rows in the data table.

    + +

    Referenced by arm_bilinear_interp_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_bilinear_interp_instance_q15::pData
    +
    +

    points to the data table.

    + +

    Referenced by arm_bilinear_interp_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__bilinear__interp__instance__q15.js b/Documentation/DSP/html/structarm__bilinear__interp__instance__q15.js new file mode 100644 index 0000000..8404ecf --- /dev/null +++ b/Documentation/DSP/html/structarm__bilinear__interp__instance__q15.js @@ -0,0 +1,6 @@ +var structarm__bilinear__interp__instance__q15 = +[ + [ "numCols", "structarm__bilinear__interp__instance__q15.html#a7fa8772d01583374ff8ac18205a26a37", null ], + [ "numRows", "structarm__bilinear__interp__instance__q15.html#a2130ae30a804995a9f5d0e2189e08565", null ], + [ "pData", "structarm__bilinear__interp__instance__q15.html#a50d75b1316cee3e0dfad6dcc4c9a2954", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__bilinear__interp__instance__q31.html b/Documentation/DSP/html/structarm__bilinear__interp__instance__q31.html new file mode 100644 index 0000000..7e0c956 --- /dev/null +++ b/Documentation/DSP/html/structarm__bilinear__interp__instance__q31.html @@ -0,0 +1,196 @@ + + + + + +arm_bilinear_interp_instance_q31 Struct Reference +CMSIS-DSP: arm_bilinear_interp_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_bilinear_interp_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 bilinear interpolation function. +

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    q31_t * pData
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_q31::numCols
    +
    +

    number of columns in the data table.

    + +

    Referenced by arm_bilinear_interp_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_q31::numRows
    +
    +

    number of rows in the data table.

    + +

    Referenced by arm_bilinear_interp_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_bilinear_interp_instance_q31::pData
    +
    +

    points to the data table.

    + +

    Referenced by arm_bilinear_interp_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__bilinear__interp__instance__q31.js b/Documentation/DSP/html/structarm__bilinear__interp__instance__q31.js new file mode 100644 index 0000000..dafecb9 --- /dev/null +++ b/Documentation/DSP/html/structarm__bilinear__interp__instance__q31.js @@ -0,0 +1,6 @@ +var structarm__bilinear__interp__instance__q31 = +[ + [ "numCols", "structarm__bilinear__interp__instance__q31.html#a6c3eff4eb17ff1d43f170efb84713a2d", null ], + [ "numRows", "structarm__bilinear__interp__instance__q31.html#a2082e3eac56354d75291f03e96ce4aa5", null ], + [ "pData", "structarm__bilinear__interp__instance__q31.html#a843eae0c9db5f815e77e1aaf9afea358", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__bilinear__interp__instance__q7.html b/Documentation/DSP/html/structarm__bilinear__interp__instance__q7.html new file mode 100644 index 0000000..ef9dce0 --- /dev/null +++ b/Documentation/DSP/html/structarm__bilinear__interp__instance__q7.html @@ -0,0 +1,196 @@ + + + + + +arm_bilinear_interp_instance_q7 Struct Reference +CMSIS-DSP: arm_bilinear_interp_instance_q7 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_bilinear_interp_instance_q7 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 bilinear interpolation function. +

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    q7_t * pData
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_q7::numCols
    +
    +

    number of columns in the data table.

    + +

    Referenced by arm_bilinear_interp_q7().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_bilinear_interp_instance_q7::numRows
    +
    +

    number of rows in the data table.

    + +

    Referenced by arm_bilinear_interp_q7().

    + +
    +
    + +
    +
    + + + + +
    q7_t* arm_bilinear_interp_instance_q7::pData
    +
    +

    points to the data table.

    + +

    Referenced by arm_bilinear_interp_q7().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__bilinear__interp__instance__q7.js b/Documentation/DSP/html/structarm__bilinear__interp__instance__q7.js new file mode 100644 index 0000000..749e67e --- /dev/null +++ b/Documentation/DSP/html/structarm__bilinear__interp__instance__q7.js @@ -0,0 +1,6 @@ +var structarm__bilinear__interp__instance__q7 = +[ + [ "numCols", "structarm__bilinear__interp__instance__q7.html#a860dd0d24380ea06cfbb348fb3b12c9a", null ], + [ "numRows", "structarm__bilinear__interp__instance__q7.html#ad5a8067cab5f9ea4688b11a623e16607", null ], + [ "pData", "structarm__bilinear__interp__instance__q7.html#af05194d691bbefb02c34bafb22ca9ef0", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__biquad__cas__df1__32x64__ins__q31.html b/Documentation/DSP/html/structarm__biquad__cas__df1__32x64__ins__q31.html new file mode 100644 index 0000000..b2d957f --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cas__df1__32x64__ins__q31.html @@ -0,0 +1,215 @@ + + + + + +arm_biquad_cas_df1_32x64_ins_q31 Struct Reference +CMSIS-DSP: arm_biquad_cas_df1_32x64_ins_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_biquad_cas_df1_32x64_ins_q31 Struct Reference
    +
    +
    + +

    Instance structure for the high precision Q31 Biquad cascade filter. + More...

    + + + + + + + + + + +

    +Data Fields

    uint8_t numStages
     
    q63_t * pState
     
    q31_t * pCoeffs
     
    uint8_t postShift
     
    +

    Description

    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_biquad_cas_df1_32x64_ins_q31::numStages
    +
    +

    number of 2nd order stages in the filter. Overall order is 2*numStages.

    + +

    Referenced by arm_biquad_cas_df1_32x64_init_q31(), and arm_biquad_cas_df1_32x64_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_biquad_cas_df1_32x64_ins_q31::pCoeffs
    +
    +

    points to the array of coefficients. The array is of length 5*numStages.

    + +

    Referenced by arm_biquad_cas_df1_32x64_init_q31(), and arm_biquad_cas_df1_32x64_q31().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_biquad_cas_df1_32x64_ins_q31::postShift
    +
    +

    additional shift, in bits, applied to each output sample.

    + +

    Referenced by arm_biquad_cas_df1_32x64_init_q31(), and arm_biquad_cas_df1_32x64_q31().

    + +
    +
    + +
    +
    + + + + +
    q63_t* arm_biquad_cas_df1_32x64_ins_q31::pState
    +
    +

    points to the array of state coefficients. The array is of length 4*numStages.

    + +

    Referenced by arm_biquad_cas_df1_32x64_init_q31(), and arm_biquad_cas_df1_32x64_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__biquad__cas__df1__32x64__ins__q31.js b/Documentation/DSP/html/structarm__biquad__cas__df1__32x64__ins__q31.js new file mode 100644 index 0000000..994fb3e --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cas__df1__32x64__ins__q31.js @@ -0,0 +1,7 @@ +var structarm__biquad__cas__df1__32x64__ins__q31 = +[ + [ "numStages", "structarm__biquad__cas__df1__32x64__ins__q31.html#ad7cb9a9f5df8f4fcfc7a0b633672e574", null ], + [ "pCoeffs", "structarm__biquad__cas__df1__32x64__ins__q31.html#a490462d6ebe0fecfb6acbf51bed22ecf", null ], + [ "postShift", "structarm__biquad__cas__df1__32x64__ins__q31.html#a8e9d58e8dba5aa3b2fc4f36d2ed07996", null ], + [ "pState", "structarm__biquad__cas__df1__32x64__ins__q31.html#a4c899cdfaf2bb955323e93637bd662e0", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f32.html b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f32.html new file mode 100644 index 0000000..516f2ae --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f32.html @@ -0,0 +1,196 @@ + + + + + +arm_biquad_cascade_df2T_instance_f32 Struct Reference +CMSIS-DSP: arm_biquad_cascade_df2T_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_biquad_cascade_df2T_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point transposed direct form II Biquad cascade filter. +

    + + + + + + + + +

    +Data Fields

    uint8_t numStages
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_biquad_cascade_df2T_instance_f32::numStages
    +
    +

    number of 2nd order stages in the filter. Overall order is 2*numStages.

    + +

    Referenced by arm_biquad_cascade_df2T_f32(), and arm_biquad_cascade_df2T_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_biquad_cascade_df2T_instance_f32::pCoeffs
    +
    +

    points to the array of coefficients. The array is of length 5*numStages.

    + +

    Referenced by arm_biquad_cascade_df2T_f32(), and arm_biquad_cascade_df2T_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_biquad_cascade_df2T_instance_f32::pState
    +
    +

    points to the array of state coefficients. The array is of length 2*numStages.

    + +

    Referenced by arm_biquad_cascade_df2T_f32(), and arm_biquad_cascade_df2T_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f32.js b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f32.js new file mode 100644 index 0000000..3582642 --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f32.js @@ -0,0 +1,6 @@ +var structarm__biquad__cascade__df2_t__instance__f32 = +[ + [ "numStages", "structarm__biquad__cascade__df2_t__instance__f32.html#a4d17958c33c3d0a905f974bac50f033f", null ], + [ "pCoeffs", "structarm__biquad__cascade__df2_t__instance__f32.html#a49a24fe1b6ad3b0b26779c32d8d80b2e", null ], + [ "pState", "structarm__biquad__cascade__df2_t__instance__f32.html#a24d223addfd926a7177088cf2efe76b1", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f64.html b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f64.html new file mode 100644 index 0000000..d52b8ff --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f64.html @@ -0,0 +1,196 @@ + + + + + +arm_biquad_cascade_df2T_instance_f64 Struct Reference +CMSIS-DSP: arm_biquad_cascade_df2T_instance_f64 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_biquad_cascade_df2T_instance_f64 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point transposed direct form II Biquad cascade filter. +

    + + + + + + + + +

    +Data Fields

    uint8_t numStages
     
    float64_t * pState
     
    float64_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_biquad_cascade_df2T_instance_f64::numStages
    +
    +

    number of 2nd order stages in the filter. Overall order is 2*numStages.

    + +

    Referenced by arm_biquad_cascade_df2T_f64(), and arm_biquad_cascade_df2T_init_f64().

    + +
    +
    + +
    +
    + + + + +
    float64_t* arm_biquad_cascade_df2T_instance_f64::pCoeffs
    +
    +

    points to the array of coefficients. The array is of length 5*numStages.

    + +

    Referenced by arm_biquad_cascade_df2T_f64(), and arm_biquad_cascade_df2T_init_f64().

    + +
    +
    + +
    +
    + + + + +
    float64_t* arm_biquad_cascade_df2T_instance_f64::pState
    +
    +

    points to the array of state coefficients. The array is of length 2*numStages.

    + +

    Referenced by arm_biquad_cascade_df2T_f64(), and arm_biquad_cascade_df2T_init_f64().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f64.js b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f64.js new file mode 100644 index 0000000..1949ebc --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cascade__df2_t__instance__f64.js @@ -0,0 +1,6 @@ +var structarm__biquad__cascade__df2_t__instance__f64 = +[ + [ "numStages", "structarm__biquad__cascade__df2_t__instance__f64.html#ad55380ff835b533aa5168f836db8a4de", null ], + [ "pCoeffs", "structarm__biquad__cascade__df2_t__instance__f64.html#ae2f0180f9038c0393e1d6921bb3b878b", null ], + [ "pState", "structarm__biquad__cascade__df2_t__instance__f64.html#a0bde57b618e3f9059b23b0de64e12ce3", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__biquad__cascade__stereo__df2_t__instance__f32.html b/Documentation/DSP/html/structarm__biquad__cascade__stereo__df2_t__instance__f32.html new file mode 100644 index 0000000..cc7d4ae --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cascade__stereo__df2_t__instance__f32.html @@ -0,0 +1,196 @@ + + + + + +arm_biquad_cascade_stereo_df2T_instance_f32 Struct Reference +CMSIS-DSP: arm_biquad_cascade_stereo_df2T_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_biquad_cascade_stereo_df2T_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point transposed direct form II Biquad cascade filter. +

    + + + + + + + + +

    +Data Fields

    uint8_t numStages
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_biquad_cascade_stereo_df2T_instance_f32::numStages
    +
    +

    number of 2nd order stages in the filter. Overall order is 2*numStages.

    + +

    Referenced by arm_biquad_cascade_stereo_df2T_f32(), and arm_biquad_cascade_stereo_df2T_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_biquad_cascade_stereo_df2T_instance_f32::pCoeffs
    +
    +

    points to the array of coefficients. The array is of length 5*numStages.

    + +

    Referenced by arm_biquad_cascade_stereo_df2T_f32(), and arm_biquad_cascade_stereo_df2T_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_biquad_cascade_stereo_df2T_instance_f32::pState
    +
    +

    points to the array of state coefficients. The array is of length 4*numStages.

    + +

    Referenced by arm_biquad_cascade_stereo_df2T_f32(), and arm_biquad_cascade_stereo_df2T_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__biquad__cascade__stereo__df2_t__instance__f32.js b/Documentation/DSP/html/structarm__biquad__cascade__stereo__df2_t__instance__f32.js new file mode 100644 index 0000000..32ab0d1 --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__cascade__stereo__df2_t__instance__f32.js @@ -0,0 +1,6 @@ +var structarm__biquad__cascade__stereo__df2_t__instance__f32 = +[ + [ "numStages", "structarm__biquad__cascade__stereo__df2_t__instance__f32.html#a5655328252da5c2c2425ceed253bc4f1", null ], + [ "pCoeffs", "structarm__biquad__cascade__stereo__df2_t__instance__f32.html#a58b15644de62a632c5e9d4a563569dc6", null ], + [ "pState", "structarm__biquad__cascade__stereo__df2_t__instance__f32.html#a2cb00048bb1fe957a03c1ff56dfaf8f0", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__biquad__casd__df1__inst__f32.html b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__f32.html new file mode 100644 index 0000000..d1ae5c6 --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__f32.html @@ -0,0 +1,196 @@ + + + + + +arm_biquad_casd_df1_inst_f32 Struct Reference +CMSIS-DSP: arm_biquad_casd_df1_inst_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_biquad_casd_df1_inst_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point Biquad cascade filter. +

    + + + + + + + + +

    +Data Fields

    uint32_t numStages
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint32_t arm_biquad_casd_df1_inst_f32::numStages
    +
    +

    number of 2nd order stages in the filter. Overall order is 2*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_f32(), and arm_biquad_cascade_df1_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_biquad_casd_df1_inst_f32::pCoeffs
    +
    +

    Points to the array of coefficients. The array is of length 5*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_f32(), and arm_biquad_cascade_df1_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_biquad_casd_df1_inst_f32::pState
    +
    +

    Points to the array of state coefficients. The array is of length 4*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_f32(), and arm_biquad_cascade_df1_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__biquad__casd__df1__inst__f32.js b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__f32.js new file mode 100644 index 0000000..47b84ce --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__f32.js @@ -0,0 +1,6 @@ +var structarm__biquad__casd__df1__inst__f32 = +[ + [ "numStages", "structarm__biquad__casd__df1__inst__f32.html#af69820c37a87252c46453e4cfe120585", null ], + [ "pCoeffs", "structarm__biquad__casd__df1__inst__f32.html#af9df3820576fb921809d1462c9c6d16c", null ], + [ "pState", "structarm__biquad__casd__df1__inst__f32.html#a8c245d79e0d8cfabc82409d4b54fb682", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q15.html b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q15.html new file mode 100644 index 0000000..059c140 --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q15.html @@ -0,0 +1,213 @@ + + + + + +arm_biquad_casd_df1_inst_q15 Struct Reference +CMSIS-DSP: arm_biquad_casd_df1_inst_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_biquad_casd_df1_inst_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 Biquad cascade filter. +

    + + + + + + + + + + +

    +Data Fields

    int8_t numStages
     
    q15_t * pState
     
    q15_t * pCoeffs
     
    int8_t postShift
     
    +

    Field Documentation

    + +
    +
    + + + + +
    int8_t arm_biquad_casd_df1_inst_q15::numStages
    +
    +

    number of 2nd order stages in the filter. Overall order is 2*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q15(), arm_biquad_cascade_df1_init_q15(), and arm_biquad_cascade_df1_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_biquad_casd_df1_inst_q15::pCoeffs
    +
    +

    Points to the array of coefficients. The array is of length 5*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q15(), arm_biquad_cascade_df1_init_q15(), and arm_biquad_cascade_df1_q15().

    + +
    +
    + +
    +
    + + + + +
    int8_t arm_biquad_casd_df1_inst_q15::postShift
    +
    +

    Additional shift, in bits, applied to each output sample.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q15(), arm_biquad_cascade_df1_init_q15(), and arm_biquad_cascade_df1_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_biquad_casd_df1_inst_q15::pState
    +
    +

    Points to the array of state coefficients. The array is of length 4*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q15(), arm_biquad_cascade_df1_init_q15(), and arm_biquad_cascade_df1_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q15.js b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q15.js new file mode 100644 index 0000000..2ca2a56 --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q15.js @@ -0,0 +1,7 @@ +var structarm__biquad__casd__df1__inst__q15 = +[ + [ "numStages", "structarm__biquad__casd__df1__inst__q15.html#ad6d95e70abcf4ff1300181415ad92153", null ], + [ "pCoeffs", "structarm__biquad__casd__df1__inst__q15.html#a1edaacdebb5b09d7635bf20c779855fc", null ], + [ "postShift", "structarm__biquad__casd__df1__inst__q15.html#ada7e9d6269e6ed4eacf8f68729e9832d", null ], + [ "pState", "structarm__biquad__casd__df1__inst__q15.html#a5481104ef2f8f81360b80b47d69ae932", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q31.html b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q31.html new file mode 100644 index 0000000..c9d5fff --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q31.html @@ -0,0 +1,215 @@ + + + + + +arm_biquad_casd_df1_inst_q31 Struct Reference +CMSIS-DSP: arm_biquad_casd_df1_inst_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_biquad_casd_df1_inst_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 Biquad cascade filter. + More...

    + + + + + + + + + + +

    +Data Fields

    uint32_t numStages
     
    q31_t * pState
     
    q31_t * pCoeffs
     
    uint8_t postShift
     
    +

    Description

    +
    Examples:
    arm_graphic_equalizer_example_q31.c.
    +

    Field Documentation

    + +
    +
    + + + + +
    uint32_t arm_biquad_casd_df1_inst_q31::numStages
    +
    +

    number of 2nd order stages in the filter. Overall order is 2*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q31(), arm_biquad_cascade_df1_init_q31(), and arm_biquad_cascade_df1_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_biquad_casd_df1_inst_q31::pCoeffs
    +
    +

    Points to the array of coefficients. The array is of length 5*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q31(), arm_biquad_cascade_df1_init_q31(), and arm_biquad_cascade_df1_q31().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_biquad_casd_df1_inst_q31::postShift
    +
    +

    Additional shift, in bits, applied to each output sample.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q31(), arm_biquad_cascade_df1_init_q31(), and arm_biquad_cascade_df1_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_biquad_casd_df1_inst_q31::pState
    +
    +

    Points to the array of state coefficients. The array is of length 4*numStages.

    + +

    Referenced by arm_biquad_cascade_df1_fast_q31(), arm_biquad_cascade_df1_init_q31(), and arm_biquad_cascade_df1_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q31.js b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q31.js new file mode 100644 index 0000000..0a072f1 --- /dev/null +++ b/Documentation/DSP/html/structarm__biquad__casd__df1__inst__q31.js @@ -0,0 +1,7 @@ +var structarm__biquad__casd__df1__inst__q31 = +[ + [ "numStages", "structarm__biquad__casd__df1__inst__q31.html#a2c2b579f1df1d8273a5d9d945c27e1b2", null ], + [ "pCoeffs", "structarm__biquad__casd__df1__inst__q31.html#aa62366c632f3b5305086f841f079dbd2", null ], + [ "postShift", "structarm__biquad__casd__df1__inst__q31.html#a636c7fbe09ec4bef0bc0a4b4e2151cbe", null ], + [ "pState", "structarm__biquad__casd__df1__inst__q31.html#a5dcf4727f58eb4e8e8b392508d8657bb", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__instance__f32.html b/Documentation/DSP/html/structarm__cfft__instance__f32.html new file mode 100644 index 0000000..9e85cb3 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__instance__f32.html @@ -0,0 +1,213 @@ + + + + + +arm_cfft_instance_f32 Struct Reference +CMSIS-DSP: arm_cfft_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point CFFT/CIFFT function. +

    + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    const float32_t * pTwiddle
     
    const uint16_t * pBitRevTable
     
    uint16_t bitRevLength
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_cfft_instance_f32::bitRevLength
    +
    +

    bit reversal table length.

    + +

    Referenced by arm_cfft_f32(), and arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_instance_f32::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_f32(), arm_cfft_radix8by2_f32(), arm_cfft_radix8by4_f32(), arm_rfft_fast_f32(), and arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t* arm_cfft_instance_f32::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_f32(), and arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    const float32_t* arm_cfft_instance_f32::pTwiddle
    +
    +

    points to the Twiddle factor table.

    + +

    Referenced by arm_cfft_f32(), arm_cfft_radix8by2_f32(), arm_cfft_radix8by4_f32(), and arm_rfft_fast_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__instance__f32.js b/Documentation/DSP/html/structarm__cfft__instance__f32.js new file mode 100644 index 0000000..1f2e999 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__instance__f32.js @@ -0,0 +1,7 @@ +var structarm__cfft__instance__f32 = +[ + [ "bitRevLength", "structarm__cfft__instance__f32.html#a3ba329ed153d182746376208e773d648", null ], + [ "fftLen", "structarm__cfft__instance__f32.html#acd8f9e9540e3dd348212726e5d6aaa95", null ], + [ "pBitRevTable", "structarm__cfft__instance__f32.html#a21ceaf59a1bb8440af57c28d2dd9bbab", null ], + [ "pTwiddle", "structarm__cfft__instance__f32.html#a59cc6f753f1498716e1444ac054c06de", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__instance__q15.html b/Documentation/DSP/html/structarm__cfft__instance__q15.html new file mode 100644 index 0000000..00d9c13 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__instance__q15.html @@ -0,0 +1,213 @@ + + + + + +arm_cfft_instance_q15 Struct Reference +CMSIS-DSP: arm_cfft_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the fixed-point CFFT/CIFFT function. +

    + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    const q15_t * pTwiddle
     
    const uint16_t * pBitRevTable
     
    uint16_t bitRevLength
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_cfft_instance_q15::bitRevLength
    +
    +

    bit reversal table length.

    + +

    Referenced by arm_cfft_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_instance_q15::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_q15().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t* arm_cfft_instance_q15::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_q15().

    + +
    +
    + +
    +
    + + + + +
    const q15_t* arm_cfft_instance_q15::pTwiddle
    +
    +

    points to the Twiddle factor table.

    + +

    Referenced by arm_cfft_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__instance__q15.js b/Documentation/DSP/html/structarm__cfft__instance__q15.js new file mode 100644 index 0000000..ab4f5c8 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__instance__q15.js @@ -0,0 +1,7 @@ +var structarm__cfft__instance__q15 = +[ + [ "bitRevLength", "structarm__cfft__instance__q15.html#a738907cf34bdbbaf724414ac2decbc3c", null ], + [ "fftLen", "structarm__cfft__instance__q15.html#a5f9e1d3a8c127ee323b5e6929aeb90df", null ], + [ "pBitRevTable", "structarm__cfft__instance__q15.html#ac9160b80243b99a0b6e2f75ddb5cf0ae", null ], + [ "pTwiddle", "structarm__cfft__instance__q15.html#afdaf12ce4687cec021c5ae73d0987a3f", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__instance__q31.html b/Documentation/DSP/html/structarm__cfft__instance__q31.html new file mode 100644 index 0000000..1db6f2b --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__instance__q31.html @@ -0,0 +1,213 @@ + + + + + +arm_cfft_instance_q31 Struct Reference +CMSIS-DSP: arm_cfft_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the fixed-point CFFT/CIFFT function. +

    + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    const q31_t * pTwiddle
     
    const uint16_t * pBitRevTable
     
    uint16_t bitRevLength
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_cfft_instance_q31::bitRevLength
    +
    +

    bit reversal table length.

    + +

    Referenced by arm_cfft_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_instance_q31::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_q31().

    + +
    +
    + +
    +
    + + + + +
    const uint16_t* arm_cfft_instance_q31::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_q31().

    + +
    +
    + +
    +
    + + + + +
    const q31_t* arm_cfft_instance_q31::pTwiddle
    +
    +

    points to the Twiddle factor table.

    + +

    Referenced by arm_cfft_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__instance__q31.js b/Documentation/DSP/html/structarm__cfft__instance__q31.js new file mode 100644 index 0000000..5082247 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__instance__q31.js @@ -0,0 +1,7 @@ +var structarm__cfft__instance__q31 = +[ + [ "bitRevLength", "structarm__cfft__instance__q31.html#a2250fa6b8fe73292c5418c50c0549f87", null ], + [ "fftLen", "structarm__cfft__instance__q31.html#a4406f23e8fd0bff8d555225612e2a2a8", null ], + [ "pBitRevTable", "structarm__cfft__instance__q31.html#a8a464461649f023325ced1e10470f5d0", null ], + [ "pTwiddle", "structarm__cfft__instance__q31.html#af751114feb91de3ace8600e91bdd0872", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__radix2__instance__f32.html b/Documentation/DSP/html/structarm__cfft__radix2__instance__f32.html new file mode 100644 index 0000000..5f8363a --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix2__instance__f32.html @@ -0,0 +1,281 @@ + + + + + +arm_cfft_radix2_instance_f32 Struct Reference +CMSIS-DSP: arm_cfft_radix2_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_radix2_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point CFFT/CIFFT function. +

    + + + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    uint8_t ifftFlag
     
    uint8_t bitReverseFlag
     
    float32_t * pTwiddle
     
    uint16_t * pBitRevTable
     
    uint16_t twidCoefModifier
     
    uint16_t bitRevFactor
     
    float32_t onebyfftLen
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_cfft_radix2_instance_f32::bitReverseFlag
    +
    +

    flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_f32::bitRevFactor
    +
    +

    bit reversal modifier that supports different size FFTs with the same bit reversal table.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_f32::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_cfft_radix2_instance_f32::ifftFlag
    +
    +

    flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_cfft_radix2_instance_f32::onebyfftLen
    +
    +

    value of 1/fftLen.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t* arm_cfft_radix2_instance_f32::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_cfft_radix2_instance_f32::pTwiddle
    +
    +

    points to the Twiddle factor table.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_f32::twidCoefModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_cfft_radix2_f32(), and arm_cfft_radix2_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__radix2__instance__f32.js b/Documentation/DSP/html/structarm__cfft__radix2__instance__f32.js new file mode 100644 index 0000000..88a5ed4 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix2__instance__f32.js @@ -0,0 +1,11 @@ +var structarm__cfft__radix2__instance__f32 = +[ + [ "bitReverseFlag", "structarm__cfft__radix2__instance__f32.html#af713b4ac5256a19bc965c89fe3005fa3", null ], + [ "bitRevFactor", "structarm__cfft__radix2__instance__f32.html#ac1688dafa5177f6b1505abbfd0cf8b21", null ], + [ "fftLen", "structarm__cfft__radix2__instance__f32.html#a2f915a1c29635c1623086aaaa726be8f", null ], + [ "ifftFlag", "structarm__cfft__radix2__instance__f32.html#a8dbe98d2c924e35e0a3fed2fe948176f", null ], + [ "onebyfftLen", "structarm__cfft__radix2__instance__f32.html#a1d3d289d47443e597d88a40effd14b8f", null ], + [ "pBitRevTable", "structarm__cfft__radix2__instance__f32.html#a92b8fa0a151cd800436094903a5ca0a4", null ], + [ "pTwiddle", "structarm__cfft__radix2__instance__f32.html#adb0c9d47dbfbd90a6f6ed0a05313a974", null ], + [ "twidCoefModifier", "structarm__cfft__radix2__instance__f32.html#a411f75b6ed01690293f4f5988030ea42", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__radix2__instance__q15.html b/Documentation/DSP/html/structarm__cfft__radix2__instance__q15.html new file mode 100644 index 0000000..32a27d8 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix2__instance__q15.html @@ -0,0 +1,264 @@ + + + + + +arm_cfft_radix2_instance_q15 Struct Reference +CMSIS-DSP: arm_cfft_radix2_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_radix2_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 CFFT/CIFFT function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    uint8_t ifftFlag
     
    uint8_t bitReverseFlag
     
    q15_t * pTwiddle
     
    uint16_t * pBitRevTable
     
    uint16_t twidCoefModifier
     
    uint16_t bitRevFactor
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_cfft_radix2_instance_q15::bitReverseFlag
    +
    +

    flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

    + +

    Referenced by arm_cfft_radix2_init_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_q15::bitRevFactor
    +
    +

    bit reversal modifier that supports different size FFTs with the same bit reversal table.

    + +

    Referenced by arm_cfft_radix2_init_q15(), and arm_cfft_radix2_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_q15::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_radix2_init_q15(), and arm_cfft_radix2_q15().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_cfft_radix2_instance_q15::ifftFlag
    +
    +

    flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

    + +

    Referenced by arm_cfft_radix2_init_q15(), and arm_cfft_radix2_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t* arm_cfft_radix2_instance_q15::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_radix2_init_q15(), and arm_cfft_radix2_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_cfft_radix2_instance_q15::pTwiddle
    +
    +

    points to the Sin twiddle factor table.

    + +

    Referenced by arm_cfft_radix2_init_q15(), and arm_cfft_radix2_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_q15::twidCoefModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_cfft_radix2_init_q15(), and arm_cfft_radix2_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__radix2__instance__q15.js b/Documentation/DSP/html/structarm__cfft__radix2__instance__q15.js new file mode 100644 index 0000000..d0cbb41 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix2__instance__q15.js @@ -0,0 +1,10 @@ +var structarm__cfft__radix2__instance__q15 = +[ + [ "bitReverseFlag", "structarm__cfft__radix2__instance__q15.html#af8300c1f60caa21e6b44b9240ab5af19", null ], + [ "bitRevFactor", "structarm__cfft__radix2__instance__q15.html#a8722720c542cabd41df83fe88ef4f4cb", null ], + [ "fftLen", "structarm__cfft__radix2__instance__q15.html#a874085647351dcf3f0de39d2b1d49744", null ], + [ "ifftFlag", "structarm__cfft__radix2__instance__q15.html#ab5c073286bdd2f6e2bf783ced36bf1de", null ], + [ "pBitRevTable", "structarm__cfft__radix2__instance__q15.html#ab88afeff6493be3c8b5e4530efa82d51", null ], + [ "pTwiddle", "structarm__cfft__radix2__instance__q15.html#a3809dd15e7cbf1a054c728cfbbb0cc5a", null ], + [ "twidCoefModifier", "structarm__cfft__radix2__instance__q15.html#a6f2ab87fb4c568656e1f92f687b5c850", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__radix2__instance__q31.html b/Documentation/DSP/html/structarm__cfft__radix2__instance__q31.html new file mode 100644 index 0000000..67e9234 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix2__instance__q31.html @@ -0,0 +1,264 @@ + + + + + +arm_cfft_radix2_instance_q31 Struct Reference +CMSIS-DSP: arm_cfft_radix2_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_radix2_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Radix-2 Q31 CFFT/CIFFT function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    uint8_t ifftFlag
     
    uint8_t bitReverseFlag
     
    q31_t * pTwiddle
     
    uint16_t * pBitRevTable
     
    uint16_t twidCoefModifier
     
    uint16_t bitRevFactor
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_cfft_radix2_instance_q31::bitReverseFlag
    +
    +

    flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

    + +

    Referenced by arm_cfft_radix2_init_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_q31::bitRevFactor
    +
    +

    bit reversal modifier that supports different size FFTs with the same bit reversal table.

    + +

    Referenced by arm_cfft_radix2_init_q31(), and arm_cfft_radix2_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_q31::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_radix2_init_q31(), and arm_cfft_radix2_q31().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_cfft_radix2_instance_q31::ifftFlag
    +
    +

    flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

    + +

    Referenced by arm_cfft_radix2_init_q31(), and arm_cfft_radix2_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t* arm_cfft_radix2_instance_q31::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_radix2_init_q31(), and arm_cfft_radix2_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_cfft_radix2_instance_q31::pTwiddle
    +
    +

    points to the Twiddle factor table.

    + +

    Referenced by arm_cfft_radix2_init_q31(), and arm_cfft_radix2_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix2_instance_q31::twidCoefModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_cfft_radix2_init_q31(), and arm_cfft_radix2_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__radix2__instance__q31.js b/Documentation/DSP/html/structarm__cfft__radix2__instance__q31.js new file mode 100644 index 0000000..eb1e9a8 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix2__instance__q31.js @@ -0,0 +1,10 @@ +var structarm__cfft__radix2__instance__q31 = +[ + [ "bitReverseFlag", "structarm__cfft__radix2__instance__q31.html#a6239b8d268285334e88c008c07d68616", null ], + [ "bitRevFactor", "structarm__cfft__radix2__instance__q31.html#a9d17a87263953fe3559a007512c9f3a4", null ], + [ "fftLen", "structarm__cfft__radix2__instance__q31.html#a960199f1373a192366878ef279eab00f", null ], + [ "ifftFlag", "structarm__cfft__radix2__instance__q31.html#a2607378ce64be16698bb8a3b1af8d3c8", null ], + [ "pBitRevTable", "structarm__cfft__radix2__instance__q31.html#ada8e5264f4b22ff4c621817978994674", null ], + [ "pTwiddle", "structarm__cfft__radix2__instance__q31.html#a1d5bbe9a991e133f81652a77a7985d23", null ], + [ "twidCoefModifier", "structarm__cfft__radix2__instance__q31.html#ae63ca9193322cd477970c1d2086407d1", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__radix4__instance__f32.html b/Documentation/DSP/html/structarm__cfft__radix4__instance__f32.html new file mode 100644 index 0000000..de3e3e2 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix4__instance__f32.html @@ -0,0 +1,283 @@ + + + + + +arm_cfft_radix4_instance_f32 Struct Reference +CMSIS-DSP: arm_cfft_radix4_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_radix4_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point CFFT/CIFFT function. + More...

    + + + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    uint8_t ifftFlag
     
    uint8_t bitReverseFlag
     
    float32_t * pTwiddle
     
    uint16_t * pBitRevTable
     
    uint16_t twidCoefModifier
     
    uint16_t bitRevFactor
     
    float32_t onebyfftLen
     
    +

    Description

    +
    Examples:
    arm_convolution_example_f32.c.
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_cfft_radix4_instance_f32::bitReverseFlag
    +
    +

    flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

    + +

    Referenced by arm_cfft_radix4_f32(), and arm_cfft_radix4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_f32::bitRevFactor
    +
    +

    bit reversal modifier that supports different size FFTs with the same bit reversal table.

    + +

    Referenced by arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_f32::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_cfft_radix4_instance_f32::ifftFlag
    +
    +

    flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

    + +

    Referenced by arm_cfft_radix4_f32(), and arm_cfft_radix4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_cfft_radix4_instance_f32::onebyfftLen
    +
    +

    value of 1/fftLen.

    + +

    Referenced by arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t* arm_cfft_radix4_instance_f32::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_cfft_radix4_instance_f32::pTwiddle
    +
    +

    points to the Twiddle factor table.

    + +

    Referenced by arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), and arm_rfft_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_f32::twidCoefModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_cfft_radix4_f32(), arm_cfft_radix4_init_f32(), and arm_rfft_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__radix4__instance__f32.js b/Documentation/DSP/html/structarm__cfft__radix4__instance__f32.js new file mode 100644 index 0000000..e51ec9c --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix4__instance__f32.js @@ -0,0 +1,11 @@ +var structarm__cfft__radix4__instance__f32 = +[ + [ "bitReverseFlag", "structarm__cfft__radix4__instance__f32.html#ac10927a1620195a88649ce63dab66120", null ], + [ "bitRevFactor", "structarm__cfft__radix4__instance__f32.html#acc8cb18a8b901b8321ab9d86491e41a3", null ], + [ "fftLen", "structarm__cfft__radix4__instance__f32.html#a7e6a6d290ce158ce9a15a45e364b021a", null ], + [ "ifftFlag", "structarm__cfft__radix4__instance__f32.html#a25d1da64dd6487c291f04d226f9acc66", null ], + [ "onebyfftLen", "structarm__cfft__radix4__instance__f32.html#ab9eed39e40b8d7c16381fbccf84467cd", null ], + [ "pBitRevTable", "structarm__cfft__radix4__instance__f32.html#a8da0d2ca69749fde8cbb95caeac6fe6a", null ], + [ "pTwiddle", "structarm__cfft__radix4__instance__f32.html#a14860c7544911702ca1fa0bf78204ef3", null ], + [ "twidCoefModifier", "structarm__cfft__radix4__instance__f32.html#abe31ea2157dfa233e389cdfd3b9993ee", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__radix4__instance__q15.html b/Documentation/DSP/html/structarm__cfft__radix4__instance__q15.html new file mode 100644 index 0000000..71b57e7 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix4__instance__q15.html @@ -0,0 +1,264 @@ + + + + + +arm_cfft_radix4_instance_q15 Struct Reference +CMSIS-DSP: arm_cfft_radix4_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_radix4_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 CFFT/CIFFT function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    uint8_t ifftFlag
     
    uint8_t bitReverseFlag
     
    q15_t * pTwiddle
     
    uint16_t * pBitRevTable
     
    uint16_t twidCoefModifier
     
    uint16_t bitRevFactor
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_cfft_radix4_instance_q15::bitReverseFlag
    +
    +

    flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

    + +

    Referenced by arm_cfft_radix4_init_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_q15::bitRevFactor
    +
    +

    bit reversal modifier that supports different size FFTs with the same bit reversal table.

    + +

    Referenced by arm_cfft_radix4_init_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_q15::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_radix4_init_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_cfft_radix4_instance_q15::ifftFlag
    +
    +

    flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

    + +

    Referenced by arm_cfft_radix4_init_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t* arm_cfft_radix4_instance_q15::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_radix4_init_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_cfft_radix4_instance_q15::pTwiddle
    +
    +

    points to the twiddle factor table.

    + +

    Referenced by arm_cfft_radix4_init_q15(), and arm_cfft_radix4_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_q15::twidCoefModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_cfft_radix4_init_q15(), and arm_cfft_radix4_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__radix4__instance__q15.js b/Documentation/DSP/html/structarm__cfft__radix4__instance__q15.js new file mode 100644 index 0000000..fbb00ca --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix4__instance__q15.js @@ -0,0 +1,10 @@ +var structarm__cfft__radix4__instance__q15 = +[ + [ "bitReverseFlag", "structarm__cfft__radix4__instance__q15.html#a101e3f7b0bd6b5b14cd5214f23df4133", null ], + [ "bitRevFactor", "structarm__cfft__radix4__instance__q15.html#a6b010e5f02d1130c621e3d2e26b95df1", null ], + [ "fftLen", "structarm__cfft__radix4__instance__q15.html#a5fc543e7d84ca8cb7cf6648970f21ca6", null ], + [ "ifftFlag", "structarm__cfft__radix4__instance__q15.html#a2ecff6ea735cb4d22e922d0fd5736655", null ], + [ "pBitRevTable", "structarm__cfft__radix4__instance__q15.html#a4acf704ae0cf30b53bf0fbfae8e34a59", null ], + [ "pTwiddle", "structarm__cfft__radix4__instance__q15.html#a29dd693537e45421a36891f8439e1fba", null ], + [ "twidCoefModifier", "structarm__cfft__radix4__instance__q15.html#af32fdc78bcc27ca385f9b76a0a1f71c3", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__cfft__radix4__instance__q31.html b/Documentation/DSP/html/structarm__cfft__radix4__instance__q31.html new file mode 100644 index 0000000..dbe5819 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix4__instance__q31.html @@ -0,0 +1,264 @@ + + + + + +arm_cfft_radix4_instance_q31 Struct Reference +CMSIS-DSP: arm_cfft_radix4_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_cfft_radix4_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 CFFT/CIFFT function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t fftLen
     
    uint8_t ifftFlag
     
    uint8_t bitReverseFlag
     
    q31_t * pTwiddle
     
    uint16_t * pBitRevTable
     
    uint16_t twidCoefModifier
     
    uint16_t bitRevFactor
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_cfft_radix4_instance_q31::bitReverseFlag
    +
    +

    flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.

    + +

    Referenced by arm_cfft_radix4_init_q31(), and arm_cfft_radix4_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_q31::bitRevFactor
    +
    +

    bit reversal modifier that supports different size FFTs with the same bit reversal table.

    + +

    Referenced by arm_cfft_radix4_init_q31(), and arm_cfft_radix4_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_q31::fftLen
    +
    +

    length of the FFT.

    + +

    Referenced by arm_cfft_radix4_init_q31(), and arm_cfft_radix4_q31().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_cfft_radix4_instance_q31::ifftFlag
    +
    +

    flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.

    + +

    Referenced by arm_cfft_radix4_init_q31(), and arm_cfft_radix4_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t* arm_cfft_radix4_instance_q31::pBitRevTable
    +
    +

    points to the bit reversal table.

    + +

    Referenced by arm_cfft_radix4_init_q31(), and arm_cfft_radix4_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_cfft_radix4_instance_q31::pTwiddle
    +
    +

    points to the twiddle factor table.

    + +

    Referenced by arm_cfft_radix4_init_q31(), and arm_cfft_radix4_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_cfft_radix4_instance_q31::twidCoefModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_cfft_radix4_init_q31(), and arm_cfft_radix4_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__cfft__radix4__instance__q31.js b/Documentation/DSP/html/structarm__cfft__radix4__instance__q31.js new file mode 100644 index 0000000..227b943 --- /dev/null +++ b/Documentation/DSP/html/structarm__cfft__radix4__instance__q31.js @@ -0,0 +1,10 @@ +var structarm__cfft__radix4__instance__q31 = +[ + [ "bitReverseFlag", "structarm__cfft__radix4__instance__q31.html#a5a7c4f4c7b3fb655cbb2bc11ef160a2a", null ], + [ "bitRevFactor", "structarm__cfft__radix4__instance__q31.html#a94d2fead4efa4d5eaae142bbe30b0e15", null ], + [ "fftLen", "structarm__cfft__radix4__instance__q31.html#ab413d2a5d3f45fa187d93813bf3bf81b", null ], + [ "ifftFlag", "structarm__cfft__radix4__instance__q31.html#adc0a62ba669ad2282ecbe43d5d96abab", null ], + [ "pBitRevTable", "structarm__cfft__radix4__instance__q31.html#a33a3bc774c97373261699463c05dfe54", null ], + [ "pTwiddle", "structarm__cfft__radix4__instance__q31.html#a561c22dee4cbdcfa0fd5f15106ecc306", null ], + [ "twidCoefModifier", "structarm__cfft__radix4__instance__q31.html#a8cf8187b8232815cf17ee82bf572ecf9", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__dct4__instance__f32.html b/Documentation/DSP/html/structarm__dct4__instance__f32.html new file mode 100644 index 0000000..fff10fa --- /dev/null +++ b/Documentation/DSP/html/structarm__dct4__instance__f32.html @@ -0,0 +1,264 @@ + + + + + +arm_dct4_instance_f32 Struct Reference +CMSIS-DSP: arm_dct4_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_dct4_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point DCT4/IDCT4 function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t N
     
    uint16_t Nby2
     
    float32_t normalize
     
    float32_t * pTwiddle
     
    float32_t * pCosFactor
     
    arm_rfft_instance_f32 * pRfft
     
    arm_cfft_radix4_instance_f32 * pCfft
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_dct4_instance_f32::N
    +
    +

    length of the DCT4.

    + +

    Referenced by arm_dct4_f32(), and arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_dct4_instance_f32::Nby2
    +
    +

    half of the length of the DCT4.

    + +

    Referenced by arm_dct4_f32(), and arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_dct4_instance_f32::normalize
    +
    +

    normalizing factor.

    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    arm_cfft_radix4_instance_f32* arm_dct4_instance_f32::pCfft
    +
    +

    points to the complex FFT instance.

    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_dct4_instance_f32::pCosFactor
    +
    +

    points to the cosFactor table.

    + +

    Referenced by arm_dct4_f32(), and arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    arm_rfft_instance_f32* arm_dct4_instance_f32::pRfft
    +
    +

    points to the real FFT instance.

    + +

    Referenced by arm_dct4_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_dct4_instance_f32::pTwiddle
    +
    +

    points to the twiddle factor table.

    + +

    Referenced by arm_dct4_f32(), and arm_dct4_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__dct4__instance__f32.js b/Documentation/DSP/html/structarm__dct4__instance__f32.js new file mode 100644 index 0000000..2bb4bef --- /dev/null +++ b/Documentation/DSP/html/structarm__dct4__instance__f32.js @@ -0,0 +1,10 @@ +var structarm__dct4__instance__f32 = +[ + [ "N", "structarm__dct4__instance__f32.html#a262b29a51c371b46efc89120e31ccf37", null ], + [ "Nby2", "structarm__dct4__instance__f32.html#adb1ef2739ddbe62e5cdadc47455a4147", null ], + [ "normalize", "structarm__dct4__instance__f32.html#a61ce8c967b2e998a9c0041cca73cdef8", null ], + [ "pCfft", "structarm__dct4__instance__f32.html#a018f7860b6e070af533fb7d76c7cdc32", null ], + [ "pCosFactor", "structarm__dct4__instance__f32.html#a6da1187e070801e011ce5e0582efa861", null ], + [ "pRfft", "structarm__dct4__instance__f32.html#a978f37fc19add31af243ab5c63ae502f", null ], + [ "pTwiddle", "structarm__dct4__instance__f32.html#ad13544aafad268588c62e3eb35ae662c", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__dct4__instance__q15.html b/Documentation/DSP/html/structarm__dct4__instance__q15.html new file mode 100644 index 0000000..d63aae0 --- /dev/null +++ b/Documentation/DSP/html/structarm__dct4__instance__q15.html @@ -0,0 +1,264 @@ + + + + + +arm_dct4_instance_q15 Struct Reference +CMSIS-DSP: arm_dct4_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_dct4_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 DCT4/IDCT4 function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t N
     
    uint16_t Nby2
     
    q15_t normalize
     
    q15_t * pTwiddle
     
    q15_t * pCosFactor
     
    arm_rfft_instance_q15 * pRfft
     
    arm_cfft_radix4_instance_q15 * pCfft
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_dct4_instance_q15::N
    +
    +

    length of the DCT4.

    + +

    Referenced by arm_dct4_init_q15(), and arm_dct4_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_dct4_instance_q15::Nby2
    +
    +

    half of the length of the DCT4.

    + +

    Referenced by arm_dct4_init_q15(), and arm_dct4_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t arm_dct4_instance_q15::normalize
    +
    +

    normalizing factor.

    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + +
    arm_cfft_radix4_instance_q15* arm_dct4_instance_q15::pCfft
    +
    +

    points to the complex FFT instance.

    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_dct4_instance_q15::pCosFactor
    +
    +

    points to the cosFactor table.

    + +

    Referenced by arm_dct4_init_q15(), and arm_dct4_q15().

    + +
    +
    + +
    +
    + + + + +
    arm_rfft_instance_q15* arm_dct4_instance_q15::pRfft
    +
    +

    points to the real FFT instance.

    + +

    Referenced by arm_dct4_init_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_dct4_instance_q15::pTwiddle
    +
    +

    points to the twiddle factor table.

    + +

    Referenced by arm_dct4_init_q15(), and arm_dct4_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__dct4__instance__q15.js b/Documentation/DSP/html/structarm__dct4__instance__q15.js new file mode 100644 index 0000000..aca660b --- /dev/null +++ b/Documentation/DSP/html/structarm__dct4__instance__q15.js @@ -0,0 +1,10 @@ +var structarm__dct4__instance__q15 = +[ + [ "N", "structarm__dct4__instance__q15.html#a53d24009bb9b2e93d0aa07db7f1a6c25", null ], + [ "Nby2", "structarm__dct4__instance__q15.html#af43dcbbc2fc661ffbc525afe3dcbd7da", null ], + [ "normalize", "structarm__dct4__instance__q15.html#a197098140d68e89a08f7a249003a0b86", null ], + [ "pCfft", "structarm__dct4__instance__q15.html#a7284932ee8c36107c33815eb62eadffc", null ], + [ "pCosFactor", "structarm__dct4__instance__q15.html#ac76df681b1bd502fb4874c06f055dded", null ], + [ "pRfft", "structarm__dct4__instance__q15.html#a11cf95c1cd9dd2dd5e4b81b8f88dc208", null ], + [ "pTwiddle", "structarm__dct4__instance__q15.html#abc6c847e9f906781e1d5da40e9aafa76", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__dct4__instance__q31.html b/Documentation/DSP/html/structarm__dct4__instance__q31.html new file mode 100644 index 0000000..b3478d4 --- /dev/null +++ b/Documentation/DSP/html/structarm__dct4__instance__q31.html @@ -0,0 +1,264 @@ + + + + + +arm_dct4_instance_q31 Struct Reference +CMSIS-DSP: arm_dct4_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_dct4_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 DCT4/IDCT4 function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t N
     
    uint16_t Nby2
     
    q31_t normalize
     
    q31_t * pTwiddle
     
    q31_t * pCosFactor
     
    arm_rfft_instance_q31 * pRfft
     
    arm_cfft_radix4_instance_q31 * pCfft
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_dct4_instance_q31::N
    +
    +

    length of the DCT4.

    + +

    Referenced by arm_dct4_init_q31(), and arm_dct4_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_dct4_instance_q31::Nby2
    +
    +

    half of the length of the DCT4.

    + +

    Referenced by arm_dct4_init_q31(), and arm_dct4_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_dct4_instance_q31::normalize
    +
    +

    normalizing factor.

    + +

    Referenced by arm_dct4_init_q31(), and arm_dct4_q31().

    + +
    +
    + +
    +
    + + + + +
    arm_cfft_radix4_instance_q31* arm_dct4_instance_q31::pCfft
    +
    +

    points to the complex FFT instance.

    + +

    Referenced by arm_dct4_init_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_dct4_instance_q31::pCosFactor
    +
    +

    points to the cosFactor table.

    + +

    Referenced by arm_dct4_init_q31(), and arm_dct4_q31().

    + +
    +
    + +
    +
    + + + + +
    arm_rfft_instance_q31* arm_dct4_instance_q31::pRfft
    +
    +

    points to the real FFT instance.

    + +

    Referenced by arm_dct4_init_q31(), and arm_dct4_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_dct4_instance_q31::pTwiddle
    +
    +

    points to the twiddle factor table.

    + +

    Referenced by arm_dct4_init_q31(), and arm_dct4_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__dct4__instance__q31.js b/Documentation/DSP/html/structarm__dct4__instance__q31.js new file mode 100644 index 0000000..ad6005a --- /dev/null +++ b/Documentation/DSP/html/structarm__dct4__instance__q31.js @@ -0,0 +1,10 @@ +var structarm__dct4__instance__q31 = +[ + [ "N", "structarm__dct4__instance__q31.html#a46a9f136457350676e2bfd3768ff9d6d", null ], + [ "Nby2", "structarm__dct4__instance__q31.html#a32d3268ba4629908dba056599f0a904d", null ], + [ "normalize", "structarm__dct4__instance__q31.html#ac80ff7b28fca36aeef74dea12e8312dd", null ], + [ "pCfft", "structarm__dct4__instance__q31.html#ac96579cfb28d08bb11dd2fe4c6303833", null ], + [ "pCosFactor", "structarm__dct4__instance__q31.html#af97204d1838925621fc82021a0c2d6c1", null ], + [ "pRfft", "structarm__dct4__instance__q31.html#af1487dab5e7963b85dc0fdc6bf492542", null ], + [ "pTwiddle", "structarm__dct4__instance__q31.html#a7db236e22673146bb1d2c962f0713f08", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__decimate__instance__f32.html b/Documentation/DSP/html/structarm__fir__decimate__instance__f32.html new file mode 100644 index 0000000..693e3e5 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__decimate__instance__f32.html @@ -0,0 +1,213 @@ + + + + + +arm_fir_decimate_instance_f32 Struct Reference +CMSIS-DSP: arm_fir_decimate_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_decimate_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point FIR decimator. +

    + + + + + + + + + + +

    +Data Fields

    uint8_t M
     
    uint16_t numTaps
     
    float32_t * pCoeffs
     
    float32_t * pState
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_fir_decimate_instance_f32::M
    +
    +

    decimation factor.

    + +

    Referenced by arm_fir_decimate_f32(), and arm_fir_decimate_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_decimate_instance_f32::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_fir_decimate_f32(), and arm_fir_decimate_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_decimate_instance_f32::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_decimate_f32(), and arm_fir_decimate_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_decimate_instance_f32::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_fir_decimate_f32(), and arm_fir_decimate_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__decimate__instance__f32.js b/Documentation/DSP/html/structarm__fir__decimate__instance__f32.js new file mode 100644 index 0000000..65803f7 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__decimate__instance__f32.js @@ -0,0 +1,7 @@ +var structarm__fir__decimate__instance__f32 = +[ + [ "M", "structarm__fir__decimate__instance__f32.html#a76a8b2161731638eb3d67f277919f95d", null ], + [ "numTaps", "structarm__fir__decimate__instance__f32.html#a2aa2986129db8affef03ede88dd45a03", null ], + [ "pCoeffs", "structarm__fir__decimate__instance__f32.html#a268a8b0e80a3d9764baf33e4bc10dde2", null ], + [ "pState", "structarm__fir__decimate__instance__f32.html#a5bddf29aaaf2011d2e3bcec59a83f633", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__decimate__instance__q15.html b/Documentation/DSP/html/structarm__fir__decimate__instance__q15.html new file mode 100644 index 0000000..0f65695 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__decimate__instance__q15.html @@ -0,0 +1,213 @@ + + + + + +arm_fir_decimate_instance_q15 Struct Reference +CMSIS-DSP: arm_fir_decimate_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_decimate_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 FIR decimator. +

    + + + + + + + + + + +

    +Data Fields

    uint8_t M
     
    uint16_t numTaps
     
    q15_t * pCoeffs
     
    q15_t * pState
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_fir_decimate_instance_q15::M
    +
    +

    decimation factor.

    + +

    Referenced by arm_fir_decimate_fast_q15(), arm_fir_decimate_init_q15(), and arm_fir_decimate_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_decimate_instance_q15::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_fir_decimate_fast_q15(), arm_fir_decimate_init_q15(), and arm_fir_decimate_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_decimate_instance_q15::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_decimate_fast_q15(), arm_fir_decimate_init_q15(), and arm_fir_decimate_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_decimate_instance_q15::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_fir_decimate_fast_q15(), arm_fir_decimate_init_q15(), and arm_fir_decimate_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__decimate__instance__q15.js b/Documentation/DSP/html/structarm__fir__decimate__instance__q15.js new file mode 100644 index 0000000..6591c22 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__decimate__instance__q15.js @@ -0,0 +1,7 @@ +var structarm__fir__decimate__instance__q15 = +[ + [ "M", "structarm__fir__decimate__instance__q15.html#aad9320284218b3aa378527ea518cf093", null ], + [ "numTaps", "structarm__fir__decimate__instance__q15.html#ac1e9844488ec717da334fbd4c4f41990", null ], + [ "pCoeffs", "structarm__fir__decimate__instance__q15.html#a01cacab67e73945e8289075598ede14d", null ], + [ "pState", "structarm__fir__decimate__instance__q15.html#a3f7b5184bb28853ef401b001df121047", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__decimate__instance__q31.html b/Documentation/DSP/html/structarm__fir__decimate__instance__q31.html new file mode 100644 index 0000000..31d943f --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__decimate__instance__q31.html @@ -0,0 +1,213 @@ + + + + + +arm_fir_decimate_instance_q31 Struct Reference +CMSIS-DSP: arm_fir_decimate_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_decimate_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 FIR decimator. +

    + + + + + + + + + + +

    +Data Fields

    uint8_t M
     
    uint16_t numTaps
     
    q31_t * pCoeffs
     
    q31_t * pState
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_fir_decimate_instance_q31::M
    +
    +

    decimation factor.

    + +

    Referenced by arm_fir_decimate_fast_q31(), arm_fir_decimate_init_q31(), and arm_fir_decimate_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_decimate_instance_q31::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_fir_decimate_fast_q31(), arm_fir_decimate_init_q31(), and arm_fir_decimate_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_decimate_instance_q31::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_decimate_fast_q31(), arm_fir_decimate_init_q31(), and arm_fir_decimate_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_decimate_instance_q31::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_fir_decimate_fast_q31(), arm_fir_decimate_init_q31(), and arm_fir_decimate_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__decimate__instance__q31.js b/Documentation/DSP/html/structarm__fir__decimate__instance__q31.js new file mode 100644 index 0000000..b3cd80f --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__decimate__instance__q31.js @@ -0,0 +1,7 @@ +var structarm__fir__decimate__instance__q31 = +[ + [ "M", "structarm__fir__decimate__instance__q31.html#ad3d6936c36303b30dd38f1eddf248ae5", null ], + [ "numTaps", "structarm__fir__decimate__instance__q31.html#a37915d42b0dc5e3057ebe83110798482", null ], + [ "pCoeffs", "structarm__fir__decimate__instance__q31.html#a030d0391538c2481c5b348fd09a952ff", null ], + [ "pState", "structarm__fir__decimate__instance__q31.html#a0ef0ef9e265f7ab873cfc6daa7593fdb", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__instance__f32.html b/Documentation/DSP/html/structarm__fir__instance__f32.html new file mode 100644 index 0000000..a06549d --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__f32.html @@ -0,0 +1,198 @@ + + + + + +arm_fir_instance_f32 Struct Reference +CMSIS-DSP: arm_fir_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point FIR filter. + More...

    + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    +

    Description

    +
    Examples:
    arm_fir_example_f32.c, and arm_signal_converge_example_f32.c.
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_instance_f32::numTaps
    +
    +

    number of filter coefficients in the filter.

    + +

    Referenced by arm_fir_f32(), and arm_fir_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_instance_f32::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_f32(), and arm_fir_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_instance_f32::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_fir_f32(), and arm_fir_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__instance__f32.js b/Documentation/DSP/html/structarm__fir__instance__f32.js new file mode 100644 index 0000000..d67ad4d --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__f32.js @@ -0,0 +1,6 @@ +var structarm__fir__instance__f32 = +[ + [ "numTaps", "structarm__fir__instance__f32.html#a20cf98c92b5323799b7881c9ff4d2f7c", null ], + [ "pCoeffs", "structarm__fir__instance__f32.html#a1c9cfca901d5902afeb640f2831488f4", null ], + [ "pState", "structarm__fir__instance__f32.html#a7afcf4022e8560db9b8fd28b0d090a15", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__instance__q15.html b/Documentation/DSP/html/structarm__fir__instance__q15.html new file mode 100644 index 0000000..369af91 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__q15.html @@ -0,0 +1,196 @@ + + + + + +arm_fir_instance_q15 Struct Reference +CMSIS-DSP: arm_fir_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 FIR filter. +

    + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    q15_t * pState
     
    q15_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_instance_q15::numTaps
    +
    +

    number of filter coefficients in the filter.

    + +

    Referenced by arm_fir_fast_q15(), arm_fir_init_q15(), and arm_fir_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_instance_q15::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_fast_q15(), arm_fir_init_q15(), and arm_fir_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_instance_q15::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_fir_fast_q15(), arm_fir_init_q15(), and arm_fir_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__instance__q15.js b/Documentation/DSP/html/structarm__fir__instance__q15.js new file mode 100644 index 0000000..1493cc1 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__q15.js @@ -0,0 +1,6 @@ +var structarm__fir__instance__q15 = +[ + [ "numTaps", "structarm__fir__instance__q15.html#a0e46f93cf51bfb18b1be808be9c5bfc9", null ], + [ "pCoeffs", "structarm__fir__instance__q15.html#a6d16db16a5f8f0db54938f2967244d9e", null ], + [ "pState", "structarm__fir__instance__q15.html#aa8d25f44f45b6a6c4cf38c31569b8a01", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__instance__q31.html b/Documentation/DSP/html/structarm__fir__instance__q31.html new file mode 100644 index 0000000..e82f36f --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__q31.html @@ -0,0 +1,196 @@ + + + + + +arm_fir_instance_q31 Struct Reference +CMSIS-DSP: arm_fir_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 FIR filter. +

    + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    q31_t * pState
     
    q31_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_instance_q31::numTaps
    +
    +

    number of filter coefficients in the filter.

    + +

    Referenced by arm_fir_fast_q31(), arm_fir_init_q31(), and arm_fir_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_instance_q31::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_fast_q31(), arm_fir_init_q31(), and arm_fir_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_instance_q31::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_fir_fast_q31(), arm_fir_init_q31(), and arm_fir_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__instance__q31.js b/Documentation/DSP/html/structarm__fir__instance__q31.js new file mode 100644 index 0000000..5cc8889 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__q31.js @@ -0,0 +1,6 @@ +var structarm__fir__instance__q31 = +[ + [ "numTaps", "structarm__fir__instance__q31.html#a918fadd775b7a0482b21bf34dae2f094", null ], + [ "pCoeffs", "structarm__fir__instance__q31.html#afaae4c884bdf11a4ec2f3b9bb2bb51d0", null ], + [ "pState", "structarm__fir__instance__q31.html#a409f39c93b744784648bdc365541444d", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__instance__q7.html b/Documentation/DSP/html/structarm__fir__instance__q7.html new file mode 100644 index 0000000..c1e54fe --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__q7.html @@ -0,0 +1,196 @@ + + + + + +arm_fir_instance_q7 Struct Reference +CMSIS-DSP: arm_fir_instance_q7 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_instance_q7 Struct Reference
    +
    +
    + +

    Instance structure for the Q7 FIR filter. +

    + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    q7_t * pState
     
    q7_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_instance_q7::numTaps
    +
    +

    number of filter coefficients in the filter.

    + +

    Referenced by arm_fir_init_q7(), and arm_fir_q7().

    + +
    +
    + +
    +
    + + + + +
    q7_t* arm_fir_instance_q7::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_init_q7(), and arm_fir_q7().

    + +
    +
    + +
    +
    + + + + +
    q7_t* arm_fir_instance_q7::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_fir_init_q7(), and arm_fir_q7().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__instance__q7.js b/Documentation/DSP/html/structarm__fir__instance__q7.js new file mode 100644 index 0000000..411b51f --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__instance__q7.js @@ -0,0 +1,6 @@ +var structarm__fir__instance__q7 = +[ + [ "numTaps", "structarm__fir__instance__q7.html#a9b50840e2c5ef5b17e1a584fb4cf0d06", null ], + [ "pCoeffs", "structarm__fir__instance__q7.html#a0e45aedefc3fffad6cb315c5b6e5bd49", null ], + [ "pState", "structarm__fir__instance__q7.html#aaddea3b9c7e16ddfd9428b7bf9f9c200", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__interpolate__instance__f32.html b/Documentation/DSP/html/structarm__fir__interpolate__instance__f32.html new file mode 100644 index 0000000..5a7588a --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__interpolate__instance__f32.html @@ -0,0 +1,213 @@ + + + + + +arm_fir_interpolate_instance_f32 Struct Reference +CMSIS-DSP: arm_fir_interpolate_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_interpolate_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point FIR interpolator. +

    + + + + + + + + + + +

    +Data Fields

    uint8_t L
     
    uint16_t phaseLength
     
    float32_t * pCoeffs
     
    float32_t * pState
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_fir_interpolate_instance_f32::L
    +
    +

    upsample factor.

    + +

    Referenced by arm_fir_interpolate_f32(), and arm_fir_interpolate_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_interpolate_instance_f32::pCoeffs
    +
    +

    points to the coefficient array. The array is of length L*phaseLength.

    + +

    Referenced by arm_fir_interpolate_f32(), and arm_fir_interpolate_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_interpolate_instance_f32::phaseLength
    +
    +

    length of each polyphase filter component.

    + +

    Referenced by arm_fir_interpolate_f32(), and arm_fir_interpolate_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_interpolate_instance_f32::pState
    +
    +

    points to the state variable array. The array is of length phaseLength+numTaps-1.

    + +

    Referenced by arm_fir_interpolate_f32(), and arm_fir_interpolate_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__interpolate__instance__f32.js b/Documentation/DSP/html/structarm__fir__interpolate__instance__f32.js new file mode 100644 index 0000000..2d74ca2 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__interpolate__instance__f32.js @@ -0,0 +1,7 @@ +var structarm__fir__interpolate__instance__f32 = +[ + [ "L", "structarm__fir__interpolate__instance__f32.html#ae6f94dcc0ccd8aa4bc699b20985d9df5", null ], + [ "pCoeffs", "structarm__fir__interpolate__instance__f32.html#a86053b715980a93c9df630d6de5bb63c", null ], + [ "phaseLength", "structarm__fir__interpolate__instance__f32.html#a389e669e13ec56292a70db8e92194b12", null ], + [ "pState", "structarm__fir__interpolate__instance__f32.html#a42a8ba1bda85fa86d7b6c84d3da4c75b", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__interpolate__instance__q15.html b/Documentation/DSP/html/structarm__fir__interpolate__instance__q15.html new file mode 100644 index 0000000..1998c0f --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__interpolate__instance__q15.html @@ -0,0 +1,213 @@ + + + + + +arm_fir_interpolate_instance_q15 Struct Reference +CMSIS-DSP: arm_fir_interpolate_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_interpolate_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 FIR interpolator. +

    + + + + + + + + + + +

    +Data Fields

    uint8_t L
     
    uint16_t phaseLength
     
    q15_t * pCoeffs
     
    q15_t * pState
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_fir_interpolate_instance_q15::L
    +
    +

    upsample factor.

    + +

    Referenced by arm_fir_interpolate_init_q15(), and arm_fir_interpolate_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_interpolate_instance_q15::pCoeffs
    +
    +

    points to the coefficient array. The array is of length L*phaseLength.

    + +

    Referenced by arm_fir_interpolate_init_q15(), and arm_fir_interpolate_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_interpolate_instance_q15::phaseLength
    +
    +

    length of each polyphase filter component.

    + +

    Referenced by arm_fir_interpolate_init_q15(), and arm_fir_interpolate_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_interpolate_instance_q15::pState
    +
    +

    points to the state variable array. The array is of length blockSize+phaseLength-1.

    + +

    Referenced by arm_fir_interpolate_init_q15(), and arm_fir_interpolate_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__interpolate__instance__q15.js b/Documentation/DSP/html/structarm__fir__interpolate__instance__q15.js new file mode 100644 index 0000000..aa338be --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__interpolate__instance__q15.js @@ -0,0 +1,7 @@ +var structarm__fir__interpolate__instance__q15 = +[ + [ "L", "structarm__fir__interpolate__instance__q15.html#a5431bdc079e72a973b51d359f7f13603", null ], + [ "pCoeffs", "structarm__fir__interpolate__instance__q15.html#a767d91d61d4c0beeddd4325d28d28e24", null ], + [ "phaseLength", "structarm__fir__interpolate__instance__q15.html#ad5178a02a697a77e0d0e60705d9f0a19", null ], + [ "pState", "structarm__fir__interpolate__instance__q15.html#a26b864363fa47954248f2590e3a82a3c", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__interpolate__instance__q31.html b/Documentation/DSP/html/structarm__fir__interpolate__instance__q31.html new file mode 100644 index 0000000..76029e7 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__interpolate__instance__q31.html @@ -0,0 +1,213 @@ + + + + + +arm_fir_interpolate_instance_q31 Struct Reference +CMSIS-DSP: arm_fir_interpolate_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_interpolate_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 FIR interpolator. +

    + + + + + + + + + + +

    +Data Fields

    uint8_t L
     
    uint16_t phaseLength
     
    q31_t * pCoeffs
     
    q31_t * pState
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_fir_interpolate_instance_q31::L
    +
    +

    upsample factor.

    + +

    Referenced by arm_fir_interpolate_init_q31(), and arm_fir_interpolate_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_interpolate_instance_q31::pCoeffs
    +
    +

    points to the coefficient array. The array is of length L*phaseLength.

    + +

    Referenced by arm_fir_interpolate_init_q31(), and arm_fir_interpolate_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_interpolate_instance_q31::phaseLength
    +
    +

    length of each polyphase filter component.

    + +

    Referenced by arm_fir_interpolate_init_q31(), and arm_fir_interpolate_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_interpolate_instance_q31::pState
    +
    +

    points to the state variable array. The array is of length blockSize+phaseLength-1.

    + +

    Referenced by arm_fir_interpolate_init_q31(), and arm_fir_interpolate_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__interpolate__instance__q31.js b/Documentation/DSP/html/structarm__fir__interpolate__instance__q31.js new file mode 100644 index 0000000..a603dd4 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__interpolate__instance__q31.js @@ -0,0 +1,7 @@ +var structarm__fir__interpolate__instance__q31 = +[ + [ "L", "structarm__fir__interpolate__instance__q31.html#a5cdf0a631cb74e0e9588c388abe5235c", null ], + [ "pCoeffs", "structarm__fir__interpolate__instance__q31.html#afa719433687e1936ec3403d0d32f06e6", null ], + [ "phaseLength", "structarm__fir__interpolate__instance__q31.html#a5d243796584afc7cd6c557f00b7acca5", null ], + [ "pState", "structarm__fir__interpolate__instance__q31.html#addde04514b6e6ac72be3d609f0398b1a", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__lattice__instance__f32.html b/Documentation/DSP/html/structarm__fir__lattice__instance__f32.html new file mode 100644 index 0000000..1a9db4c --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__lattice__instance__f32.html @@ -0,0 +1,196 @@ + + + + + +arm_fir_lattice_instance_f32 Struct Reference +CMSIS-DSP: arm_fir_lattice_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_lattice_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point FIR lattice filter. +

    + + + + + + + + +

    +Data Fields

    uint16_t numStages
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_lattice_instance_f32::numStages
    +
    +

    number of filter stages.

    + +

    Referenced by arm_fir_lattice_f32(), and arm_fir_lattice_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_lattice_instance_f32::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numStages.

    + +

    Referenced by arm_fir_lattice_f32(), and arm_fir_lattice_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_lattice_instance_f32::pState
    +
    +

    points to the state variable array. The array is of length numStages.

    + +

    Referenced by arm_fir_lattice_f32(), and arm_fir_lattice_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__lattice__instance__f32.js b/Documentation/DSP/html/structarm__fir__lattice__instance__f32.js new file mode 100644 index 0000000..90795b2 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__lattice__instance__f32.js @@ -0,0 +1,6 @@ +var structarm__fir__lattice__instance__f32 = +[ + [ "numStages", "structarm__fir__lattice__instance__f32.html#ad369bd9997a250f195254df37408a38f", null ], + [ "pCoeffs", "structarm__fir__lattice__instance__f32.html#a33bf5948c947f9ef80a99717cb0a0a43", null ], + [ "pState", "structarm__fir__lattice__instance__f32.html#ae348884a1ba9b83fadccd5da640cbcaf", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__lattice__instance__q15.html b/Documentation/DSP/html/structarm__fir__lattice__instance__q15.html new file mode 100644 index 0000000..090f839 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__lattice__instance__q15.html @@ -0,0 +1,196 @@ + + + + + +arm_fir_lattice_instance_q15 Struct Reference +CMSIS-DSP: arm_fir_lattice_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_lattice_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 FIR lattice filter. +

    + + + + + + + + +

    +Data Fields

    uint16_t numStages
     
    q15_t * pState
     
    q15_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_lattice_instance_q15::numStages
    +
    +

    number of filter stages.

    + +

    Referenced by arm_fir_lattice_init_q15(), and arm_fir_lattice_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_lattice_instance_q15::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numStages.

    + +

    Referenced by arm_fir_lattice_init_q15(), and arm_fir_lattice_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_lattice_instance_q15::pState
    +
    +

    points to the state variable array. The array is of length numStages.

    + +

    Referenced by arm_fir_lattice_init_q15(), and arm_fir_lattice_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__lattice__instance__q15.js b/Documentation/DSP/html/structarm__fir__lattice__instance__q15.js new file mode 100644 index 0000000..8df831b --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__lattice__instance__q15.js @@ -0,0 +1,6 @@ +var structarm__fir__lattice__instance__q15 = +[ + [ "numStages", "structarm__fir__lattice__instance__q15.html#a38b179138d6a6c9cac4f8f79b6fd5357", null ], + [ "pCoeffs", "structarm__fir__lattice__instance__q15.html#a78f872826140069cf67836fff87360bc", null ], + [ "pState", "structarm__fir__lattice__instance__q15.html#a37b90dea2bc3ee7c9951a9fe74db0cbb", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__lattice__instance__q31.html b/Documentation/DSP/html/structarm__fir__lattice__instance__q31.html new file mode 100644 index 0000000..abdc8e3 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__lattice__instance__q31.html @@ -0,0 +1,196 @@ + + + + + +arm_fir_lattice_instance_q31 Struct Reference +CMSIS-DSP: arm_fir_lattice_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_lattice_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 FIR lattice filter. +

    + + + + + + + + +

    +Data Fields

    uint16_t numStages
     
    q31_t * pState
     
    q31_t * pCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_lattice_instance_q31::numStages
    +
    +

    number of filter stages.

    + +

    Referenced by arm_fir_lattice_init_q31(), and arm_fir_lattice_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_lattice_instance_q31::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numStages.

    + +

    Referenced by arm_fir_lattice_init_q31(), and arm_fir_lattice_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_lattice_instance_q31::pState
    +
    +

    points to the state variable array. The array is of length numStages.

    + +

    Referenced by arm_fir_lattice_init_q31(), and arm_fir_lattice_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__lattice__instance__q31.js b/Documentation/DSP/html/structarm__fir__lattice__instance__q31.js new file mode 100644 index 0000000..b05a008 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__lattice__instance__q31.js @@ -0,0 +1,6 @@ +var structarm__fir__lattice__instance__q31 = +[ + [ "numStages", "structarm__fir__lattice__instance__q31.html#a9f3773bbb76bc5a8a5ee9d37786bf478", null ], + [ "pCoeffs", "structarm__fir__lattice__instance__q31.html#a66c3364bf5863cd45e05f1652c3dc522", null ], + [ "pState", "structarm__fir__lattice__instance__q31.html#a08fe9494ab7cd336b791e9657adadcf6", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__f32.html b/Documentation/DSP/html/structarm__fir__sparse__instance__f32.html new file mode 100644 index 0000000..c1248c4 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__f32.html @@ -0,0 +1,247 @@ + + + + + +arm_fir_sparse_instance_f32 Struct Reference +CMSIS-DSP: arm_fir_sparse_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_sparse_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point sparse FIR filter. +

    + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    uint16_t stateIndex
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    uint16_t maxDelay
     
    int32_t * pTapDelay
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_f32::maxDelay
    +
    +

    maximum offset specified by the pTapDelay array.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_f32::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_sparse_instance_f32::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_fir_sparse_instance_f32::pState
    +
    +

    points to the state buffer array. The array is of length maxDelay+blockSize-1.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_init_f32().

    + +
    +
    + +
    +
    + + + + +
    int32_t* arm_fir_sparse_instance_f32::pTapDelay
    +
    +

    points to the array of delay values. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_f32::stateIndex
    +
    +

    state buffer index. Points to the oldest sample in the state buffer.

    + +

    Referenced by arm_fir_sparse_f32(), and arm_fir_sparse_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__f32.js b/Documentation/DSP/html/structarm__fir__sparse__instance__f32.js new file mode 100644 index 0000000..e4e5494 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__f32.js @@ -0,0 +1,9 @@ +var structarm__fir__sparse__instance__f32 = +[ + [ "maxDelay", "structarm__fir__sparse__instance__f32.html#af8b8c775f4084c36774f06c082b4c078", null ], + [ "numTaps", "structarm__fir__sparse__instance__f32.html#a5e19e7f234ac30a3db843352bf2a8515", null ], + [ "pCoeffs", "structarm__fir__sparse__instance__f32.html#a04af7c738dfb0882ad102fcad501d94a", null ], + [ "pState", "structarm__fir__sparse__instance__f32.html#a794af0916666d11cc564d6df08553555", null ], + [ "pTapDelay", "structarm__fir__sparse__instance__f32.html#aaa54ae67e5d10c6dd0d697945c638d31", null ], + [ "stateIndex", "structarm__fir__sparse__instance__f32.html#a57585aeca9dc8686e08df2865375a86d", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__q15.html b/Documentation/DSP/html/structarm__fir__sparse__instance__q15.html new file mode 100644 index 0000000..c27e88a --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__q15.html @@ -0,0 +1,247 @@ + + + + + +arm_fir_sparse_instance_q15 Struct Reference +CMSIS-DSP: arm_fir_sparse_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_sparse_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 sparse FIR filter. +

    + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    uint16_t stateIndex
     
    q15_t * pState
     
    q15_t * pCoeffs
     
    uint16_t maxDelay
     
    int32_t * pTapDelay
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q15::maxDelay
    +
    +

    maximum offset specified by the pTapDelay array.

    + +

    Referenced by arm_fir_sparse_init_q15(), and arm_fir_sparse_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q15::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_fir_sparse_init_q15(), and arm_fir_sparse_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_sparse_instance_q15::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_init_q15(), and arm_fir_sparse_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_fir_sparse_instance_q15::pState
    +
    +

    points to the state buffer array. The array is of length maxDelay+blockSize-1.

    + +

    Referenced by arm_fir_sparse_init_q15(), and arm_fir_sparse_q15().

    + +
    +
    + +
    +
    + + + + +
    int32_t* arm_fir_sparse_instance_q15::pTapDelay
    +
    +

    points to the array of delay values. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_init_q15(), and arm_fir_sparse_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q15::stateIndex
    +
    +

    state buffer index. Points to the oldest sample in the state buffer.

    + +

    Referenced by arm_fir_sparse_init_q15(), and arm_fir_sparse_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__q15.js b/Documentation/DSP/html/structarm__fir__sparse__instance__q15.js new file mode 100644 index 0000000..bece02b --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__q15.js @@ -0,0 +1,9 @@ +var structarm__fir__sparse__instance__q15 = +[ + [ "maxDelay", "structarm__fir__sparse__instance__q15.html#ad14cc1070eecf7e1926d8f67a8273182", null ], + [ "numTaps", "structarm__fir__sparse__instance__q15.html#a0f66b126dd8b85f7467cfb01b7bc4d77", null ], + [ "pCoeffs", "structarm__fir__sparse__instance__q15.html#a78a6565473b5f0b8c77c3f0f58a76069", null ], + [ "pState", "structarm__fir__sparse__instance__q15.html#a98b92b0f5208110129b9a67b1db90408", null ], + [ "pTapDelay", "structarm__fir__sparse__instance__q15.html#aeab2855176c6efdb231a73a3672837d5", null ], + [ "stateIndex", "structarm__fir__sparse__instance__q15.html#a89487f28cab52637426024005e478985", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__q31.html b/Documentation/DSP/html/structarm__fir__sparse__instance__q31.html new file mode 100644 index 0000000..df78e69 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__q31.html @@ -0,0 +1,247 @@ + + + + + +arm_fir_sparse_instance_q31 Struct Reference +CMSIS-DSP: arm_fir_sparse_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_sparse_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 sparse FIR filter. +

    + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    uint16_t stateIndex
     
    q31_t * pState
     
    q31_t * pCoeffs
     
    uint16_t maxDelay
     
    int32_t * pTapDelay
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q31::maxDelay
    +
    +

    maximum offset specified by the pTapDelay array.

    + +

    Referenced by arm_fir_sparse_init_q31(), and arm_fir_sparse_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q31::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_fir_sparse_init_q31(), and arm_fir_sparse_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_sparse_instance_q31::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_init_q31(), and arm_fir_sparse_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_fir_sparse_instance_q31::pState
    +
    +

    points to the state buffer array. The array is of length maxDelay+blockSize-1.

    + +

    Referenced by arm_fir_sparse_init_q31(), and arm_fir_sparse_q31().

    + +
    +
    + +
    +
    + + + + +
    int32_t* arm_fir_sparse_instance_q31::pTapDelay
    +
    +

    points to the array of delay values. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_init_q31(), and arm_fir_sparse_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q31::stateIndex
    +
    +

    state buffer index. Points to the oldest sample in the state buffer.

    + +

    Referenced by arm_fir_sparse_init_q31(), and arm_fir_sparse_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__q31.js b/Documentation/DSP/html/structarm__fir__sparse__instance__q31.js new file mode 100644 index 0000000..aa2727d --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__q31.js @@ -0,0 +1,9 @@ +var structarm__fir__sparse__instance__q31 = +[ + [ "maxDelay", "structarm__fir__sparse__instance__q31.html#afdd3a1dc72132c854dc379154b68b674", null ], + [ "numTaps", "structarm__fir__sparse__instance__q31.html#a07b6c01e58ec6dde384719130d36b0dc", null ], + [ "pCoeffs", "structarm__fir__sparse__instance__q31.html#a093d6227f0d1597982cd083fb126f4e0", null ], + [ "pState", "structarm__fir__sparse__instance__q31.html#a830be89daa5a393b225048889aa045d1", null ], + [ "pTapDelay", "structarm__fir__sparse__instance__q31.html#ab87ae457adec8f727afefaa2599fc983", null ], + [ "stateIndex", "structarm__fir__sparse__instance__q31.html#a557ed9d477e76e4ad2019344f19f568a", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__q7.html b/Documentation/DSP/html/structarm__fir__sparse__instance__q7.html new file mode 100644 index 0000000..3c9ddae --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__q7.html @@ -0,0 +1,247 @@ + + + + + +arm_fir_sparse_instance_q7 Struct Reference +CMSIS-DSP: arm_fir_sparse_instance_q7 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_fir_sparse_instance_q7 Struct Reference
    +
    +
    + +

    Instance structure for the Q7 sparse FIR filter. +

    + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    uint16_t stateIndex
     
    q7_t * pState
     
    q7_t * pCoeffs
     
    uint16_t maxDelay
     
    int32_t * pTapDelay
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q7::maxDelay
    +
    +

    maximum offset specified by the pTapDelay array.

    + +

    Referenced by arm_fir_sparse_init_q7(), and arm_fir_sparse_q7().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q7::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_fir_sparse_init_q7(), and arm_fir_sparse_q7().

    + +
    +
    + +
    +
    + + + + +
    q7_t* arm_fir_sparse_instance_q7::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_init_q7(), and arm_fir_sparse_q7().

    + +
    +
    + +
    +
    + + + + +
    q7_t* arm_fir_sparse_instance_q7::pState
    +
    +

    points to the state buffer array. The array is of length maxDelay+blockSize-1.

    + +

    Referenced by arm_fir_sparse_init_q7(), and arm_fir_sparse_q7().

    + +
    +
    + +
    +
    + + + + +
    int32_t* arm_fir_sparse_instance_q7::pTapDelay
    +
    +

    points to the array of delay values. The array is of length numTaps.

    + +

    Referenced by arm_fir_sparse_init_q7(), and arm_fir_sparse_q7().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_fir_sparse_instance_q7::stateIndex
    +
    +

    state buffer index. Points to the oldest sample in the state buffer.

    + +

    Referenced by arm_fir_sparse_init_q7(), and arm_fir_sparse_q7().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__fir__sparse__instance__q7.js b/Documentation/DSP/html/structarm__fir__sparse__instance__q7.js new file mode 100644 index 0000000..fecb8b6 --- /dev/null +++ b/Documentation/DSP/html/structarm__fir__sparse__instance__q7.js @@ -0,0 +1,9 @@ +var structarm__fir__sparse__instance__q7 = +[ + [ "maxDelay", "structarm__fir__sparse__instance__q7.html#af74dacc1d34c078283e50f2530eb91df", null ], + [ "numTaps", "structarm__fir__sparse__instance__q7.html#a54cdd27ca1c672b126c38763ce678b1c", null ], + [ "pCoeffs", "structarm__fir__sparse__instance__q7.html#a3dac86f15e33553e8f3e19e0d712bae5", null ], + [ "pState", "structarm__fir__sparse__instance__q7.html#a18072cf3ef3666d588f0d49512f2b28f", null ], + [ "pTapDelay", "structarm__fir__sparse__instance__q7.html#ac625393c84bc0342ffdf26fc4eba1ac1", null ], + [ "stateIndex", "structarm__fir__sparse__instance__q7.html#a2d2e65473fe3a3f2b953b4e0b60824df", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__iir__lattice__instance__f32.html b/Documentation/DSP/html/structarm__iir__lattice__instance__f32.html new file mode 100644 index 0000000..ce77c94 --- /dev/null +++ b/Documentation/DSP/html/structarm__iir__lattice__instance__f32.html @@ -0,0 +1,213 @@ + + + + + +arm_iir_lattice_instance_f32 Struct Reference +CMSIS-DSP: arm_iir_lattice_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_iir_lattice_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point IIR lattice filter. +

    + + + + + + + + + + +

    +Data Fields

    uint16_t numStages
     
    float32_t * pState
     
    float32_t * pkCoeffs
     
    float32_t * pvCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_iir_lattice_instance_f32::numStages
    +
    +

    number of stages in the filter.

    + +

    Referenced by arm_iir_lattice_f32(), and arm_iir_lattice_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_iir_lattice_instance_f32::pkCoeffs
    +
    +

    points to the reflection coefficient array. The array is of length numStages.

    + +

    Referenced by arm_iir_lattice_f32(), and arm_iir_lattice_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_iir_lattice_instance_f32::pState
    +
    +

    points to the state variable array. The array is of length numStages+blockSize.

    + +

    Referenced by arm_iir_lattice_f32(), and arm_iir_lattice_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_iir_lattice_instance_f32::pvCoeffs
    +
    +

    points to the ladder coefficient array. The array is of length numStages+1.

    + +

    Referenced by arm_iir_lattice_f32(), and arm_iir_lattice_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__iir__lattice__instance__f32.js b/Documentation/DSP/html/structarm__iir__lattice__instance__f32.js new file mode 100644 index 0000000..51405cc --- /dev/null +++ b/Documentation/DSP/html/structarm__iir__lattice__instance__f32.js @@ -0,0 +1,7 @@ +var structarm__iir__lattice__instance__f32 = +[ + [ "numStages", "structarm__iir__lattice__instance__f32.html#af8de449af5efe1f30be82f9ba35587ee", null ], + [ "pkCoeffs", "structarm__iir__lattice__instance__f32.html#aa69fcdd3775e828d450ce1bbd978fa31", null ], + [ "pState", "structarm__iir__lattice__instance__f32.html#a30babe7815510219e6e3d28e6e4a5969", null ], + [ "pvCoeffs", "structarm__iir__lattice__instance__f32.html#afc7c8f577e6f27d097fe55f57e707f72", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__iir__lattice__instance__q15.html b/Documentation/DSP/html/structarm__iir__lattice__instance__q15.html new file mode 100644 index 0000000..b0a355a --- /dev/null +++ b/Documentation/DSP/html/structarm__iir__lattice__instance__q15.html @@ -0,0 +1,213 @@ + + + + + +arm_iir_lattice_instance_q15 Struct Reference +CMSIS-DSP: arm_iir_lattice_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_iir_lattice_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 IIR lattice filter. +

    + + + + + + + + + + +

    +Data Fields

    uint16_t numStages
     
    q15_t * pState
     
    q15_t * pkCoeffs
     
    q15_t * pvCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_iir_lattice_instance_q15::numStages
    +
    +

    number of stages in the filter.

    + +

    Referenced by arm_iir_lattice_init_q15(), and arm_iir_lattice_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_iir_lattice_instance_q15::pkCoeffs
    +
    +

    points to the reflection coefficient array. The array is of length numStages.

    + +

    Referenced by arm_iir_lattice_init_q15(), and arm_iir_lattice_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_iir_lattice_instance_q15::pState
    +
    +

    points to the state variable array. The array is of length numStages+blockSize.

    + +

    Referenced by arm_iir_lattice_init_q15(), and arm_iir_lattice_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_iir_lattice_instance_q15::pvCoeffs
    +
    +

    points to the ladder coefficient array. The array is of length numStages+1.

    + +

    Referenced by arm_iir_lattice_init_q15(), and arm_iir_lattice_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__iir__lattice__instance__q15.js b/Documentation/DSP/html/structarm__iir__lattice__instance__q15.js new file mode 100644 index 0000000..7e4c210 --- /dev/null +++ b/Documentation/DSP/html/structarm__iir__lattice__instance__q15.js @@ -0,0 +1,7 @@ +var structarm__iir__lattice__instance__q15 = +[ + [ "numStages", "structarm__iir__lattice__instance__q15.html#a96fbed313bef01070409fa182d26ba3f", null ], + [ "pkCoeffs", "structarm__iir__lattice__instance__q15.html#a41c214a1ec38d4a82fae8899d715dd29", null ], + [ "pState", "structarm__iir__lattice__instance__q15.html#afd0136ab917b529554d93f41a5e04618", null ], + [ "pvCoeffs", "structarm__iir__lattice__instance__q15.html#a4c4f57f45b223abbe2a9fb727bd2cad9", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__iir__lattice__instance__q31.html b/Documentation/DSP/html/structarm__iir__lattice__instance__q31.html new file mode 100644 index 0000000..146a22c --- /dev/null +++ b/Documentation/DSP/html/structarm__iir__lattice__instance__q31.html @@ -0,0 +1,213 @@ + + + + + +arm_iir_lattice_instance_q31 Struct Reference +CMSIS-DSP: arm_iir_lattice_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_iir_lattice_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 IIR lattice filter. +

    + + + + + + + + + + +

    +Data Fields

    uint16_t numStages
     
    q31_t * pState
     
    q31_t * pkCoeffs
     
    q31_t * pvCoeffs
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_iir_lattice_instance_q31::numStages
    +
    +

    number of stages in the filter.

    + +

    Referenced by arm_iir_lattice_init_q31(), and arm_iir_lattice_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_iir_lattice_instance_q31::pkCoeffs
    +
    +

    points to the reflection coefficient array. The array is of length numStages.

    + +

    Referenced by arm_iir_lattice_init_q31(), and arm_iir_lattice_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_iir_lattice_instance_q31::pState
    +
    +

    points to the state variable array. The array is of length numStages+blockSize.

    + +

    Referenced by arm_iir_lattice_init_q31(), and arm_iir_lattice_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_iir_lattice_instance_q31::pvCoeffs
    +
    +

    points to the ladder coefficient array. The array is of length numStages+1.

    + +

    Referenced by arm_iir_lattice_init_q31(), and arm_iir_lattice_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__iir__lattice__instance__q31.js b/Documentation/DSP/html/structarm__iir__lattice__instance__q31.js new file mode 100644 index 0000000..6ea5ef2 --- /dev/null +++ b/Documentation/DSP/html/structarm__iir__lattice__instance__q31.js @@ -0,0 +1,7 @@ +var structarm__iir__lattice__instance__q31 = +[ + [ "numStages", "structarm__iir__lattice__instance__q31.html#a9df4570ed28c50fd9193ab654ff236ad", null ], + [ "pkCoeffs", "structarm__iir__lattice__instance__q31.html#a1d30aa16aac7722936ea9dee59211863", null ], + [ "pState", "structarm__iir__lattice__instance__q31.html#a941282745effd26a889fbfadf4b95e6a", null ], + [ "pvCoeffs", "structarm__iir__lattice__instance__q31.html#a04507e2b982b1dfa97b7b55752dea6b9", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__linear__interp__instance__f32.html b/Documentation/DSP/html/structarm__linear__interp__instance__f32.html new file mode 100644 index 0000000..8af67f1 --- /dev/null +++ b/Documentation/DSP/html/structarm__linear__interp__instance__f32.html @@ -0,0 +1,215 @@ + + + + + +arm_linear_interp_instance_f32 Struct Reference +CMSIS-DSP: arm_linear_interp_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_linear_interp_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point Linear Interpolate function. + More...

    + + + + + + + + + + +

    +Data Fields

    uint32_t nValues
     
    float32_t x1
     
    float32_t xSpacing
     
    float32_t * pYData
     
    +

    Description

    +
    Examples:
    arm_linear_interp_example_f32.c.
    +

    Field Documentation

    + +
    +
    + + + + +
    uint32_t arm_linear_interp_instance_f32::nValues
    +
    +

    nValues

    + +

    Referenced by arm_linear_interp_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_linear_interp_instance_f32::pYData
    +
    +

    pointer to the table of Y values

    + +

    Referenced by arm_linear_interp_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_linear_interp_instance_f32::x1
    +
    +

    x1

    + +

    Referenced by arm_linear_interp_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_linear_interp_instance_f32::xSpacing
    +
    +

    xSpacing

    + +

    Referenced by arm_linear_interp_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__linear__interp__instance__f32.js b/Documentation/DSP/html/structarm__linear__interp__instance__f32.js new file mode 100644 index 0000000..45a8410 --- /dev/null +++ b/Documentation/DSP/html/structarm__linear__interp__instance__f32.js @@ -0,0 +1,7 @@ +var structarm__linear__interp__instance__f32 = +[ + [ "nValues", "structarm__linear__interp__instance__f32.html#a95f02a926b16d35359aca5b31e813b11", null ], + [ "pYData", "structarm__linear__interp__instance__f32.html#ab373001f6afad0850359c344a4d7eee4", null ], + [ "x1", "structarm__linear__interp__instance__f32.html#a08352dc6ea82fbc0827408e018535481", null ], + [ "xSpacing", "structarm__linear__interp__instance__f32.html#aa8e2d686b5434a406d390b347b183511", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__lms__instance__f32.html b/Documentation/DSP/html/structarm__lms__instance__f32.html new file mode 100644 index 0000000..8adde4d --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__instance__f32.html @@ -0,0 +1,213 @@ + + + + + +arm_lms_instance_f32 Struct Reference +CMSIS-DSP: arm_lms_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_lms_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point LMS filter. +

    + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    float32_t mu
     
    +

    Field Documentation

    + +
    +
    + + + + +
    float32_t arm_lms_instance_f32::mu
    +
    +

    step size that controls filter coefficient updates.

    + +

    Referenced by arm_lms_f32(), and arm_lms_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_lms_instance_f32::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_lms_f32(), and arm_lms_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_lms_instance_f32::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_lms_f32(), and arm_lms_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_lms_instance_f32::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_lms_f32(), and arm_lms_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__lms__instance__f32.js b/Documentation/DSP/html/structarm__lms__instance__f32.js new file mode 100644 index 0000000..502d9ba --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__instance__f32.js @@ -0,0 +1,7 @@ +var structarm__lms__instance__f32 = +[ + [ "mu", "structarm__lms__instance__f32.html#ae2af43d74c93dba16b876e10c97a5b99", null ], + [ "numTaps", "structarm__lms__instance__f32.html#af73880d9009982f5d14529869494ec3d", null ], + [ "pCoeffs", "structarm__lms__instance__f32.html#a4795c6f7d3f17cec15c2fd09f66edd1a", null ], + [ "pState", "structarm__lms__instance__f32.html#aaf94285be2f99b5b9af40bea8dcb14b9", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__lms__instance__q15.html b/Documentation/DSP/html/structarm__lms__instance__q15.html new file mode 100644 index 0000000..0365741 --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__instance__q15.html @@ -0,0 +1,230 @@ + + + + + +arm_lms_instance_q15 Struct Reference +CMSIS-DSP: arm_lms_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_lms_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 LMS filter. +

    + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    q15_t * pState
     
    q15_t * pCoeffs
     
    q15_t mu
     
    uint32_t postShift
     
    +

    Field Documentation

    + +
    +
    + + + + +
    q15_t arm_lms_instance_q15::mu
    +
    +

    step size that controls filter coefficient updates.

    + +

    Referenced by arm_lms_init_q15(), and arm_lms_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_lms_instance_q15::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_lms_init_q15(), and arm_lms_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_lms_instance_q15::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_lms_init_q15(), and arm_lms_q15().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_lms_instance_q15::postShift
    +
    +

    bit shift applied to coefficients.

    + +

    Referenced by arm_lms_init_q15(), and arm_lms_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_lms_instance_q15::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_lms_init_q15(), and arm_lms_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__lms__instance__q15.js b/Documentation/DSP/html/structarm__lms__instance__q15.js new file mode 100644 index 0000000..0051189 --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__instance__q15.js @@ -0,0 +1,8 @@ +var structarm__lms__instance__q15 = +[ + [ "mu", "structarm__lms__instance__q15.html#aae46129d7cfd7f1c162cc502ed0a9d49", null ], + [ "numTaps", "structarm__lms__instance__q15.html#a0078e894f805af1b360369e619fb57b3", null ], + [ "pCoeffs", "structarm__lms__instance__q15.html#a42f95368b94898eb82608e1113d18cab", null ], + [ "postShift", "structarm__lms__instance__q15.html#acca5fbaef4a52ae411de24c9a0b929cf", null ], + [ "pState", "structarm__lms__instance__q15.html#a9a575ff82c1e68cbb583083439260d08", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__lms__instance__q31.html b/Documentation/DSP/html/structarm__lms__instance__q31.html new file mode 100644 index 0000000..d75d28e --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__instance__q31.html @@ -0,0 +1,230 @@ + + + + + +arm_lms_instance_q31 Struct Reference +CMSIS-DSP: arm_lms_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_lms_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 LMS filter. +

    + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    q31_t * pState
     
    q31_t * pCoeffs
     
    q31_t mu
     
    uint32_t postShift
     
    +

    Field Documentation

    + +
    +
    + + + + +
    q31_t arm_lms_instance_q31::mu
    +
    +

    step size that controls filter coefficient updates.

    + +

    Referenced by arm_lms_init_q31(), and arm_lms_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_lms_instance_q31::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_lms_init_q31(), and arm_lms_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_lms_instance_q31::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_lms_init_q31(), and arm_lms_q31().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_lms_instance_q31::postShift
    +
    +

    bit shift applied to coefficients.

    + +

    Referenced by arm_lms_init_q31(), and arm_lms_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_lms_instance_q31::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_lms_init_q31(), and arm_lms_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__lms__instance__q31.js b/Documentation/DSP/html/structarm__lms__instance__q31.js new file mode 100644 index 0000000..1f4d8e2 --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__instance__q31.js @@ -0,0 +1,8 @@ +var structarm__lms__instance__q31 = +[ + [ "mu", "structarm__lms__instance__q31.html#acb6ca9996b3c5f740d5d6c8e9f4f1d46", null ], + [ "numTaps", "structarm__lms__instance__q31.html#ac0d84f7d054555931ef8a62511fbcb8a", null ], + [ "pCoeffs", "structarm__lms__instance__q31.html#a4afe56e991a5416adfd462aa88bda500", null ], + [ "postShift", "structarm__lms__instance__q31.html#a4705a8f0011bb9166e09bf5bd51e595e", null ], + [ "pState", "structarm__lms__instance__q31.html#a206d47b49de6f357f933ebe61520753c", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__lms__norm__instance__f32.html b/Documentation/DSP/html/structarm__lms__norm__instance__f32.html new file mode 100644 index 0000000..35e3e9f --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__norm__instance__f32.html @@ -0,0 +1,249 @@ + + + + + +arm_lms_norm_instance_f32 Struct Reference +CMSIS-DSP: arm_lms_norm_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_lms_norm_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point normalized LMS filter. + More...

    + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    float32_t * pState
     
    float32_t * pCoeffs
     
    float32_t mu
     
    float32_t energy
     
    float32_t x0
     
    +

    Description

    +
    Examples:
    arm_signal_converge_example_f32.c.
    +

    Field Documentation

    + +
    +
    + + + + +
    float32_t arm_lms_norm_instance_f32::energy
    +
    +

    saves previous frame energy.

    + +

    Referenced by arm_lms_norm_f32(), and arm_lms_norm_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_lms_norm_instance_f32::mu
    +
    +

    step size that control filter coefficient updates.

    + +

    Referenced by arm_lms_norm_f32(), and arm_lms_norm_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_lms_norm_instance_f32::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_lms_norm_f32(), and arm_lms_norm_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_lms_norm_instance_f32::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_lms_norm_f32(), and arm_lms_norm_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_lms_norm_instance_f32::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_lms_norm_f32(), and arm_lms_norm_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_lms_norm_instance_f32::x0
    +
    +

    saves previous input sample.

    + +

    Referenced by arm_lms_norm_f32(), and arm_lms_norm_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__lms__norm__instance__f32.js b/Documentation/DSP/html/structarm__lms__norm__instance__f32.js new file mode 100644 index 0000000..5118d92 --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__norm__instance__f32.js @@ -0,0 +1,9 @@ +var structarm__lms__norm__instance__f32 = +[ + [ "energy", "structarm__lms__norm__instance__f32.html#a6a4119e4f39447bbee31b066deafa16f", null ], + [ "mu", "structarm__lms__norm__instance__f32.html#a84401d3cfc6c40f69c08223cf341b886", null ], + [ "numTaps", "structarm__lms__norm__instance__f32.html#ac95f8ca3d816524c2070643852fac5e8", null ], + [ "pCoeffs", "structarm__lms__norm__instance__f32.html#a1ba688d90aba7de003ed4ad8e2e7ddda", null ], + [ "pState", "structarm__lms__norm__instance__f32.html#a0bc03338687002ed5f2e4a363eb095ec", null ], + [ "x0", "structarm__lms__norm__instance__f32.html#aec958fe89b164a30f38bcca9f5d96218", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__lms__norm__instance__q15.html b/Documentation/DSP/html/structarm__lms__norm__instance__q15.html new file mode 100644 index 0000000..37ca23f --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__norm__instance__q15.html @@ -0,0 +1,281 @@ + + + + + +arm_lms_norm_instance_q15 Struct Reference +CMSIS-DSP: arm_lms_norm_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_lms_norm_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 normalized LMS filter. +

    + + + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    q15_t * pState
     
    q15_t * pCoeffs
     
    q15_t mu
     
    uint8_t postShift
     
    q15_t * recipTable
     
    q15_t energy
     
    q15_t x0
     
    +

    Field Documentation

    + +
    +
    + + + + +
    q15_t arm_lms_norm_instance_q15::energy
    +
    +

    saves previous frame energy.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t arm_lms_norm_instance_q15::mu
    +
    +

    step size that controls filter coefficient updates.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_lms_norm_instance_q15::numTaps
    +
    +

    Number of coefficients in the filter.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_lms_norm_instance_q15::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_lms_norm_instance_q15::postShift
    +
    +

    bit shift applied to coefficients.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_lms_norm_instance_q15::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_lms_norm_instance_q15::recipTable
    +
    +

    Points to the reciprocal initial value table.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t arm_lms_norm_instance_q15::x0
    +
    +

    saves previous input sample.

    + +

    Referenced by arm_lms_norm_init_q15(), and arm_lms_norm_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__lms__norm__instance__q15.js b/Documentation/DSP/html/structarm__lms__norm__instance__q15.js new file mode 100644 index 0000000..91bbb1d --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__norm__instance__q15.js @@ -0,0 +1,11 @@ +var structarm__lms__norm__instance__q15 = +[ + [ "energy", "structarm__lms__norm__instance__q15.html#a1c81ded399919d8181026bc1c8602e7b", null ], + [ "mu", "structarm__lms__norm__instance__q15.html#a7ce00f21d11cfda6d963240641deea8c", null ], + [ "numTaps", "structarm__lms__norm__instance__q15.html#a9ee7a45f4f315d7996a969e25fdc7146", null ], + [ "pCoeffs", "structarm__lms__norm__instance__q15.html#ae7bca648c75a2ffa02d87852bb78bc8a", null ], + [ "postShift", "structarm__lms__norm__instance__q15.html#aa0d435fbcf7dedb7179d4467e9b79e9f", null ], + [ "pState", "structarm__lms__norm__instance__q15.html#aa4de490b3bdbd03561b76ee07901c8e3", null ], + [ "recipTable", "structarm__lms__norm__instance__q15.html#a9aabb0e4c79f3db807e7a441fa36f5f8", null ], + [ "x0", "structarm__lms__norm__instance__q15.html#a3fc1d6f97d2c6d5324871de6895cb7e9", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__lms__norm__instance__q31.html b/Documentation/DSP/html/structarm__lms__norm__instance__q31.html new file mode 100644 index 0000000..0c8185b --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__norm__instance__q31.html @@ -0,0 +1,281 @@ + + + + + +arm_lms_norm_instance_q31 Struct Reference +CMSIS-DSP: arm_lms_norm_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_lms_norm_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 normalized LMS filter. +

    + + + + + + + + + + + + + + + + + + +

    +Data Fields

    uint16_t numTaps
     
    q31_t * pState
     
    q31_t * pCoeffs
     
    q31_t mu
     
    uint8_t postShift
     
    q31_t * recipTable
     
    q31_t energy
     
    q31_t x0
     
    +

    Field Documentation

    + +
    +
    + + + + +
    q31_t arm_lms_norm_instance_q31::energy
    +
    +

    saves previous frame energy.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_lms_norm_instance_q31::mu
    +
    +

    step size that controls filter coefficient updates.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_lms_norm_instance_q31::numTaps
    +
    +

    number of coefficients in the filter.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_lms_norm_instance_q31::pCoeffs
    +
    +

    points to the coefficient array. The array is of length numTaps.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_lms_norm_instance_q31::postShift
    +
    +

    bit shift applied to coefficients.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_lms_norm_instance_q31::pState
    +
    +

    points to the state variable array. The array is of length numTaps+blockSize-1.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_lms_norm_instance_q31::recipTable
    +
    +

    points to the reciprocal initial value table.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_lms_norm_instance_q31::x0
    +
    +

    saves previous input sample.

    + +

    Referenced by arm_lms_norm_init_q31(), and arm_lms_norm_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__lms__norm__instance__q31.js b/Documentation/DSP/html/structarm__lms__norm__instance__q31.js new file mode 100644 index 0000000..ebfb4f1 --- /dev/null +++ b/Documentation/DSP/html/structarm__lms__norm__instance__q31.js @@ -0,0 +1,11 @@ +var structarm__lms__norm__instance__q31 = +[ + [ "energy", "structarm__lms__norm__instance__q31.html#a3c0ae42869afec8555dc8e3a7ef9b386", null ], + [ "mu", "structarm__lms__norm__instance__q31.html#ad3dd2a2406e02fdaa7782ba6c3940a64", null ], + [ "numTaps", "structarm__lms__norm__instance__q31.html#a28e4c085af69c9c3e2e95dacf8004c3e", null ], + [ "pCoeffs", "structarm__lms__norm__instance__q31.html#a57a64c1ff102d033c1bd05043f1d9955", null ], + [ "postShift", "structarm__lms__norm__instance__q31.html#a28d7b9e437817f83397e081967e90f3c", null ], + [ "pState", "structarm__lms__norm__instance__q31.html#a6b25c96cf048b77078d62f4252a01ec4", null ], + [ "recipTable", "structarm__lms__norm__instance__q31.html#a85836d0907077b9ac660f7bbbaa9d694", null ], + [ "x0", "structarm__lms__norm__instance__q31.html#a47c4466d644e0d8ba407995adfa9b917", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__matrix__instance__f32.html b/Documentation/DSP/html/structarm__matrix__instance__f32.html new file mode 100644 index 0000000..48690e2 --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__f32.html @@ -0,0 +1,198 @@ + + + + + +arm_matrix_instance_f32 Struct Reference +CMSIS-DSP: arm_matrix_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_matrix_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point matrix structure. + More...

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    float32_t * pData
     
    +

    Description

    +
    Examples:
    arm_class_marks_example_f32.c, and arm_matrix_example_f32.c.
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_f32::numCols
    +
    +

    number of columns of the matrix.

    + +

    Referenced by arm_mat_add_f32(), arm_mat_cmplx_mult_f32(), arm_mat_init_f32(), arm_mat_inverse_f32(), arm_mat_mult_f32(), arm_mat_scale_f32(), arm_mat_sub_f32(), and arm_mat_trans_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_f32::numRows
    +
    +

    number of rows of the matrix.

    + +

    Referenced by arm_mat_add_f32(), arm_mat_cmplx_mult_f32(), arm_mat_init_f32(), arm_mat_inverse_f32(), arm_mat_mult_f32(), arm_mat_scale_f32(), arm_mat_sub_f32(), and arm_mat_trans_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_matrix_instance_f32::pData
    +
    +

    points to the data of the matrix.

    + +

    Referenced by arm_mat_add_f32(), arm_mat_cmplx_mult_f32(), arm_mat_init_f32(), arm_mat_inverse_f32(), arm_mat_mult_f32(), arm_mat_scale_f32(), arm_mat_sub_f32(), and arm_mat_trans_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__matrix__instance__f32.js b/Documentation/DSP/html/structarm__matrix__instance__f32.js new file mode 100644 index 0000000..ce7cdeb --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__f32.js @@ -0,0 +1,6 @@ +var structarm__matrix__instance__f32 = +[ + [ "numCols", "structarm__matrix__instance__f32.html#acdd1fb73734df68b89565c54f1dd8ae2", null ], + [ "numRows", "structarm__matrix__instance__f32.html#a23f4e34d70a82c9cad7612add5640b7b", null ], + [ "pData", "structarm__matrix__instance__f32.html#af3917c032600a9dfd5ed4a96f074910a", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__matrix__instance__f64.html b/Documentation/DSP/html/structarm__matrix__instance__f64.html new file mode 100644 index 0000000..3372ec5 --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__f64.html @@ -0,0 +1,196 @@ + + + + + +arm_matrix_instance_f64 Struct Reference +CMSIS-DSP: arm_matrix_instance_f64 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_matrix_instance_f64 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point matrix structure. +

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    float64_t * pData
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_f64::numCols
    +
    +

    number of columns of the matrix.

    + +

    Referenced by arm_mat_inverse_f64().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_f64::numRows
    +
    +

    number of rows of the matrix.

    + +

    Referenced by arm_mat_inverse_f64().

    + +
    +
    + +
    +
    + + + + +
    float64_t* arm_matrix_instance_f64::pData
    +
    +

    points to the data of the matrix.

    + +

    Referenced by arm_mat_inverse_f64().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__matrix__instance__f64.js b/Documentation/DSP/html/structarm__matrix__instance__f64.js new file mode 100644 index 0000000..af002e2 --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__f64.js @@ -0,0 +1,6 @@ +var structarm__matrix__instance__f64 = +[ + [ "numCols", "structarm__matrix__instance__f64.html#ab0f0399aff3201880e2d8a447de9a7ee", null ], + [ "numRows", "structarm__matrix__instance__f64.html#a8b44d1e5003345047c4ead9e1593bf22", null ], + [ "pData", "structarm__matrix__instance__f64.html#a5b2475f8ff1e4818955cdd18bc40a097", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__matrix__instance__q15.html b/Documentation/DSP/html/structarm__matrix__instance__q15.html new file mode 100644 index 0000000..b86d55a --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__q15.html @@ -0,0 +1,196 @@ + + + + + +arm_matrix_instance_q15 Struct Reference +CMSIS-DSP: arm_matrix_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_matrix_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 matrix structure. +

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    q15_t * pData
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_q15::numCols
    +
    +

    number of columns of the matrix.

    + +

    Referenced by arm_mat_add_q15(), arm_mat_cmplx_mult_q15(), arm_mat_init_q15(), arm_mat_mult_fast_q15(), arm_mat_mult_q15(), arm_mat_scale_q15(), arm_mat_sub_q15(), and arm_mat_trans_q15().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_q15::numRows
    +
    +

    number of rows of the matrix.

    + +

    Referenced by arm_mat_add_q15(), arm_mat_cmplx_mult_q15(), arm_mat_init_q15(), arm_mat_mult_fast_q15(), arm_mat_mult_q15(), arm_mat_scale_q15(), arm_mat_sub_q15(), and arm_mat_trans_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_matrix_instance_q15::pData
    +
    +

    points to the data of the matrix.

    + +

    Referenced by arm_mat_add_q15(), arm_mat_cmplx_mult_q15(), arm_mat_init_q15(), arm_mat_mult_fast_q15(), arm_mat_mult_q15(), arm_mat_scale_q15(), arm_mat_sub_q15(), and arm_mat_trans_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__matrix__instance__q15.js b/Documentation/DSP/html/structarm__matrix__instance__q15.js new file mode 100644 index 0000000..9d27eae --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__q15.js @@ -0,0 +1,6 @@ +var structarm__matrix__instance__q15 = +[ + [ "numCols", "structarm__matrix__instance__q15.html#acbbce67ba058d8e1c867c71d57288c97", null ], + [ "numRows", "structarm__matrix__instance__q15.html#a9bac6ed54be287c4d4f01a1a28be65f5", null ], + [ "pData", "structarm__matrix__instance__q15.html#a6da33a5553e634787d0f515cf8d724af", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__matrix__instance__q31.html b/Documentation/DSP/html/structarm__matrix__instance__q31.html new file mode 100644 index 0000000..89735ee --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__q31.html @@ -0,0 +1,196 @@ + + + + + +arm_matrix_instance_q31 Struct Reference +CMSIS-DSP: arm_matrix_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_matrix_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 matrix structure. +

    + + + + + + + + +

    +Data Fields

    uint16_t numRows
     
    uint16_t numCols
     
    q31_t * pData
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_q31::numCols
    +
    +

    number of columns of the matrix.

    + +

    Referenced by arm_mat_add_q31(), arm_mat_cmplx_mult_q31(), arm_mat_init_q31(), arm_mat_mult_fast_q31(), arm_mat_mult_q31(), arm_mat_scale_q31(), arm_mat_sub_q31(), and arm_mat_trans_q31().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_matrix_instance_q31::numRows
    +
    +

    number of rows of the matrix.

    + +

    Referenced by arm_mat_add_q31(), arm_mat_cmplx_mult_q31(), arm_mat_init_q31(), arm_mat_mult_fast_q31(), arm_mat_mult_q31(), arm_mat_scale_q31(), arm_mat_sub_q31(), and arm_mat_trans_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_matrix_instance_q31::pData
    +
    +

    points to the data of the matrix.

    + +

    Referenced by arm_mat_add_q31(), arm_mat_cmplx_mult_q31(), arm_mat_init_q31(), arm_mat_mult_fast_q31(), arm_mat_mult_q31(), arm_mat_scale_q31(), arm_mat_sub_q31(), and arm_mat_trans_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__matrix__instance__q31.js b/Documentation/DSP/html/structarm__matrix__instance__q31.js new file mode 100644 index 0000000..6bf45c2 --- /dev/null +++ b/Documentation/DSP/html/structarm__matrix__instance__q31.js @@ -0,0 +1,6 @@ +var structarm__matrix__instance__q31 = +[ + [ "numCols", "structarm__matrix__instance__q31.html#abd161da7614eda927157f18b698074b1", null ], + [ "numRows", "structarm__matrix__instance__q31.html#a63bacac158a821c8cfc06088d251598c", null ], + [ "pData", "structarm__matrix__instance__q31.html#a09a64267c0579fef086efc9059741e56", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__pid__instance__f32.html b/Documentation/DSP/html/structarm__pid__instance__f32.html new file mode 100644 index 0000000..ba4d3f6 --- /dev/null +++ b/Documentation/DSP/html/structarm__pid__instance__f32.html @@ -0,0 +1,264 @@ + + + + + +arm_pid_instance_f32 Struct Reference +CMSIS-DSP: arm_pid_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_pid_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point PID Control. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    float32_t A0
     
    float32_t A1
     
    float32_t A2
     
    float32_t state [3]
     
    float32_t Kp
     
    float32_t Ki
     
    float32_t Kd
     
    +

    Field Documentation

    + +
    +
    + + + + +
    float32_t arm_pid_instance_f32::A0
    +
    +

    The derived gain, A0 = Kp + Ki + Kd .

    + +

    Referenced by arm_pid_f32(), and arm_pid_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_pid_instance_f32::A1
    +
    +

    The derived gain, A1 = -Kp - 2Kd.

    + +

    Referenced by arm_pid_f32(), and arm_pid_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_pid_instance_f32::A2
    +
    +

    The derived gain, A2 = Kd .

    + +

    Referenced by arm_pid_f32(), and arm_pid_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_pid_instance_f32::Kd
    +
    +

    The derivative gain.

    + +

    Referenced by arm_pid_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_pid_instance_f32::Ki
    +
    +

    The integral gain.

    + +

    Referenced by arm_pid_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_pid_instance_f32::Kp
    +
    +

    The proportional gain.

    + +

    Referenced by arm_pid_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t arm_pid_instance_f32::state[3]
    +
    +

    The state array of length 3.

    + +

    Referenced by arm_pid_f32(), arm_pid_init_f32(), and arm_pid_reset_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__pid__instance__f32.js b/Documentation/DSP/html/structarm__pid__instance__f32.js new file mode 100644 index 0000000..ab89568 --- /dev/null +++ b/Documentation/DSP/html/structarm__pid__instance__f32.js @@ -0,0 +1,10 @@ +var structarm__pid__instance__f32 = +[ + [ "A0", "structarm__pid__instance__f32.html#ad7b0bed64915d0a25a3409fa2dc45556", null ], + [ "A1", "structarm__pid__instance__f32.html#a7def89571c50f7137a213326a396e560", null ], + [ "A2", "structarm__pid__instance__f32.html#a155acf642ba2f521869f19d694cd7fa0", null ], + [ "Kd", "structarm__pid__instance__f32.html#ad5b68fbf84d16188ae4747ff91f6f088", null ], + [ "Ki", "structarm__pid__instance__f32.html#ac0feffde05fe391eeab3bf78e953830a", null ], + [ "Kp", "structarm__pid__instance__f32.html#aa9b9aa9e413c6cec376a9dddc9f01ebe", null ], + [ "state", "structarm__pid__instance__f32.html#afd394e1e52fb1d526aa472c83b8f2464", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__pid__instance__q15.html b/Documentation/DSP/html/structarm__pid__instance__q15.html new file mode 100644 index 0000000..7936ecf --- /dev/null +++ b/Documentation/DSP/html/structarm__pid__instance__q15.html @@ -0,0 +1,247 @@ + + + + + +arm_pid_instance_q15 Struct Reference +CMSIS-DSP: arm_pid_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_pid_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 PID Control. +

    + + + + + + + + + + + + + + +

    +Data Fields

    q15_t A0
     
    q31_t A1
     
    q15_t state [3]
     
    q15_t Kp
     
    q15_t Ki
     
    q15_t Kd
     
    +

    Field Documentation

    + +
    +
    + + + + +
    q15_t arm_pid_instance_q15::A0
    +
    +

    The derived gain, A0 = Kp + Ki + Kd .

    + +

    Referenced by arm_pid_init_q15(), and arm_pid_q15().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_pid_instance_q15::A1
    +
    +

    The derived gain A1 = -Kp - 2Kd | Kd.

    + +

    Referenced by arm_pid_init_q15(), and arm_pid_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t arm_pid_instance_q15::Kd
    +
    +

    The derivative gain.

    + +

    Referenced by arm_pid_init_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t arm_pid_instance_q15::Ki
    +
    +

    The integral gain.

    + +

    Referenced by arm_pid_init_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t arm_pid_instance_q15::Kp
    +
    +

    The proportional gain.

    + +

    Referenced by arm_pid_init_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t arm_pid_instance_q15::state[3]
    +
    +

    The state array of length 3.

    + +

    Referenced by arm_pid_init_q15(), arm_pid_q15(), and arm_pid_reset_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__pid__instance__q15.js b/Documentation/DSP/html/structarm__pid__instance__q15.js new file mode 100644 index 0000000..943e4d3 --- /dev/null +++ b/Documentation/DSP/html/structarm__pid__instance__q15.js @@ -0,0 +1,9 @@ +var structarm__pid__instance__q15 = +[ + [ "A0", "structarm__pid__instance__q15.html#ad77f3a2823c7f96de42c92a3fbf3246b", null ], + [ "A1", "structarm__pid__instance__q15.html#a1b8412c517071962a9acfdc6778906ec", null ], + [ "Kd", "structarm__pid__instance__q15.html#af5d4b53091f19eff7536636b7cc43111", null ], + [ "Ki", "structarm__pid__instance__q15.html#a0dcc19d5c8f7bc401acea9e8318cd777", null ], + [ "Kp", "structarm__pid__instance__q15.html#ad228aae24a1b6d855c93a8b9bbc1c4f1", null ], + [ "state", "structarm__pid__instance__q15.html#a4a3f0a878b5b6b055e3478a2f244cd30", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__pid__instance__q31.html b/Documentation/DSP/html/structarm__pid__instance__q31.html new file mode 100644 index 0000000..72b3340 --- /dev/null +++ b/Documentation/DSP/html/structarm__pid__instance__q31.html @@ -0,0 +1,264 @@ + + + + + +arm_pid_instance_q31 Struct Reference +CMSIS-DSP: arm_pid_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_pid_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 PID Control. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    q31_t A0
     
    q31_t A1
     
    q31_t A2
     
    q31_t state [3]
     
    q31_t Kp
     
    q31_t Ki
     
    q31_t Kd
     
    +

    Field Documentation

    + +
    +
    + + + + +
    q31_t arm_pid_instance_q31::A0
    +
    +

    The derived gain, A0 = Kp + Ki + Kd .

    + +

    Referenced by arm_pid_init_q31(), and arm_pid_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_pid_instance_q31::A1
    +
    +

    The derived gain, A1 = -Kp - 2Kd.

    + +

    Referenced by arm_pid_init_q31(), and arm_pid_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_pid_instance_q31::A2
    +
    +

    The derived gain, A2 = Kd .

    + +

    Referenced by arm_pid_init_q31(), and arm_pid_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_pid_instance_q31::Kd
    +
    +

    The derivative gain.

    + +

    Referenced by arm_pid_init_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_pid_instance_q31::Ki
    +
    +

    The integral gain.

    + +

    Referenced by arm_pid_init_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_pid_instance_q31::Kp
    +
    +

    The proportional gain.

    + +

    Referenced by arm_pid_init_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t arm_pid_instance_q31::state[3]
    +
    +

    The state array of length 3.

    + +

    Referenced by arm_pid_init_q31(), arm_pid_q31(), and arm_pid_reset_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__pid__instance__q31.js b/Documentation/DSP/html/structarm__pid__instance__q31.js new file mode 100644 index 0000000..3091ec3 --- /dev/null +++ b/Documentation/DSP/html/structarm__pid__instance__q31.js @@ -0,0 +1,10 @@ +var structarm__pid__instance__q31 = +[ + [ "A0", "structarm__pid__instance__q31.html#aa5332635ce9c7078cdb4c1ecf442eadd", null ], + [ "A1", "structarm__pid__instance__q31.html#a2f7492bd6fb92fae5e2de7fbbec39b0e", null ], + [ "A2", "structarm__pid__instance__q31.html#a3e34537c53af4f9ad7bfffa4dff27c82", null ], + [ "Kd", "structarm__pid__instance__q31.html#aab4ff371d14441df501f1169f71cbd17", null ], + [ "Ki", "structarm__pid__instance__q31.html#aa861d69fd398f29aa0b4b455a823ed72", null ], + [ "Kp", "structarm__pid__instance__q31.html#ac2410bf7f856d58dc1d773d4983cac8e", null ], + [ "state", "structarm__pid__instance__q31.html#a228e4a64da6014844a0a671a1fa391d4", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__rfft__fast__instance__f32.html b/Documentation/DSP/html/structarm__rfft__fast__instance__f32.html new file mode 100644 index 0000000..e1d2b10 --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__fast__instance__f32.html @@ -0,0 +1,196 @@ + + + + + +arm_rfft_fast_instance_f32 Struct Reference +CMSIS-DSP: arm_rfft_fast_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_rfft_fast_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point RFFT/RIFFT function. +

    + + + + + + + + +

    +Data Fields

    arm_cfft_instance_f32 Sint
     
    uint16_t fftLenRFFT
     
    float32_t * pTwiddleRFFT
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint16_t arm_rfft_fast_instance_f32::fftLenRFFT
    +
    +

    length of the real sequence

    + +

    Referenced by arm_rfft_fast_f32(), and arm_rfft_fast_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_rfft_fast_instance_f32::pTwiddleRFFT
    +
    +

    Twiddle factors real stage

    + +

    Referenced by arm_rfft_fast_init_f32(), merge_rfft_f32(), and stage_rfft_f32().

    + +
    +
    + +
    +
    + + + + +
    arm_cfft_instance_f32 arm_rfft_fast_instance_f32::Sint
    +
    +

    Internal CFFT structure.

    + +

    Referenced by arm_rfft_fast_f32(), arm_rfft_fast_init_f32(), merge_rfft_f32(), and stage_rfft_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__rfft__fast__instance__f32.js b/Documentation/DSP/html/structarm__rfft__fast__instance__f32.js new file mode 100644 index 0000000..3efa62c --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__fast__instance__f32.js @@ -0,0 +1,6 @@ +var structarm__rfft__fast__instance__f32 = +[ + [ "fftLenRFFT", "structarm__rfft__fast__instance__f32.html#aef06ab665041ec36f5b25d464f0cab14", null ], + [ "pTwiddleRFFT", "structarm__rfft__fast__instance__f32.html#a9f30b04f163fabc1b24421d3c323d5fc", null ], + [ "Sint", "structarm__rfft__fast__instance__f32.html#a37419ababdfb3151b1891ae6bcd21012", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__rfft__instance__f32.html b/Documentation/DSP/html/structarm__rfft__instance__f32.html new file mode 100644 index 0000000..f1e61d0 --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__instance__f32.html @@ -0,0 +1,281 @@ + + + + + +arm_rfft_instance_f32 Struct Reference +CMSIS-DSP: arm_rfft_instance_f32 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_rfft_instance_f32 Struct Reference
    +
    +
    + +

    Instance structure for the floating-point RFFT/RIFFT function. +

    + + + + + + + + + + + + + + + + + + +

    +Data Fields

    uint32_t fftLenReal
     
    uint16_t fftLenBy2
     
    uint8_t ifftFlagR
     
    uint8_t bitReverseFlagR
     
    uint32_t twidCoefRModifier
     
    float32_t * pTwiddleAReal
     
    float32_t * pTwiddleBReal
     
    arm_cfft_radix4_instance_f32 * pCfft
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_rfft_instance_f32::bitReverseFlagR
    +
    +

    flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

    + +

    Referenced by arm_rfft_f32(), and arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint16_t arm_rfft_instance_f32::fftLenBy2
    +
    +

    length of the complex FFT.

    + +

    Referenced by arm_rfft_f32(), and arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_rfft_instance_f32::fftLenReal
    +
    +

    length of the real FFT.

    + +

    Referenced by arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_rfft_instance_f32::ifftFlagR
    +
    +

    flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

    + +

    Referenced by arm_rfft_f32(), and arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + +
    arm_cfft_radix4_instance_f32* arm_rfft_instance_f32::pCfft
    +
    +

    points to the complex FFT instance.

    + +

    Referenced by arm_rfft_f32(), and arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_rfft_instance_f32::pTwiddleAReal
    +
    +

    points to the real twiddle factor table.

    + +

    Referenced by arm_rfft_f32(), and arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + +
    float32_t* arm_rfft_instance_f32::pTwiddleBReal
    +
    +

    points to the imag twiddle factor table.

    + +

    Referenced by arm_rfft_f32(), and arm_rfft_init_f32().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_rfft_instance_f32::twidCoefRModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_rfft_f32(), and arm_rfft_init_f32().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__rfft__instance__f32.js b/Documentation/DSP/html/structarm__rfft__instance__f32.js new file mode 100644 index 0000000..e5ab0e0 --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__instance__f32.js @@ -0,0 +1,11 @@ +var structarm__rfft__instance__f32 = +[ + [ "bitReverseFlagR", "structarm__rfft__instance__f32.html#ac342f3248157cbbd2f04a3c8ec9fc9eb", null ], + [ "fftLenBy2", "structarm__rfft__instance__f32.html#a075076e07ebb8521d8e3b49a31db6c57", null ], + [ "fftLenReal", "structarm__rfft__instance__f32.html#a4219d4669699e4efdcb150ed7a0d9a57", null ], + [ "ifftFlagR", "structarm__rfft__instance__f32.html#a5ee6d10a934ab4b666e0bb286c3d633f", null ], + [ "pCfft", "structarm__rfft__instance__f32.html#a9f47ba9f50c81e4445ae3827b981bc05", null ], + [ "pTwiddleAReal", "structarm__rfft__instance__f32.html#a534cc7e6e9b3e3dd022fad611c762142", null ], + [ "pTwiddleBReal", "structarm__rfft__instance__f32.html#a23543ecfd027fea2477fe1eea23c3c4d", null ], + [ "twidCoefRModifier", "structarm__rfft__instance__f32.html#aede85350fb5ae6baa1b3e8bfa15b18d6", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__rfft__instance__q15.html b/Documentation/DSP/html/structarm__rfft__instance__q15.html new file mode 100644 index 0000000..45dcaa0 --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__instance__q15.html @@ -0,0 +1,264 @@ + + + + + +arm_rfft_instance_q15 Struct Reference +CMSIS-DSP: arm_rfft_instance_q15 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_rfft_instance_q15 Struct Reference
    +
    +
    + +

    Instance structure for the Q15 RFFT/RIFFT function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint32_t fftLenReal
     
    uint8_t ifftFlagR
     
    uint8_t bitReverseFlagR
     
    uint32_t twidCoefRModifier
     
    q15_t * pTwiddleAReal
     
    q15_t * pTwiddleBReal
     
    const arm_cfft_instance_q15 * pCfft
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_rfft_instance_q15::bitReverseFlagR
    +
    +

    flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

    + +

    Referenced by arm_rfft_init_q15(), and arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_rfft_instance_q15::fftLenReal
    +
    +

    length of the real FFT.

    + +

    Referenced by arm_rfft_init_q15(), and arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_rfft_instance_q15::ifftFlagR
    +
    +

    flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

    + +

    Referenced by arm_rfft_init_q15(), and arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q15* arm_rfft_instance_q15::pCfft
    +
    +

    points to the complex FFT instance.

    + +

    Referenced by arm_rfft_init_q15(), and arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_rfft_instance_q15::pTwiddleAReal
    +
    +

    points to the real twiddle factor table.

    + +

    Referenced by arm_rfft_init_q15(), and arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + +
    q15_t* arm_rfft_instance_q15::pTwiddleBReal
    +
    +

    points to the imag twiddle factor table.

    + +

    Referenced by arm_rfft_init_q15(), and arm_rfft_q15().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_rfft_instance_q15::twidCoefRModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_rfft_init_q15(), and arm_rfft_q15().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__rfft__instance__q15.js b/Documentation/DSP/html/structarm__rfft__instance__q15.js new file mode 100644 index 0000000..47afd81 --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__instance__q15.js @@ -0,0 +1,10 @@ +var structarm__rfft__instance__q15 = +[ + [ "bitReverseFlagR", "structarm__rfft__instance__q15.html#a4c65cd40e0098ec2f5c0dc31488b9bc6", null ], + [ "fftLenReal", "structarm__rfft__instance__q15.html#aac5cf9e825917cbb14f439e56bb86ab3", null ], + [ "ifftFlagR", "structarm__rfft__instance__q15.html#a8051ffe268c147e431e1bea7bb4c4258", null ], + [ "pCfft", "structarm__rfft__instance__q15.html#a4329c15b056444746d37ff082a24d31a", null ], + [ "pTwiddleAReal", "structarm__rfft__instance__q15.html#affbf2de522ac029432d98e8373c0ec53", null ], + [ "pTwiddleBReal", "structarm__rfft__instance__q15.html#a937d815022adc557b435ba8c6cd58b0d", null ], + [ "twidCoefRModifier", "structarm__rfft__instance__q15.html#afd444d05858c5f419980e94e8240d5c3", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/structarm__rfft__instance__q31.html b/Documentation/DSP/html/structarm__rfft__instance__q31.html new file mode 100644 index 0000000..e46bdaf --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__instance__q31.html @@ -0,0 +1,264 @@ + + + + + +arm_rfft_instance_q31 Struct Reference +CMSIS-DSP: arm_rfft_instance_q31 Struct Reference + + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-DSP +  Version 1.4.7 +
    +
    CMSIS DSP Software Library
    +
    +
    + +
    +
      + +
    +
    + + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +Data Fields
    +
    +
    arm_rfft_instance_q31 Struct Reference
    +
    +
    + +

    Instance structure for the Q31 RFFT/RIFFT function. +

    + + + + + + + + + + + + + + + + +

    +Data Fields

    uint32_t fftLenReal
     
    uint8_t ifftFlagR
     
    uint8_t bitReverseFlagR
     
    uint32_t twidCoefRModifier
     
    q31_t * pTwiddleAReal
     
    q31_t * pTwiddleBReal
     
    const arm_cfft_instance_q31 * pCfft
     
    +

    Field Documentation

    + +
    +
    + + + + +
    uint8_t arm_rfft_instance_q31::bitReverseFlagR
    +
    +

    flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output.

    + +

    Referenced by arm_rfft_init_q31(), and arm_rfft_q31().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_rfft_instance_q31::fftLenReal
    +
    +

    length of the real FFT.

    + +

    Referenced by arm_rfft_init_q31(), and arm_rfft_q31().

    + +
    +
    + +
    +
    + + + + +
    uint8_t arm_rfft_instance_q31::ifftFlagR
    +
    +

    flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.

    + +

    Referenced by arm_rfft_init_q31(), and arm_rfft_q31().

    + +
    +
    + +
    +
    + + + + +
    const arm_cfft_instance_q31* arm_rfft_instance_q31::pCfft
    +
    +

    points to the complex FFT instance.

    + +

    Referenced by arm_rfft_init_q31(), and arm_rfft_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_rfft_instance_q31::pTwiddleAReal
    +
    +

    points to the real twiddle factor table.

    + +

    Referenced by arm_rfft_init_q31(), and arm_rfft_q31().

    + +
    +
    + +
    +
    + + + + +
    q31_t* arm_rfft_instance_q31::pTwiddleBReal
    +
    +

    points to the imag twiddle factor table.

    + +

    Referenced by arm_rfft_init_q31(), and arm_rfft_q31().

    + +
    +
    + +
    +
    + + + + +
    uint32_t arm_rfft_instance_q31::twidCoefRModifier
    +
    +

    twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.

    + +

    Referenced by arm_rfft_init_q31(), and arm_rfft_q31().

    + +
    +
    +
    +
    + + + + diff --git a/Documentation/DSP/html/structarm__rfft__instance__q31.js b/Documentation/DSP/html/structarm__rfft__instance__q31.js new file mode 100644 index 0000000..ac261d5 --- /dev/null +++ b/Documentation/DSP/html/structarm__rfft__instance__q31.js @@ -0,0 +1,10 @@ +var structarm__rfft__instance__q31 = +[ + [ "bitReverseFlagR", "structarm__rfft__instance__q31.html#a3cb90cdc928a88b0203917dcb3dc1b71", null ], + [ "fftLenReal", "structarm__rfft__instance__q31.html#af777b0cadd5abaf064323692c2e6693b", null ], + [ "ifftFlagR", "structarm__rfft__instance__q31.html#af5c2615e6cde15524df38fa57ea32d94", null ], + [ "pCfft", "structarm__rfft__instance__q31.html#a8fe10d425b59e096c23aa4bb5caa1974", null ], + [ "pTwiddleAReal", "structarm__rfft__instance__q31.html#a2a0c944e66bab92fcbe19d1c29153250", null ], + [ "pTwiddleBReal", "structarm__rfft__instance__q31.html#ae5070be4c2e0327e618f5e1f4c5b9d80", null ], + [ "twidCoefRModifier", "structarm__rfft__instance__q31.html#a6fc90252b579f7c29e01bd279334fc43", null ] +]; \ No newline at end of file diff --git a/Documentation/DSP/html/sync_off.png b/Documentation/DSP/html/sync_off.png new file mode 100644 index 0000000..3b443fc Binary files /dev/null and b/Documentation/DSP/html/sync_off.png differ diff --git a/Documentation/DSP/html/sync_on.png b/Documentation/DSP/html/sync_on.png new file mode 100644 index 0000000..e08320f Binary files /dev/null and b/Documentation/DSP/html/sync_on.png differ diff --git a/Documentation/DSP/html/tab_a.png b/Documentation/DSP/html/tab_a.png new file mode 100644 index 0000000..3b725c4 Binary files /dev/null and b/Documentation/DSP/html/tab_a.png differ diff --git a/Documentation/DSP/html/tab_b.png b/Documentation/DSP/html/tab_b.png new file mode 100644 index 0000000..5f6601a Binary files /dev/null and b/Documentation/DSP/html/tab_b.png differ diff --git a/Documentation/DSP/html/tab_h.png b/Documentation/DSP/html/tab_h.png new file mode 100644 index 0000000..fd5cb70 Binary files /dev/null and b/Documentation/DSP/html/tab_h.png differ diff --git a/Documentation/DSP/html/tab_s.png b/Documentation/DSP/html/tab_s.png new file mode 100644 index 0000000..ab478c9 Binary files /dev/null and b/Documentation/DSP/html/tab_s.png differ diff --git a/Documentation/DSP/html/tab_topnav.png b/Documentation/DSP/html/tab_topnav.png new file mode 100644 index 0000000..b257b77 Binary files /dev/null and b/Documentation/DSP/html/tab_topnav.png differ diff --git a/Documentation/DSP/html/tabs.css b/Documentation/DSP/html/tabs.css new file mode 100644 index 0000000..ffbab50 --- /dev/null +++ b/Documentation/DSP/html/tabs.css @@ -0,0 +1,71 @@ +.tabs, .tabs1, .tabs2, .tabs3 { + background-image: url('tab_b.png'); + width: 100%; + z-index: 101; + font-size: 10px; +} + +.tabs1 { + background-image: url('tab_topnav.png'); + font-size: 12px; +} + +.tabs2 { + font-size: 10px; +} +.tabs3 { + font-size: 9px; +} + +.tablist { + margin: 0; + padding: 0; + display: table; + line-height: 24px; +} + +.tablist li { + float: left; + display: table-cell; + background-image: url('tab_b.png'); + list-style: none; +} + +.tabs1 .tablist li { + float: left; + display: table-cell; + background-image: url('tab_topnav.png'); + list-style: none; +} + +.tablist a { + display: block; + padding: 0 20px; + font-weight: bold; + background-image:url('tab_s.png'); + background-repeat:no-repeat; + background-position:right; + color: #283A5D; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; + outline: none; +} + +.tabs3 .tablist a { + padding: 0 10px; +} + +.tablist a:hover { + background-image: url('tab_h.png'); + background-repeat:repeat-x; + color: #fff; + text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); + text-decoration: none; +} + +.tablist li.current a { + background-image: url('tab_a.png'); + background-repeat:repeat-x; + color: #fff; + text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +} diff --git a/Documentation/General/html/CMSIS_END_USER_LICENCE_AGREEMENT.pdf b/Documentation/General/html/CMSIS_END_USER_LICENCE_AGREEMENT.pdf new file mode 100644 index 0000000..c67c867 Binary files /dev/null and b/Documentation/General/html/CMSIS_END_USER_LICENCE_AGREEMENT.pdf differ diff --git a/Documentation/General/html/CMSIS_Logo_Final.png b/Documentation/General/html/CMSIS_Logo_Final.png new file mode 100644 index 0000000..2056b7e Binary files /dev/null and b/Documentation/General/html/CMSIS_Logo_Final.png differ diff --git a/Documentation/General/html/CMSISv4_small.png b/Documentation/General/html/CMSISv4_small.png new file mode 100644 index 0000000..44787e2 Binary files /dev/null and b/Documentation/General/html/CMSISv4_small.png differ diff --git a/Documentation/General/html/_c_m_revision_history.html b/Documentation/General/html/_c_m_revision_history.html new file mode 100644 index 0000000..fa3c22a --- /dev/null +++ b/Documentation/General/html/_c_m_revision_history.html @@ -0,0 +1,165 @@ + + + + + +Revision History +CMSIS: Revision History + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS +  Version 4.5.0 +
    +
    Cortex Microcontroller Software Interface Standard
    +
    +
    + +
    +
      + +
    +
    + + +
    +
    + +
    +
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    +
    +
    +
    Revision History
    +
    +
    +

    The following table shows the overall high-level history of the various CMSIS releases. In addition, each CMSIS component has its own release history:

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Version Description
    4.5.0 Maintenance release that is fixing defects. See component's revision history for more details. See component's revision history for more details.
      +
    • CMSIS-CORE 4.30.0
      • +
    • CMSIS-DAP 1.1.0 (unchanged)
      • +
    • CMSIS-Driver 2.04.0
      • +
    • CMSIS-DSP 1.4.7
      • +
    • CMSIS-PACK 1.4.1
      • +
    • CMSIS-RTOS RTX 4.80.0
      • +
    • CMSIS-SVD 1.3.1
      • +
    +
    4.4.0 Feature release adding CMSIS-DAP (see extended End User Licence Agreement) and CMSIS-Driver for CAN. See component's revision history for more details.
      +
    • CMSIS-CORE 4.20.0
      • +
    • CMSIS-DAP 1.1.0
      • +
    • CMSIS-Driver 2.03.0
      • +
    • CMSIS-DSP 1.4.5 (unchanged)
      • +
    • CMSIS-RTOS RTX 4.79.0
      • +
    • CMSIS-PACK 1.4.0
      • +
    • CMSIS-SVD 1.3.0
      • +
    +
    4.3.0 Maintenance release adding SAI CMSIS-Driver and fixing defects. See component's revision history for more details.
      +
    • CMSIS-CORE 4.10.0
      • +
    • CMSIS-Driver 2.02.0
      • +
    • CMSIS-DSP 1.4.5
      • +
    • CMSIS-RTOS RTX 4.78.0
      • +
    • CMSIS-PACK 1.3.3
      • +
    • CMSIS-SVD (unchanged)
      • +
    +
    4.2 Introducing processor support for Cortex-M7.
    4.1 Enhancements in CMSIS-Pack and CMSIS-Driver.
    + Added: PackChk validation utility
    + Removed support for GNU: Sourcery G++ Lite Edition for ARM
    4.0 First release in CMSIS-Pack format.
    + Added specifications for CMSIS-Pack, CMSIS-Driver
    3.30 Maintenance release with enhancements in each component
    3.20 Maintenance release with enhancements in each component
    3.01 Added support for Cortex-M0+ processors
    3.00 Added support for SC000 and SC300 processors
    + Added support for GNU GCC Compiler
    + Added CMSIS-RTOS API
    2.10 Added CMSIS-DSP Library
    2.0 Added support for Cortex-M4 processor
    1.30 Reworked CMSIS startup concept
    1.01 Added support for Cortex-M0 processor
    1.00 Initial release of CMSIS-CORE for Cortex-M3 processor
    +
    +
    + + + + diff --git a/Documentation/General/html/bc_s.png b/Documentation/General/html/bc_s.png new file mode 100644 index 0000000..224b29a Binary files /dev/null and b/Documentation/General/html/bc_s.png differ diff --git a/Documentation/General/html/bdwn.png b/Documentation/General/html/bdwn.png new file mode 100644 index 0000000..940a0b9 Binary files /dev/null and b/Documentation/General/html/bdwn.png differ diff --git a/Documentation/General/html/closed.png b/Documentation/General/html/closed.png new file mode 100644 index 0000000..98cc2c9 Binary files /dev/null and b/Documentation/General/html/closed.png differ diff --git a/Documentation/General/html/cmsis.css b/Documentation/General/html/cmsis.css new file mode 100644 index 0000000..293d0d0 --- /dev/null +++ b/Documentation/General/html/cmsis.css @@ -0,0 +1,1269 @@ +/* The standard CSS for doxygen */ + +body, table, div, p, dl { + font-family: Lucida Grande, Verdana, Geneva, Arial, sans-serif; + font-size: 13px; + line-height: 1.3; +} + +/* CMSIS styles */ + +.style1 { + text-align: center; +} +.style2 { + color: #0000FF; + font-weight: normal; +} +.style3 { + text-align: left; +} +.style4 { + color: #008000; +} +.style5 { + color: #0000FF; +} +.style6 { + color: #000000; + font-style:italic; +} +.mand { + color: #0000FF; +} +.opt { + color: #008000; +} +.cond { + color: #990000; +} + +.choice +{ + background-color:#F7F9D0; +} +.seq +{ + background-color:#C9DECB; +} +.group1 +{ + background-color:#F8F1F1; +} +.group2 +{ + background-color:#DCEDEA; +} + + +ul ul { + list-style-type: disc; +} + +ul ul ul { + list-style-type: disc; +} + +ul.hierarchy { + color: green; +} + +em { + color: #000000; + font-style:italic; +} + + + +/* CMSIS Tables */ +table.cmtab1 { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; + text-align: justify; + width:70%; +} + +th.cmtab1 { + background: #EBEFF6; + font-weight: bold; + height: 28px; +} + +td.cmtab1 { + padding:1px; + text-align: left; +} + +table.cmtable { + border-collapse:collapse; + text-align: justify; +} + +table.cmtable td, table.cmtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.cmtable th { + background-color: #EBEFF6; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; +} + +td.MonoTxt { + font-family:"Arial monospaced for SAP"; +} + +td.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.h2 +{ + font-size: 120%; + font-weight: bold; +} + + + +/* @group Heading Levels */ + +h1 { + font-size: 150%; +} + +.title { + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2 { + font-size: 120%; +} + +h3 { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd, p.starttd { + margin-top: 2px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3A568E; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4464A5; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9AAED5; + color: #ffffff; + border: 1px double #849CCC; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C3CFE6; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; +} + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C3CFE6; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C3CFE6; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EDF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9AAED5; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A2B4D8; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4769AD; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memItemLeft, .memItemRight, .memTemplParams { + border-top: 1px solid #C3CFE6; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4464A5; + white-space: nowrap; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4464A5; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 0px 6px 0px; + color: #233456; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #708CC4; + border-top:1px solid #5072B7; + border-left:1px solid #5072B7; + border-right:1px solid #C3CFE6; + border-bottom:1px solid #C3CFE6; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3A568E; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #293C63; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2B4069; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #EBEFF6; + color: #000000; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A7B8DA; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A7B8DA; + border-bottom: 1px solid #A7B8DA; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A7B8DA; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + font-size: 90%; + color: #233456; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A7B8DA; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + height:30px; + line-height:30px; + color:#889FCE; + border:solid 1px #C1CDE5; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#344D7E; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; +} + +.navpath li.navelem a:hover +{ + color:#6583BF; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#344D7E; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + margin-left: 5px; + font-size: 8pt; + padding-left: 5px; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C3CFE6; +} + +div.headertitle +{ + padding: 5px 5px 5px 7px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5072B7; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #8EA4D0; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#314877; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D7DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4464A5; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/Documentation/General/html/doxygen.css b/Documentation/General/html/doxygen.css new file mode 100644 index 0000000..2642e8f --- /dev/null +++ b/Documentation/General/html/doxygen.css @@ -0,0 +1,1172 @@ +/* The standard CSS for doxygen */ + +body, table, div, p, dl { + font: 400 14px/19px Roboto,sans-serif; +} + +/* @group Heading Levels */ + +h1.groupheader { + font-size: 150%; +} + +.title { + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2.groupheader { + border-bottom: 1px solid #879ECB; + color: #354C7B; + font-size: 150%; + font-weight: normal; + margin-top: 1.75em; + padding-top: 8px; + padding-bottom: 4px; + width: 100%; +} + +h3.groupheader { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd, p.starttd { + margin-top: 2px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3D578C; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4665A2; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9CAFD4; + color: #ffffff; + border: 1px double #869DCA; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C4CFE5; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + min-height: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C4CFE5; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C4CFE5; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EEF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9CAFD4; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4A6AAA; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td, .fieldtable tr { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow, .fieldtable tr.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4665A2; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4665A2; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 0px 6px 0px; + color: #253555; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #728DC1; + border-top:1px solid #5373B4; + border-left:1px solid #5373B4; + border-right:1px solid #C4CFE5; + border-bottom:1px solid #C4CFE5; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3D578C; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #2A3D61; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A8B8D9; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + font-size: 90%; + color: #253555; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A8B8D9; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5373B4; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #90A5CE; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#334975; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D8DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4665A2; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/Documentation/General/html/doxygen.png b/Documentation/General/html/doxygen.png new file mode 100644 index 0000000..3ff17d8 Binary files /dev/null and b/Documentation/General/html/doxygen.png differ diff --git a/Documentation/General/html/dynsections.js b/Documentation/General/html/dynsections.js new file mode 100644 index 0000000..116542f --- /dev/null +++ b/Documentation/General/html/dynsections.js @@ -0,0 +1,78 @@ +function toggleVisibility(linkObj) +{ + var base = $(linkObj).attr('id'); + var summary = $('#'+base+'-summary'); + var content = $('#'+base+'-content'); + var trigger = $('#'+base+'-trigger'); + var src=$(trigger).attr('src'); + if (content.is(':visible')===true) { + content.hide(); + summary.show(); + $(linkObj).addClass('closed').removeClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png'); + } else { + content.show(); + summary.hide(); + $(linkObj).removeClass('closed').addClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-10)+'open.png'); + } + return false; +} + +function updateStripes() +{ + $('table.directory tr'). + removeClass('even').filter(':visible:even').addClass('even'); +} +function toggleLevel(level) +{ + $('table.directory tr').each(function(){ + var l = this.id.split('_').length-1; + var i = $('#img'+this.id.substring(3)); + var a = $('#arr'+this.id.substring(3)); + if (l + + + + +Introduction +CMSIS: Introduction + + + + + + + + + + + + +
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    +
    CMSIS +  Version 4.5.0 +
    +
    Cortex Microcontroller Software Interface Standard
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    + + +
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    + +
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    + +
    +
    +
    +
    Introduction
    +
    +
    +

    The Cortex Microcontroller Software Interface Standard (CMSIS) is a vendor-independent hardware abstraction layer for the Cortex-M processor series and defines generic tool interfaces. The CMSIS enables consistent device support and simple software interfaces to the processor and the peripherals, simplifying software re-use, reducing the learning curve for microcontroller developers, and reducing the time to market for new devices.

    +

    The CMSIS is defined in close cooperation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components. The CMSIS is intended to enable the combination of software components from multiple middleware vendors.

    +

    The CMSIS components are:

    +
      +
    • CMSIS-CORE: API for the Cortex-M processor core and peripherals. It provides at standardized interface for Cortex-M0, Cortex-M3, Cortex-M4, Cortex-M7, SC000, and SC300. Included are also SIMD intrinsic functions for Cortex-M4 and Cortex-M7 SIMD instructions.
      • +
    +
      +
    • CMSIS-Driver: defines generic peripheral driver interfaces for middleware making it reusable across supported devices. The API is RTOS independent and connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces.
      • +
    +
      +
    • CMSIS-DSP: DSP Library Collection with over 60 Functions for various data types: fix-point (fractional q7, q15, q31) and single precision floating-point (32-bit). The library is available for all Cortex-M cores. The Cortex-M4 and Cortex-M7 implementations are optimized for the SIMD instruction set.
      • +
    +
      +
    • CMSIS-RTOS API: Common API for Real-Time operating systems. It provides a standardized programming interface that is portable to many RTOS and enables therefore software templates, middleware, libraries, and other components that can work across supported the RTOS systems.
      • +
    +
      +
    • CMSIS-Pack: describes with a XML based package description (PDSC) file the user and device relevant parts of a file collection (called software pack) that includes source, header, and library files, documentation, Flash programming algorithms, source code templates, and example projects. Development tools and web infrastructures use the PDSC file to extract device parameters, software components, and evaluation board configurations.
      • +
    +
      +
    • CMSIS-SVD: System View Description for Peripherals. Describes the peripherals of a device in an XML file and can be used to create peripheral awareness in debuggers or header files with peripheral register and interrupt definitions.
      • +
    +
      +
    • CMSIS-DAP: Debug Access Port. Standardized firmware for a Debug Unit that connects to the CoreSight Debug Access Port. CMSIS-DAP is distributed as separate package and well suited for integration on evaluation boards. This component is provided as separate download.
      • +
    +
    Note
    Refer to ARM::CMSIS Pack for more information on the content of the Software Pack.
    +
    +CMSISv4_small.png +
    +CMSIS Structure
    +

    +Motivation

    +

    CMSIS has been created to help the industry in standardization. It enables consistent software layers and device support across a wide range of development tools and microcontrollers. CMSIS is not a huge software layer that introduces overhead and does not define standard peripherals. The silicon industry can therefore support the wide variations of Cortex-M processor-based devices with this common standard.

    +

    In detail the benefits of the CMSIS are:

    +
      +
    • Overall CMSIS reduces the learning curve, development costs, and time-to-market. Developers can write software quicker through a variety of easy-to-use, standardized software interfaces.
      • +
    • Consistent software interfaces improve the software portability and re-usability. Generic software libraries and interfaces provide consistent software framework.
      • +
    • Provides interfaces for debug connectivity, debug peripheral views, software delivery, and device support to reduce time-to-market for new microcontroller deployment.
      • +
    • Provides a compiler independent layer that allows using different compilers. CMSIS is supported by all mainstream compilers (ARMCC, IAR, and GNU).
      • +
    • Enhances program debugging with peripheral information for debuggers and ITM channels for printf-style output and RTOS kernel awareness.
      • +
    • CMSIS is delivered in CMSIS-Pack format which enables fast software delivery, simplifies updates, and enables consistent integration into development tools.
      • +
    +

    +Coding Rules

    +

    The CMSIS uses the following essential coding rules and conventions:

    +
      +
    • Compliant with ANSI C and C++.
      • +
    • Uses ANSI C standard data types defined in <stdint.h>.
      • +
    • Variables and parameters have a complete data type.
      • +
    • Expressions for #define constants are enclosed in parenthesis.
      • +
    • Conforms to MISRA 2004. MISRA rule violations are documented.
      • +
    +

    In addition, the CMSIS recommends the following conventions for identifiers:

    +
      +
    • CAPITAL names to identify Core Registers, Peripheral Registers, and CPU Instructions.
      • +
    • CamelCase names to identify function names and interrupt functions.
      • +
    • Namespace_ prefixes avoid clashes with user identifiers and provide functional groups (i.e. for peripherals, RTOS, or DSP Library).
      • +
    +

    The CMSIS is documented within the source files with:

    +
      +
    • Comments that use the C or C++ style.
      • +
    • Doxygen compliant function comments that provide:
        +
      • brief function overview.
        • +
      • detailed description of the function.
        • +
      • detailed parameter explanation.
        • +
      • detailed information about return values.
        • +
      +
      • +
    +

    Doxygen comment example:

    +
    /** 
+ * @brief  Enable Interrupt in NVIC Interrupt Controller
+ * @param  IRQn  interrupt number that specifies the interrupt
+ * @return none.
+ * Enable the specified interrupt in the NVIC Interrupt Controller.
+ * Other settings of the interrupt such as priority are not affected.
+ */
+

    +Licence

    +

    The CMSIS is provided free of charge by ARM and can be used for all Cortex-M based devices.

    +

    The software portions that are deployed in the application program are under a BSD license which allows usage of CMSIS in any commercial or open source projects.

    +

    View the LICENCE AGREEMENT for CMSIS in detail.

    +

    +ARM::CMSIS Pack

    +

    The ARM::CMSIS Pack contains the following:

    + + + + + + + + + + + +
    File/Directory Content
    ARM.CMSIS.pdsc Package description file
    CMSIS CMSIS components (see below)
    CMSIS_RTX Keil RTX implementation of CMSIS-RTOS
    Device ARM reference implementations of Cortex-M devices
    +

    CMSIS Directory

    +

    The directory CMSIS contains the "CMSIS End User License Agreement" as PDF and RTF, a README text file, the index.html file for this documentation, and the following sub-directories:

    + + + + + + + + + + + + + + + + + + + + + + + + + +
    Directory Content
    Documentation This documentation
    DAP CMSIS-DAP Debug Access Port source code and reference implementations
    Driver Header files for the CMSIS-Driver peripheral interface API
    DSP_Lib CMSIS-DSP software library source code
    Include Include files for CMSIS-CORE and CMSIS-DSP
    Lib CMSIS-DSP generated libraries for ARMCC and GCC
    Pack CMSIS-Pack example
    RTOS CMSIS-RTOS API header file
    SVD CMSIS-SVD example
    UserCodeTemplates\ARM ITM_Retarget.c, CMSIS retarget output to ITM Channel 0 template file
    Utilities PACK.xsd (CMSIS-Pack schema file), PackChk.exe (checking tool for software packs),
    + CMSIS-SVD.xsd (CMSIS-SVD schema file), SVDConv.exe (conversion tool for SVD files)
    +
    +
    +
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under the MIT or GPL Version 2 licenses. + * http://jquery.org/license + * + * http://docs.jquery.com/UI + */ +(function(a,b){function d(b){return!a(b).parents().andSelf().filter(function(){return a.curCSS(this,"visibility")==="hidden"||a.expr.filters.hidden(this)}).length}function c(b,c){var e=b.nodeName.toLowerCase();if("area"===e){var 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this.bind((a.support.selectstart?"selectstart":"mousedown")+".ui-disableSelection",function(a){a.preventDefault()})},enableSelection:function(){return this.unbind(".ui-disableSelection")}}),a.each(["Width","Height"],function(c,d){function h(b,c,d,f){a.each(e,function(){c-=parseFloat(a.curCSS(b,"padding"+this,!0))||0,d&&(c-=parseFloat(a.curCSS(b,"border"+this+"Width",!0))||0),f&&(c-=parseFloat(a.curCSS(b,"margin"+this,!0))||0)});return c}var e=d==="Width"?["Left","Right"]:["Top","Bottom"],f=d.toLowerCase(),g={innerWidth:a.fn.innerWidth,innerHeight:a.fn.innerHeight,outerWidth:a.fn.outerWidth,outerHeight:a.fn.outerHeight};a.fn["inner"+d]=function(c){if(c===b)return g["inner"+d].call(this);return this.each(function(){a(this).css(f,h(this,c)+"px")})},a.fn["outer"+d]=function(b,c){if(typeof b!="number")return g["outer"+d].call(this,b);return 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b.preventDefault()}this._mouseDistanceMet(b)&&this._mouseDelayMet(b)&&(this._mouseStarted=this._mouseStart(this._mouseDownEvent,b)!==!1,this._mouseStarted?this._mouseDrag(b):this._mouseUp(b));return!this._mouseStarted},_mouseUp:function(b){a(document).unbind("mousemove."+this.widgetName,this._mouseMoveDelegate).unbind("mouseup."+this.widgetName,this._mouseUpDelegate),this._mouseStarted&&(this._mouseStarted=!1,b.target==this._mouseDownEvent.target&&a.data(b.target,this.widgetName+".preventClickEvent",!0),this._mouseStop(b));return!1},_mouseDistanceMet:function(a){return Math.max(Math.abs(this._mouseDownEvent.pageX-a.pageX),Math.abs(this._mouseDownEvent.pageY-a.pageY))>=this.options.distance},_mouseDelayMet:function(a){return this.mouseDelayMet},_mouseStart:function(a){},_mouseDrag:function(a){},_mouseStop:function(a){},_mouseCapture:function(a){return!0}})})(jQuery); +/* + * jQuery UI Resizable 1.8.18 + * + * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about) + * Dual licensed under the MIT or GPL Version 2 licenses. + * http://jquery.org/license + * + * http://docs.jquery.com/UI/Resizables + * + * Depends: + * jquery.ui.core.js + * jquery.ui.mouse.js + * jquery.ui.widget.js + */ +(function(a,b){a.widget("ui.resizable",a.ui.mouse,{widgetEventPrefix:"resize",options:{alsoResize:!1,animate:!1,animateDuration:"slow",animateEasing:"swing",aspectRatio:!1,autoHide:!1,containment:!1,ghost:!1,grid:!1,handles:"e,s,se",helper:!1,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:1e3},_create:function(){var b=this,c=this.options;this.element.addClass("ui-resizable"),a.extend(this,{_aspectRatio:!!c.aspectRatio,aspectRatio:c.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:c.helper||c.ghost||c.animate?c.helper||"ui-resizable-helper":null}),this.element[0].nodeName.match(/canvas|textarea|input|select|button|img/i)&&(this.element.wrap(a('
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a=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i);b.axis=a&&a[1]?a[1]:"se"}}),c.autoHide&&(this._handles.hide(),a(this.element).addClass("ui-resizable-autohide").hover(function(){c.disabled||(a(this).removeClass("ui-resizable-autohide"),b._handles.show())},function(){c.disabled||b.resizing||(a(this).addClass("ui-resizable-autohide"),b._handles.hide())})),this._mouseInit()},destroy:function(){this._mouseDestroy();var b=function(b){a(b).removeClass("ui-resizable ui-resizable-disabled ui-resizable-resizing").removeData("resizable").unbind(".resizable").find(".ui-resizable-handle").remove()};if(this.elementIsWrapper){b(this.element);var c=this.element;c.after(this.originalElement.css({position:c.css("position"),width:c.outerWidth(),height:c.outerHeight(),top:c.css("top"),left:c.css("left")})).remove()}this.originalElement.css("resize",this.originalResizeStyle),b(this.originalElement);return this},_mouseCapture:function(b){var c=!1;for(var d in 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e=this._proportionallyResizeElements,f=e.length&&/textarea/i.test(e[0].nodeName),g=f&&a.ui.hasScroll(e[0],"left")?0:d.sizeDiff.height,h=f?0:d.sizeDiff.width,i={width:d.helper.width()-h,height:d.helper.height()-g},j=parseInt(d.element.css("left"),10)+(d.position.left-d.originalPosition.left)||null,k=parseInt(d.element.css("top"),10)+(d.position.top-d.originalPosition.top)||null;c.animate||this.element.css(a.extend(i,{top:k,left:j})),d.helper.height(d.size.height),d.helper.width(d.size.width),this._helper&&!c.animate&&this._proportionallyResize()}a("body").css("cursor","auto"),this.element.removeClass("ui-resizable-resizing"),this._propagate("stop",b),this._helper&&this.helper.remove();return!1},_updateVirtualBoundaries:function(a){var b=this.options,c,e,f,g,h;h={minWidth:d(b.minWidth)?b.minWidth:0,maxWidth:d(b.maxWidth)?b.maxWidth:Infinity,minHeight:d(b.minHeight)?b.minHeight:0,maxHeight:d(b.maxHeight)?b.maxHeight:Infinity};if(this._aspectRatio||a)c=h.minHeight*this.aspectRatio,f=h.minWidth/this.aspectRatio,e=h.maxHeight*this.aspectRatio,g=h.maxWidth/this.aspectRatio,c>h.minWidth&&(h.minWidth=c),f>h.minHeight&&(h.minHeight=f),ea.width,k=d(a.height)&&e.minHeight&&e.minHeight>a.height;j&&(a.width=e.minWidth),k&&(a.height=e.minHeight),h&&(a.width=e.maxWidth),i&&(a.height=e.maxHeight);var l=this.originalPosition.left+this.originalSize.width,m=this.position.top+this.size.height,n=/sw|nw|w/.test(g),o=/nw|ne|n/.test(g);j&&n&&(a.left=l-e.minWidth),h&&n&&(a.left=l-e.maxWidth),k&&o&&(a.top=m-e.minHeight),i&&o&&(a.top=m-e.maxHeight);var p=!a.width&&!a.height;p&&!a.left&&a.top?a.top=null:p&&!a.top&&a.left&&(a.left=null);return a},_proportionallyResize:function(){var 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