From 76177aa280494bb36d7a0bcbda1078d4db717020 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Mon, 9 Dec 2019 11:25:19 +0100 Subject: Official ARM version: v4.5 --- Documentation/DSP/html/group__variance.html | 285 ++++++++++++++++++++++++++++ 1 file changed, 285 insertions(+) create mode 100644 Documentation/DSP/html/group__variance.html (limited to 'Documentation/DSP/html/group__variance.html') diff --git a/Documentation/DSP/html/group__variance.html b/Documentation/DSP/html/group__variance.html new file mode 100644 index 0000000..8aa2768 --- /dev/null +++ b/Documentation/DSP/html/group__variance.html @@ -0,0 +1,285 @@ + + + + + +Variance +CMSIS-DSP: Variance + + + + + + + + + + + + + + + +
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CMSIS-DSP +  Version 1.4.7 +
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CMSIS DSP Software Library
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+Functions
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Variance
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Statistics Functions
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+Functions

void arm_var_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
 Variance of the elements of a floating-point vector.
 
void arm_var_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
 Variance of the elements of a Q15 vector.
 
void arm_var_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
 Variance of the elements of a Q31 vector.
 
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Description

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Calculates the variance of the elements in the input vector. The underlying algorithm is used:

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+        Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)
        where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
                        sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
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There are separate functions for floating point, Q31, and Q15 data types.

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Function Documentation

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void arm_var_f32 (float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult 
)
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Parameters
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[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultvariance value returned here
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Returns
none.
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Examples:
arm_class_marks_example_f32.c.
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References blockSize, and mean.

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Referenced by main().

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void arm_var_q15 (q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult 
)
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Parameters
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[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultvariance value returned here
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Returns
none.
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Scaling and Overflow Behavior:

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The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.
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References __SIMD32, and blockSize.

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void arm_var_q31 (q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult 
)
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Parameters
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[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultvariance value returned here
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Returns
none.
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Scaling and Overflow Behavior:

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The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, which is then downshifted by 8 bits which yields 1.23, and intermediate multiplication yields a 2.46 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a 16 guard bits. There is no saturation on intermediate additions. If the accumulator overflows it wraps around and distorts the result. In order to avoid overflows completely the input signal must be scaled down by log2(blockSize)-8 bits, as a total of blockSize additions are performed internally. After division, internal variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
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References blockSize.

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+ + + + -- cgit