From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- Documentation/DSP/html/group__power.html | 330 ------------------------------- 1 file changed, 330 deletions(-) delete mode 100644 Documentation/DSP/html/group__power.html (limited to 'Documentation/DSP/html/group__power.html') diff --git a/Documentation/DSP/html/group__power.html b/Documentation/DSP/html/group__power.html deleted file mode 100644 index 7c058d5..0000000 --- a/Documentation/DSP/html/group__power.html +++ /dev/null @@ -1,330 +0,0 @@ - - - - - -Power -CMSIS-DSP: Power - - - - - - - - - - - - - - - -
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CMSIS-DSP -  Version 1.4.7 -
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CMSIS DSP Software Library
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Power
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Statistics Functions
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void arm_power_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
 Sum of the squares of the elements of a floating-point vector.
 
void arm_power_q15 (q15_t *pSrc, uint32_t blockSize, q63_t *pResult)
 Sum of the squares of the elements of a Q15 vector.
 
void arm_power_q31 (q31_t *pSrc, uint32_t blockSize, q63_t *pResult)
 Sum of the squares of the elements of a Q31 vector.
 
void arm_power_q7 (q7_t *pSrc, uint32_t blockSize, q31_t *pResult)
 Sum of the squares of the elements of a Q7 vector.
 
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Description

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Calculates the sum of the squares of the elements in the input vector. The underlying algorithm is used:

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There are separate functions for floating point, Q31, Q15, and Q7 data types.

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Function Documentation

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void arm_power_f32 (float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult 
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[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultsum of the squares value returned here
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Returns
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References blockSize.

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void arm_power_q15 (q15_t * pSrc,
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[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultsum of the squares value returned here
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Returns
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Scaling and Overflow Behavior:

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The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format.
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References __SIMD32, and blockSize.

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void arm_power_q31 (q31_t * pSrc,
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[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultsum of the squares value returned here
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Scaling and Overflow Behavior:

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The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format.
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References blockSize.

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void arm_power_q7 (q7_t * pSrc,
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[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultsum of the squares value returned here
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Scaling and Overflow Behavior:

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The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format.
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References __SIMD32, and blockSize.

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