From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- Documentation/DSP/html/group__dot__prod.html | 361 --------------------------- 1 file changed, 361 deletions(-) delete mode 100644 Documentation/DSP/html/group__dot__prod.html (limited to 'Documentation/DSP/html/group__dot__prod.html') diff --git a/Documentation/DSP/html/group__dot__prod.html b/Documentation/DSP/html/group__dot__prod.html deleted file mode 100644 index a017d67..0000000 --- a/Documentation/DSP/html/group__dot__prod.html +++ /dev/null @@ -1,361 +0,0 @@ - - - - - -Vector Dot Product -CMSIS-DSP: Vector Dot Product - - - - - - - - - - - - - - - -
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CMSIS-DSP -  Version 1.4.7 -
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CMSIS DSP Software Library
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Vector Dot Product
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Basic Math Functions
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void arm_dot_prod_f32 (float32_t *pSrcA, float32_t *pSrcB, uint32_t blockSize, float32_t *result)
 Dot product of floating-point vectors.
 
void arm_dot_prod_q15 (q15_t *pSrcA, q15_t *pSrcB, uint32_t blockSize, q63_t *result)
 Dot product of Q15 vectors.
 
void arm_dot_prod_q31 (q31_t *pSrcA, q31_t *pSrcB, uint32_t blockSize, q63_t *result)
 Dot product of Q31 vectors.
 
void arm_dot_prod_q7 (q7_t *pSrcA, q7_t *pSrcB, uint32_t blockSize, q31_t *result)
 Dot product of Q7 vectors.
 
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Description

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Computes the dot product of two vectors. The vectors are multiplied element-by-element and then summed.

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-    sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
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There are separate functions for floating-point, Q7, Q15, and Q31 data types.

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Function Documentation

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void arm_dot_prod_f32 (float32_t * pSrcA,
float32_t * pSrcB,
uint32_t blockSize,
float32_t * result 
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[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
[in]blockSizenumber of samples in each vector
[out]*resultoutput result returned here
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Returns
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Examples:
arm_variance_example_f32.c.
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References blockSize.

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Referenced by main().

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void arm_dot_prod_q15 (q15_t * pSrcA,
q15_t * pSrcB,
uint32_t blockSize,
q63_t * result 
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[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
[in]blockSizenumber of samples in each vector
[out]*resultoutput result returned here
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Returns
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Scaling and Overflow Behavior:

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The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these results are added to a 64-bit accumulator in 34.30 format. Nonsaturating additions are used and given that there are 33 guard bits in the accumulator there is no risk of overflow. The return result is in 34.30 format.
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References __SIMD32, and blockSize.

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void arm_dot_prod_q31 (q31_t * pSrcA,
q31_t * pSrcB,
uint32_t blockSize,
q63_t * result 
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[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
[in]blockSizenumber of samples in each vector
[out]*resultoutput result returned here
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Returns
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Scaling and Overflow Behavior:

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The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these are truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. There are 15 guard bits in the accumulator and there is no risk of overflow as long as the length of the vectors is less than 2^16 elements. The return result is in 16.48 format.
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References blockSize.

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void arm_dot_prod_q7 (q7_t * pSrcA,
q7_t * pSrcB,
uint32_t blockSize,
q31_t * result 
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[in]*pSrcApoints to the first input vector
[in]*pSrcBpoints to the second input vector
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[out]*resultoutput result returned here
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Scaling and Overflow Behavior:

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The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these results are added to an accumulator in 18.14 format. Nonsaturating additions are used and there is no danger of wrap around as long as the vectors are less than 2^18 elements long. The return result is in 18.14 format.
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References __SIMD32, and blockSize.

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