From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- Documentation/DSP/html/files.html | 508 -------------------------------------- 1 file changed, 508 deletions(-) delete mode 100644 Documentation/DSP/html/files.html (limited to 'Documentation/DSP/html/files.html') diff --git a/Documentation/DSP/html/files.html b/Documentation/DSP/html/files.html deleted file mode 100644 index 71ebea5..0000000 --- a/Documentation/DSP/html/files.html +++ /dev/null @@ -1,508 +0,0 @@ - - - - - -File List -CMSIS-DSP: File List - - - - - - - - - - - - - - - -
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File List
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Here is a list of all files with brief descriptions:
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o*arm_abs_f32.c
o*arm_abs_q15.c
o*arm_abs_q31.c
o*arm_abs_q7.c
o*arm_add_f32.c
o*arm_add_q15.c
o*arm_add_q31.c
o*arm_add_q7.c
o*arm_biquad_cascade_df1_32x64_init_q31.c
o*arm_biquad_cascade_df1_32x64_q31.c
o*arm_biquad_cascade_df1_f32.c
o*arm_biquad_cascade_df1_fast_q15.c
o*arm_biquad_cascade_df1_fast_q31.c
o*arm_biquad_cascade_df1_init_f32.c
o*arm_biquad_cascade_df1_init_q15.c
o*arm_biquad_cascade_df1_init_q31.c
o*arm_biquad_cascade_df1_q15.c
o*arm_biquad_cascade_df1_q31.c
o*arm_biquad_cascade_df2T_f32.c
o*arm_biquad_cascade_df2T_f64.c
o*arm_biquad_cascade_df2T_init_f32.c
o*arm_biquad_cascade_df2T_init_f64.c
o*arm_biquad_cascade_stereo_df2T_f32.c
o*arm_biquad_cascade_stereo_df2T_init_f32.c
o*arm_bitreversal.c
o*arm_cfft_f32.c
o*arm_cfft_q15.c
o*arm_cfft_q31.c
o*arm_cfft_radix2_f32.c
o*arm_cfft_radix2_init_f32.c
o*arm_cfft_radix2_init_q15.c
o*arm_cfft_radix2_init_q31.c
o*arm_cfft_radix2_q15.c
o*arm_cfft_radix2_q31.c
o*arm_cfft_radix4_f32.c
o*arm_cfft_radix4_init_f32.c
o*arm_cfft_radix4_init_q15.c
o*arm_cfft_radix4_init_q31.c
o*arm_cfft_radix4_q15.c
o*arm_cfft_radix4_q31.c
o*arm_cfft_radix8_f32.c
o*ARM/arm_class_marks_example_f32.c
o*GCC/arm_class_marks_example_f32.c
o*arm_cmplx_conj_f32.c
o*arm_cmplx_conj_q15.c
o*arm_cmplx_conj_q31.c
o*arm_cmplx_dot_prod_f32.c
o*arm_cmplx_dot_prod_q15.c
o*arm_cmplx_dot_prod_q31.c
o*arm_cmplx_mag_f32.c
o*arm_cmplx_mag_q15.c
o*arm_cmplx_mag_q31.c
o*arm_cmplx_mag_squared_f32.c
o*arm_cmplx_mag_squared_q15.c
o*arm_cmplx_mag_squared_q31.c
o*arm_cmplx_mult_cmplx_f32.c
o*arm_cmplx_mult_cmplx_q15.c
o*arm_cmplx_mult_cmplx_q31.c
o*arm_cmplx_mult_real_f32.c
o*arm_cmplx_mult_real_q15.c
o*arm_cmplx_mult_real_q31.c
o*arm_common_tables.c
o*arm_common_tables.h
o*arm_const_structs.c
o*arm_const_structs.h
o*arm_conv_f32.c
o*arm_conv_fast_opt_q15.c
o*arm_conv_fast_q15.c
o*arm_conv_fast_q31.c
o*arm_conv_opt_q15.c
o*arm_conv_opt_q7.c
o*arm_conv_partial_f32.c
o*arm_conv_partial_fast_opt_q15.c
o*arm_conv_partial_fast_q15.c
o*arm_conv_partial_fast_q31.c
o*arm_conv_partial_opt_q15.c
o*arm_conv_partial_opt_q7.c
o*arm_conv_partial_q15.c
o*arm_conv_partial_q31.c
o*arm_conv_partial_q7.c
o*arm_conv_q15.c
o*arm_conv_q31.c
o*arm_conv_q7.c
o*ARM/arm_convolution_example_f32.c
o*GCC/arm_convolution_example_f32.c
o*arm_copy_f32.c
o*arm_copy_q15.c
o*arm_copy_q31.c
o*arm_copy_q7.c
o*arm_correlate_f32.c
o*arm_correlate_fast_opt_q15.c
o*arm_correlate_fast_q15.c
o*arm_correlate_fast_q31.c
o*arm_correlate_opt_q15.c
o*arm_correlate_opt_q7.c
o*arm_correlate_q15.c
o*arm_correlate_q31.c
o*arm_correlate_q7.c
o*arm_cos_f32.c
o*arm_cos_q15.c
o*arm_cos_q31.c
o*arm_dct4_f32.c
o*arm_dct4_init_f32.c
o*arm_dct4_init_q15.c
o*arm_dct4_init_q31.c
o*arm_dct4_q15.c
o*arm_dct4_q31.c
o*arm_dot_prod_f32.c
o*arm_dot_prod_q15.c
o*arm_dot_prod_q31.c
o*arm_dot_prod_q7.c
o*ARM/arm_dotproduct_example_f32.c
o*GCC/arm_dotproduct_example_f32.c
o*ARM/arm_fft_bin_data.c
o*GCC/arm_fft_bin_data.c
o*ARM/arm_fft_bin_example_f32.c
o*GCC/arm_fft_bin_example_f32.c
o*arm_fill_f32.c
o*arm_fill_q15.c
o*arm_fill_q31.c
o*arm_fill_q7.c
o*arm_fir_data.c
o*arm_fir_decimate_f32.c
o*arm_fir_decimate_fast_q15.c
o*arm_fir_decimate_fast_q31.c
o*arm_fir_decimate_init_f32.c
o*arm_fir_decimate_init_q15.c
o*arm_fir_decimate_init_q31.c
o*arm_fir_decimate_q15.c
o*arm_fir_decimate_q31.c
o*arm_fir_example_f32.c
o*arm_fir_f32.c
o*arm_fir_fast_q15.c
o*arm_fir_fast_q31.c
o*arm_fir_init_f32.c
o*arm_fir_init_q15.c
o*arm_fir_init_q31.c
o*arm_fir_init_q7.c
o*arm_fir_interpolate_f32.c
o*arm_fir_interpolate_init_f32.c
o*arm_fir_interpolate_init_q15.c
o*arm_fir_interpolate_init_q31.c
o*arm_fir_interpolate_q15.c
o*arm_fir_interpolate_q31.c
o*arm_fir_lattice_f32.c
o*arm_fir_lattice_init_f32.c
o*arm_fir_lattice_init_q15.c
o*arm_fir_lattice_init_q31.c
o*arm_fir_lattice_q15.c
o*arm_fir_lattice_q31.c
o*arm_fir_q15.c
o*arm_fir_q31.c
o*arm_fir_q7.c
o*arm_fir_sparse_f32.c
o*arm_fir_sparse_init_f32.c
o*arm_fir_sparse_init_q15.c
o*arm_fir_sparse_init_q31.c
o*arm_fir_sparse_init_q7.c
o*arm_fir_sparse_q15.c
o*arm_fir_sparse_q31.c
o*arm_fir_sparse_q7.c
o*arm_float_to_q15.c
o*arm_float_to_q31.c
o*arm_float_to_q7.c
o*arm_graphic_equalizer_data.c
o*arm_graphic_equalizer_example_q31.c
o*arm_iir_lattice_f32.c
o*arm_iir_lattice_init_f32.c
o*arm_iir_lattice_init_q15.c
o*arm_iir_lattice_init_q31.c
o*arm_iir_lattice_q15.c
o*arm_iir_lattice_q31.c
o*arm_linear_interp_data.c
o*arm_linear_interp_example_f32.c
o*arm_lms_f32.c
o*arm_lms_init_f32.c
o*arm_lms_init_q15.c
o*arm_lms_init_q31.c
o*arm_lms_norm_f32.c
o*arm_lms_norm_init_f32.c
o*arm_lms_norm_init_q15.c
o*arm_lms_norm_init_q31.c
o*arm_lms_norm_q15.c
o*arm_lms_norm_q31.c
o*arm_lms_q15.c
o*arm_lms_q31.c
o*arm_mat_add_f32.c
o*arm_mat_add_q15.c
o*arm_mat_add_q31.c
o*arm_mat_cmplx_mult_f32.c
o*arm_mat_cmplx_mult_q15.c
o*arm_mat_cmplx_mult_q31.c
o*arm_mat_init_f32.c
o*arm_mat_init_q15.c
o*arm_mat_init_q31.c
o*arm_mat_inverse_f32.c
o*arm_mat_inverse_f64.c
o*arm_mat_mult_f32.c
o*arm_mat_mult_fast_q15.c
o*arm_mat_mult_fast_q31.c
o*arm_mat_mult_q15.c
o*arm_mat_mult_q31.c
o*arm_mat_scale_f32.c
o*arm_mat_scale_q15.c
o*arm_mat_scale_q31.c
o*arm_mat_sub_f32.c
o*arm_mat_sub_q15.c
o*arm_mat_sub_q31.c
o*arm_mat_trans_f32.c
o*arm_mat_trans_q15.c
o*arm_mat_trans_q31.c
o*arm_math.h
o*arm_matrix_example_f32.c
o*arm_max_f32.c
o*arm_max_q15.c
o*arm_max_q31.c
o*arm_max_q7.c
o*arm_mean_f32.c
o*arm_mean_q15.c
o*arm_mean_q31.c
o*arm_mean_q7.c
o*arm_min_f32.c
o*arm_min_q15.c
o*arm_min_q31.c
o*arm_min_q7.c
o*arm_mult_f32.c
o*arm_mult_q15.c
o*arm_mult_q31.c
o*arm_mult_q7.c
o*arm_negate_f32.c
o*arm_negate_q15.c
o*arm_negate_q31.c
o*arm_negate_q7.c
o*arm_offset_f32.c
o*arm_offset_q15.c
o*arm_offset_q31.c
o*arm_offset_q7.c
o*arm_pid_init_f32.c
o*arm_pid_init_q15.c
o*arm_pid_init_q31.c
o*arm_pid_reset_f32.c
o*arm_pid_reset_q15.c
o*arm_pid_reset_q31.c
o*arm_power_f32.c
o*arm_power_q15.c
o*arm_power_q31.c
o*arm_power_q7.c
o*arm_q15_to_float.c
o*arm_q15_to_q31.c
o*arm_q15_to_q7.c
o*arm_q31_to_float.c
o*arm_q31_to_q15.c
o*arm_q31_to_q7.c
o*arm_q7_to_float.c
o*arm_q7_to_q15.c
o*arm_q7_to_q31.c
o*arm_rfft_f32.c
o*arm_rfft_fast_f32.c
o*arm_rfft_fast_init_f32.c
o*arm_rfft_init_f32.c
o*arm_rfft_init_q15.c
o*arm_rfft_init_q31.c
o*arm_rfft_q15.c
o*arm_rfft_q31.c
o*arm_rms_f32.c
o*arm_rms_q15.c
o*arm_rms_q31.c
o*arm_scale_f32.c
o*arm_scale_q15.c
o*arm_scale_q31.c
o*arm_scale_q7.c
o*arm_shift_q15.c
o*arm_shift_q31.c
o*arm_shift_q7.c
o*arm_signal_converge_data.c
o*arm_signal_converge_example_f32.c
o*arm_sin_cos_example_f32.c
o*arm_sin_cos_f32.c
o*arm_sin_cos_q31.c
o*arm_sin_f32.c
o*arm_sin_q15.c
o*arm_sin_q31.c
o*arm_sqrt_q15.c
o*arm_sqrt_q31.c
o*arm_std_f32.c
o*arm_std_q15.c
o*arm_std_q31.c
o*arm_sub_f32.c
o*arm_sub_q15.c
o*arm_sub_q31.c
o*arm_sub_q7.c
o*arm_var_f32.c
o*arm_var_q15.c
o*arm_var_q31.c
o*arm_variance_example_f32.c
o*arm_convolution_example/ARM/math_helper.c
o*arm_convolution_example/GCC/math_helper.c
o*arm_fir_example/ARM/math_helper.c
o*arm_graphic_equalizer_example/ARM/math_helper.c
o*arm_linear_interp_example/ARM/math_helper.c
o*arm_matrix_example/ARM/math_helper.c
o*arm_signal_converge_example/ARM/math_helper.c
o*arm_convolution_example/ARM/math_helper.h
o*arm_convolution_example/GCC/math_helper.h
o*arm_fir_example/ARM/math_helper.h
o*arm_graphic_equalizer_example/ARM/math_helper.h
o*arm_linear_interp_example/ARM/math_helper.h
o*arm_matrix_example/ARM/math_helper.h
o*arm_signal_converge_example/ARM/math_helper.h
o*arm_class_marks_example/ARM/RTE/RTE_Components.h
o*arm_convolution_example/ARM/RTE/RTE_Components.h
o*arm_dotproduct_example/ARM/RTE/RTE_Components.h
o*arm_fft_bin_example/ARM/RTE/RTE_Components.h
o*arm_fir_example/ARM/RTE/RTE_Components.h
o*arm_graphic_equalizer_example/ARM/RTE/RTE_Components.h
o*arm_linear_interp_example/ARM/RTE/RTE_Components.h
o*arm_matrix_example/ARM/RTE/RTE_Components.h
o*arm_signal_converge_example/ARM/RTE/RTE_Components.h
o*arm_sin_cos_example/ARM/RTE/RTE_Components.h
o*arm_variance_example/ARM/RTE/RTE_Components.h
o*arm_class_marks_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_class_marks_example/GCC/Startup/system_ARMCM0.c
o*arm_convolution_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_convolution_example/GCC/Startup/system_ARMCM0.c
o*arm_dotproduct_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_dotproduct_example/GCC/Startup/system_ARMCM0.c
o*arm_fft_bin_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_fft_bin_example/GCC/Startup/system_ARMCM0.c
o*arm_fir_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_linear_interp_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_matrix_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_signal_converge_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_sin_cos_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_variance_example/ARM/RTE/Device/ARMCM0/system_ARMCM0.c
o*arm_class_marks_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_class_marks_example/GCC/Startup/system_ARMCM3.c
o*arm_convolution_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_convolution_example/GCC/Startup/system_ARMCM3.c
o*arm_dotproduct_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_dotproduct_example/GCC/Startup/system_ARMCM3.c
o*arm_fft_bin_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_fft_bin_example/GCC/Startup/system_ARMCM3.c
o*arm_fir_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_linear_interp_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_matrix_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_signal_converge_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_sin_cos_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_variance_example/ARM/RTE/Device/ARMCM3/system_ARMCM3.c
o*arm_class_marks_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_class_marks_example/GCC/Startup/system_ARMCM4.c
o*arm_convolution_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_convolution_example/GCC/Startup/system_ARMCM4.c
o*arm_dotproduct_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_dotproduct_example/GCC/Startup/system_ARMCM4.c
o*arm_fft_bin_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_fft_bin_example/GCC/Startup/system_ARMCM4.c
o*arm_fir_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_linear_interp_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_matrix_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_signal_converge_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_sin_cos_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_variance_example/ARM/RTE/Device/ARMCM4_FP/system_ARMCM4.c
o*arm_class_marks_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_convolution_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_dotproduct_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_fft_bin_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_fir_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_graphic_equalizer_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_linear_interp_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_matrix_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_signal_converge_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
o*arm_sin_cos_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
\*arm_variance_example/ARM/RTE/Device/ARMCM7_SP/system_ARMCM7.c
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