From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- Documentation/Core/html/struct_i_t_m___type.html | 296 ----------------------- 1 file changed, 296 deletions(-) delete mode 100644 Documentation/Core/html/struct_i_t_m___type.html (limited to 'Documentation/Core/html/struct_i_t_m___type.html') diff --git a/Documentation/Core/html/struct_i_t_m___type.html b/Documentation/Core/html/struct_i_t_m___type.html deleted file mode 100644 index ba162b2..0000000 --- a/Documentation/Core/html/struct_i_t_m___type.html +++ /dev/null @@ -1,296 +0,0 @@ - - - - - -ITM_Type Struct Reference -CMSIS-CORE: ITM_Type Struct Reference - - - - - - - - - - - - - - - -
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CMSIS-CORE -  Version 4.30 -
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CMSIS-CORE support for Cortex-M processor-based devices
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ITM_Type Struct Reference
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Structure type to access the Instrumentation Trace Macrocell Register (ITM). -

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union {
   __OM uint8_t   u8
 Offset: 0x000 ( /W) ITM Stimulus Port 8-bit.
 
   __OM uint16_t   u16
 Offset: 0x000 ( /W) ITM Stimulus Port 16-bit.
 
   __OM uint32_t   u32
 Offset: 0x000 ( /W) ITM Stimulus Port 32-bit.
 
} PORT [32]
 Offset: 0x000 ( /W) ITM Stimulus Port Registers.
 
uint32_t RESERVED0 [864]
 Reserved.
 
__IOM uint32_t TER
 Offset: 0xE00 (R/W) ITM Trace Enable Register.
 
uint32_t RESERVED1 [15]
 Reserved.
 
__IOM uint32_t TPR
 Offset: 0xE40 (R/W) ITM Trace Privilege Register.
 
uint32_t RESERVED2 [15]
 Reserved.
 
__IOM uint32_t TCR
 Offset: 0xE80 (R/W) ITM Trace Control Register.
 
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Field Documentation

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__OM { ... } ITM_Type::PORT[32]
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uint32_t ITM_Type::RESERVED0[864]
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uint32_t ITM_Type::RESERVED1[15]
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uint32_t ITM_Type::RESERVED2[15]
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__IOM uint32_t ITM_Type::TCR
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__IOM uint32_t ITM_Type::TER
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__IOM uint32_t ITM_Type::TPR
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__OM uint16_t ITM_Type::u16
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__OM uint32_t ITM_Type::u32
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__OM uint8_t ITM_Type::u8
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