From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- .../Core/html/group__intrinsic___c_p_u__gr.html | 1013 -------------------- 1 file changed, 1013 deletions(-) delete mode 100644 Documentation/Core/html/group__intrinsic___c_p_u__gr.html (limited to 'Documentation/Core/html/group__intrinsic___c_p_u__gr.html') diff --git a/Documentation/Core/html/group__intrinsic___c_p_u__gr.html b/Documentation/Core/html/group__intrinsic___c_p_u__gr.html deleted file mode 100644 index 85ecf96..0000000 --- a/Documentation/Core/html/group__intrinsic___c_p_u__gr.html +++ /dev/null @@ -1,1013 +0,0 @@ - - - - - -Intrinsic Functions for CPU Instructions -CMSIS-CORE: Intrinsic Functions for CPU Instructions - - - - - - - - - - - - - - - -
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CMSIS-CORE -  Version 4.30 -
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CMSIS-CORE support for Cortex-M processor-based devices
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-Functions
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Intrinsic Functions for CPU Instructions
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Functions that generate specific Cortex-M CPU Instructions. -More...

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-Functions

void __NOP (void)
 No Operation.
 
void __WFI (void)
 Wait For Interrupt.
 
void __WFE (void)
 Wait For Event.
 
void __SEV (void)
 Send Event.
 
void __BKPT (uint8_t value)
 Set Breakpoint.
 
void __ISB (void)
 Instruction Synchronization Barrier.
 
void __DSB (void)
 Data Synchronization Barrier.
 
void __DMB (void)
 Data Memory Barrier.
 
uint32_t __REV (uint32_t value)
 Reverse byte order (32 bit)
 
uint32_t __REV16 (uint32_t value)
 Reverse byte order (16 bit)
 
int32_t __REVSH (int32_t value)
 Reverse byte order in signed short value.
 
uint32_t __RBIT (uint32_t value)
 Reverse bit order of value [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __ROR (uint32_t value, uint32_t shift)
 Rotate a value right by a number of bits.
 
uint8_t __LDREXB (volatile uint8_t *addr)
 LDR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint16_t __LDREXH (volatile uint16_t *addr)
 LDR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __LDREXW (volatile uint32_t *addr)
 LDR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __STREXB (uint8_t value, volatile uint8_t *addr)
 STR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __STREXH (uint16_t value, volatile uint16_t *addr)
 STR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __STREXW (uint32_t value, volatile uint32_t *addr)
 STR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].
 
void __CLREX (void)
 Remove the exclusive lock [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __SSAT (unint32_t value, uint32_t sat)
 Signed Saturate [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __USAT (uint32_t value, uint32_t sat)
 Unsigned Saturate [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint8_t __CLZ (uint32_t value)
 Count leading zeros [not for Cortex-M0, Cortex-M0+, or SC000].
 
uint32_t __RRX (uint32_t value)
 Rotate Right with Extend (32 bit)
 
uint8_t __LDRBT (uint8_t ptr)
 LDRT Unprivileged (8 bit)
 
uint16_t __LDRHT (uint16_t ptr)
 LDRT Unprivileged (16 bit)
 
uint32_t __LDRT (uint32_t ptr)
 LDRT Unprivileged (32 bit)
 
void __STRBT (uint8_t value, uint8_t ptr)
 STRT Unprivileged (8 bit)
 
void __STRHT (uint16_t value, uint16_t ptr)
 STRT Unprivileged (16 bit)
 
void __STRT (uint32_t value, uint32_t ptr)
 STRT Unprivileged (32 bit)
 
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Description

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The following functions generate specific Cortex-M instructions that cannot be directly accessed by the C/C++ Compiler. Refer to the Cortex-M Reference Manuals for detailed information about these Cortex-M instructions.

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Note
When using the ARM Compiler Toolchain the following Intrinsic Functions for CPU Instructions are implemented using the Embedded Assembler: __RRX, <Bruno: add more...>. The usage of the Embedded Assembler can be disabled by with define __NO_EMBEDDED_ASM. This avoids potential side effects of the Embedded Assembler. Refer to Compiler User Guide - Using the Inline and Embedded Assemblers of the ARM Compiler for more information.
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Function Documentation

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void __BKPT (uint8_t value)
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This function causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

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[in]valueis ignored by the processor. If required, a debugger can use it to obtain additional information about the breakpoint.
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void __CLREX (void )
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This function removes the exclusive lock which is created by LDREX [not for Cortex-M0, Cortex-M0+, or SC000].

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uint8_t __CLZ (uint32_t value)
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This function counts the number of leading zeros of a data value [not for Cortex-M0, Cortex-M0+, or SC000].

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[in]valueValue to count the leading zeros
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number of leading zeros in value
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void __DMB (void )
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This function ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

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void __DSB (void )
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This function acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

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void __ISB (void )
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Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

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uint8_t __LDRBT (uint8_t ptr)
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This function executed an Unprivileged LDRT command for 8 bit value.

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[in]ptrPointer to data
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value of type uint8_t at (*ptr)
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uint8_t __LDREXB (volatile uint8_t * addr)
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This function executed an exclusive LDR command for 8 bit value [not for Cortex-M0, Cortex-M0+, or SC000].

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[in]*addrPointer to data
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value of type uint8_t at (*addr)
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uint16_t __LDREXH (volatile uint16_t * addr)
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This function executed an exclusive LDR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

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[in]*addrPointer to data
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value of type uint16_t at (*addr)
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uint32_t __LDREXW (volatile uint32_t * addr)
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This function executed an exclusive LDR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

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uint16_t __LDRHT (uint16_t ptr)
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This function executed an Unprivileged LDRT command for 16 bit values.

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uint32_t __LDRT (uint32_t ptr)
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This function executed an Unprivileged LDRT command for 32 bit values.

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void __NOP (void )
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This function does nothing. This instruction can be used for code alignment purposes.

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uint32_t __RBIT (uint32_t value)
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This function reverses the bit order of the given value [not for Cortex-M0, Cortex-M0+, or SC000].

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uint32_t __REV (uint32_t value)
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This function reverses the byte order in integer value.

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uint32_t __REV16 (uint32_t value)
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This function reverses the byte order in two unsigned short values.

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int32_t __REVSH (int32_t value)
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This function reverses the byte order in a signed short value with sign extension to integer.

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uint32_t __ROR (uint32_t value,
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This function rotates a value right by a specified number of bits.

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[in]valueValue to be shifted right
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uint32_t __RRX (uint32_t value)
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This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.

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void __SEV (void )
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Send Event is a hint instruction. It causes an event to be signaled to the CPU.

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uint32_t __SSAT (unint32_t value,
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This function saturates a signed value [not for Cortex-M0, Cortex-M0+, or SC000].

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void __STRBT (uint8_t value,
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This function executed an Unprivileged STRT command for 8 bit values.

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uint32_t __STREXB (uint8_t value,
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This function executed an exclusive STR command for 8 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

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uint32_t __STREXH (uint16_t value,
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This function executed an exclusive STR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

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uint32_t __STREXW (uint32_t value,
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This function executed an exclusive STR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].

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void __STRHT (uint16_t value,
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void __STRT (uint32_t value,
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uint32_t __USAT (uint32_t value,
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This function saturates an unsigned value [not for Cortex-M0, Cortex-M0+, or SC000].

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void __WFE (void )
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Wait For Event is a hint instruction that permits the processor to enter a low-power state until an events occurs:

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void __WFI (void )
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WFI is a hint instruction that suspends execution until one of the following events occurs:

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