From 96d6da4e252b06dcfdc041e7df23e86161c33007 Mon Sep 17 00:00:00 2001 From: rihab kouki Date: Tue, 28 Jul 2020 11:24:49 +0100 Subject: Official ARM version: v5.6.0 --- DSP/DSP_Lib_TestSuite/CMakeLists.txt | 136 + .../Common/JTest/inc/jtest_cycle.h | 16 +- DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h | 29 + .../Common/JTest/inc/jtest_systick.h | 25 +- DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini | 2 +- .../Common/JTest/jtest_Simulator.ini | 6 +- .../Common/JTest/jtest_Simulator.ini.withCoverage | 32 + .../Common/inc/templates/test_templates.h | 62 +- .../Common/platform/ARMCC/armcc5_arm.sct | 70 + .../Common/platform/ARMCC/startup_armv6-m.s | 88 +- .../Common/platform/ARMCC/startup_armv6-m.s.noSCT | 195 + .../Common/platform/ARMCC/startup_armv7-m.s | 88 +- .../Common/platform/ARMCC/startup_armv7-m.s.noSCT | 218 + .../Common/platform/ARMCLANG/armcc6_arm.sct | 70 + .../Common/platform/ARMCLANG/startup_armv6-m.S | 80 +- .../platform/ARMCLANG/startup_armv6-m.S.noSCT | 203 + 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DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvoptx create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvprojx create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/CMakeLists.txt create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c create mode 100644 DSP/DSP_Lib_TestSuite/buildDspLibs.bat create mode 100644 DSP/DSP_Lib_TestSuite/buildRefLibs.bat create mode 100644 DSP/DSP_Lib_TestSuite/log2txt.py create mode 100644 DSP/DSP_Lib_TestSuite/parseLog_SV.py create mode 100644 DSP/DSP_Lib_TestSuite/runTest.bat create mode 100644 DSP/DSP_Lib_TestSuite/runTest_SV.bat (limited to 'DSP/DSP_Lib_TestSuite') diff --git a/DSP/DSP_Lib_TestSuite/CMakeLists.txt b/DSP/DSP_Lib_TestSuite/CMakeLists.txt new file mode 100644 index 0000000..3d8e4e9 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/CMakeLists.txt @@ -0,0 +1,136 @@ +cmake_minimum_required (VERSION 3.6) +cmake_policy(SET CMP0077 NEW) +# The tests are assuming that MATRIX_CHECK is enabled when building +# CMSIS-DSP. +set(MATRIXCHECK ON) +set(FASTMATHCOMPUTATIONS OFF) +option(DUMPPATTERN "Dump test patterns when test is failing" ON) + +option(CUSTOMIZE_TESTS "Enable customizations of tests" ON) +option(BASICMATH_TESTS "Enable Basic Math testing" ON) +option(COMPLEXMATH_TESTS "Enable Complex Math testing" ON) +option(CONTROLLER_TESTS "Enable Controller testing" ON) +option(FASTMATH_TESTS "Enable Fast Math testing" ON) +option(INTRINSICS_TESTS "Enable Intrinsics testing" ON) +option(FILTERING_TESTS "Enable Filtering testing" ON) +option(MATRIX_TESTS "Enable Matrix testing" ON) +option(STATISTICS_TESTS "Enable Statistics testing" ON) +option(SUPPORT_TESTS "Enable Support testing" ON) +option(TRANSFORM_TESTS "Enable Transform testing" ON) + + +project(DSP_Lib_TestSuite) + +# Needed to find the config modules +list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/..) + + +set(ROOT ${CMAKE_CURRENT_SOURCE_DIR}/../../..) + + +file(GLOB MAIN "Common/src/*.c") +file(GLOB BASICMATH_TESTS_SRC "Common/src/basic_math_tests/*.c") +file(GLOB COMPLEXMATH_TESTS_SRC "Common/src/complex_math_tests/*.c") +file(GLOB CONTROLLER_TESTS_SRC "Common/src/controller_tests/*.c") +file(GLOB FASTMATH_TESTS_SRC "Common/src/fast_math_tests/*.c") +file(GLOB FILTERING_TESTS_SRC "Common/src/filtering_tests/*.c") +file(GLOB INTRINSINCS_TESTS_SRC "Common/src/intrinsics_tests/*.c") +file(GLOB MATRIX_TESTS_SRC "Common/src/matrix_tests/*.c") +file(GLOB STATISTICS_TESTS_SRC "Common/src/statistics_tests/*.c") +file(GLOB SUPPORT_TESTS_SRC "Common/src/support_tests/*.c") +file(GLOB TRANSFORM_TESTS_SRC "Common/src/transform_tests/*.c") +file(GLOB JTEST_MAIN "Common/JTest/src/*.c") + +set(TESTSRC ${MAIN} + ${BASICMATH_TESTS_SRC} + ${COMPLEXMATH_TESTS_SRC} + ${CONTROLLER_TESTS_SRC} + ${FASTMATH_TESTS_SRC} + ${FILTERING_TESTS_SRC} + ${INTRINSINCS_TESTS_SRC} + ${MATRIX_TESTS_SRC} + ${STATISTICS_TESTS_SRC} + ${SUPPORT_TESTS_SRC} + ${TRANSFORM_TESTS_SRC} + ${JTEST_MAIN} + ) + +set(JINCS + Common/JTest/inc + Common/JTest/inc/arr_desc + Common/inc/basic_math_tests + Common/inc/complex_math_tests + Common/inc/controller_tests + Common/inc/fast_math_tests + Common/inc/filtering_tests + Common/inc/intrinsics_tests + Common/inc/matrix_tests + Common/inc/statistics_tests + Common/inc/support_tests + Common/inc/transform_tests + ) + +add_subdirectory(../Source bin_dsp) +add_subdirectory(RefLibs bin_ref) + + +add_executable(DSP_Lib_TestSuite) + +if (CUSTOMIZE_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE CUSTOMIZE_TESTS) +endif() + +if (BASICMATH_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_BASICMATH_TESTS) +endif() +if (COMPLEXMATH_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_COMPLEXMATH_TESTS) +endif() +if (CONTROLLER_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_CONTROLLER_TESTS) +endif() +if (FASTMATH_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_FASTMATH_TESTS) +endif() +if (FILTERING_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_FILTERING_TESTS) +endif() +if (INTRINSICS_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_INTRINSICS_TESTS) +endif() +if (MATRIX_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_MATRIX_TESTS) +endif() +if (STATISTICS_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_STATISTICS_TESTS) +endif() +if (SUPPORT_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_SUPPORT_TESTS) +endif() +if (TRANSFORM_TESTS) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE ENABLE_TRANSFORM_TESTS) +endif() + + +if (DUMPPATTERN) + target_compile_definitions(DSP_Lib_TestSuite PRIVATE DUMPPATTERN) +endif() + +# Change behavior of configBoot for scatter file +set(TESTFRAMEWORK ON) + +include(configBoot) + +file(COPY ${ROOT}/CMSIS/DSP/Examples/ARM/boot/RTE_Components.h DESTINATION tempLink) + +target_link_libraries(DSP_Lib_TestSuite PRIVATE CMSISDSP) +target_link_libraries(DSP_Lib_TestSuite PRIVATE DspRefLibs) + +target_sources(DSP_Lib_TestSuite PRIVATE ${TESTSRC}) + +### Includes +target_include_directories(DSP_Lib_TestSuite PRIVATE "Common/inc") +target_include_directories(DSP_Lib_TestSuite PRIVATE "Common/inc/templates") +target_include_directories(DSP_Lib_TestSuite PRIVATE ${JINCS}) + + diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h index d1b4db5..ed09f95 100644 --- a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h +++ b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_cycle.h @@ -43,6 +43,8 @@ extern const char * JTEST_CYCLE_STRF; __jtest_cycle_end_count)); \ } while (0) */ +#ifndef ARMv7A + #define JTEST_COUNT_CYCLES(fn_call) \ do \ { \ @@ -56,10 +58,22 @@ extern const char * JTEST_CYCLE_STRF; __jtest_cycle_end_count = \ JTEST_SYSTICK_VALUE(SysTick); \ \ - JTEST_SYSTICK_RESET(SysTick); \ + JTEST_SYSTICK_RESET(SysTick); \ JTEST_DUMP_STRF(JTEST_CYCLE_STRF, \ (JTEST_SYSTICK_INITIAL_VALUE - \ __jtest_cycle_end_count)); \ } while (0) +#else +/* TODO */ +#define JTEST_COUNT_CYCLES(fn_call) \ + do \ + { \ + fn_call; \ + } while (0) + +#endif + #endif /* _JTEST_CYCLE_H_ */ + + diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h index c655cfd..e48c0c5 100644 --- a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h +++ b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_fw.h @@ -141,6 +141,19 @@ typedef struct JTEST_FW_struct * Fill the buffer named buf_name with value and dump it to the Keil debugger * using action. */ +#if defined(ARMv7A) || defined(FILEIO) + +#define JTEST_ACT_DUMP(action, buf_name, value) \ + do \ + { \ + JTEST_CLEAR_BUFFER(buf_name); \ + printf("%s",value); \ + strcpy(JTEST_FW.buf_name, (value)); \ + JTEST_TRIGGER_ACTION(action); \ + } while (0) + +#else + #define JTEST_ACT_DUMP(action, buf_name, value) \ do \ { \ @@ -149,6 +162,7 @@ typedef struct JTEST_FW_struct JTEST_TRIGGER_ACTION(action); \ } while (0) +#endif /** * Trigger the "Exit Framework" action in the Keil Debugger. */ @@ -192,14 +206,29 @@ typedef struct JTEST_FW_struct /** * Dump a formatted string to the Keil Debugger. */ +#if defined(ARMv7A) || defined(FILEIO) + #define JTEST_DUMP_STRF(format_str, ... ) \ do \ { \ JTEST_CLEAR_STR_BUFFER(); \ sprintf(JTEST_FW.str_buffer,format_str, __VA_ARGS__); \ + printf("%s",JTEST_FW.str_buffer); \ jtest_dump_str_segments(); \ } while (0) +#else + +#define JTEST_DUMP_STRF(format_str, ... ) \ + do \ + { \ + JTEST_CLEAR_STR_BUFFER(); \ + sprintf(JTEST_FW.str_buffer,format_str, __VA_ARGS__); \ + jtest_dump_str_segments(); \ + } while (0) + +#endif + /* Pass/Fail Macros */ /*--------------------------------------------------------------------------------*/ diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h index ec3e317..afb6e05 100644 --- a/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h +++ b/DSP/DSP_Lib_TestSuite/Common/JTest/inc/jtest_systick.h @@ -2,7 +2,7 @@ #define _JTEST_SYSTICK_H_ /*--------------------------------------------------------------------------------*/ -/* Includes */ +/* Includes */ /*--------------------------------------------------------------------------------*/ /* Get access to the SysTick structure. */ @@ -10,6 +10,8 @@ #include "ARMCM0.h" #elif defined ARMCM0P #include "ARMCM0plus.h" +#elif defined ARMCM0P_MPU + #include "ARMCM0plus_MPU.h" #elif defined ARMCM3 #include "ARMCM3.h" #elif defined ARMCM4 @@ -40,22 +42,22 @@ #include "ARMv8MML_DP.h" #elif defined ARMv8MML_DSP_DP #include "ARMv8MML_DSP_DP.h" - +#elif defined ARMv7A + /* TODO */ #else #warning "no appropriate header file found!" #endif /*--------------------------------------------------------------------------------*/ -/* Macros and Defines */ +/* Macros and Defines */ /*--------------------------------------------------------------------------------*/ /** * Initial value for the SysTick module. * - * @note This is also the maximum value, important as SysTick is a decrementing - * counter. + * This is also the maximum value, important as SysTick is a decrementing counter. */ -#define JTEST_SYSTICK_INITIAL_VALUE 0xFFFFFF +#define JTEST_SYSTICK_INITIAL_VALUE 0xFFFFFF /** * Reset the SysTick, decrementing timer to it's maximum value and disable it. @@ -66,11 +68,10 @@ #define JTEST_SYSTICK_RESET(systick_ptr) \ do \ { \ - (systick_ptr)->LOAD = JTEST_SYSTICK_INITIAL_VALUE; \ - (systick_ptr)->VAL = 1; \ + (systick_ptr)->CTRL = SysTick_CTRL_CLKSOURCE_Msk; \ \ - /* Disable the SysTick module. */ \ - (systick_ptr)->CTRL = UINT32_C(0x000000); \ + (systick_ptr)->LOAD = JTEST_SYSTICK_INITIAL_VALUE; \ + (systick_ptr)->VAL = JTEST_SYSTICK_INITIAL_VALUE; \ } while (0) /** @@ -81,13 +82,13 @@ { \ (systick_ptr)->CTRL = \ SysTick_CTRL_ENABLE_Msk | \ - SysTick_CTRL_CLKSOURCE_Msk; /* Internal clk*/ \ + SysTick_CTRL_CLKSOURCE_Msk; \ } while (0) /** * Evaluate to the current value of the SysTick timer. */ -#define JTEST_SYSTICK_VALUE(systick_ptr) \ +#define JTEST_SYSTICK_VALUE(systick_ptr) \ ((systick_ptr)->VAL) #endif /* _JTEST_SYSTICK_H_ */ diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini index 44d22eb..cfb438f 100644 --- a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini +++ b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_FVP.ini @@ -12,7 +12,7 @@ LOG OFF /* Turn off Logging by defau BK * /* Remove existing breakpoints. */ INCLUDE ../../Common/JTest/jtest_fns.ini /* Load the JTEST helper functions */ -INCLUDE ../../Common/JTest/jtest_log_FVP.ini /* Include a log file if specified by jtest_log.ini */ +INCLUDE ../../Common/JTest/jtest_log_FVP.ini /* Include specified log file */ /* Break on special members of the JTEST framework. The framework's name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */ diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini index 8f2a6b1..d6c87b8 100644 --- a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini +++ b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini @@ -17,12 +17,12 @@ INCLUDE ../../Common/JTest/jtest_log_Simulator.ini /* Include specified log fil /* Break on special members of the JTEST framework. The framework's name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */ -BS test_start , 1, "coverage_clear(); test_start_msg();" -BS test_end , 1, "coverage_msg(); test_end_msg();" +BS test_start , 1, "test_start_msg();" +BS test_end , 1, "test_end_msg();" BS group_start , 1, "group_start_msg();" BS group_end , 1, "group_end_msg();" BS dump_str , 1, "dump_str_fn();" -BS dump_data , 1, "dump_data_fn();" +//BS dump_data , 1, "dump_data_fn();" BS exit_fw , 1, "break_fn(); debug_clean_fn(); log_off_fn();" debug_setup_finished_msg() /* Output a message to let the output diff --git a/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage new file mode 100644 index 0000000..8f2a6b1 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/Common/JTest/jtest_Simulator.ini.withCoverage @@ -0,0 +1,32 @@ +/* This demonstrates how to setup a Debugger '*.ini' file to interface with the + * C-code using the JTEST test framework. + */ + +MAP 0x00000000, 0x001FFFFF EXEC READ /* 2048K Flash */ +MAP 0x20000000, 0x201FFFFF READ WRITE /* 2048K RAM */ + +LOAD %L INCREMENTAL + + +RESET /* Reset the target processor */ +LOG OFF /* Turn off Logging by default. */ +BK * /* Remove existing breakpoints. */ + +INCLUDE ../../Common/JTest/jtest_fns.ini /* Load the JTEST helper functions */ +INCLUDE ../../Common/JTest/jtest_log_Simulator.ini /* Include specified log file */ + +/* Break on special members of the JTEST framework. The framework's + name is defined in jtest_fw.h by the #DEFINE JTEST_FW. */ +BS test_start , 1, "coverage_clear(); test_start_msg();" +BS test_end , 1, "coverage_msg(); test_end_msg();" +BS group_start , 1, "group_start_msg();" +BS group_end , 1, "group_end_msg();" +BS dump_str , 1, "dump_str_fn();" +BS dump_data , 1, "dump_data_fn();" +BS exit_fw , 1, "break_fn(); debug_clean_fn(); log_off_fn();" + +debug_setup_finished_msg() /* Output a message to let the output + parser know that setup has + finished. */ + +G /* Start the Tests */ diff --git a/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h b/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h index 69c3488..3badc80 100644 --- a/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h +++ b/DSP/DSP_Lib_TestSuite/Common/inc/templates/test_templates.h @@ -62,25 +62,29 @@ /** * Assert that buffers A and B are byte-equivalent for a number of bytes. */ -#define TEST_ASSERT_BUFFERS_EQUAL(buf_a, buf_b, bytes) \ - do \ - { \ - if (memcmp(buf_a, buf_b, bytes) != 0) \ - { \ - return JTEST_TEST_FAILED; \ - } \ + +#define TEST_ASSERT_BUFFERS_EQUAL(buf_a, buf_b, bytes)\ + do \ + { \ + if (memcmp(buf_a, buf_b, bytes) != 0) \ + { \ + return JTEST_TEST_FAILED; \ + } \ } while (0) + + + /** * Assert that the two entities are equal. */ -#define TEST_ASSERT_EQUAL(a, b) \ - do \ - { \ - if ((a) != (b)) \ - { \ - return JTEST_TEST_FAILED; \ - } \ +#define TEST_ASSERT_EQUAL(a, b) \ + do \ + { \ + if ((a) != (b)) \ + { \ + return JTEST_TEST_FAILED;\ + } \ } while (0) /** @@ -111,31 +115,35 @@ * Assert that the SNR between a reference and test sample is above a given * threshold. */ -#define TEST_ASSERT_SNR(ref_ptr, tst_ptr, block_size, threshold) \ - do \ - { \ - float32_t snr = arm_snr_f32(ref_ptr, tst_ptr, block_size); \ - if ( snr <= threshold) \ - { \ - JTEST_DUMP_STRF("SNR: %f\n", snr); \ - return JTEST_TEST_FAILED; \ - } \ - } while (0) \ + +#define TEST_ASSERT_SNR(ref_ptr, tst_ptr, block_size, threshold) \ + do \ + { \ + float32_t snr = arm_snr_f32(ref_ptr, tst_ptr, block_size);\ + if ( snr <= threshold) \ + { \ + JTEST_DUMP_STRF("SNR: %f\n", snr); \ + return JTEST_TEST_FAILED; \ + } \ + } while (0) + /** * Assert that the SNR between a reference and test sample is above a given * threshold. Special case for float64_t */ -#define TEST_ASSERT_DBL_SNR(ref_ptr, tst_ptr, block_size, threshold) \ + +#define TEST_ASSERT_DBL_SNR(ref_ptr, tst_ptr, block_size, threshold)\ do \ { \ float64_t snr = arm_snr_f64(ref_ptr, tst_ptr, block_size); \ - if ( snr <= threshold) \ + if ( snr <= threshold) \ { \ JTEST_DUMP_STRF("SNR: %f\n", snr); \ return JTEST_TEST_FAILED; \ } \ - } while (0) \ + } while (0) + /** * Compare test and reference elements by converting to float and diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/armcc5_arm.sct b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/armcc5_arm.sct new file mode 100644 index 0000000..987f554 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/armcc5_arm.sct @@ -0,0 +1,70 @@ +#! armcc -E +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/*--------------------- Flash Configuration ------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00200000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00200000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00000400 +#define __HEAP_SIZE 0x00000C00 + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundery definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) +#define __HEAP_BASE (__RAM_BASE + __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE (__RAM_BASE ) +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s index e9731e3..056174c 100644 --- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s @@ -31,33 +31,6 @@ ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; ---------------------------------------------------------------------------*/ -;/* -; //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -;*/ - - -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000C00 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB @@ -66,11 +39,12 @@ __heap_limit ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY + IMPORT ||Image$$ARM_LIB_STACK$$ZI$$Limit|| EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size -__Vectors DCD __initial_sp ; Top of Stack +__Vectors DCD ||Image$$ARM_LIB_STACK$$ZI$$Limit|| ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler @@ -134,62 +108,4 @@ SysTick_Handler PROC ALIGN -; User Initial Stack & Heap - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - -;/* -; __user_setup_stackheap() returns the: -; - heap base in r0 (if the program uses the heap) -; - stack base in sp -; - heap limit in r2 (if the program uses the heap and uses two-region memory). -; */ - EXPORT __user_setup_stackheap - -__user_setup_stackheap PROC - LDR R0, = __initial_sp - MOV SP, R0 - IF Heap_Size > 0 - LDR R2, = __heap_limit - LDR R0, = __heap_base - ELSE - MOV R0, #0 - MOV R2, #0 - ENDIF - BX LR - ENDP - - -;/* -;__user_initial_stackheap() returns the: -; - heap base in r0 -; - stack base in r1, that is, the highest address in the stack region -; - heap limit in r2 -; - stack limit in r3, that is, the lowest address in the stack region. -; */ -; -;/* DEPRICATED -; EXPORT __user_initial_stackheap -; -;__user_initial_stackheap PROC -; LDR R0, = Heap_Mem -; LDR R1, =(Stack_Mem + Stack_Size) -; LDR R2, = (Heap_Mem + Heap_Size) -; LDR R3, = Stack_Mem -; BX LR -; ENDP -; */ - - ALIGN - - ENDIF - - END diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s.noSCT new file mode 100644 index 0000000..e9731e3 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv6-m.s.noSCT @@ -0,0 +1,195 @@ +;/* File: startup_armv6-m.s +; * Purpose: startup file for armv7-m architecture devices. +; * Should be used with ARMCC +; * Version: V2.00 +; * Date: 16 November 2015 +; * +; */ +;/* Copyright (c) 2011 - 2014 ARM LIMITED +; +; All rights reserved. +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; - Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; - Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; - Neither the name of ARM nor the names of its contributors may be used +; to endorse or promote products derived from this software without +; specific prior written permission. +; * +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; ---------------------------------------------------------------------------*/ +;/* +; //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +;*/ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + BKPT #0 + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + BKPT #0 + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + + ALIGN + +; User Initial Stack & Heap + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + +;/* +; __user_setup_stackheap() returns the: +; - heap base in r0 (if the program uses the heap) +; - stack base in sp +; - heap limit in r2 (if the program uses the heap and uses two-region memory). +; */ + EXPORT __user_setup_stackheap + +__user_setup_stackheap PROC + LDR R0, = __initial_sp + MOV SP, R0 + IF Heap_Size > 0 + LDR R2, = __heap_limit + LDR R0, = __heap_base + ELSE + MOV R0, #0 + MOV R2, #0 + ENDIF + BX LR + ENDP + + +;/* +;__user_initial_stackheap() returns the: +; - heap base in r0 +; - stack base in r1, that is, the highest address in the stack region +; - heap limit in r2 +; - stack limit in r3, that is, the lowest address in the stack region. +; */ +; +;/* DEPRICATED +; EXPORT __user_initial_stackheap +; +;__user_initial_stackheap PROC +; LDR R0, = Heap_Mem +; LDR R1, =(Stack_Mem + Stack_Size) +; LDR R2, = (Heap_Mem + Heap_Size) +; LDR R3, = Stack_Mem +; BX LR +; ENDP +; */ + + ALIGN + + ENDIF + + + END diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s index 2b00ab9..b40c565 100644 --- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s @@ -31,33 +31,6 @@ ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; ---------------------------------------------------------------------------*/ -;/* -; //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -;*/ - - -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000C00 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB @@ -66,11 +39,12 @@ __heap_limit ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY + IMPORT ||Image$$ARM_LIB_STACK$$ZI$$Limit|| EXPORT __Vectors EXPORT __Vectors_End EXPORT __Vectors_Size -__Vectors DCD __initial_sp ; Top of Stack +__Vectors DCD ||Image$$ARM_LIB_STACK$$ZI$$Limit|| ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler @@ -157,62 +131,4 @@ SysTick_Handler PROC ALIGN -; User Initial Stack & Heap - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - -;/* -; __user_setup_stackheap() returns the: -; - heap base in r0 (if the program uses the heap) -; - stack base in sp -; - heap limit in r2 (if the program uses the heap and uses two-region memory). -; */ - EXPORT __user_setup_stackheap - -__user_setup_stackheap PROC - LDR R0, = __initial_sp - MOV SP, R0 - IF Heap_Size > 0 - LDR R2, = __heap_limit - LDR R0, = __heap_base - ELSE - MOV R0, #0 - MOV R2, #0 - ENDIF - BX LR - ENDP - - -;/* -;__user_initial_stackheap() returns the: -; - heap base in r0 -; - stack base in r1, that is, the highest address in the stack region -; - heap limit in r2 -; - stack limit in r3, that is, the lowest address in the stack region. -; */ -; -;/* DEPRICATED -; EXPORT __user_initial_stackheap -; -;__user_initial_stackheap PROC -; LDR R0, = Heap_Mem -; LDR R1, =(Stack_Mem + Stack_Size) -; LDR R2, = (Heap_Mem + Heap_Size) -; LDR R3, = Stack_Mem -; BX LR -; ENDP -; */ - - ALIGN - - ENDIF - - END diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s.noSCT new file mode 100644 index 0000000..2b00ab9 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCC/startup_armv7-m.s.noSCT @@ -0,0 +1,218 @@ +;/* File: startup_armv7-m.s +; * Purpose: startup file for armv7-m architecture devices. +; * Should be used with ARMCC +; * Version: V2.00 +; * Date: 16 November 2015 +; * +; */ +;/* Copyright (c) 2011 - 2014 ARM LIMITED +; +; All rights reserved. +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; - Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; - Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; - Neither the name of ARM nor the names of its contributors may be used +; to endorse or promote products derived from this software without +; specific prior written permission. +; * +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; ---------------------------------------------------------------------------*/ +;/* +; //-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +;*/ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + BKPT #0 + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + BKPT #0 + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + BKPT #0 + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + BKPT #0 + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + BKPT #0 + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + + ALIGN + +; User Initial Stack & Heap + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + +;/* +; __user_setup_stackheap() returns the: +; - heap base in r0 (if the program uses the heap) +; - stack base in sp +; - heap limit in r2 (if the program uses the heap and uses two-region memory). +; */ + EXPORT __user_setup_stackheap + +__user_setup_stackheap PROC + LDR R0, = __initial_sp + MOV SP, R0 + IF Heap_Size > 0 + LDR R2, = __heap_limit + LDR R0, = __heap_base + ELSE + MOV R0, #0 + MOV R2, #0 + ENDIF + BX LR + ENDP + + +;/* +;__user_initial_stackheap() returns the: +; - heap base in r0 +; - stack base in r1, that is, the highest address in the stack region +; - heap limit in r2 +; - stack limit in r3, that is, the lowest address in the stack region. +; */ +; +;/* DEPRICATED +; EXPORT __user_initial_stackheap +; +;__user_initial_stackheap PROC +; LDR R0, = Heap_Mem +; LDR R1, =(Stack_Mem + Stack_Size) +; LDR R2, = (Heap_Mem + Heap_Size) +; LDR R3, = Stack_Mem +; BX LR +; ENDP +; */ + + ALIGN + + ENDIF + + + END diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct new file mode 100644 index 0000000..8de3ce7 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/armcc6_arm.sct @@ -0,0 +1,70 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m0 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/*--------------------- Flash Configuration ------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00200000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00200000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00000400 +#define __HEAP_SIZE 0x00000C00 + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundery definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) +#define __HEAP_BASE (__RAM_BASE + __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE (__RAM_BASE ) +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S index 3d18268..d3499af 100644 --- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S @@ -42,39 +42,7 @@ /* .eabi_attribute Tag_ABI_align8_preserved,1 www.support.code-red-tech.com/CodeRedWiki/Preserve8 */ .eabi_attribute 25, 1 /* Tag_ABI_align_preserved */ - -/* - ; Stack Configuration - ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> - ; -*/ - .equ Stack_Size, 0x00000400 - - .section STACK, "w" - .align 3 - .globl __StackTop - .globl __StackLimit -__StackLimit: - .space Stack_Size -__StackTop: /* formerly known as __initial_sp */ - - -/* - ; Heap Configuration - ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> - ; -*/ - .equ Heap_Size, 0x00000C00 - - .section HEAP, "w" - .align 3 - .globl __HeapBase - .globl __HeapLimit -__HeapBase: - .if Heap_Size - .space Heap_Size - .endif -__HeapLimit: + .global Image$$ARM_LIB_STACK$$ZI$$Limit .section RESET, "x" @@ -83,7 +51,7 @@ __HeapLimit: .globl __Vectors_End .globl __Vectors_Size __Vectors: - .long __StackTop /* Top of Stack */ + .long Image$$ARM_LIB_STACK$$ZI$$Limit /* Top of Stack */ .long Reset_Handler /* Reset Handler */ .long NMI_Handler /* NMI Handler */ .long HardFault_Handler /* Hard Fault Handler */ @@ -156,48 +124,4 @@ SysTick_Handler: bkpt #0 b . - - .global __use_two_region_memory - -/* - __user_setup_stackheap() returns the: - - heap base in r0 (if the program uses the heap) - - stack base in sp - - heap limit in r2 (if the program uses the heap and uses two-region memory). - */ - .globl __user_setup_stackheap - .type __user_setup_stackheap, %function - .thumb_func -__user_setup_stackheap: - ldr r0, =__StackTop - mov sp, r0 - .if Heap_Size - ldr r0, =__HeapBase - ldr r2, =__HeapLimit - .else - mov r0, #0 - mov r2, #0 - .endif - bx lr - - -/* -__user_initial_stackheap() returns the: - - heap base in r0 - - stack base in r1, that is, the highest address in the stack region - - heap limit in r2 - - stack limit in r3, that is, the lowest address in the stack region. - */ -/* DEPRICATED - .globl __user_initial_stackheap - .type __user_initial_stackheap, %function - .thumb_func -__user_initial_stackheap: - ldr r0, = __HeapBase - ldr r1, = __StackTop - ldr r2, = __HeapLimit - ldr r3, = __StackLimit - bx lr -*/ - .end diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S.noSCT new file mode 100644 index 0000000..3d18268 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv6-m.S.noSCT @@ -0,0 +1,203 @@ +/* File: startup_armv6-m.S + * Purpose: startup file for armv6-m architecture devices. + * Should be used with ARMCLANG + * Version: V2.00 + * Date: 16 November 2015 + * + */ +/* Copyright (c) 2011 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ +/* + ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + + + .syntax unified + .arch armv6-m + +/* .eabi_attribute Tag_ABI_align8_preserved,1 www.support.code-red-tech.com/CodeRedWiki/Preserve8 */ +.eabi_attribute 25, 1 /* Tag_ABI_align_preserved */ + + +/* + ; Stack Configuration + ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + ; +*/ + .equ Stack_Size, 0x00000400 + + .section STACK, "w" + .align 3 + .globl __StackTop + .globl __StackLimit +__StackLimit: + .space Stack_Size +__StackTop: /* formerly known as __initial_sp */ + + +/* + ; Heap Configuration + ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + ; +*/ + .equ Heap_Size, 0x00000C00 + + .section HEAP, "w" + .align 3 + .globl __HeapBase + .globl __HeapLimit +__HeapBase: + .if Heap_Size + .space Heap_Size + .endif +__HeapLimit: + + + .section RESET, "x" + .align 2 + .globl __Vectors + .globl __Vectors_End + .globl __Vectors_Size +__Vectors: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ +__Vectors_End: + + .equ __Vectors_Size, __Vectors_End - __Vectors + + + .text + .thumb + .align 2 + + .globl Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function + .thumb_func +Reset_Handler: + bl SystemInit + bl __main + + .globl NMI_Handler + .weak NMI_Handler + .type NMI_Handler, %function + .thumb_func +NMI_Handler: + bkpt #0 + b . + + .globl HardFault_Handler + .weak HardFault_Handler + .type HardFault_Handler, %function + .thumb_func +HardFault_Handler: + bkpt #0 + b . + + .globl SVC_Handler + .weak SVC_Handler + .type SVC_Handler, %function + .thumb_func +SVC_Handler: + bkpt #0 + b . + + .globl PendSV_Handler + .weak PendSV_Handler + .type PendSV_Handler, %function + .thumb_func +PendSV_Handler: + bkpt #0 + b . + + .globl SysTick_Handler + .weak SysTick_Handler + .type SysTick_Handler, %function + .thumb_func +SysTick_Handler: + bkpt #0 + b . + + + .global __use_two_region_memory + +/* + __user_setup_stackheap() returns the: + - heap base in r0 (if the program uses the heap) + - stack base in sp + - heap limit in r2 (if the program uses the heap and uses two-region memory). + */ + .globl __user_setup_stackheap + .type __user_setup_stackheap, %function + .thumb_func +__user_setup_stackheap: + ldr r0, =__StackTop + mov sp, r0 + .if Heap_Size + ldr r0, =__HeapBase + ldr r2, =__HeapLimit + .else + mov r0, #0 + mov r2, #0 + .endif + bx lr + + +/* +__user_initial_stackheap() returns the: + - heap base in r0 + - stack base in r1, that is, the highest address in the stack region + - heap limit in r2 + - stack limit in r3, that is, the lowest address in the stack region. + */ +/* DEPRICATED + .globl __user_initial_stackheap + .type __user_initial_stackheap, %function + .thumb_func +__user_initial_stackheap: + ldr r0, = __HeapBase + ldr r1, = __StackTop + ldr r2, = __HeapLimit + ldr r3, = __StackLimit + bx lr +*/ + + .end diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S index 4bdb549..53a307e 100644 --- a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S @@ -37,44 +37,12 @@ .syntax unified - .arch armv6-m + .arch armv7-m /* .eabi_attribute Tag_ABI_align8_preserved,1 www.support.code-red-tech.com/CodeRedWiki/Preserve8 */ .eabi_attribute 25, 1 /* Tag_ABI_align_preserved */ - -/* - ; Stack Configuration - ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> - ; -*/ - .equ Stack_Size, 0x00000400 - - .section STACK, "w" - .align 3 - .globl __StackTop - .globl __StackLimit -__StackLimit: - .space Stack_Size -__StackTop: /* formerly known as __initial_sp */ - - -/* - ; Heap Configuration - ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> - ; -*/ - .equ Heap_Size, 0x00000C00 - - .section HEAP, "w" - .align 3 - .globl __HeapBase - .globl __HeapLimit -__HeapBase: - .if Heap_Size - .space Heap_Size - .endif -__HeapLimit: + .global Image$$ARM_LIB_STACK$$ZI$$Limit .section RESET, "x" @@ -83,7 +51,7 @@ __HeapLimit: .globl __Vectors_End .globl __Vectors_Size __Vectors: - .long __StackTop /* Top of Stack */ + .long Image$$ARM_LIB_STACK$$ZI$$Limit /* Top of Stack */ .long Reset_Handler /* Reset Handler */ .long NMI_Handler /* NMI Handler */ .long HardFault_Handler /* Hard Fault Handler */ @@ -188,48 +156,4 @@ SysTick_Handler: bkpt #0 b . - - .global __use_two_region_memory - -/* - __user_setup_stackheap() returns the: - - heap base in r0 (if the program uses the heap) - - stack base in sp - - heap limit in r2 (if the program uses the heap and uses two-region memory). - */ - .globl __user_setup_stackheap - .type __user_setup_stackheap, %function - .thumb_func -__user_setup_stackheap: - ldr r0, =__StackTop - mov sp, r0 - .if Heap_Size - ldr r0, =__HeapBase - ldr r2, =__HeapLimit - .else - mov r0, #0 - mov r2, #0 - .endif - bx lr - - -/* -__user_initial_stackheap() returns the: - - heap base in r0 - - stack base in r1, that is, the highest address in the stack region - - heap limit in r2 - - stack limit in r3, that is, the lowest address in the stack region. - */ -/* DEPRICATED - .globl __user_initial_stackheap - .type __user_initial_stackheap, %function - .thumb_func -__user_initial_stackheap: - ldr r0, = __HeapBase - ldr r1, = __StackTop - ldr r2, = __HeapLimit - ldr r3, = __StackLimit - bx lr -*/ - .end diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S.noSCT b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S.noSCT new file mode 100644 index 0000000..4bdb549 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/Common/platform/ARMCLANG/startup_armv7-m.S.noSCT @@ -0,0 +1,235 @@ +/* File: startup_armv7-m.S + * Purpose: startup file for armv7-m architecture devices. + * Should be used with ARMCLANG + * Version: V2.00 + * Date: 16 November 2015 + * + */ +/* Copyright (c) 2011 - 2015 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ +/* + ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + + + .syntax unified + .arch armv6-m + +/* .eabi_attribute Tag_ABI_align8_preserved,1 www.support.code-red-tech.com/CodeRedWiki/Preserve8 */ +.eabi_attribute 25, 1 /* Tag_ABI_align_preserved */ + + +/* + ; Stack Configuration + ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + ; +*/ + .equ Stack_Size, 0x00000400 + + .section STACK, "w" + .align 3 + .globl __StackTop + .globl __StackLimit +__StackLimit: + .space Stack_Size +__StackTop: /* formerly known as __initial_sp */ + + +/* + ; Heap Configuration + ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + ; +*/ + .equ Heap_Size, 0x00000C00 + + .section HEAP, "w" + .align 3 + .globl __HeapBase + .globl __HeapLimit +__HeapBase: + .if Heap_Size + .space Heap_Size + .endif +__HeapLimit: + + + .section RESET, "x" + .align 2 + .globl __Vectors + .globl __Vectors_End + .globl __Vectors_Size +__Vectors: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long MemManage_Handler /* MPU Fault Handler */ + .long BusFault_Handler /* Bus Fault Handler */ + .long UsageFault_Handler /* Usage Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long DebugMon_Handler /* Debug Monitor Handler */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ +__Vectors_End: + + .equ __Vectors_Size, __Vectors_End - __Vectors + + + .text + .thumb + .align 2 + + .globl Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function + .thumb_func +Reset_Handler: + bl SystemInit + bl __main + + .globl NMI_Handler + .weak NMI_Handler + .type NMI_Handler, %function + .thumb_func +NMI_Handler: + bkpt #0 + b . + + .globl HardFault_Handler + .weak HardFault_Handler + .type HardFault_Handler, %function + .thumb_func +HardFault_Handler: + bkpt #0 + b . + + .globl MemManage_Handler + .weak MemManage_Handler + .type MemManage_Handler, %function + .thumb_func +MemManage_Handler: + bkpt #0 + b . + + .globl BusFault_Handler + .weak BusFault_Handler + .type BusFault_Handler, %function + .thumb_func +BusFault_Handler: + bkpt #0 + b . + + .globl UsageFault_Handler + .weak UsageFault_Handler + .type UsageFault_Handler, %function + .thumb_func +UsageFault_Handler: + bkpt #0 + b . + + .globl SVC_Handler + .weak SVC_Handler + .type SVC_Handler, %function + .thumb_func +SVC_Handler: + bkpt #0 + b . + + .globl DebugMon_Handler + .weak DebugMon_Handler + .type DebugMon_Handler, %function + .thumb_func +DebugMon_Handler: + bkpt #0 + b . + + .globl PendSV_Handler + .weak PendSV_Handler + .type PendSV_Handler, %function + .thumb_func +PendSV_Handler: + bkpt #0 + b . + + .globl SysTick_Handler + .weak SysTick_Handler + .type SysTick_Handler, %function + .thumb_func +SysTick_Handler: + bkpt #0 + b . + + + .global __use_two_region_memory + +/* + __user_setup_stackheap() returns the: + - heap base in r0 (if the program uses the heap) + - stack base in sp + - heap limit in r2 (if the program uses the heap and uses two-region memory). + */ + .globl __user_setup_stackheap + .type __user_setup_stackheap, %function + .thumb_func +__user_setup_stackheap: + ldr r0, =__StackTop + mov sp, r0 + .if Heap_Size + ldr r0, =__HeapBase + ldr r2, =__HeapLimit + .else + mov r0, #0 + mov r2, #0 + .endif + bx lr + + +/* +__user_initial_stackheap() returns the: + - heap base in r0 + - stack base in r1, that is, the highest address in the stack region + - heap limit in r2 + - stack limit in r3, that is, the lowest address in the stack region. + */ +/* DEPRICATED + .globl __user_initial_stackheap + .type __user_initial_stackheap, %function + .thumb_func +__user_initial_stackheap: + ldr r0, = __HeapBase + ldr r1, = __StackTop + ldr r2, = __HeapLimit + ldr r3, = __StackLimit + bx lr +*/ + + .end diff --git a/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S b/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S index 6d68355..91a9ea3 100644 --- a/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S +++ b/DSP/DSP_Lib_TestSuite/Common/platform/startup_generic.S @@ -1,56 +1,62 @@ #if defined (__CC_ARM) - #if (defined (ARM_MATH_CM0)) + #if (defined (ARMCM0)) #include "ARMCC\startup_armv6-m.s" - #elif (defined (ARM_MATH_CM0P)) + #elif (defined (ARMCM0P) || defined (ARMCM0P_MPU)) #include "ARMCC\startup_armv6-m.s" - #elif (defined (ARM_MATH_CM3)) + #elif (defined (ARMCM3)) #include "ARMCC\startup_armv7-m.s" - #elif (defined (ARM_MATH_CM4)) + #elif (defined (ARMCM4) || defined (ARMCM4_FP)) #include "ARMCC\startup_armv7-m.s" - #elif (defined (ARM_MATH_CM7)) + #elif (defined (ARMCM7) || defined (ARMCM7_SP) || defined (ARMCM7_DP)) #include "ARMCC\startup_armv7-m.s" - #elif (defined (ARM_MATH_ARMV8MBL)) + #elif (defined (ARMv8MBL)) #include "ARMCC\startup_armv6-m.s" - #elif (defined (ARM_MATH_ARMV8MML)) + #elif (defined (ARMv8MML) || defined (ARMv8MML_DSP) || \ + defined (ARMv8MML_SP) || defined (ARMv8MML_DSP_SP) || \ + defined (ARMv8MML_DP) || defined (ARMv8MML_DSP_DP) ) #include "ARMCC\startup_armv7-m.s" #else #error "No appropriate startup file found!" #endif #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - #if (defined (ARM_MATH_CM0)) + #if (defined (ARMCM0)) #include "ARMCLANG\startup_armv6-m.S" - #elif (defined (ARM_MATH_CM0P)) + #elif (defined (ARMCM0P) || defined (ARMCM0P_MPU)) #include "ARMCLANG\startup_armv6-m.S" - #elif (defined (ARM_MATH_CM3)) + #elif (defined (ARMCM3)) #include "ARMCLANG\startup_armv7-m.S" - #elif (defined (ARM_MATH_CM4)) + #elif (defined (ARMCM4) || defined (ARMCM4_FP)) #include "ARMCLANG\startup_armv7-m.S" - #elif (defined (ARM_MATH_CM7)) + #elif (defined (ARMCM7) || defined (ARMCM7_SP) || defined (ARMCM7_DP)) #include "ARMCLANG\startup_armv7-m.S" - #elif (defined (ARM_MATH_ARMV8MBL)) + #elif (defined (ARMv8MBL)) #include "ARMCLANG\startup_armv6-m.S" - #elif (defined (ARM_MATH_ARMV8MML)) + #elif (defined (ARMv8MML) || defined (ARMv8MML_DSP) || \ + defined (ARMv8MML_SP) || defined (ARMv8MML_DSP_SP) || \ + defined (ARMv8MML_DP) || defined (ARMv8MML_DSP_DP) ) #include "ARMCLANG\startup_armv7-m.S" #else #error "No appropriate startup file found!" #endif #elif defined (__GNUC__) - #if (defined (ARM_MATH_CM0)) + #if (defined (ARMCM0)) #include "GCC\startup_armv6-m.S" - #elif (defined (ARM_MATH_CM0P)) + #elif (defined (ARMCM0P) || defined (ARMCM0P_MPU)) #include "GCC\startup_armv6-m.S" - #elif (defined (ARM_MATH_CM3)) + #elif (defined (ARMCM3)) #include "GCC\startup_armv7-m.S" - #elif (defined (ARM_MATH_CM4)) + #elif (defined (ARMCM4) || defined (ARMCM4_FP)) #include "GCC\startup_armv7-m.S" - #elif (defined (ARM_MATH_CM7)) + #elif (defined (ARMCM7) || defined (ARMCM7_SP) || defined (ARMCM7_DP)) #include "GCC\startup_armv7-m.S" - #elif (defined (ARM_MATH_ARMV8MBL)) + #elif (defined (ARMv8MBL)) #include "GCC\startup_armv6-m.S" - #elif (defined (ARM_MATH_ARMV8MML)) + #elif (defined (ARMv8MML) || defined (ARMv8MML_DSP) || \ + defined (ARMv8MML_SP) || defined (ARMv8MML_DSP_SP) || \ + defined (ARMv8MML_DP) || defined (ARMv8MML_DSP_DP) ) #include "GCC\startup_armv7-m.S" #else #error "No appropriate startup file found!" diff --git a/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c b/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c index aaa4524..2926273 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/all_tests.c @@ -12,19 +12,51 @@ JTEST_DEFINE_GROUP(all_tests) { - /* - To skip a test, comment it out - */ - JTEST_GROUP_CALL(basic_math_tests); - JTEST_GROUP_CALL(complex_math_tests); - JTEST_GROUP_CALL(controller_tests); - JTEST_GROUP_CALL(fast_math_tests); - JTEST_GROUP_CALL(filtering_tests); - JTEST_GROUP_CALL(matrix_tests); - JTEST_GROUP_CALL(statistics_tests); - JTEST_GROUP_CALL(support_tests); - JTEST_GROUP_CALL(transform_tests); - JTEST_GROUP_CALL(intrinsics_tests); - - return; + /* + To skip a test, comment it out + */ +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_BASICMATH_TESTS) + JTEST_GROUP_CALL(basic_math_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_COMPLEXMATH_TESTS) + JTEST_GROUP_CALL(complex_math_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_CONTROLLER_TESTS) + JTEST_GROUP_CALL(controller_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_FASTMATH_TESTS) + JTEST_GROUP_CALL(fast_math_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_FILTERING_TESTS) + /* Biquad df2T_f32 will fail with Neon. The test must be updated. + Neon implementation is requiring a different initialization. + */ + JTEST_GROUP_CALL(filtering_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_MATRIX_TESTS) + JTEST_GROUP_CALL(matrix_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_STATISTICS_TESTS) + JTEST_GROUP_CALL(statistics_tests); +#endif() + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_SUPPORT_TESTS) + JTEST_GROUP_CALL(support_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_TRANSFORM_TESTS) + JTEST_GROUP_CALL(transform_tests); +#endif + +#if !defined(CUSTOMIZE_TESTS) || defined(ENABLE_INTRINSICS_TESTS) + JTEST_GROUP_CALL(intrinsics_tests); +#endif + + return; } diff --git a/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c b/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c index 01dda76..db74d35 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/fast_math_tests/fast_math_tests_common_data.c @@ -190,175 +190,181 @@ const q15_t * fast_math_q15_inputs = (q15_t *) fast_math_q31_inputs; const float32_t fast_math_f32_inputs[FAST_MATH_MAX_LEN] = { - -1.5E-07, 5.0545058, 6.1958757, 0.1884450, 3.3656774, 0.5471223, - -5.0396892, 6.2149808, 0.4206357, 5.9024140, 0.1142128, 4.2966847, - -4.9243615, 3.3560853, 5.5628775, 5.6486144, 3.9328821, 0.8662564, - -1.3684878, 1.1444261, 0.2627620, 0.6719343, 3.8732286, 5.9040643, - -2.2271110, 2.5800587, 6.1848498, 5.9412493, 4.2514839, 6.2096863, - -4.8181437, 2.1155439, 4.1618680, 1.5341357, 1.8567268, 4.2736867, - -3.3165594, 2.5861183, 3.7864876, 4.7156566, 3.6664471, 3.4670146, - -3.6666823, 3.2158594, 0.5189454, 4.5211925, 6.2590334, 2.2276047, - -6.1025991, 2.1768018, 5.5703194, 2.8569321, 2.5976403, 1.3680509, - -0.7895111, 1.9409676, 4.5622487, 4.9189303, 4.3591961, 0.0615894, - -5.2980657, 5.7951829, 4.8440482, 0.2680398, 2.3762136, 4.4254964, - -4.5836656, 1.4091744, 1.6905207, 4.2287795, 3.0001720, 3.9189258, - -1.4856273, 1.1129014, 5.2128031, 4.8187110, 5.8715002, 0.6778860, - -1.1449692, 0.6226340, 3.0772767, 1.2141962, 5.6290528, 0.6225986, - -0.2775005, 3.5015887, 4.8537297, 1.9599772, 1.1245801, 2.1297213, - -1.3203840, 3.2053828, 5.6948550, 3.9516457, 0.6379562, 2.4558128, - -0.3431663, 3.1496534, 2.7125841, 6.2678565, 5.0994494, 3.0514394, - -5.6199810, 0.8642307, 2.4504731, 5.8267510, 5.7647838, 4.4835177, - 3.8851284, 2.1569414, 5.8812331, 0.7839784, 4.5904032, 4.0619375, - 5.2348483, 2.5024810, 4.7112719, 5.2478452, 2.0260784, 3.4699621, - 6.1520498, 3.4514073, 2.0761128, 3.8922546, 2.2659464, 4.7532896, - 2.6006151, 3.0934955, 4.3652005, 6.1118673, 2.0593452, 5.2640727, - 4.6437278, 5.9952549, 0.2005758, 2.2422740, 4.1635768, 1.7687265, - 1.4475395, 4.4681525, 3.9243074, 3.7109036, 4.1496541, 0.2987948, - 2.1914796, 2.8358565, 1.5136507, 4.4927603, 5.3795520, 1.7687650, - 4.5933278, 0.8655898, 5.2572843, 0.8708603, 3.6958286, 2.3006310, - 5.0690197, 3.1653480, 3.0762120, 5.5106597, 2.2188555, 2.8239372, - 6.0540393, 0.2657649, 6.1132775, 1.1888217, 4.1916405, 3.6847088, - 4.2418564, 2.2683684, 3.8973243, 5.0966113, 0.1209983, 0.5269928, - 6.1248595, 4.0925498, 1.4529100, 2.5352096, 0.7666775, 1.6866509, - 1.6200953, 2.0839142, 0.9565145, 2.1865966, 0.7644026, 5.5552975, - 0.5923686, 5.8436176, 2.5071164, 0.2978322, 2.1511962, 4.6242118, - 4.9931353, 3.4237447, 4.3116692, 5.6148598, 0.3442670, 1.9079607, - 0.2902301, 1.2282167, 4.5249352, 4.5349096, 5.5153742, 3.6595342, - 0.4441228, 5.7977751, 5.0288862, 1.7966571, 3.4159368, 6.1875316, - 4.4967379, 5.2714014, 2.7222564, 2.9570223, 3.5230663, 1.6907520, - 4.7062218, 3.1660203, 4.0640250, 1.9336225, 0.8716326, 2.9881129, - 2.2773988, 4.9518627, 4.9027432, 4.2003861, 0.8388295, 0.1354396, - 3.5175829, 1.8901016, 5.9024853, 6.1631993, 1.8008890, 5.0317023, - 5.6304337, 3.7543702, 5.5544410, 5.9296402, 3.4504620, 4.5765894, - 3.6238793, 0.1624673, 2.8056369, 4.0608350, 3.2748147, 2.3393094, - 5.8881908, 5.2121085, 5.3349614, 2.3407017, 3.7270886, 5.4824095, - 5.8653636, 4.2000849, 1.2992148, 4.1082644, 0.4527132, 2.5555406, - 4.1904544, 5.8667713, 5.0953493, 3.0445066, 4.7547955, 2.6203864, - 6.1059115, 6.2076281, 5.4295991, 2.4434288, 2.8572272, 1.5499814, - 4.9286757, 5.5470323, 5.7410198, 3.5078076, 3.7627993, 0.9354200, - 5.6530665, 2.8299063, 1.2922774, 5.6526739, 4.7914663, 5.5448250, - 1.7903950, 4.2300036, 4.1737937, 0.7716694, 2.5592571, 1.7296789, - 4.5029688, 1.7805566, 5.6309835, 5.1935484, 2.4506089, 3.1284165, - 4.3655898, 5.2424950, 3.8304163, 3.6111801, 2.0485834, 2.8678003, - 4.4849099, 5.5568808, 4.5292698, 0.1169475, 4.2397456, 2.7552322, - 2.7509053, 0.7353640, 5.1187960, 2.0411269, 1.5470969, 2.1533307, - 2.3605433, 3.4340988, 3.5306485, 2.4870244, 2.5015301, 3.2381477, - 4.1313862, 5.9747764, 4.5386496, 2.5137752, 5.2268018, 0.8440727, - 0.3799239, 0.5293398, 0.0000000, 2.0371338, 1.8958053, 0.0733938, - 3.3923238, 0.5992443, 0.9205800, 3.9655772, 5.3992694, 6.1212150, - 3.5866836, 6.2633946, 3.4780043, 3.2387210, 2.0777367, 2.7017810, - 3.0901098, 0.4463392, 5.5778300, 0.4061048, 2.7406309, 5.1938664, - 2.4789345, 3.8545764, 5.1436714, 5.5683790, 5.8503469, 1.1987353, - 1.6247202, 5.6414565, 3.7282025, 3.1657206, 3.8503962, 5.1485818, - 3.3419582, 1.2696753, 2.8518968, 2.6886436, 6.0698884, 3.8959208, - 4.3692639, 4.5249277, 2.1796068, 3.2483466, 3.4978155, 0.9832885, - 3.5315023, 4.3655778, 2.6794992, 5.2544420, 4.5954405, 2.2621418, - 2.8539005, 2.4277593, 4.8729535, 4.6135614, 2.7035154, 4.3589760, - 5.9389515, 4.9274787, 4.4332387, 0.6869673, 2.4500066, 3.7127639, - 2.8863700, 0.3162955, 1.4368865, 5.2413645, 0.0982985, 5.4268554, - 0.4905223, 4.2037186, 3.1429204, 1.3696954, 3.5915675, 0.7677371, - 4.2170618, 3.7673071, 0.3517086, 0.3540136, 0.9581898, 0.1232828, - 2.7342886, 5.2290017, 3.8791769, 3.2680695, 5.4278441, 0.6138541, - 5.7054603, 0.6786889, 3.2483864, 0.8994758, 3.5146290, 0.0287746, - 4.8172051, 5.3325973, 5.7605579, 6.2013046, 3.1738449, 1.7053924, - 0.6330341, 3.1909083, 3.6794907, 4.7933610, 0.5212697, 4.1569315, - 3.2482749, 1.0747264, 5.8971330, 3.7101152, 2.7685894, 5.9182512, - 4.1212281, 2.8396586, 5.2759745, 3.3465722, 3.4801751, 4.2729777, - 2.3071222, 1.5035072, 3.6374836, 5.4468120, 2.5558538, 0.7075818, - 2.7887656, 1.8861142, 2.5219880, 5.2361777, 2.5360737, 2.4515477, - 2.2647672, 0.8812504, 1.6344462, 0.5454754, 2.6979830, 1.6165554, - 1.8695956, 2.6694641, 0.7490013, 3.1105972, 4.4384875, 1.5304166, - 4.9327408, 0.4655185, 2.4748426, 0.0213259, 1.3865538, 0.0081717, - 1.1886509, 0.8952537, 1.6843712, 1.0988793, 0.8711572, 3.7629093, - 5.6615138, 5.9022971, 1.3897429, 3.0327137, 2.3625475, 3.2910070, - 1.6642436, 0.4295011, 2.7415239, 1.0923508, 0.1640358, 5.9984205, - 2.7055177, 6.0416507, 4.7903915, 0.0461730, 4.2728088, 4.4356194, - 4.0534637, 3.4702651, 1.3704176, 4.8529200, 1.4327442, 2.3302118, - 5.5978709, 5.3807748, 2.5285646, 1.9981730, 3.8241692, 5.7189253, - 5.7120324, 3.7170973, 2.0896078, 5.3599569, 2.7796679, 5.6822331, - 0.2084724, 3.3453343, 4.5018856, 1.1265867, 2.1144987, 1.1794352, - 2.0227281, 2.5375066, 3.4467437, 0.3062336, 3.4729184, 1.7266910, - 1.5174002, 1.5277262, 0.9686124, 6.0093412, 5.8789338, 5.1441345, - 4.5758041, 1.1046577, 2.2642776, 1.1862024, 0.0075297, 1.9881224, - 4.3958232, 3.9285942, 3.4121603, 2.7585521, 1.8059588, 3.1520171, - 4.7849358, 4.7903511, 3.6194660, 4.6977042, 4.0560129, 0.7742111, - 3.1692252, 2.1819072, 0.5789810, 0.9289656, 1.2451370, 4.2239985, - 2.7112647, 4.3630684, 1.6134250, 0.0613154, 3.3444332, 1.7554715, - 5.9453394, 5.6953510, 2.4673100, 0.1561700, 4.2187618, 5.2600982, - 6.1041123, 0.3577199, 2.8294680, 3.6597688, 4.3142726, 4.5203293, - 4.0843265, 4.5673388, 2.3489542, 3.6541880, 0.7295941, 0.3622530, - 6.1560465, 1.7896003, 3.7383338, 6.0454361, 1.1672793, 1.2129049, - 2.1466132, 5.8615704, 2.4546365, 1.7166712, 0.9547117, 2.4951084, - 2.3544507, 0.8238180, 2.7334414, 0.5749942, 3.8618151, 0.0689837, - 3.6019012, 4.9620190, 1.4788531, 2.8149909, 3.5773830, 0.3857966, - 3.1182750, 4.0357856, 1.3902536, 5.2593808, 6.1014456, 5.3179177, - 3.1792883, 1.7522271, 4.6911344, 1.4886775, 6.0151778, 3.8972087, - 3.7715583, 1.0845061, 0.5676653, 1.6038597, 5.3945577, 5.7244031, - 4.3959286, 4.5564551, 1.4444168, 3.6194506, 5.0933266, 2.5374227, - 6.2105471, 0.5654792, 2.0165320, 3.2132771, 0.3808010, 4.5596317, - 3.4969429, 3.3260664, 5.2149334, 5.3957421, 4.9576149, 1.9970040, - 2.8413032, 4.7263877, 0.6902815, 0.6895316, 1.6957291, 3.2963937, - 6.1113470, 4.4636294, 1.9594738, 1.8312791, 5.3429527, 5.7280497, - 4.0166905, 1.6045389, 0.5571039, 5.2669152, 3.6738954, 5.9571429, - 0.3834561, 3.6734096, 1.7913869, 5.2007946, 1.2000032, 2.7804978, - 2.4718774, 5.1935175, 4.2529065, 1.3044083, 1.9987109, 0.8407592, - 4.2189258, 3.5876427, 1.0666779, 0.9277486, 2.9912971, 5.7057758, - 3.4694180, 0.2069675, 0.3384307, 5.0583614, 2.8360719, 2.4042372, - 4.9614777, 2.2888819, 3.3448533, 4.4714710, 5.4756485, 2.0652177, - 4.0848120, 6.1250762, 0.4773170, 3.6883502, 2.6005256, 1.9423615, - 1.6577182, 4.7674690, 6.2531264, 1.1722630, 4.9080805, 1.2302350, - 6.2351753, 5.0407581, 2.6654950, 4.5795867, 3.1312479, 5.0830358, - 2.2400117, 0.4602021, 3.7133088, 5.7188788, 1.2174673, 2.7166470, - 4.7071094, 0.2462034, 5.9459353, 4.7983010, 3.5111731, 1.1551193, - 3.1287047, 3.2537199, 6.2470131, 5.3711915, 6.0469623, 4.2659122, - 2.5352740, 5.8746469, 3.0126903, 1.4563896, 2.4899651, 4.4301324, - 3.5095299, 4.7540509, 6.2547920, 6.0471349, 3.3619258, 6.0561746, - 0.7264988, 0.3232592, 1.9122808, 3.6454528, 3.3361480, 5.6624574, - 3.3963785, 2.7142142, 3.4096772, 4.4762342, 0.1047703, 5.0323343, - 0.8954125, 3.0063438, 1.6137441, 2.3190715, 4.1579916, 1.0656836, - 1.7516517, 1.2454643, 1.2256706, 2.0535941, 5.5313259, 2.9600203, - 2.5382144, 1.1261446, 6.0879353, 2.5601199, 5.3060708, 3.8662016, - 2.3663172, 5.5114955, 4.9313732, 2.9213939, 5.1143679, 5.6450910, - 2.6969853, 2.1006537, 3.7488443, 5.6673754, 4.4112136, 2.3716204, - 4.6178643, 5.9948046, 3.4105954, 3.3935850, 1.9547595, 0.4475800, - 1.1434170, 0.5842667, 2.9121888, 0.0586379, 5.7492774, 4.0384655, - 0.0089162, 0.1909163, 1.3098570, 2.8586366, 0.7996361, 0.0543350, - 4.5683759, 2.2249794, 4.9036865, 2.7435946, 2.7429546, 0.3092155, - 0.3118464, 0.5723993, 3.7324447, 1.5147758, 5.2864780, 5.3860266, - 6.0545540, 3.0718480, 1.3842492, 1.4213108, 3.3727372, 4.7884765, - 2.1838288, 2.8980046, 4.0169897, 5.7637923, 1.0151904, 4.4964699, - 3.6300404, 2.7224978, 5.5558613, 2.4696170, 1.1245340, 3.9793522, - 3.9207111, 2.0605178, 5.0451799, 6.2799046, 6.1636676, 0.7981966, - 1.4592079, 0.1484872, 3.8166117, 0.6962355, 2.5601436, 5.5548184, - 3.4440198, 2.3185147, 1.3090764, 2.7705283, 6.0079576, 0.7792778, - 2.9578927, 5.3840384, 0.2726304, 4.3456090, 6.1511471, 1.7798247, - 0.8405677, 4.3057392, 5.7142715, 3.8382030, 5.6547587, 1.2153801, - 4.7401894, 2.1756202, 2.6303011, 0.9784166, 5.1459324, 3.9265103, - 4.6405120, 5.0586705, 0.4223724, 5.9739917, 3.1263686, 4.7447217, - 4.6646686, 5.2221411, 0.9833301, 2.8733554, 3.8836400, 5.8570808, - -5.2470141, 5.6261119, 3.6600718, 3.6615062, 5.3716581, 0.2190677, - -5.5632585, 2.5618482, 0.2285950, 4.6881858, 0.9728179, 0.9042027, - -3.8073530, 1.5989503, 2.0367209, 2.5245268, 2.5533189, 2.4265105, - -3.8314979, 1.0486053, 1.1818174, 0.5945707, 2.0306392, 4.8355201, - -1.4710068, 4.6518534, 4.3531065, 5.1778361, 5.2023364, 1.8432851, - -1.9438243, 3.2862931, 2.0439139, 5.2266206, 5.0912323, 3.4997233, - -1.6522518, 4.2761236, 1.4680860, 2.8678051, 2.4163051, 3.3841326, - -6.2310582, 4.7451897, 6.1603795, 1.4751828, 3.3210347, 0.3231823, - -4.7555888, 3.7823504, 5.3857498, 6.2095284, 5.8401232, 2.5730582, - -0.0021455, 3.3984387, 1.3052100, 1.3777994, 2.0471011, 0.6028680, - -4.6968925, 4.7030205, 3.4136510, 2.1245480, 5.2297066, 3.4719134, - -6.0164208, 5.6098372, 2.2399783, 3.4331443, 2.1782657, 3.9131853, - -5.0053405, 4.6864702, 0.7887674, 5.1672539, 0.1580253, 2.6039335, - -4.5955687, 4.9095176, 2.3077255, 4.6801428, 5.6062801, 1.5243220, - -0.8142818, 1.4141432, 2.1992023, 1.8038058, 5.8275790, 0.3224138, - -3.7238350, 1.0235240, 5.2678588, 1.0528164, 3.1554195, 6.2789723, - -2.2330890, 0.2957980, 1.3424690, 2.4996969, 2.0964990, 1.4426353, - -5.8818165, 4.2926017, 6.0451393, 2.7518666, 5.9083095, 0.0366581, - -3.8346722, 5.0333074, 1.4638661, 5.8588735, 4.7957215, 5.1927356, - -3.6031780, 4.9799375, 2.0674268, 1.4040530, 1.9627813, 3.6726693, - -5.2145043, 1.8250297, 2.5293238, 5.4164658, 3.8625225, 6.2278165, - -1.2798778, 5.1975080, 4.2465638, 1.5641957, 2.9894493, 2.5074636, - -3.7663816, 5.0298329, 0.6601666, 5.1612735, 5.2847013, 2.2274284, - -2.7022061, 3.5954850, 4.4034117, 4.6650751, 4.7619266, 2.4449681, - -2.6973871, 6.0088907, 3.6000853, 5.3389611 + /* Special values close to increments of pi/2 */ + -0.0, 0.0, -1.5E-07, 1.5E-07, 1.5707964, 1.5707965, + -1.5707964, -1.5707965, 3.1415925, 3.1415927, -3.1415925, -3.1415927, + 6.2831855, 6.283186, -6.2831855, -6.283186, + + /* Test some slightly larger values too */ + 10.1, -13.2, + + /* Random values (0, 2pi) */ + -1.3684878, 1.1444261, 0.2627620, 0.6719343, 3.8732286, 5.9040643, + -2.2271110, 2.5800587, 6.1848498, 5.9412493, 4.2514839, 6.2096863, + -4.8181437, 2.1155439, 4.1618680, 1.5341357, 1.8567268, 4.2736867, + -3.3165594, 2.5861183, 3.7864876, 4.7156566, 3.6664471, 3.4670146, + -3.6666823, 3.2158594, 0.5189454, 4.5211925, 6.2590334, 2.2276047, + -6.1025991, 2.1768018, 5.5703194, 2.8569321, 2.5976403, 1.3680509, + -0.7895111, 1.9409676, 4.5622487, 4.9189303, 4.3591961, 0.0615894, + -5.2980657, 5.7951829, 4.8440482, 0.2680398, 2.3762136, 4.4254964, + -4.5836656, 1.4091744, 1.6905207, 4.2287795, 3.0001720, 3.9189258, + -1.4856273, 1.1129014, 5.2128031, 4.8187110, 5.8715002, 0.6778860, + -1.1449692, 0.6226340, 3.0772767, 1.2141962, 5.6290528, 0.6225986, + -0.2775005, 3.5015887, 4.8537297, 1.9599772, 1.1245801, 2.1297213, + -1.3203840, 3.2053828, 5.6948550, 3.9516457, 0.6379562, 2.4558128, + -0.3431663, 3.1496534, 2.7125841, 6.2678565, 5.0994494, 3.0514394, + -5.6199810, 0.8642307, 2.4504731, 5.8267510, 5.7647838, 4.4835177, + 3.8851284, 2.1569414, 5.8812331, 0.7839784, 4.5904032, 4.0619375, + 5.2348483, 2.5024810, 4.7112719, 5.2478452, 2.0260784, 3.4699621, + 6.1520498, 3.4514073, 2.0761128, 3.8922546, 2.2659464, 4.7532896, + 2.6006151, 3.0934955, 4.3652005, 6.1118673, 2.0593452, 5.2640727, + 4.6437278, 5.9952549, 0.2005758, 2.2422740, 4.1635768, 1.7687265, + 1.4475395, 4.4681525, 3.9243074, 3.7109036, 4.1496541, 0.2987948, + 2.1914796, 2.8358565, 1.5136507, 4.4927603, 5.3795520, 1.7687650, + 4.5933278, 0.8655898, 5.2572843, 0.8708603, 3.6958286, 2.3006310, + 5.0690197, 3.1653480, 3.0762120, 5.5106597, 2.2188555, 2.8239372, + 6.0540393, 0.2657649, 6.1132775, 1.1888217, 4.1916405, 3.6847088, + 4.2418564, 2.2683684, 3.8973243, 5.0966113, 0.1209983, 0.5269928, + 6.1248595, 4.0925498, 1.4529100, 2.5352096, 0.7666775, 1.6866509, + 1.6200953, 2.0839142, 0.9565145, 2.1865966, 0.7644026, 5.5552975, + 0.5923686, 5.8436176, 2.5071164, 0.2978322, 2.1511962, 4.6242118, + 4.9931353, 3.4237447, 4.3116692, 5.6148598, 0.3442670, 1.9079607, + 0.2902301, 1.2282167, 4.5249352, 4.5349096, 5.5153742, 3.6595342, + 0.4441228, 5.7977751, 5.0288862, 1.7966571, 3.4159368, 6.1875316, + 4.4967379, 5.2714014, 2.7222564, 2.9570223, 3.5230663, 1.6907520, + 4.7062218, 3.1660203, 4.0640250, 1.9336225, 0.8716326, 2.9881129, + 2.2773988, 4.9518627, 4.9027432, 4.2003861, 0.8388295, 0.1354396, + 3.5175829, 1.8901016, 5.9024853, 6.1631993, 1.8008890, 5.0317023, + 5.6304337, 3.7543702, 5.5544410, 5.9296402, 3.4504620, 4.5765894, + 3.6238793, 0.1624673, 2.8056369, 4.0608350, 3.2748147, 2.3393094, + 5.8881908, 5.2121085, 5.3349614, 2.3407017, 3.7270886, 5.4824095, + 5.8653636, 4.2000849, 1.2992148, 4.1082644, 0.4527132, 2.5555406, + 4.1904544, 5.8667713, 5.0953493, 3.0445066, 4.7547955, 2.6203864, + 6.1059115, 6.2076281, 5.4295991, 2.4434288, 2.8572272, 1.5499814, + 4.9286757, 5.5470323, 5.7410198, 3.5078076, 3.7627993, 0.9354200, + 5.6530665, 2.8299063, 1.2922774, 5.6526739, 4.7914663, 5.5448250, + 1.7903950, 4.2300036, 4.1737937, 0.7716694, 2.5592571, 1.7296789, + 4.5029688, 1.7805566, 5.6309835, 5.1935484, 2.4506089, 3.1284165, + 4.3655898, 5.2424950, 3.8304163, 3.6111801, 2.0485834, 2.8678003, + 4.4849099, 5.5568808, 4.5292698, 0.1169475, 4.2397456, 2.7552322, + 2.7509053, 0.7353640, 5.1187960, 2.0411269, 1.5470969, 2.1533307, + 2.3605433, 3.4340988, 3.5306485, 2.4870244, 2.5015301, 3.2381477, + 4.1313862, 5.9747764, 4.5386496, 2.5137752, 5.2268018, 0.8440727, + 0.3799239, 0.5293398, 0.0000000, 2.0371338, 1.8958053, 0.0733938, + 3.3923238, 0.5992443, 0.9205800, 3.9655772, 5.3992694, 6.1212150, + 3.5866836, 6.2633946, 3.4780043, 3.2387210, 2.0777367, 2.7017810, + 3.0901098, 0.4463392, 5.5778300, 0.4061048, 2.7406309, 5.1938664, + 2.4789345, 3.8545764, 5.1436714, 5.5683790, 5.8503469, 1.1987353, + 1.6247202, 5.6414565, 3.7282025, 3.1657206, 3.8503962, 5.1485818, + 3.3419582, 1.2696753, 2.8518968, 2.6886436, 6.0698884, 3.8959208, + 4.3692639, 4.5249277, 2.1796068, 3.2483466, 3.4978155, 0.9832885, + 3.5315023, 4.3655778, 2.6794992, 5.2544420, 4.5954405, 2.2621418, + 2.8539005, 2.4277593, 4.8729535, 4.6135614, 2.7035154, 4.3589760, + 5.9389515, 4.9274787, 4.4332387, 0.6869673, 2.4500066, 3.7127639, + 2.8863700, 0.3162955, 1.4368865, 5.2413645, 0.0982985, 5.4268554, + 0.4905223, 4.2037186, 3.1429204, 1.3696954, 3.5915675, 0.7677371, + 4.2170618, 3.7673071, 0.3517086, 0.3540136, 0.9581898, 0.1232828, + 2.7342886, 5.2290017, 3.8791769, 3.2680695, 5.4278441, 0.6138541, + 5.7054603, 0.6786889, 3.2483864, 0.8994758, 3.5146290, 0.0287746, + 4.8172051, 5.3325973, 5.7605579, 6.2013046, 3.1738449, 1.7053924, + 0.6330341, 3.1909083, 3.6794907, 4.7933610, 0.5212697, 4.1569315, + 3.2482749, 1.0747264, 5.8971330, 3.7101152, 2.7685894, 5.9182512, + 4.1212281, 2.8396586, 5.2759745, 3.3465722, 3.4801751, 4.2729777, + 2.3071222, 1.5035072, 3.6374836, 5.4468120, 2.5558538, 0.7075818, + 2.7887656, 1.8861142, 2.5219880, 5.2361777, 2.5360737, 2.4515477, + 2.2647672, 0.8812504, 1.6344462, 0.5454754, 2.6979830, 1.6165554, + 1.8695956, 2.6694641, 0.7490013, 3.1105972, 4.4384875, 1.5304166, + 4.9327408, 0.4655185, 2.4748426, 0.0213259, 1.3865538, 0.0081717, + 1.1886509, 0.8952537, 1.6843712, 1.0988793, 0.8711572, 3.7629093, + 5.6615138, 5.9022971, 1.3897429, 3.0327137, 2.3625475, 3.2910070, + 1.6642436, 0.4295011, 2.7415239, 1.0923508, 0.1640358, 5.9984205, + 2.7055177, 6.0416507, 4.7903915, 0.0461730, 4.2728088, 4.4356194, + 4.0534637, 3.4702651, 1.3704176, 4.8529200, 1.4327442, 2.3302118, + 5.5978709, 5.3807748, 2.5285646, 1.9981730, 3.8241692, 5.7189253, + 5.7120324, 3.7170973, 2.0896078, 5.3599569, 2.7796679, 5.6822331, + 0.2084724, 3.3453343, 4.5018856, 1.1265867, 2.1144987, 1.1794352, + 2.0227281, 2.5375066, 3.4467437, 0.3062336, 3.4729184, 1.7266910, + 1.5174002, 1.5277262, 0.9686124, 6.0093412, 5.8789338, 5.1441345, + 4.5758041, 1.1046577, 2.2642776, 1.1862024, 0.0075297, 1.9881224, + 4.3958232, 3.9285942, 3.4121603, 2.7585521, 1.8059588, 3.1520171, + 4.7849358, 4.7903511, 3.6194660, 4.6977042, 4.0560129, 0.7742111, + 3.1692252, 2.1819072, 0.5789810, 0.9289656, 1.2451370, 4.2239985, + 2.7112647, 4.3630684, 1.6134250, 0.0613154, 3.3444332, 1.7554715, + 5.9453394, 5.6953510, 2.4673100, 0.1561700, 4.2187618, 5.2600982, + 6.1041123, 0.3577199, 2.8294680, 3.6597688, 4.3142726, 4.5203293, + 4.0843265, 4.5673388, 2.3489542, 3.6541880, 0.7295941, 0.3622530, + 6.1560465, 1.7896003, 3.7383338, 6.0454361, 1.1672793, 1.2129049, + 2.1466132, 5.8615704, 2.4546365, 1.7166712, 0.9547117, 2.4951084, + 2.3544507, 0.8238180, 2.7334414, 0.5749942, 3.8618151, 0.0689837, + 3.6019012, 4.9620190, 1.4788531, 2.8149909, 3.5773830, 0.3857966, + 3.1182750, 4.0357856, 1.3902536, 5.2593808, 6.1014456, 5.3179177, + 3.1792883, 1.7522271, 4.6911344, 1.4886775, 6.0151778, 3.8972087, + 3.7715583, 1.0845061, 0.5676653, 1.6038597, 5.3945577, 5.7244031, + 4.3959286, 4.5564551, 1.4444168, 3.6194506, 5.0933266, 2.5374227, + 6.2105471, 0.5654792, 2.0165320, 3.2132771, 0.3808010, 4.5596317, + 3.4969429, 3.3260664, 5.2149334, 5.3957421, 4.9576149, 1.9970040, + 2.8413032, 4.7263877, 0.6902815, 0.6895316, 1.6957291, 3.2963937, + 6.1113470, 4.4636294, 1.9594738, 1.8312791, 5.3429527, 5.7280497, + 4.0166905, 1.6045389, 0.5571039, 5.2669152, 3.6738954, 5.9571429, + 0.3834561, 3.6734096, 1.7913869, 5.2007946, 1.2000032, 2.7804978, + 2.4718774, 5.1935175, 4.2529065, 1.3044083, 1.9987109, 0.8407592, + 4.2189258, 3.5876427, 1.0666779, 0.9277486, 2.9912971, 5.7057758, + 3.4694180, 0.2069675, 0.3384307, 5.0583614, 2.8360719, 2.4042372, + 4.9614777, 2.2888819, 3.3448533, 4.4714710, 5.4756485, 2.0652177, + 4.0848120, 6.1250762, 0.4773170, 3.6883502, 2.6005256, 1.9423615, + 1.6577182, 4.7674690, 6.2531264, 1.1722630, 4.9080805, 1.2302350, + 6.2351753, 5.0407581, 2.6654950, 4.5795867, 3.1312479, 5.0830358, + 2.2400117, 0.4602021, 3.7133088, 5.7188788, 1.2174673, 2.7166470, + 4.7071094, 0.2462034, 5.9459353, 4.7983010, 3.5111731, 1.1551193, + 3.1287047, 3.2537199, 6.2470131, 5.3711915, 6.0469623, 4.2659122, + 2.5352740, 5.8746469, 3.0126903, 1.4563896, 2.4899651, 4.4301324, + 3.5095299, 4.7540509, 6.2547920, 6.0471349, 3.3619258, 6.0561746, + 0.7264988, 0.3232592, 1.9122808, 3.6454528, 3.3361480, 5.6624574, + 3.3963785, 2.7142142, 3.4096772, 4.4762342, 0.1047703, 5.0323343, + 0.8954125, 3.0063438, 1.6137441, 2.3190715, 4.1579916, 1.0656836, + 1.7516517, 1.2454643, 1.2256706, 2.0535941, 5.5313259, 2.9600203, + 2.5382144, 1.1261446, 6.0879353, 2.5601199, 5.3060708, 3.8662016, + 2.3663172, 5.5114955, 4.9313732, 2.9213939, 5.1143679, 5.6450910, + 2.6969853, 2.1006537, 3.7488443, 5.6673754, 4.4112136, 2.3716204, + 4.6178643, 5.9948046, 3.4105954, 3.3935850, 1.9547595, 0.4475800, + 1.1434170, 0.5842667, 2.9121888, 0.0586379, 5.7492774, 4.0384655, + 0.0089162, 0.1909163, 1.3098570, 2.8586366, 0.7996361, 0.0543350, + 4.5683759, 2.2249794, 4.9036865, 2.7435946, 2.7429546, 0.3092155, + 0.3118464, 0.5723993, 3.7324447, 1.5147758, 5.2864780, 5.3860266, + 6.0545540, 3.0718480, 1.3842492, 1.4213108, 3.3727372, 4.7884765, + 2.1838288, 2.8980046, 4.0169897, 5.7637923, 1.0151904, 4.4964699, + 3.6300404, 2.7224978, 5.5558613, 2.4696170, 1.1245340, 3.9793522, + 3.9207111, 2.0605178, 5.0451799, 6.2799046, 6.1636676, 0.7981966, + 1.4592079, 0.1484872, 3.8166117, 0.6962355, 2.5601436, 5.5548184, + 3.4440198, 2.3185147, 1.3090764, 2.7705283, 6.0079576, 0.7792778, + 2.9578927, 5.3840384, 0.2726304, 4.3456090, 6.1511471, 1.7798247, + 0.8405677, 4.3057392, 5.7142715, 3.8382030, 5.6547587, 1.2153801, + 4.7401894, 2.1756202, 2.6303011, 0.9784166, 5.1459324, 3.9265103, + 4.6405120, 5.0586705, 0.4223724, 5.9739917, 3.1263686, 4.7447217, + 4.6646686, 5.2221411, 0.9833301, 2.8733554, 3.8836400, 5.8570808, + -5.2470141, 5.6261119, 3.6600718, 3.6615062, 5.3716581, 0.2190677, + -5.5632585, 2.5618482, 0.2285950, 4.6881858, 0.9728179, 0.9042027, + -3.8073530, 1.5989503, 2.0367209, 2.5245268, 2.5533189, 2.4265105, + -3.8314979, 1.0486053, 1.1818174, 0.5945707, 2.0306392, 4.8355201, + -1.4710068, 4.6518534, 4.3531065, 5.1778361, 5.2023364, 1.8432851, + -1.9438243, 3.2862931, 2.0439139, 5.2266206, 5.0912323, 3.4997233, + -1.6522518, 4.2761236, 1.4680860, 2.8678051, 2.4163051, 3.3841326, + -6.2310582, 4.7451897, 6.1603795, 1.4751828, 3.3210347, 0.3231823, + -4.7555888, 3.7823504, 5.3857498, 6.2095284, 5.8401232, 2.5730582, + -0.0021455, 3.3984387, 1.3052100, 1.3777994, 2.0471011, 0.6028680, + -4.6968925, 4.7030205, 3.4136510, 2.1245480, 5.2297066, 3.4719134, + -6.0164208, 5.6098372, 2.2399783, 3.4331443, 2.1782657, 3.9131853, + -5.0053405, 4.6864702, 0.7887674, 5.1672539, 0.1580253, 2.6039335, + -4.5955687, 4.9095176, 2.3077255, 4.6801428, 5.6062801, 1.5243220, + -0.8142818, 1.4141432, 2.1992023, 1.8038058, 5.8275790, 0.3224138, + -3.7238350, 1.0235240, 5.2678588, 1.0528164, 3.1554195, 6.2789723, + -2.2330890, 0.2957980, 1.3424690, 2.4996969, 2.0964990, 1.4426353, + -5.8818165, 4.2926017, 6.0451393, 2.7518666, 5.9083095, 0.0366581, + -3.8346722, 5.0333074, 1.4638661, 5.8588735, 4.7957215, 5.1927356, + -3.6031780, 4.9799375, 2.0674268, 1.4040530, 1.9627813, 3.6726693, + -5.2145043, 1.8250297, 2.5293238, 5.4164658, 3.8625225, 6.2278165, + -1.2798778, 5.1975080, 4.2465638, 1.5641957, 2.9894493, 2.5074636, + -3.7663816, 5.0298329, 0.6601666, 5.1612735, 5.2847013, 2.2274284, + -2.7022061, 3.5954850, 4.4034117, 4.6650751, 4.7619266, 2.4449681, + -2.6973871, 6.0088907, 3.6000853, 5.3389611 }; diff --git a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c index fc45819..981004b 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/conv_tests.c @@ -442,32 +442,32 @@ CONV_DEFINE_TEST(conv_partial_opt , q7 , q7_t , CONV_PARTIAL_TEST_TEMPL JTEST_DEFINE_GROUP(conv_tests) { - /* - To skip a test, comment it out. - */ - JTEST_TEST_CALL(arm_conv_f32_tests); - JTEST_TEST_CALL(arm_conv_q31_tests); - JTEST_TEST_CALL(arm_conv_q15_tests); - JTEST_TEST_CALL(arm_conv_q7_tests); + /* + To skip a test, comment it out. + */ + JTEST_TEST_CALL(arm_conv_f32_tests); + JTEST_TEST_CALL(arm_conv_q31_tests); + JTEST_TEST_CALL(arm_conv_q15_tests); + JTEST_TEST_CALL(arm_conv_q7_tests); - JTEST_TEST_CALL(arm_conv_opt_q15_tests); - JTEST_TEST_CALL(arm_conv_opt_q7_tests); + JTEST_TEST_CALL(arm_conv_opt_q15_tests); + JTEST_TEST_CALL(arm_conv_opt_q7_tests); - JTEST_TEST_CALL(arm_conv_fast_q31_tests); - JTEST_TEST_CALL(arm_conv_fast_q15_tests); + JTEST_TEST_CALL(arm_conv_fast_q31_tests); + JTEST_TEST_CALL(arm_conv_fast_q15_tests); - JTEST_TEST_CALL(arm_conv_fast_opt_q15_tests); + JTEST_TEST_CALL(arm_conv_fast_opt_q15_tests); - JTEST_TEST_CALL(arm_conv_partial_f32_tests); - JTEST_TEST_CALL(arm_conv_partial_q31_tests); - JTEST_TEST_CALL(arm_conv_partial_q15_tests); - JTEST_TEST_CALL(arm_conv_partial_q7_tests); + JTEST_TEST_CALL(arm_conv_partial_f32_tests); + JTEST_TEST_CALL(arm_conv_partial_q31_tests); + JTEST_TEST_CALL(arm_conv_partial_q15_tests); + JTEST_TEST_CALL(arm_conv_partial_q7_tests); - JTEST_TEST_CALL(arm_conv_partial_fast_q31_tests); - JTEST_TEST_CALL(arm_conv_partial_fast_q15_tests); + JTEST_TEST_CALL(arm_conv_partial_fast_q31_tests); + JTEST_TEST_CALL(arm_conv_partial_fast_q15_tests); - JTEST_TEST_CALL(arm_conv_partial_fast_opt_q15_tests); + JTEST_TEST_CALL(arm_conv_partial_fast_opt_q15_tests); - JTEST_TEST_CALL(arm_conv_partial_opt_q15_tests); - JTEST_TEST_CALL(arm_conv_partial_opt_q7_tests); + JTEST_TEST_CALL(arm_conv_partial_opt_q15_tests); + JTEST_TEST_CALL(arm_conv_partial_opt_q7_tests); } diff --git a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c index 49c4eb7..0fc4178 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_common_data.c @@ -10,7 +10,7 @@ float32_t filtering_output_ref[LMS_MAX_BLOCKSIZE*2] = {0}; float32_t filtering_output_f32_fut[LMS_MAX_BLOCKSIZE*2] = {0}; float32_t filtering_output_f32_ref[LMS_MAX_BLOCKSIZE*2] = {0}; float32_t filtering_input_lms[LMS_MAX_BLOCKSIZE*2] = {0}; -float32_t filtering_pState[LMS_MAX_BLOCKSIZE + FILTERING_MAX_NUMTAPS] = {0}; +__ALIGNED(8) float32_t filtering_pState[LMS_MAX_BLOCKSIZE + FILTERING_MAX_NUMTAPS] = {0}; float32_t filtering_scratch[FILTERING_MAX_BLOCKSIZE * 3] = {0}; float32_t filtering_scratch2[FILTERING_MAX_BLOCKSIZE * 3] = {0}; float32_t filtering_coeffs_lms[FILTERING_MAX_NUMTAPS]; diff --git a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c index 7132556..453bad6 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/filtering_tests/filtering_test_group.c @@ -3,15 +3,15 @@ JTEST_DEFINE_GROUP(filtering_tests) { - /* - To skip a test, comment it out. - */ - JTEST_GROUP_CALL(biquad_tests); - JTEST_GROUP_CALL(conv_tests); - JTEST_GROUP_CALL(correlate_tests); - JTEST_GROUP_CALL(fir_tests); - JTEST_GROUP_CALL(iir_tests); - JTEST_GROUP_CALL(lms_tests); + /* + To skip a test, comment it out. + */ + JTEST_GROUP_CALL(biquad_tests); + JTEST_GROUP_CALL(conv_tests); + JTEST_GROUP_CALL(correlate_tests); + JTEST_GROUP_CALL(fir_tests); + JTEST_GROUP_CALL(iir_tests); + JTEST_GROUP_CALL(lms_tests); - return; + return; } diff --git a/DSP/DSP_Lib_TestSuite/Common/src/main.c b/DSP/DSP_Lib_TestSuite/Common/src/main.c index 8dd4b40..a41de7d 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/main.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/main.c @@ -3,8 +3,8 @@ #include "arm_math.h" -#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) -asm(" .global __ARM_use_no_argv\n"); +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && !defined (__MICROLIB) +__asm(" .global __ARM_use_no_argv\n"); #endif @@ -16,12 +16,16 @@ void debug_init(void) int main(void) { +#if !defined(FILEIO) debug_init(); +#endif JTEST_INIT(); /* Initialize test framework. */ JTEST_GROUP_CALL(all_tests); /* Run all tests. */ JTEST_ACT_EXIT_FW(); /* Exit test framework. */ +#if !defined(FILEIO) while (1); /* Never return. */ +#endif } diff --git a/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c b/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c index 35925c8..2b1d30d 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/math_helper.c @@ -64,7 +64,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) if (temp == 0x7FC00000) { - return(0); + return(100000.0); } /* Checking for a NAN value in pTest array */ @@ -73,7 +73,7 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) if (temp == 0x7FC00000) { - return(0); + return(100000.0); } EnergySignal += pRef[i] * pRef[i]; EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); @@ -85,12 +85,21 @@ float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize) if (temp == 0x7FC00000) { - return(0); + return(100000.0); } SNR = 10 * log10f (EnergySignal / EnergyError); + /* Checking for a NAN value in SNR */ + test = (int *)(&SNR); + temp = *test; + + if (temp == 0x7FC00000) + { + return(100000.0); + } + return (SNR); } @@ -113,7 +122,7 @@ double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize) if (temp == 0x7FC00000) { - return(0); + return(100000.0); } /* Checking for a NAN value in pTest array */ @@ -122,7 +131,7 @@ double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize) if (temp == 0x7FC00000) { - return(0); + return(100000.0); } EnergySignal += pRef[i] * pRef[i]; EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); @@ -134,12 +143,21 @@ double arm_snr_f64(double *pRef, double *pTest, uint32_t buffSize) if (temp == 0x7FC00000) { - return(0); + return(100000.0); } SNR = 10 * log10 (EnergySignal / EnergyError); + /* Checking for a NAN value in SNR */ + test = (int *)(&SNR); + temp = *test; + + if (temp == 0x7FC00000) + { + return(10000.0); + } + return (SNR); } diff --git a/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c b/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c index 0394892..9043a23 100644 --- a/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c +++ b/DSP/DSP_Lib_TestSuite/Common/src/matrix_tests/matrix_test_common_data.c @@ -45,7 +45,10 @@ arm_matrix_instance_f64 matrix_output_ref64 = { * Pool of random data to base matrix inputs from. */ float32_t matrix_f32_100_rand[100] = { - -45.0345569674258, -11.0261163038747, -14.6841428777929, +/* -45.0345569674258, first number negativ causes fault in 1x1 multiplay with 0. + AC6 DSP_Lib calculatas a -0.0 which is not a 0.0 in memcmp! + */ + 45.0345569674258, -11.0261163038747, -14.6841428777929, 0.0345569674258, -11.0261163038747, -14.6841428777929, -20.3679194392227, 27.5712678608402, -12.1390617339732, -19.8753669720509, 42.3379642103244, -23.7788252219155, @@ -82,7 +85,8 @@ float32_t matrix_f32_100_rand[100] = { }; float64_t matrix_f64_100_rand[100] = { - -45.0345569674258, -11.0261163038747, -14.6841428777929, +// -45.0345569674258, -11.0261163038747, -14.6841428777929, + 45.0345569674258, -11.0261163038747, -14.6841428777929, 0.0345569674258, -11.0261163038747, -14.6841428777929, -20.3679194392227, 27.5712678608402, -12.1390617339732, -19.8753669720509, 42.3379642103244, -23.7788252219155, diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx index 5145d60..fbd1ae9 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvoptx @@ -101,7 +101,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -138,7 +140,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"../cortexM0l_config.txt" -MA"-Q 1" 0 @@ -185,6 +187,10 @@ + + + + @@ -268,7 +274,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -285,7 +293,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"../cortexM3l_config.txt" -MA"-Q 1" 0 @@ -332,6 +340,10 @@ + + + + @@ -415,7 +427,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -432,7 +446,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"../cortexM4l_config.txt" -MA"-Q 1" 0 @@ -479,6 +493,10 @@ + + + + @@ -562,7 +580,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -599,7 +619,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1" 0 @@ -646,6 +666,10 @@ + + + + @@ -729,7 +753,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -766,7 +792,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7l_config.txt" -MA"-Q 1" 0 @@ -813,6 +839,10 @@ + + + + @@ -896,7 +926,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -933,7 +965,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfsp_config.txt" -MA"-Q 1" 0 @@ -980,6 +1012,10 @@ + + + + @@ -1063,7 +1099,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -1080,7 +1118,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"../cortexM7lfdp_config.txt" -MA"-Q 1" 0 @@ -1127,6 +1165,10 @@ + + + + @@ -1210,6 +1252,8 @@ 0 0 1 + 0 + 0 15 @@ -1242,7 +1286,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMCM23_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1" 0 @@ -1289,6 +1333,10 @@ + + + + @@ -1372,6 +1420,8 @@ 0 0 1 + 0 + 0 15 @@ -1389,7 +1439,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1" 0 @@ -1436,6 +1486,10 @@ + + + + @@ -1519,6 +1573,8 @@ 0 0 1 + 0 + 0 15 @@ -1551,7 +1607,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_FP_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1" 0 @@ -1598,141 +1654,10 @@ - - - - - ARMv8MMLlfdp.DoNotUse - 0x4 - ARM-ADS - - 12000000 - - 0 - 1 - 1 - 0 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\IntermediateFiles\ARMv8MMLlfdp\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 0 - 0 - 0 - - 7 - - 1 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 1 - 0 - 0 - 1 - -1 - - - - - - - - - - - - - - - 0 - - - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - 0 - 0 - - - - + + + + @@ -1816,6 +1741,8 @@ 0 0 1 + 0 + 0 15 @@ -1848,7 +1775,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1" 0 @@ -1895,6 +1822,10 @@ + + + + @@ -1978,6 +1909,8 @@ 0 0 1 + 0 + 0 15 @@ -2010,7 +1943,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_FP_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1" 0 @@ -2057,141 +1990,10 @@ - - - - - ARMv8MMLldfdp.DoNotUse - 0x4 - ARM-ADS - - 12000000 - - 0 - 1 - 1 - 0 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\IntermediateFiles\ARMv8MMLldfdp\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 0 - 0 - 0 - - 7 - - 1 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 1 - 0 - 0 - 1 - -1 - - - - - - - - - - - - - - - 0 - - - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - 0 - 0 - - - - + + + + @@ -2705,7 +2507,7 @@ 8 38 1 - 0 + 1 0 0 ..\..\Common\src\controller_tests\pid_reset_tests.c diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx index 7296f06..bc06615 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARM/DspLibTest_FVP.uvprojx @@ -10,11 +10,13 @@ cortexM0l 0x4 ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM0 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -131,7 +133,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -182,6 +184,7 @@ 0 0 0 + 0 0 0 8 @@ -322,6 +325,7 @@ 0 0 0 + 0 0 0 0 @@ -332,9 +336,9 @@ 0 - ARM_MATH_CM0 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -349,8 +353,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM0 - ARM_MATH_CM0 + --cpreproc --cpreproc_opts=-D,ARMCM0 + @@ -365,7 +369,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -851,11 +855,12 @@ cortexM3l 0x4 ARM-ADS + 0 ARMCM3 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -911,8 +916,8 @@ 0 0 - python Scripts/get_ref_and_dsp_libs.py ARM M3l - python Scripts/get_ref_and_dsp_libs.py GCC M3l + + 0 0 0 @@ -972,7 +977,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -1023,6 +1028,7 @@ 0 0 0 + 0 0 0 8 @@ -1163,6 +1169,7 @@ 0 0 0 + 0 0 0 0 @@ -1173,9 +1180,9 @@ 0 - ARM_MATH_CM3 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -1190,8 +1197,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM3 - ARM_MATH_CM3 + --cpreproc --cpreproc_opts=-D,ARMCM3 + @@ -1206,7 +1213,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -1692,11 +1699,12 @@ cortexM4l 0x4 ARM-ADS + 0 ARMCM4 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -1752,8 +1760,8 @@ 0 0 - python Scripts/get_ref_and_dsp_libs.py ARM M4l - python Scripts/get_ref_and_dsp_libs.py GCC M4l + + 0 0 0 @@ -1813,7 +1821,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -1864,6 +1872,7 @@ 0 0 0 + 0 0 0 8 @@ -2004,6 +2013,7 @@ 0 0 0 + 0 0 0 0 @@ -2014,9 +2024,9 @@ 0 - ARM_MATH_CM4 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2031,8 +2041,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM4 - ARM_MATH_CM4 + --cpreproc --cpreproc_opts=-D,ARMCM4 + @@ -2047,7 +2057,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -2533,11 +2543,12 @@ cortexM4lf 0x4 ARM-ADS + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -2593,8 +2604,8 @@ 0 0 - python Scripts/get_ref_and_dsp_libs.py ARM M4lf - python Scripts/get_ref_and_dsp_libs.py GCC M4lf + + 0 0 0 @@ -2654,7 +2665,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -2705,6 +2716,7 @@ 0 0 2 + 0 0 0 8 @@ -2845,6 +2857,7 @@ 0 0 0 + 0 0 0 0 @@ -2855,9 +2868,9 @@ 0 - ARM_MATH_CM4 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2872,8 +2885,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM4 - ARM_MATH_CM4 + --cpreproc --cpreproc_opts=-D,ARMCM4 + @@ -2888,7 +2901,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -3374,11 +3387,12 @@ cortexM7l 0x4 ARM-ADS + 0 ARMCM7 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -3434,8 +3448,8 @@ 0 0 - python Scripts/get_ref_and_dsp_libs.py ARM M4l - python Scripts/get_ref_and_dsp_libs.py GCC M4l + + 0 0 0 @@ -3495,7 +3509,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -3546,6 +3560,7 @@ 0 0 0 + 0 0 0 8 @@ -3686,6 +3701,7 @@ 0 0 0 + 0 0 0 0 @@ -3696,9 +3712,9 @@ 0 - ARM_MATH_CM7 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3713,8 +3729,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM7 - ARM_MATH_CM7 + --cpreproc --cpreproc_opts=-D,ARMCM7 + @@ -3729,7 +3745,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -4215,11 +4231,12 @@ cortexM7lfsp 0x4 ARM-ADS + 0 ARMCM7_SP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE @@ -4275,8 +4292,8 @@ 0 0 - python Scripts/get_ref_and_dsp_libs.py ARM M4lf - python Scripts/get_ref_and_dsp_libs.py GCC M4lf + + 0 0 0 @@ -4336,7 +4353,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -4387,6 +4404,7 @@ 0 0 2 + 0 0 0 8 @@ -4527,6 +4545,7 @@ 0 0 0 + 0 0 0 0 @@ -4537,9 +4556,9 @@ 0 - ARM_MATH_CM7 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -4554,8 +4573,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM7 - ARM_MATH_CM7 + --cpreproc --cpreproc_opts=-D,ARMCM7 + @@ -4570,7 +4589,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -5056,11 +5075,12 @@ cortexM7lfdp 0x4 ARM-ADS + 0 ARMCM7_DP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE @@ -5177,7 +5197,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -5228,6 +5248,7 @@ 0 0 3 + 0 0 0 8 @@ -5368,6 +5389,7 @@ 0 0 0 + 0 0 0 0 @@ -5378,9 +5400,9 @@ 0 - ARM_MATH_CM7 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -5395,8 +5417,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM7 - ARM_MATH_CM7 + --cpreproc --cpreproc_opts=-D,ARMCM7 + @@ -5411,7 +5433,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -5897,12 +5919,13 @@ ARMv8MBLl 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG_6.11 + 1 ARMv8MBL ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE @@ -6019,7 +6042,7 @@ 0 0 1 - 1 + 0 4097 1 @@ -6045,7 +6068,7 @@ 1 1 0 - 1 + 0 1 0 0 @@ -6070,6 +6093,7 @@ 0 0 0 + 0 0 0 8 @@ -6197,32 +6221,33 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 -fhonor-nans - ARM_MATH_ARMV8MBL + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6235,10 +6260,10 @@ 0 0 0 - 0 + 1 - --cpreproc - ARM_MATH_ARMV8MBL __CC_ARM + + ARMv8MBL @@ -6253,7 +6278,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCLANG\armcc6_arm.sct @@ -6740,11 +6765,12 @@ 0x4 ARM-ADS 6060000::V6.6::.\ARMCLANG + 1 ARMv8MML ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE @@ -6861,7 +6887,7 @@ 0 0 1 - 1 + 0 4097 1 @@ -6912,6 +6938,7 @@ 0 0 0 + 0 1 1 8 @@ -7039,32 +7066,33 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans - ARM_MATH_ARMV8MML + -fhonor-nans + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -7077,10 +7105,10 @@ 0 0 0 - 0 + 1 - --cpreproc - ARM_MATH_ARMV8MML __CC_ARM + + @@ -7095,7 +7123,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCLANG\armcc6_arm.sct @@ -7582,11 +7610,12 @@ 0x4 ARM-ADS 6060000::V6.6::.\ARMCLANG + 1 ARMv8MML_SP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE @@ -7703,7 +7732,7 @@ 0 0 1 - 1 + 0 4097 1 @@ -7754,6 +7783,7 @@ 0 0 2 + 0 1 1 8 @@ -7881,32 +7911,33 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans - ARM_MATH_ARMV8MML __FPU_PRESENT=1U + -fhonor-nans + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -7919,10 +7950,10 @@ 0 0 0 - 0 + 1 - --cpreproc - ARM_MATH_ARMV8MML __CC_ARM + + @@ -7937,7 +7968,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCLANG\armcc6_arm.sct @@ -8420,22 +8451,23 @@ - ARMv8MMLlfdp.DoNotUse + ARMv8MMLld 0x4 ARM-ADS 6060000::V6.6::.\ARMCLANG + 1 - ARMv8MML_DP + ARMv8MML_DSP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ - IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE + IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000) 0 - $$Device:ARMv8MML_DP$Device\ARM\ARMv8MML\Include\ARMv8MML_DP.h + $$Device:ARMv8MML_DSP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP.h @@ -8445,7 +8477,7 @@ - $$Device:ARMv8MML_DP$Device\ARM\SVD\ARMv8MML.svd + $$Device:ARMv8MML_DSP$Device\ARM\SVD\ARMv8MML.svd 0 0 @@ -8460,14 +8492,14 @@ 0 1 - .\IntermediateFiles\ARMv8MMLlfdp\ + .\IntermediateFiles\ARMv8MMLld\ DspLibTest_FVP 1 0 0 1 1 - .\IntermediateFiles\ARMv8MMLlfdp\ + .\IntermediateFiles\ARMv8MMLld\ 1 0 0 @@ -8544,8 +8576,8 @@ 1 0 0 - 0 - 1 + 1 + 0 4097 1 @@ -8595,7 +8627,8 @@ 1 0 0 - 3 + 0 + 0 1 1 8 @@ -8723,32 +8756,33 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans - ARM_MATH_ARMV8MML __FPU_PRESENT=1U + -fhonor-nans + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -8761,10 +8795,10 @@ 0 0 0 - 0 + 1 - --cpreproc - ARM_MATH_ARMV8MML __CC_ARM + + @@ -8779,7 +8813,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCLANG\armcc6_arm.sct @@ -9262,22 +9296,23 @@ - ARMv8MMLld + ARMv8MMLldfsp 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 - ARMv8MML_DSP + ARMv8MML_DSP_SP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ - IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE + IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000) 0 - $$Device:ARMv8MML_DSP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP.h + $$Device:ARMv8MML_DSP_SP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP_SP.h @@ -9287,7 +9322,7 @@ - $$Device:ARMv8MML_DSP$Device\ARM\SVD\ARMv8MML.svd + $$Device:ARMv8MML_DSP_SP$Device\ARM\SVD\ARMv8MML.svd 0 0 @@ -9302,14 +9337,14 @@ 0 1 - .\IntermediateFiles\ARMv8MMLld\ + .\IntermediateFiles\ARMv8MMLldfsp\ DspLibTest_FVP 1 0 0 1 1 - .\IntermediateFiles\ARMv8MMLld\ + .\IntermediateFiles\ARMv8MMLldfsp\ 1 0 0 @@ -9387,12 +9422,12 @@ 0 0 1 - 1 + 0 4097 1 BIN\UL2V8M.DLL - + "" () @@ -9437,7 +9472,8 @@ 1 0 0 - 0 + 2 + 0 1 1 8 @@ -9565,32 +9601,33 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans - ARM_MATH_ARMV8MML __DSP_PRESENT=1U + -fhonor-nans + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -9603,1694 +9640,10 @@ 0 0 0 - 0 + 1 - --cpreproc - ARM_MATH_ARMV8MML __CC_ARM - - - - - - 0 - 0 - 0 - 0 - 1 - 0 - 0x00000000 - 0x20000000 - - - - - - - - - - - - - Libraries - - - arm_math.lib - 4 - .\Lib\arm_math.lib - - - arm_ref.lib - 4 - .\Lib\arm_ref.lib - - - - - Startup - - - main.c - 1 - ..\..\Common\src\main.c - - - system_generic.c - 1 - ..\..\Common\platform\system_generic.c - - - startup_generic.S - 2 - ..\..\Common\platform\startup_generic.S - - - - - JTest - - - jtest_cycle.c - 1 - ..\..\Common\JTest\src\jtest_cycle.c - - - jtest_fw.c - 1 - ..\..\Common\JTest\src\jtest_fw.c - - - jtest_dump_str_segments.c - 1 - ..\..\Common\JTest\src\jtest_dump_str_segments.c - - - jtest_trigger_action.c - 1 - ..\..\Common\JTest\src\jtest_trigger_action.c - - - - - AllTests - - - all_tests.c - 1 - ..\..\Common\src\all_tests.c - - - - - Transform - - - cfft_tests.c - 1 - ..\..\Common\src\transform_tests\cfft_tests.c - - - transform_test_group.c - 1 - ..\..\Common\src\transform_tests\transform_test_group.c - - - transform_tests_common_data.c - 1 - ..\..\Common\src\transform_tests\transform_tests_common_data.c - - - cfft_family_tests.c - 1 - ..\..\Common\src\transform_tests\cfft_family_tests.c - - - rfft_tests.c - 1 - ..\..\Common\src\transform_tests\rfft_tests.c - - - rfft_fast_tests.c - 1 - ..\..\Common\src\transform_tests\rfft_fast_tests.c - - - dct4_tests.c - 1 - ..\..\Common\src\transform_tests\dct4_tests.c - - - - - BasicMath - - - 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### uVision Project, (C) Keil Software
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..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + ARMv8MMLldfsp + 0x4 + ARM-ADS + 6060000::V6.6::.\ARMCLANG + 1 + + + ARMv8MML_DSP_SP + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE + + + UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMv8MML_DSP_SP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP_SP.h + + + + + + + + + + $$Device:ARMv8MML_DSP_SP$Device\ARM\SVD\ARMv8MML.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\ARMv8MMLldfsp\ + DspLibTest_FVP + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\ARMv8MMLldfsp\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + + + + SARMV8M.DLL + -MPU + TCM.DLL + -pV8MML + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 0 + 4097 + + 1 + BIN\UL2V8M.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "ARMV8MML" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 1 + 1 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x200000 + + + 0 + 0x0 + 0x0 + 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0x20000000 + + ..\..\Common\platform\ARMCLANG\armcc6_arm.sct + + + + + + + + + + + Libraries + + + arm_math.lib + 4 + .\Lib\arm_math.lib + + + arm_ref.lib + 4 + .\Lib\arm_ref.lib + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Lib/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Lib/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Lib/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCLANG/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM23_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM23_config.txt deleted file mode 100644 index 79e96c4..0000000 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM23_config.txt +++ /dev/null @@ -1,163 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#---------------------------------------------------------------------------------------------- -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -fvp_mps2.platform_type=0x0 # (int , init-time) default = '0x0' : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2] -fvp_mps2.extra_psram=0 # (bool , init-time) default = '0' : Increases PSRAM to 32Mb -fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic -fvp_mps2.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -fvp_mps2.UART2.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART2.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART2.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART2.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART2.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART2.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.UART1.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART1.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART1.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART1.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART1.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART1.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.mps2_visualisation.rate_limit-enable=1 # (bool , init-time) default = '1' : Rate limit simulation. -fvp_mps2.mps2_visualisation.disable-visualisation=0 # (bool , init-time) default = '0' : Enable/disable visualisation -fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%" # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name) -fvp_mps2.mps2_visualisation.idler.delay_ms=0x32 # (int , init-time) default = '0x32' : Determines the period, in milliseconds of real time, between gui_callback() calls. -fvp_mps2.telnetterminal0.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal0.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal0.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal0.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal0.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal1.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal1.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal1.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal1.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal1.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal2.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal2.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal2.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal2.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal2.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.PSRAM_M7.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.UART0.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART0.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART0.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART0.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART0.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART0.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.cmsdk_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.s32k_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.secure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.nonsecure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.PSRAM.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.stub.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.sys_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.sys_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1core_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.crypto_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.crypto_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cordio_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cordio_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram0_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram0_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram1_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram1_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram2_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram2_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram3_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram3_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.smsc_91c111.enabled=0 # (bool , init-time) default = '0' : Host interface connection enabled -fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2" # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address -fvp_mps2.smsc_91c111.promiscuous=1 # (bool , init-time) default = '1' : Put host into promiscuous mode -fvp_mps2.hostbridge.interfaceName="ARM0" # (string, init-time) default = 'ARM0' : Host Interface -fvp_mps2.hostbridge.userNetworking=0 # (bool , init-time) default = '0' : Enable user-mode networking -fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24" # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking -fvp_mps2.hostbridge.userNetPorts="" # (string, init-time) default = '' : Listening ports to expose in user-mode networking -fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : Flash Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : SRAM Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : Flash Watermark supported -fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : SRAM Watermark supported -fvp_mps2.exclusive_monitor_psram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_psram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma0.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma0.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma0.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma0.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma1.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma1.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma1.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma1.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma2.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma2.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma2.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma2.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma3.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma3.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma3.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma3.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF # (int , init-time) default = '0xFFFFFFFF' : : [0x0..0xFFFFFFFF] -#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_FP_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_FP_config.txt deleted file mode 100644 index 8ff1d62..0000000 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_FP_config.txt +++ /dev/null @@ -1,183 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#---------------------------------------------------------------------------------------------- -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.MPU_S=0x8 # (int , init-time) default = '0x8' : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10] -cpu0.MPU_NS=0x8 # (int , init-time) default = '0x8' : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10] -cpu0.ITM=0 # (bool , init-time) default = '1' : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included -cpu0.IRQLVL=0x3 # (int , init-time) default = '0x3' : Number of bits of interrupt priority : [0x3..0x8] -cpu0.BIGENDINIT=0 # (bool , init-time) default = '0' : Initialize processor to big endian mode -cpu0.INITSVTOR=0x00000000 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.INITNSVTOR=0x0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.SAU=0x0 # (int , init-time) default = '0x4' : Number of SAU regions (0 => no SAU) : [0x0..0x8] -cpu0.SAU_CTRL.ENABLE=0 # (bool , init-time) default = '0' : Enable SAU at reset -cpu0.SAU_CTRL.ALLNS=0 # (bool , init-time) default = '0' : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set -cpu0.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -cpu0.LOCK_SAU=0 # (bool , init-time) default = '0' : Lock down of SAU registers write -cpu0.LOCK_S_MPU=0 # (bool , init-time) default = '0' : Lock down of Secure MPU registers write -cpu0.LOCK_NS_MPU=0 # (bool , init-time) default = '0' : Lock down of Non-Secure MPU registers write -cpu0.CPIF=1 # (bool , init-time) default = '1' : Specifies whether the external coprocessor interface is included -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic -fvp_mps2.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -fvp_mps2.SCC_ID.Variant=0x0 # (int , init-time) default = '0x0' : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.SCC_ID.Revision=0x1 # (int , init-time) default = '0x1' : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.platform_type=0x0 # (int , init-time) default = '0x0' : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2] -fvp_mps2.extra_psram=0 # (bool , init-time) default = '0' : Increases PSRAM to 32Mb -fvp_mps2.UART2.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART2.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART2.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART2.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART2.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART2.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.UART1.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART1.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART1.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART1.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART1.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART1.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.mps2_visualisation.rate_limit-enable=1 # (bool , init-time) default = '1' : Rate limit simulation. -fvp_mps2.mps2_visualisation.disable-visualisation=0 # (bool , init-time) default = '0' : Enable/disable visualisation -fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%" # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name) -fvp_mps2.mps2_visualisation.idler.delay_ms=0x32 # (int , init-time) default = '0x32' : Determines the period, in milliseconds of real time, between gui_callback() calls. -fvp_mps2.telnetterminal0.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal0.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal0.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal0.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal0.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal1.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal1.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal1.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal1.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal1.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal2.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal2.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal2.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal2.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal2.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.PSRAM_M7.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.UART0.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART0.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART0.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART0.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART0.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART0.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.cmsdk_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.s32k_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.secure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.nonsecure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.PSRAM.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.stub.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.sys_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.sys_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1core_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.crypto_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.crypto_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cordio_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cordio_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram0_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram0_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram1_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram1_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram2_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram2_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram3_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram3_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.smsc_91c111.enabled=0 # (bool , init-time) default = '0' : Host interface connection enabled -fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2" # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address -fvp_mps2.smsc_91c111.promiscuous=1 # (bool , init-time) default = '1' : Put host into promiscuous mode -fvp_mps2.hostbridge.interfaceName="ARM0" # (string, init-time) default = 'ARM0' : Host Interface -fvp_mps2.hostbridge.userNetworking=0 # (bool , init-time) default = '0' : Enable user-mode networking -fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24" # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking -fvp_mps2.hostbridge.userNetPorts="" # (string, init-time) default = '' : Listening ports to expose in user-mode networking -fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : Flash Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : SRAM Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : Flash Watermark supported -fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : SRAM Watermark supported -fvp_mps2.exclusive_monitor_psram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_psram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma0.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma0.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma0.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma0.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma1.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma1.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma1.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma1.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma2.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma2.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma2.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma2.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma3.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma3.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma3.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma3.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.iotss_systemcontrol.cpu0wait=0 # (bool , init-time) default = '0' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_systemcontrol.cpu1wait=1 # (bool , init-time) default = '1' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF # (int , init-time) default = '0xFFFFFFFF' : : [0x0..0xFFFFFFFF] -#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_config.txt deleted file mode 100644 index e6f8798..0000000 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_DSP_config.txt +++ /dev/null @@ -1,183 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#---------------------------------------------------------------------------------------------- -cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.MPU_S=0x8 # (int , init-time) default = '0x8' : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10] -cpu0.MPU_NS=0x8 # (int , init-time) default = '0x8' : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10] -cpu0.ITM=0 # (bool , init-time) default = '1' : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included -cpu0.IRQLVL=0x3 # (int , init-time) default = '0x3' : Number of bits of interrupt priority : [0x3..0x8] -cpu0.BIGENDINIT=0 # (bool , init-time) default = '0' : Initialize processor to big endian mode -cpu0.INITSVTOR=0x00000000 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.INITNSVTOR=0x0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.SAU=0x0 # (int , init-time) default = '0x4' : Number of SAU regions (0 => no SAU) : [0x0..0x8] -cpu0.SAU_CTRL.ENABLE=0 # (bool , init-time) default = '0' : Enable SAU at reset -cpu0.SAU_CTRL.ALLNS=0 # (bool , init-time) default = '0' : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set -cpu0.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -cpu0.LOCK_SAU=0 # (bool , init-time) default = '0' : Lock down of SAU registers write -cpu0.LOCK_S_MPU=0 # (bool , init-time) default = '0' : Lock down of Secure MPU registers write -cpu0.LOCK_NS_MPU=0 # (bool , init-time) default = '0' : Lock down of Non-Secure MPU registers write -cpu0.CPIF=1 # (bool , init-time) default = '1' : Specifies whether the external coprocessor interface is included -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic -fvp_mps2.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -fvp_mps2.SCC_ID.Variant=0x0 # (int , init-time) default = '0x0' : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.SCC_ID.Revision=0x1 # (int , init-time) default = '0x1' : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.platform_type=0x0 # (int , init-time) default = '0x0' : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2] -fvp_mps2.extra_psram=0 # (bool , init-time) default = '0' : Increases PSRAM to 32Mb -fvp_mps2.UART2.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART2.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART2.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART2.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART2.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART2.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.UART1.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART1.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART1.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART1.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART1.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART1.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.mps2_visualisation.rate_limit-enable=1 # (bool , init-time) default = '1' : Rate limit simulation. -fvp_mps2.mps2_visualisation.disable-visualisation=0 # (bool , init-time) default = '0' : Enable/disable visualisation -fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%" # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name) -fvp_mps2.mps2_visualisation.idler.delay_ms=0x32 # (int , init-time) default = '0x32' : Determines the period, in milliseconds of real time, between gui_callback() calls. -fvp_mps2.telnetterminal0.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal0.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal0.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal0.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal0.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal1.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal1.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal1.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal1.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal1.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal2.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal2.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal2.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal2.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal2.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.PSRAM_M7.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.UART0.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART0.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART0.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART0.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART0.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART0.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.cmsdk_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.s32k_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.secure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.nonsecure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.PSRAM.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.stub.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.sys_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.sys_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1core_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.crypto_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.crypto_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cordio_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cordio_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram0_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram0_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram1_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram1_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram2_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram2_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram3_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram3_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.smsc_91c111.enabled=0 # (bool , init-time) default = '0' : Host interface connection enabled -fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2" # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address -fvp_mps2.smsc_91c111.promiscuous=1 # (bool , init-time) default = '1' : Put host into promiscuous mode -fvp_mps2.hostbridge.interfaceName="ARM0" # (string, init-time) default = 'ARM0' : Host Interface -fvp_mps2.hostbridge.userNetworking=0 # (bool , init-time) default = '0' : Enable user-mode networking -fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24" # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking -fvp_mps2.hostbridge.userNetPorts="" # (string, init-time) default = '' : Listening ports to expose in user-mode networking -fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : Flash Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : SRAM Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : Flash Watermark supported -fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : SRAM Watermark supported -fvp_mps2.exclusive_monitor_psram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_psram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma0.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma0.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma0.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma0.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma1.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma1.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma1.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma1.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma2.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma2.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma2.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma2.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma3.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma3.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma3.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma3.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.iotss_systemcontrol.cpu0wait=0 # (bool , init-time) default = '0' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_systemcontrol.cpu1wait=1 # (bool , init-time) default = '1' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF # (int , init-time) default = '0xFFFFFFFF' : : [0x0..0xFFFFFFFF] -#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_FP_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_FP_config.txt deleted file mode 100644 index 5c562f2..0000000 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_FP_config.txt +++ /dev/null @@ -1,183 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#---------------------------------------------------------------------------------------------- -cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.MPU_S=0x8 # (int , init-time) default = '0x8' : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10] -cpu0.MPU_NS=0x8 # (int , init-time) default = '0x8' : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10] -cpu0.ITM=0 # (bool , init-time) default = '1' : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included -cpu0.IRQLVL=0x3 # (int , init-time) default = '0x3' : Number of bits of interrupt priority : [0x3..0x8] -cpu0.BIGENDINIT=0 # (bool , init-time) default = '0' : Initialize processor to big endian mode -cpu0.INITSVTOR=0x00000000 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.INITNSVTOR=0x0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.SAU=0x0 # (int , init-time) default = '0x4' : Number of SAU regions (0 => no SAU) : [0x0..0x8] -cpu0.SAU_CTRL.ENABLE=0 # (bool , init-time) default = '0' : Enable SAU at reset -cpu0.SAU_CTRL.ALLNS=0 # (bool , init-time) default = '0' : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set -cpu0.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -cpu0.LOCK_SAU=0 # (bool , init-time) default = '0' : Lock down of SAU registers write -cpu0.LOCK_S_MPU=0 # (bool , init-time) default = '0' : Lock down of Secure MPU registers write -cpu0.LOCK_NS_MPU=0 # (bool , init-time) default = '0' : Lock down of Non-Secure MPU registers write -cpu0.CPIF=1 # (bool , init-time) default = '1' : Specifies whether the external coprocessor interface is included -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic -fvp_mps2.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -fvp_mps2.SCC_ID.Variant=0x0 # (int , init-time) default = '0x0' : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.SCC_ID.Revision=0x1 # (int , init-time) default = '0x1' : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.platform_type=0x0 # (int , init-time) default = '0x0' : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2] -fvp_mps2.extra_psram=0 # (bool , init-time) default = '0' : Increases PSRAM to 32Mb -fvp_mps2.UART2.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART2.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART2.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART2.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART2.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART2.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.UART1.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART1.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART1.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART1.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART1.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART1.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.mps2_visualisation.rate_limit-enable=1 # (bool , init-time) default = '1' : Rate limit simulation. -fvp_mps2.mps2_visualisation.disable-visualisation=0 # (bool , init-time) default = '0' : Enable/disable visualisation -fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%" # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name) -fvp_mps2.mps2_visualisation.idler.delay_ms=0x32 # (int , init-time) default = '0x32' : Determines the period, in milliseconds of real time, between gui_callback() calls. -fvp_mps2.telnetterminal0.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal0.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal0.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal0.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal0.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal1.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal1.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal1.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal1.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal1.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal2.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal2.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal2.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal2.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal2.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.PSRAM_M7.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.UART0.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART0.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART0.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART0.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART0.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART0.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.cmsdk_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.s32k_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.secure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.nonsecure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.PSRAM.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.stub.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.sys_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.sys_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1core_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.crypto_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.crypto_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cordio_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cordio_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram0_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram0_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram1_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram1_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram2_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram2_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram3_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram3_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.smsc_91c111.enabled=0 # (bool , init-time) default = '0' : Host interface connection enabled -fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2" # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address -fvp_mps2.smsc_91c111.promiscuous=1 # (bool , init-time) default = '1' : Put host into promiscuous mode -fvp_mps2.hostbridge.interfaceName="ARM0" # (string, init-time) default = 'ARM0' : Host Interface -fvp_mps2.hostbridge.userNetworking=0 # (bool , init-time) default = '0' : Enable user-mode networking -fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24" # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking -fvp_mps2.hostbridge.userNetPorts="" # (string, init-time) default = '' : Listening ports to expose in user-mode networking -fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : Flash Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : SRAM Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : Flash Watermark supported -fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : SRAM Watermark supported -fvp_mps2.exclusive_monitor_psram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_psram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma0.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma0.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma0.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma0.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma1.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma1.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma1.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma1.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma2.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma2.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma2.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma2.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma3.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma3.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma3.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma3.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.iotss_systemcontrol.cpu0wait=0 # (bool , init-time) default = '0' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_systemcontrol.cpu1wait=1 # (bool , init-time) default = '1' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF # (int , init-time) default = '0xFFFFFFFF' : : [0x0..0xFFFFFFFF] -#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_config.txt deleted file mode 100644 index de6a271..0000000 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMCM33_config.txt +++ /dev/null @@ -1,183 +0,0 @@ -# Parameters: -# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] -#---------------------------------------------------------------------------------------------- -cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support -cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension -cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -cpu0.MPU_S=0x8 # (int , init-time) default = '0x8' : Number of regions in the Secure MPU. If Security Extentions are absent, this is ignored : [0x0..0x10] -cpu0.MPU_NS=0x8 # (int , init-time) default = '0x8' : Number of regions in the Non-Secure MPU. If Security Extentions are absent, this is the total number of MPU regions : [0x0..0x10] -cpu0.ITM=0 # (bool , init-time) default = '1' : Level of instrumentation trace supported. false : No ITM trace included, true: ITM trace included -cpu0.IRQLVL=0x3 # (int , init-time) default = '0x3' : Number of bits of interrupt priority : [0x3..0x8] -cpu0.BIGENDINIT=0 # (bool , init-time) default = '0' : Initialize processor to big endian mode -cpu0.INITSVTOR=0x00000000 # (int , init-time) default = '0x10000000' : Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.INITNSVTOR=0x0 # (int , init-time) default = '0x0' : Non-Secure vector-table offset at reset : [0x0..0xFFFFFF80] -cpu0.SAU=0x0 # (int , init-time) default = '0x4' : Number of SAU regions (0 => no SAU) : [0x0..0x8] -cpu0.SAU_CTRL.ENABLE=0 # (bool , init-time) default = '0' : Enable SAU at reset -cpu0.SAU_CTRL.ALLNS=0 # (bool , init-time) default = '0' : At reset, the SAU treats entire memory space as NS when the SAU is disabled if this is set -cpu0.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -cpu0.LOCK_SAU=0 # (bool , init-time) default = '0' : Lock down of SAU registers write -cpu0.LOCK_S_MPU=0 # (bool , init-time) default = '0' : Lock down of Secure MPU registers write -cpu0.LOCK_NS_MPU=0 # (bool , init-time) default = '0' : Lock down of Non-Secure MPU registers write -cpu0.CPIF=1 # (bool , init-time) default = '1' : Specifies whether the external coprocessor interface is included -cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included -fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic -fvp_mps2.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : -fvp_mps2.SCC_ID.Variant=0x0 # (int , init-time) default = '0x0' : SCC_ID[23:20], X in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.SCC_ID.Revision=0x1 # (int , init-time) default = '0x1' : SCC_ID[3:0], Y in the FGPA version 'rXpY' : [0x0..0xF] -fvp_mps2.platform_type=0x0 # (int , init-time) default = '0x0' : 0:MPS2 ; 1:IoT Kit ; 2:Castor : [0x0..0x2] -fvp_mps2.extra_psram=0 # (bool , init-time) default = '0' : Increases PSRAM to 32Mb -fvp_mps2.UART2.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART2.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART2.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART2.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART2.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART2.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.UART1.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART1.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART1.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART1.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART1.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART1.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.mps2_visualisation.rate_limit-enable=1 # (bool , init-time) default = '1' : Rate limit simulation. -fvp_mps2.mps2_visualisation.disable-visualisation=0 # (bool , init-time) default = '0' : Enable/disable visualisation -fvp_mps2.mps2_visualisation.window_title="CLCD %cpu%" # (string, init-time) default = 'CLCD %cpu%' : Window title (%cpu% is replaced by cpu_name) -fvp_mps2.mps2_visualisation.idler.delay_ms=0x32 # (int , init-time) default = '0x32' : Determines the period, in milliseconds of real time, between gui_callback() calls. -fvp_mps2.telnetterminal0.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal0.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal0.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal0.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal0.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal1.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal1.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal1.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal1.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal1.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.telnetterminal2.mode="telnet" # (string, init-time) default = 'telnet' : Terminal initialisation mode -fvp_mps2.telnetterminal2.start_telnet=1 # (bool , init-time) default = '1' : Start telnet if nothing connected -fvp_mps2.telnetterminal2.start_port=0x1388 # (int , init-time) default = '0x1388' : Telnet TCP Port Number : [0x0..0xFFFFFFFF] -fvp_mps2.telnetterminal2.quiet=0 # (bool , init-time) default = '0' : Avoid output on stdout/stderr -fvp_mps2.telnetterminal2.terminal_command="" # (string, init-time) default = '' : Commandline to launch a terminal application and connect to the opened TCP port. Keywords %port and %title will be replaced with the opened port number and component name respectively. An empty string (default behaviour) will launch xterm (Linux) or telnet.exe (Windows) -fvp_mps2.PSRAM_M7.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM_M7.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM_M7.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.UART0.out_file="" # (string, init-time) default = '' : Output file to hold data written by the UART (use '-' to send all output to stdout) -fvp_mps2.UART0.in_file="" # (string, init-time) default = '' : Input file for data to be read by the UART -fvp_mps2.UART0.unbuffered_output=0 # (bool , init-time) default = '0' : Unbuffered output -fvp_mps2.UART0.in_file_escape_sequence="##" # (string, init-time) default = '##' : Input file escape sequence -fvp_mps2.UART0.shutdown_on_eot=0 # (bool , init-time) default = '0' : Shutdown simulation when a EOT (ASCII 4) char is transmitted (useful for regression tests when semihosting is not available) -fvp_mps2.UART0.shutdown_tag="" # (string, run-time ) default = '' : Shutdown simulation when a string is transmitted -fvp_mps2.cmsdk_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.s32k_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.secure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.nonsecure_watchdog.simhalt=0 # (bool , run-time ) default = '0' : Halt on reset. -fvp_mps2.PSRAM.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.PSRAM.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.PSRAM.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.ssram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.ssram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.stub.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram0.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram0.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram1.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram1.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram2.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram2.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.size=0x100000000 # (int , init-time) default = '0x100000000' : Memory Size -fvp_mps2.iotss_internal_sram3.fill1=0xDFDFDFCF # (int , init-time) default = '0xDFDFDFCF' : Fill pattern 1, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.iotss_internal_sram3.fill2=0xCFDFDFDF # (int , init-time) default = '0xCFDFDFDF' : Fill pattern 2, initialise memory at start of simulation with alternating fill1, fill2 pattern -fvp_mps2.sys_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.sys_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu0dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1core_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1core_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cpu1dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cpu1dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.crypto_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.crypto_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.cordio_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.cordio_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.dbg_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.dbg_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram0_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram0_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram1_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram1_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram2_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram2_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.ram3_ppu.use_active_signal=0 # (bool , init-time) default = '0' : Use device-active signal -fvp_mps2.ram3_ppu.revision="r0p0" # (string, init-time) default = 'r0p0' : Revision -fvp_mps2.smsc_91c111.enabled=0 # (bool , init-time) default = '0' : Host interface connection enabled -fvp_mps2.smsc_91c111.mac_address="00:02:f7:ef:5d:a2" # (string, init-time) default = '00:02:f7:ef:5d:a2' : Host/model MAC address -fvp_mps2.smsc_91c111.promiscuous=1 # (bool , init-time) default = '1' : Put host into promiscuous mode -fvp_mps2.hostbridge.interfaceName="ARM0" # (string, init-time) default = 'ARM0' : Host Interface -fvp_mps2.hostbridge.userNetworking=0 # (bool , init-time) default = '0' : Enable user-mode networking -fvp_mps2.hostbridge.userNetSubnet="172.20.51.0/24" # (string, init-time) default = '172.20.51.0/24' : Virtual subnet for user-mode networking -fvp_mps2.hostbridge.userNetPorts="" # (string, init-time) default = '' : Listening ports to expose in user-mode networking -fvp_mps2.secure_control_register_block.FLASH_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : Flash Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.SRAM_BLOCK_CFG=0x3 # (int , init-time) default = '0x3' : SRAM Block size configuration : [0x0..0x31] -fvp_mps2.secure_control_register_block.FLASH_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : Flash Watermark supported -fvp_mps2.secure_control_register_block.SRAM_WATERMARK_SUPPORTED=1 # (bool , init-time) default = '1' : SRAM Watermark supported -fvp_mps2.exclusive_monitor_psram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_psram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_psram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_psram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_psram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_psram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_psram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram1.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram1.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram1.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram1.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram1.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram1.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram1.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_zbtsram2.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_zbtsram2.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_zbtsram2.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_zbtsram2.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_zbtsram2.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_zbtsram2.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_zbtsram2.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.exclusive_monitor_iotss_internal_sram.enable_component=1 # (bool , init-time) default = '1' : Enable component -fvp_mps2.exclusive_monitor_iotss_internal_sram.number_of_monitors=0x8 # (int , init-time) default = '0x8' : Number of monitors : [0x1..0xFFFFFFFF] -fvp_mps2.exclusive_monitor_iotss_internal_sram.log2_granule_size=0x0 # (int , init-time) default = '0x0' : log2 of address granule size : [0x0..0xB] -fvp_mps2.exclusive_monitor_iotss_internal_sram.monitor_non_excl_stores=0 # (bool , init-time) default = '0' : Monitor non-exclusive stores from the same master -fvp_mps2.exclusive_monitor_iotss_internal_sram.match_secure_state=1 # (bool , init-time) default = '1' : Treat the secure state like an address bit -fvp_mps2.exclusive_monitor_iotss_internal_sram.shareability_domain=0x3 # (int , init-time) default = '0x3' : Maximum shareability domain of interest, transactions outside of the domain will pass through un-monitored (0-non-shared, 1-inner, 2-outer, 3-system) : [0x0..0x3] -fvp_mps2.exclusive_monitor_iotss_internal_sram.apply_access_width_criteria_to_non_excl_stores=1 # (bool , init-time) default = '1' : Apply the given exclusive store width matching criteria to non-exclusive stores -fvp_mps2.dma0_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma0_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma1_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma1_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma2_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma2_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma3_securitymodifier.behaviour_ns_to_s=0x0 # (int , init-time) default = '0x0' : Behaviour for NS transactions to S space : 0:block 1:transmit 2:convert to S -fvp_mps2.dma3_securitymodifier.behaviour_s_to_ns=0x0 # (int , init-time) default = '0x0' : Behaviour for S transactions to NS space : 0:block 1:transmit 2:convert to NS -fvp_mps2.dma0.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma0.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma0.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma0.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma1.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma1.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma1.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma1.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma2.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma2.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma2.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma2.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.dma3.fifo_size=0x10 # (int , init-time) default = '0x10' : Channel FIFO size in bytes -fvp_mps2.dma3.max_transfer=0x100 # (int , init-time) default = '0x100' : Largest atomic transfer -fvp_mps2.dma3.generate_clear=0 # (bool , init-time) default = '0' : Generate clear response -fvp_mps2.dma3.activate_delay=0x0 # (int , init-time) default = '0x0' : request delay -fvp_mps2.iotss_systemcontrol.cpu0wait=0 # (bool , init-time) default = '0' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_systemcontrol.cpu1wait=1 # (bool , init-time) default = '1' : Whether to hold cpu1 in reset at boot -fvp_mps2.iotss_cpuidentity.debugger_master_id=0xFFFFFFFF # (int , init-time) default = '0xFFFFFFFF' : : [0x0..0xFFFFFFFF] -#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MBLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MBLl_config.txt new file mode 100644 index 0000000..d9cb90a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MBLl_config.txt @@ -0,0 +1,11 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLl_config.txt new file mode 100644 index 0000000..9c3cfc2 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLl_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLld_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLld_config.txt new file mode 100644 index 0000000..011260a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLld_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLldfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLldfsp_config.txt new file mode 100644 index 0000000..2a0a82a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLldfsp_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLlfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLlfsp_config.txt new file mode 100644 index 0000000..4140d9b --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/ARMv8MMLlfsp_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx index 48cafe1..79f27f0 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvoptx @@ -101,7 +101,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -138,7 +140,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M0_MDK" -L"armcortexm0ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M0_MDK.exe" -MF"..\cortexM0l_config.txt" -MA"-Q 1" 0 @@ -185,6 +187,10 @@ + + + + @@ -268,7 +274,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -285,7 +293,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M3_MDK" -L"armcortexm3ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M3_MDK.exe" -MF"..\cortexM3l_config.txt" -MA"-Q 1" 0 @@ -332,6 +340,10 @@ + + + + @@ -415,7 +427,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -432,7 +446,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4l_config.txt" -MA"-Q 1" 0 @@ -479,6 +493,10 @@ + + + + @@ -562,7 +580,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -599,7 +619,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M4_MDK" -L"armcortexm4ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M4_MDK.exe" -MF"..\cortexM4lf_config.txt" -MA"-Q 1" 0 @@ -646,6 +666,10 @@ + + + + @@ -729,7 +753,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -766,7 +792,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7l_config.txt" -MA"-Q 1" 0 @@ -813,6 +839,10 @@ + + + + @@ -896,7 +926,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -933,7 +965,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfsp_config.txt" -MA"-Q 1" 0 @@ -980,6 +1012,10 @@ + + + + @@ -1063,7 +1099,9 @@ 0 0 1 - 4 + 0 + 0 + 5 @@ -1080,7 +1118,7 @@ 0 DbgFM - -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF -MA + -I -S"System Generator:FVP_MPS2_Cortex_M7_MDK" -L"armcortexm7ct" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M7_MDK.exe" -MF"..\cortexM7lfdp_config.txt" -MA"-Q 1" 0 @@ -1127,6 +1165,10 @@ + + + + @@ -1210,6 +1252,8 @@ 0 0 1 + 0 + 0 15 @@ -1242,7 +1286,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMCM23_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMv8MBLl_config.txt" -MA"-Q 1" 0 @@ -1289,6 +1333,10 @@ + + + + @@ -1372,6 +1420,8 @@ 0 0 1 + 0 + 0 15 @@ -1389,7 +1439,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLl_config.txt" -MA"-Q 1" 0 @@ -1436,6 +1486,10 @@ + + + + @@ -1519,6 +1573,8 @@ 0 0 1 + 0 + 0 15 @@ -1551,7 +1607,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_FP_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLlfsp_config.txt" -MA"-Q 1" 0 @@ -1598,141 +1654,10 @@ - - - - - ARMv8MMLlfdp.DoNotUse - 0x3 - ARM-GNU - - 12000000 - - 0 - 1 - 1 - 0 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 120 - 65 - 8 - .\IntermediateFiles\ARMv8MMLlfdp\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 0 - 0 - 0 - - 7 - - 1 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 1 - 0 - 0 - 1 - -1 - - - - - - - - - - - - - - - 0 - - - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - 0 - 0 - - - - + + + + @@ -1816,6 +1741,8 @@ 0 0 1 + 0 + 0 15 @@ -1848,7 +1775,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLld_config.txt" -MA"-Q 1" 0 @@ -1895,6 +1822,10 @@ + + + + @@ -1978,6 +1909,8 @@ 0 0 1 + 0 + 0 15 @@ -2010,7 +1943,7 @@ 0 DbgFMv8M - -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMCM33_DSP_FP_config.txt" -MA + -I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M33_MDK.exe" -MF"..\ARMv8MMLldfsp_config.txt" -MA"-Q 1" 0 @@ -2057,141 +1990,10 @@ - - - - - ARMv8MMLldfdp.DoNotUse - 0x3 - ARM-GNU - - 12000000 - - 0 - 1 - 1 - 0 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 120 - 65 - 8 - .\IntermediateFiles\ARMv8MMLldfdp\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 0 - 0 - 0 - - 7 - - 1 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 1 - 0 - 0 - 1 - -1 - - - - - - - - - - - - - - - 0 - - - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - 0 - 0 - - - - + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx index 0b5c53b..7d12245 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/GCC/DspLibTest_FVP.uvprojx @@ -10,11 +10,12 @@ cortexM0l 0x3 ARM-GNU + 0 ARMCM0 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -131,7 +132,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -166,6 +167,7 @@ 0 0 0 + 0 0 0 @@ -238,9 +240,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM0 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -248,7 +250,7 @@ 0 - ARM_MATH_CM0 + ARMCM0 @@ -734,11 +736,12 @@ cortexM3l 0x3 ARM-GNU + 0 ARMCM3 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -855,7 +858,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -890,6 +893,7 @@ 0 0 0 + 0 0 0 @@ -962,9 +966,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM3 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -972,7 +976,7 @@ 0 - ARM_MATH_CM3 + ARMCM3 @@ -1458,11 +1462,12 @@ cortexM4l 0x3 ARM-GNU + 0 ARMCM4 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -1579,7 +1584,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -1614,6 +1619,7 @@ 0 0 0 + 0 0 0 @@ -1686,9 +1692,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM4 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -1696,7 +1702,7 @@ 0 - ARM_MATH_CM4 + ARMCM4 @@ -2182,11 +2188,12 @@ cortexM4lf 0x3 ARM-GNU + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -2303,7 +2310,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -2338,6 +2345,7 @@ 0 0 2 + 0 0 0 @@ -2410,9 +2418,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM4 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2420,7 +2428,7 @@ 0 - ARM_MATH_CM4 + ARMCM4 @@ -2906,11 +2914,12 @@ cortexM7l 0x3 ARM-GNU + 0 ARMCM7 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -3027,7 +3036,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -3062,6 +3071,7 @@ 0 0 0 + 0 0 0 @@ -3134,9 +3144,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM7 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3144,7 +3154,7 @@ 0 - ARM_MATH_CM7 + ARMCM7 @@ -3630,11 +3640,12 @@ cortexM7lfsp 0x3 ARM-GNU + 0 ARMCM7_SP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE @@ -3751,7 +3762,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -3786,6 +3797,7 @@ 0 0 2 + 0 0 0 @@ -3858,9 +3870,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM7 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3868,7 +3880,7 @@ 0 - ARM_MATH_CM7 + ARMCM7 @@ -4354,11 +4366,12 @@ cortexM7lfdp 0x3 ARM-GNU + 0 ARMCM7_DP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE @@ -4475,7 +4488,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -4510,6 +4523,7 @@ 0 0 3 + 0 0 0 @@ -4582,9 +4596,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM7 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -4592,7 +4606,7 @@ 0 - ARM_MATH_CM7 + ARMCM7 @@ -5078,11 +5092,12 @@ ARMv8MBLl 0x3 ARM-GNU + 0 ARMv8MBL ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE @@ -5199,7 +5214,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -5234,6 +5249,7 @@ 0 0 2 + 0 1 1 @@ -5306,9 +5322,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base - ARM_MATH_ARMV8MBL + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -5316,7 +5332,7 @@ 0 - ARM_MATH_ARMV8MBL + ARMv8MBL @@ -5802,11 +5818,12 @@ ARMv8MMLl 0x3 ARM-GNU + 0 ARMv8MML ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE @@ -5923,7 +5940,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -5958,6 +5975,7 @@ 0 0 2 + 0 1 1 @@ -6030,9 +6048,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main - ARM_MATH_ARMV8MML + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6040,7 +6058,7 @@ 0 - ARM_MATH_ARMV8MML + ARMv8MML @@ -6526,11 +6544,12 @@ ARMv8MMLlfsp 0x3 ARM-GNU + 0 ARMv8MML_SP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE @@ -6647,7 +6666,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -6682,6 +6701,7 @@ 0 0 2 + 0 1 1 @@ -6754,9 +6774,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6764,7 +6784,7 @@ 0 - ARM_MATH_ARMV8MML + ARMv8MML @@ -7247,1469 +7267,22 @@ - ARMv8MMLlfdp.DoNotUse - 0x3 - ARM-GNU - - - ARMv8MML_DP - ARM - ARM.CMSIS.5.0.1-dev6 - http://www.keil.com/pack/ - IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE - - - UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000) - 0 - $$Device:ARMv8MML_DP$Device\ARM\ARMv8MML\Include\ARMv8MML_DP.h - - - - - - - - - - $$Device:ARMv8MML_DP$Device\ARM\SVD\ARMv8MML.svd - 0 - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\IntermediateFiles\ARMv8MMLlfdp\ - DspLibTest_FVP - 1 - 0 - 0 - 1 - 1 - .\IntermediateFiles\ARMv8MMLlfdp\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 1 - - - - - - - SARMV8M.DLL - -MPU - TCM.DLL - -pV8MML - - - - 1 - 0 - 0 - 0 - 16 - - - - - 1 - 0 - 0 - 1 - 1 - 4096 - - 1 - BIN\UL2V8M.DLL - - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "ARMV8MML" - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 3 - 1 - 1 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x20000 - - - 1 - 0x0 - 0x200000 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20200000 - 0x20000 - - - 1 - 0x200000 - 0x200000 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 2 - 1 - - -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML __FPU_PRESENT=1U - - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests - - - - 0 - 0 - - - ARM_MATH_ARMV8MML - - - - - - 1 - 0 - 0 - 0 - 1 - - - - arm_math -larm_ref - .\Lib - -Wl,--gc-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard - ..\..\Common\platform\GCC\ARMCMx.ld - - - - - - Libraries - - - Startup - - - main.c - 1 - ..\..\Common\src\main.c - - - system_generic.c - 1 - ..\..\Common\platform\system_generic.c - - - startup_generic.S - 1 - ..\..\Common\platform\startup_generic.S - - - - - JTest - - - jtest_cycle.c - 1 - ..\..\Common\JTest\src\jtest_cycle.c - - - jtest_fw.c - 1 - ..\..\Common\JTest\src\jtest_fw.c - - - jtest_dump_str_segments.c - 1 - ..\..\Common\JTest\src\jtest_dump_str_segments.c - - - jtest_trigger_action.c - 1 - ..\..\Common\JTest\src\jtest_trigger_action.c - - - - - AllTests - - - all_tests.c - 1 - ..\..\Common\src\all_tests.c - - - - - Transform - - - cfft_tests.c - 1 - ..\..\Common\src\transform_tests\cfft_tests.c - - - transform_test_group.c - 1 - ..\..\Common\src\transform_tests\transform_test_group.c - - - transform_tests_common_data.c - 1 - ..\..\Common\src\transform_tests\transform_tests_common_data.c - - - cfft_family_tests.c - 1 - ..\..\Common\src\transform_tests\cfft_family_tests.c - - - rfft_tests.c - 1 - ..\..\Common\src\transform_tests\rfft_tests.c - - - rfft_fast_tests.c - 1 - ..\..\Common\src\transform_tests\rfft_fast_tests.c - - - dct4_tests.c - 1 - ..\..\Common\src\transform_tests\dct4_tests.c - - - - - BasicMath - - - basic_math_test_common_data.c - 1 - ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c - - - abs_tests.c - 1 - ..\..\Common\src\basic_math_tests\abs_tests.c - - - basic_math_test_group.c - 1 - ..\..\Common\src\basic_math_tests\basic_math_test_group.c - - - negate_tests.c - 1 - ..\..\Common\src\basic_math_tests\negate_tests.c - - - add_tests.c - 1 - ..\..\Common\src\basic_math_tests\add_tests.c - - - mult_tests.c - 1 - ..\..\Common\src\basic_math_tests\mult_tests.c - - - sub_tests.c - 1 - ..\..\Common\src\basic_math_tests\sub_tests.c - - - dot_prod_tests.c - 1 - ..\..\Common\src\basic_math_tests\dot_prod_tests.c - - - offset_tests.c - 1 - ..\..\Common\src\basic_math_tests\offset_tests.c - - - shift_tests.c - 1 - ..\..\Common\src\basic_math_tests\shift_tests.c - - - scale_tests.c - 1 - ..\..\Common\src\basic_math_tests\scale_tests.c - - - - - ComplexMath - - - complex_math_test_group.c - 1 - ..\..\Common\src\complex_math_tests\complex_math_test_group.c - - - complex_math_test_common_data.c - 1 - ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c - - - cmplx_conj_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c - - - cmplx_mag_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c - - - cmplx_mag_squared_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c - - - cmplx_dot_prod_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c - - - cmplx_mult_cmplx_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c - - - cmplx_mult_real_test.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c - - - - - Controller - - - controller_test_group.c - 1 - ..\..\Common\src\controller_tests\controller_test_group.c - - - pid_reset_tests.c - 1 - ..\..\Common\src\controller_tests\pid_reset_tests.c - - - sin_cos_tests.c - 1 - ..\..\Common\src\controller_tests\sin_cos_tests.c - - - pid_tests.c - 1 - ..\..\Common\src\controller_tests\pid_tests.c - - - controller_test_common_data.c - 1 - ..\..\Common\src\controller_tests\controller_test_common_data.c - - - - - FastMath - - - fast_math_tests.c - 1 - ..\..\Common\src\fast_math_tests\fast_math_tests.c - - - fast_math_tests_common_data.c - 1 - ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c - - - - - Filtering - - - filtering_test_common_data.c - 1 - ..\..\Common\src\filtering_tests\filtering_test_common_data.c - - - filtering_test_group.c - 1 - ..\..\Common\src\filtering_tests\filtering_test_group.c - - - biquad_tests.c - 1 - ..\..\Common\src\filtering_tests\biquad_tests.c - - - conv_tests.c - 1 - ..\..\Common\src\filtering_tests\conv_tests.c - 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- - mat_init_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_init_tests.c - - - mat_scale_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_scale_tests.c - - - - - Statistics - - - max_tests.c - 1 - ..\..\Common\src\statistics_tests\max_tests.c - - - statistics_test_common_data.c - 1 - ..\..\Common\src\statistics_tests\statistics_test_common_data.c - - - statistics_test_group.c - 1 - ..\..\Common\src\statistics_tests\statistics_test_group.c - - - mean_tests.c - 1 - ..\..\Common\src\statistics_tests\mean_tests.c - - - min_tests.c - 1 - ..\..\Common\src\statistics_tests\min_tests.c - - - power_tests.c - 1 - ..\..\Common\src\statistics_tests\power_tests.c - - - rms_tests.c - 1 - ..\..\Common\src\statistics_tests\rms_tests.c - - - std_tests.c - 1 - ..\..\Common\src\statistics_tests\std_tests.c - - - var_tests.c - 1 - ..\..\Common\src\statistics_tests\var_tests.c - - - - - Support - - - copy_tests.c - 1 - ..\..\Common\src\support_tests\copy_tests.c - - - support_test_common_data.c - 1 - ..\..\Common\src\support_tests\support_test_common_data.c - - - support_test_group.c - 1 - ..\..\Common\src\support_tests\support_test_group.c - - - fill_tests.c - 1 - ..\..\Common\src\support_tests\fill_tests.c - - - x_to_y_tests.c - 1 - ..\..\Common\src\support_tests\x_to_y_tests.c - - - - - Intrinsics - - - intrinsics_tests.c - 1 - ..\..\Common\src\intrinsics_tests\intrinsics_tests.c - - - intrinsics_tests_common_data.c - 1 - ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c - - - - - MathHelper - - - math_helper.c - 1 - ..\..\Common\src\math_helper.c - - - - - - - ARMv8MMLld - 0x3 - ARM-GNU - - - ARMv8MML_DSP - ARM - ARM.CMSIS.5.0.1-dev6 - http://www.keil.com/pack/ - IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE - - - UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000) - 0 - $$Device:ARMv8MML_DSP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP.h - - - - - - - - - - $$Device:ARMv8MML_DSP$Device\ARM\SVD\ARMv8MML.svd - 0 - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\IntermediateFiles\ARMv8MMLld\ - DspLibTest_FVP - 1 - 0 - 0 - 1 - 1 - .\IntermediateFiles\ARMv8MMLld\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 1 - - - - - - - SARMV8M.DLL - -MPU - TCM.DLL - -pV8MML - - - - 1 - 0 - 0 - 0 - 16 - - - - - 1 - 0 - 0 - 1 - 1 - 4096 - - 1 - BIN\UL2V8M.DLL - - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - "ARMV8MML" - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 2 - 1 - 1 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x20000 - - - 1 - 0x0 - 0x200000 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20200000 - 0x20000 - - - 1 - 0x200000 - 0x200000 - - - - - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 2 - 1 - - -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp - ARM_MATH_ARMV8MML __DSP_PRESENT=1U - - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests - - - - 0 - 0 - - - ARM_MATH_ARMV8MML - - - - - - 1 - 0 - 0 - 0 - 1 - - - - arm_math -larm_ref - .\Lib - -Wl,--gc-sections -march=armv8-m.main+dsp - ..\..\Common\platform\GCC\ARMCMx.ld - - - - - - Libraries - - - Startup - - - main.c - 1 - ..\..\Common\src\main.c - - - system_generic.c - 1 - ..\..\Common\platform\system_generic.c - - - startup_generic.S - 1 - ..\..\Common\platform\startup_generic.S - - - - - JTest - - - jtest_cycle.c - 1 - ..\..\Common\JTest\src\jtest_cycle.c - - - jtest_fw.c - 1 - ..\..\Common\JTest\src\jtest_fw.c - - - jtest_dump_str_segments.c - 1 - ..\..\Common\JTest\src\jtest_dump_str_segments.c - - - jtest_trigger_action.c - 1 - ..\..\Common\JTest\src\jtest_trigger_action.c - - - - - AllTests - - - all_tests.c - 1 - ..\..\Common\src\all_tests.c - - - - - Transform - - - cfft_tests.c - 1 - ..\..\Common\src\transform_tests\cfft_tests.c - - - transform_test_group.c - 1 - ..\..\Common\src\transform_tests\transform_test_group.c - - - transform_tests_common_data.c - 1 - ..\..\Common\src\transform_tests\transform_tests_common_data.c - - - cfft_family_tests.c - 1 - ..\..\Common\src\transform_tests\cfft_family_tests.c - - - rfft_tests.c - 1 - ..\..\Common\src\transform_tests\rfft_tests.c - - - rfft_fast_tests.c - 1 - ..\..\Common\src\transform_tests\rfft_fast_tests.c - - - dct4_tests.c - 1 - ..\..\Common\src\transform_tests\dct4_tests.c - - - - - BasicMath - - - basic_math_test_common_data.c - 1 - ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c - - - abs_tests.c - 1 - ..\..\Common\src\basic_math_tests\abs_tests.c - - - basic_math_test_group.c - 1 - ..\..\Common\src\basic_math_tests\basic_math_test_group.c - - - negate_tests.c - 1 - ..\..\Common\src\basic_math_tests\negate_tests.c - - - add_tests.c - 1 - ..\..\Common\src\basic_math_tests\add_tests.c - - - mult_tests.c - 1 - ..\..\Common\src\basic_math_tests\mult_tests.c - - - sub_tests.c - 1 - ..\..\Common\src\basic_math_tests\sub_tests.c - - - dot_prod_tests.c - 1 - ..\..\Common\src\basic_math_tests\dot_prod_tests.c - - - offset_tests.c - 1 - ..\..\Common\src\basic_math_tests\offset_tests.c - - - shift_tests.c - 1 - ..\..\Common\src\basic_math_tests\shift_tests.c - - - scale_tests.c - 1 - ..\..\Common\src\basic_math_tests\scale_tests.c - - - - - ComplexMath - - - complex_math_test_group.c - 1 - ..\..\Common\src\complex_math_tests\complex_math_test_group.c - - - complex_math_test_common_data.c - 1 - ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c - - - cmplx_conj_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c - - - cmplx_mag_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c - - - cmplx_mag_squared_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c - - - cmplx_dot_prod_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c - - - cmplx_mult_cmplx_tests.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c - - - cmplx_mult_real_test.c - 1 - ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c - - - - - Controller - - - controller_test_group.c - 1 - ..\..\Common\src\controller_tests\controller_test_group.c - - - pid_reset_tests.c - 1 - ..\..\Common\src\controller_tests\pid_reset_tests.c - - - sin_cos_tests.c - 1 - ..\..\Common\src\controller_tests\sin_cos_tests.c - - - pid_tests.c - 1 - ..\..\Common\src\controller_tests\pid_tests.c - - - controller_test_common_data.c - 1 - ..\..\Common\src\controller_tests\controller_test_common_data.c - - - - - FastMath - - - fast_math_tests.c - 1 - ..\..\Common\src\fast_math_tests\fast_math_tests.c - - - fast_math_tests_common_data.c - 1 - ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c - - - - - Filtering - - - filtering_test_common_data.c - 1 - ..\..\Common\src\filtering_tests\filtering_test_common_data.c - - - filtering_test_group.c - 1 - ..\..\Common\src\filtering_tests\filtering_test_group.c - - - biquad_tests.c - 1 - ..\..\Common\src\filtering_tests\biquad_tests.c - - - conv_tests.c - 1 - ..\..\Common\src\filtering_tests\conv_tests.c - - - correlate_tests.c - 1 - ..\..\Common\src\filtering_tests\correlate_tests.c - - - fir_tests.c - 1 - ..\..\Common\src\filtering_tests\fir_tests.c - - - iir_tests.c - 1 - ..\..\Common\src\filtering_tests\iir_tests.c - - - lms_tests.c - 1 - ..\..\Common\src\filtering_tests\lms_tests.c - - - - - Matrix - - - matrix_test_common_data.c - 1 - ..\..\Common\src\matrix_tests\matrix_test_common_data.c - - - matrix_test_group.c - 1 - ..\..\Common\src\matrix_tests\matrix_test_group.c - - - mat_cmplx_mult_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c - - - mat_add_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_add_tests.c - - - mat_mult_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_mult_tests.c - - - mat_mult_fast_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c - - - mat_sub_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_sub_tests.c - - - mat_inverse_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_inverse_tests.c - - - mat_trans_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_trans_tests.c - - - mat_init_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_init_tests.c - - - mat_scale_tests.c - 1 - ..\..\Common\src\matrix_tests\mat_scale_tests.c - - - - - Statistics - - - max_tests.c - 1 - ..\..\Common\src\statistics_tests\max_tests.c - - - statistics_test_common_data.c - 1 - ..\..\Common\src\statistics_tests\statistics_test_common_data.c - - - statistics_test_group.c - 1 - ..\..\Common\src\statistics_tests\statistics_test_group.c - - - mean_tests.c - 1 - ..\..\Common\src\statistics_tests\mean_tests.c - - - min_tests.c - 1 - ..\..\Common\src\statistics_tests\min_tests.c - - - power_tests.c - 1 - ..\..\Common\src\statistics_tests\power_tests.c - - - rms_tests.c - 1 - ..\..\Common\src\statistics_tests\rms_tests.c - - - std_tests.c - 1 - ..\..\Common\src\statistics_tests\std_tests.c - - - var_tests.c - 1 - ..\..\Common\src\statistics_tests\var_tests.c - - - - - Support - - - copy_tests.c - 1 - ..\..\Common\src\support_tests\copy_tests.c - - - support_test_common_data.c - 1 - ..\..\Common\src\support_tests\support_test_common_data.c - - - support_test_group.c - 1 - ..\..\Common\src\support_tests\support_test_group.c - - - fill_tests.c - 1 - ..\..\Common\src\support_tests\fill_tests.c - - - x_to_y_tests.c - 1 - ..\..\Common\src\support_tests\x_to_y_tests.c - - - - - Intrinsics - - - intrinsics_tests.c - 1 - ..\..\Common\src\intrinsics_tests\intrinsics_tests.c - - - intrinsics_tests_common_data.c - 1 - ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c - - - - - MathHelper - - - math_helper.c - 1 - ..\..\Common\src\math_helper.c - - - - - - - ARMv8MMLldfsp + ARMv8MMLld 0x3 ARM-GNU + 0 - ARMv8MML_DSP_SP + ARMv8MML_DSP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ - IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE + IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000) 0 - $$Device:ARMv8MML_DSP_SP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP_SP.h + $$Device:ARMv8MML_DSP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP.h @@ -8719,7 +7292,7 @@ - $$Device:ARMv8MML_DSP_SP$Device\ARM\SVD\ARMv8MML.svd + $$Device:ARMv8MML_DSP$Device\ARM\SVD\ARMv8MML.svd 0 0 @@ -8734,14 +7307,14 @@ 0 1 - .\IntermediateFiles\ARMv8MMLldfsp\ + .\IntermediateFiles\ARMv8MMLld\ DspLibTest_FVP 1 0 0 1 1 - .\IntermediateFiles\ARMv8MMLldfsp\ + .\IntermediateFiles\ARMv8MMLld\ 1 0 0 @@ -8819,7 +7392,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -8854,6 +7427,7 @@ 0 0 2 + 0 1 1 @@ -8925,10 +7499,10 @@ 2 1 - -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U + -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -8936,7 +7510,7 @@ 0 - ARM_MATH_ARMV8MML + ARMv8MML @@ -8952,7 +7526,7 @@ arm_math -larm_ref .\Lib - -Wl,--gc-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard + -Wl,--gc-sections -march=armv8-m.main+dsp ..\..\Common\platform\GCC\ARMCMx.ld @@ -9419,21 +7993,22 @@ - ARMv8MMLldfdp.DoNotUse + ARMv8MMLldfsp 0x3 ARM-GNU + 0 - ARMv8MML_DSP_DP + ARMv8MML_DSP_SP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ - IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE + IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000) 0 - $$Device:ARMv8MML_DSP_DP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP_DP.h + $$Device:ARMv8MML_DSP_SP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP_SP.h @@ -9443,7 +8018,7 @@ - $$Device:ARMv8MML_DSP_DP$Device\ARM\SVD\ARMv8MML.svd + $$Device:ARMv8MML_DSP_SP$Device\ARM\SVD\ARMv8MML.svd 0 0 @@ -9458,14 +8033,14 @@ 0 1 - .\IntermediateFiles\ARMv8MMLldfdp\ + .\IntermediateFiles\ARMv8MMLldfsp\ DspLibTest_FVP 1 0 0 1 1 - .\IntermediateFiles\ARMv8MMLldfdp\ + .\IntermediateFiles\ARMv8MMLldfsp\ 1 0 0 @@ -9543,7 +8118,7 @@ 0 0 1 - 1 + 0 4096 1 @@ -9577,7 +8152,8 @@ 1 0 0 - 3 + 2 + 0 1 1 @@ -9649,10 +8225,10 @@ 2 1 - -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U + -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -9660,7 +8236,7 @@ 0 - ARM_MATH_ARMV8MML + ARMv8MML @@ -9676,7 +8252,7 @@ arm_math -larm_ref .\Lib - -Wl,--gc-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard + -Wl,--gc-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard ..\..\Common\platform\GCC\ARMCMx.ld diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM0l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM0l_config.txt new file mode 100644 index 0000000..8e33c76 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM0l_config.txt @@ -0,0 +1,8 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm0ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm0ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm0ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM3l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM3l_config.txt new file mode 100644 index 0000000..2caf254 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM3l_config.txt @@ -0,0 +1,8 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm3ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm3ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm3ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4l_config.txt new file mode 100644 index 0000000..1c9fece --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4l_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm4ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4lf_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4lf_config.txt new file mode 100644 index 0000000..eb832ed --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM4lf_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7l_config.txt new file mode 100644 index 0000000..4e591c9 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7l_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfdp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfdp_config.txt new file mode 100644 index 0000000..1888d60 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfdp_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfsp_config.txt new file mode 100644 index 0000000..1888d60 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP/cortexM7lfsp_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.cproject b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.cproject new file mode 100644 index 0000000..58d2bf0 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.cproject @@ -0,0 +1,273 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.gitignore new file mode 100644 index 0000000..3df573f --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.gitignore @@ -0,0 +1 @@ +/Debug/ diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.project b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.project new file mode 100644 index 0000000..6212766 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.project @@ -0,0 +1,148 @@ + + + DspLibTest_FVP_A5 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.arm.cmsis.pack.project.RteNature + + + + Includes/DSP_includes + 2 + PARENT-2-PROJECT_LOC/Include + + + Includes/common_includes + 2 + PARENT-1-PROJECT_LOC/Common/inc + + + Includes/jtest_includes + 2 + PARENT-1-PROJECT_LOC/Common/JTest/inc + + + Includes/reflibs_includes + 2 + PARENT-1-PROJECT_LOC/RefLibs/inc + + + Sources/DSP_src + 2 + PARENT-2-PROJECT_LOC/Source + + + Sources/jtest_src + 2 + PARENT-1-PROJECT_LOC/Common/JTest/src + + + Sources/reflibs_src + 2 + PARENT-1-PROJECT_LOC/RefLibs/src + + + Sources/test_src + 2 + PARENT-1-PROJECT_LOC/Common/src + + + RTE/CMSIS/irq_ca.S + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S + + + RTE/CMSIS/rtx_delay.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_delay.c + + + RTE/CMSIS/rtx_evflags.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_evflags.c + + + RTE/CMSIS/rtx_evr.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_evr.c + + + RTE/CMSIS/rtx_kernel.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_kernel.c + + + RTE/CMSIS/rtx_lib.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_lib.c + + + RTE/CMSIS/rtx_memory.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_memory.c + + + RTE/CMSIS/rtx_mempool.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_mempool.c + + + RTE/CMSIS/rtx_msgqueue.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c + + + RTE/CMSIS/rtx_mutex.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_mutex.c + + + RTE/CMSIS/rtx_semaphore.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_semaphore.c + + + RTE/CMSIS/rtx_system.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_system.c + + + RTE/CMSIS/rtx_thread.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_thread.c + + + RTE/CMSIS/rtx_timer.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/RTX/Source/rtx_timer.c + + + RTE/Device/ARMCA5/irq_ctrl_gic.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/Core_A/Source/irq_ctrl_gic.c + + + RTE/Device/ARMCA5/os_tick_ptim.c + 1 + $%7Bcmsis_pack_root%7D/ARM/CMSIS/5.5.1/CMSIS/RTOS2/Source/os_tick_ptim.c + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/language.settings.xml b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/language.settings.xml new file mode 100644 index 0000000..e70059d --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/language.settings.xml @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/org.eclipse.ltk.core.refactoring.prefs b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/org.eclipse.ltk.core.refactoring.prefs new file mode 100644 index 0000000..b196c64 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/.settings/org.eclipse.ltk.core.refactoring.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +org.eclipse.ltk.core.refactoring.enable.project.refactoring.history=false diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.launch b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.launch new file mode 100644 index 0000000..58e8a9f --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.launch @@ -0,0 +1,179 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.rteconfig b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.rteconfig new file mode 100644 index 0000000..00e2637 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/DspLibTest_FVP_A5.rteconfig @@ -0,0 +1,83 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.c new file mode 100644 index 0000000..da85ffe --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.c @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2013-2017 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * ----------------------------------------------------------------------------- + * + * $Revision: V5.1.0 + * + * Project: CMSIS-RTOS RTX + * Title: RTX Configuration + * + * ----------------------------------------------------------------------------- + */ + +#include "cmsis_compiler.h" +#include "rtx_os.h" + +// OS Idle Thread +__WEAK __NO_RETURN void osRtxIdleThread (void *argument) { + (void)argument; + + for (;;) {} +} + +// OS Error Callback function +__WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) { + (void)object_id; + + switch (code) { + case osRtxErrorStackUnderflow: + // Stack underflow detected for thread (thread_id=object_id) + break; + case osRtxErrorISRQueueOverflow: + // ISR Queue overflow detected when inserting object (object_id) + break; + case osRtxErrorTimerQueueOverflow: + // User Timer Callback Queue overflow detected for timer (timer_id=object_id) + break; + case osRtxErrorClibSpace: + // Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM + break; + case osRtxErrorClibMutex: + // Standard C/C++ library mutex initialization failed + break; + default: + break; + } + for (;;) {} +return 0U; +} diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.h new file mode 100644 index 0000000..f567411 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/RTX_Config.h @@ -0,0 +1,578 @@ +/* + * Copyright (c) 2013-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * ----------------------------------------------------------------------------- + * + * $Revision: V5.5.0 + * + * Project: CMSIS-RTOS RTX + * Title: RTX Configuration definitions + * + * ----------------------------------------------------------------------------- + */ + +#ifndef RTX_CONFIG_H_ +#define RTX_CONFIG_H_ + +#ifdef _RTE_ +#include "RTE_Components.h" +#ifdef RTE_RTX_CONFIG_H +#include RTE_RTX_CONFIG_H +#endif +#endif + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// System Configuration +// ======================= + +// Global Dynamic Memory size [bytes] <0-1073741824:8> +// Defines the combined global dynamic memory size. +// Default: 4096 +#ifndef OS_DYNAMIC_MEM_SIZE +#define OS_DYNAMIC_MEM_SIZE 4096 +#endif + +// Kernel Tick Frequency [Hz] <1-1000000> +// Defines base time unit for delays and timeouts. +// Default: 1000 (1ms tick) +#ifndef OS_TICK_FREQ +#define OS_TICK_FREQ 1000 +#endif + +// Round-Robin Thread switching +// Enables Round-Robin Thread switching. +#ifndef OS_ROBIN_ENABLE +#define OS_ROBIN_ENABLE 1 +#endif + +// Round-Robin Timeout <1-1000> +// Defines how many ticks a thread will execute before a thread switch. +// Default: 5 +#ifndef OS_ROBIN_TIMEOUT +#define OS_ROBIN_TIMEOUT 5 +#endif + +// + +// ISR FIFO Queue +// <4=> 4 entries <8=> 8 entries <12=> 12 entries <16=> 16 entries +// <24=> 24 entries <32=> 32 entries <48=> 48 entries <64=> 64 entries +// <96=> 96 entries <128=> 128 entries <196=> 196 entries <256=> 256 entries +// RTOS Functions called from ISR store requests to this buffer. +// Default: 16 entries +#ifndef OS_ISR_FIFO_QUEUE +#define OS_ISR_FIFO_QUEUE 16 +#endif + +// Object Memory usage counters +// Enables object memory usage counters (requires RTX source variant). +#ifndef OS_OBJ_MEM_USAGE +#define OS_OBJ_MEM_USAGE 0 +#endif + +// + +// Thread Configuration +// ======================= + +// Object specific Memory allocation +// Enables object specific memory allocation. +#ifndef OS_THREAD_OBJ_MEM +#define OS_THREAD_OBJ_MEM 0 +#endif + +// Number of user Threads <1-1000> +// Defines maximum number of user threads that can be active at the same time. +// Applies to user threads with system provided memory for control blocks. +#ifndef OS_THREAD_NUM +#define OS_THREAD_NUM 1 +#endif + +// Number of user Threads with default Stack size <0-1000> +// Defines maximum number of user threads with default stack size. +// Applies to user threads with zero stack size specified. +#ifndef OS_THREAD_DEF_STACK_NUM +#define OS_THREAD_DEF_STACK_NUM 0 +#endif + +// Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8> +// Defines the combined stack size for user threads with user-provided stack size. +// Applies to user threads with user-provided stack size and system provided memory for stack. +// Default: 0 +#ifndef OS_THREAD_USER_STACK_SIZE +#define OS_THREAD_USER_STACK_SIZE 0 +#endif + +// + +// Default Thread Stack size [bytes] <96-1073741824:8> +// Defines stack size for threads with zero stack size specified. +// Default: 256 +#ifndef OS_STACK_SIZE +#define OS_STACK_SIZE 512 +#endif + +// Idle Thread Stack size [bytes] <72-1073741824:8> +// Defines stack size for Idle thread. +// Default: 256 +#ifndef OS_IDLE_THREAD_STACK_SIZE +#define OS_IDLE_THREAD_STACK_SIZE 512 +#endif + +// Idle Thread TrustZone Module Identifier +// Defines TrustZone Thread Context Management Identifier. +// Applies only to cores with TrustZone technology. +// Default: 0 (not used) +#ifndef OS_IDLE_THREAD_TZ_MOD_ID +#define OS_IDLE_THREAD_TZ_MOD_ID 0 +#endif + +// Stack overrun checking +// Enables stack overrun check at thread switch. +// Enabling this option increases slightly the execution time of a thread switch. +#ifndef OS_STACK_CHECK +#define OS_STACK_CHECK 1 +#endif + +// Stack usage watermark +// Initializes thread stack with watermark pattern for analyzing stack usage. +// Enabling this option increases significantly the execution time of thread creation. +#ifndef OS_STACK_WATERMARK +#define OS_STACK_WATERMARK 0 +#endif + +// Processor mode for Thread execution +// <0=> Unprivileged mode +// <1=> Privileged mode +// Default: Privileged mode +#ifndef OS_PRIVILEGE_MODE +#define OS_PRIVILEGE_MODE 1 +#endif + +// + +// Timer Configuration +// ====================== + +// Object specific Memory allocation +// Enables object specific memory allocation. +#ifndef OS_TIMER_OBJ_MEM +#define OS_TIMER_OBJ_MEM 0 +#endif + +// Number of Timer objects <1-1000> +// Defines maximum number of objects that can be active at the same time. +// Applies to objects with system provided memory for control blocks. +#ifndef OS_TIMER_NUM +#define OS_TIMER_NUM 1 +#endif + +// + +// Timer Thread Priority +// <8=> Low +// <16=> Below Normal <24=> Normal <32=> Above Normal +// <40=> High +// <48=> Realtime +// Defines priority for timer thread +// Default: High +#ifndef OS_TIMER_THREAD_PRIO +#define OS_TIMER_THREAD_PRIO 40 +#endif + +// Timer Thread Stack size [bytes] <0-1073741824:8> +// Defines stack size for Timer thread. +// May be set to 0 when timers are not used. +// Default: 256 +#ifndef OS_TIMER_THREAD_STACK_SIZE +#define OS_TIMER_THREAD_STACK_SIZE 256 +#endif + +// Timer Thread TrustZone Module Identifier +// Defines TrustZone Thread Context Management Identifier. +// Applies only to cores with TrustZone technology. +// Default: 0 (not used) +#ifndef OS_TIMER_THREAD_TZ_MOD_ID +#define OS_TIMER_THREAD_TZ_MOD_ID 0 +#endif + +// Timer Callback Queue entries <0-256> +// Number of concurrent active timer callback functions. +// May be set to 0 when timers are not used. +// Default: 4 +#ifndef OS_TIMER_CB_QUEUE +#define OS_TIMER_CB_QUEUE 4 +#endif + +// + +// Event Flags Configuration +// ============================ + +// Object specific Memory allocation +// Enables object specific memory allocation. +#ifndef OS_EVFLAGS_OBJ_MEM +#define OS_EVFLAGS_OBJ_MEM 0 +#endif + +// Number of Event Flags objects <1-1000> +// Defines maximum number of objects that can be active at the same time. +// Applies to objects with system provided memory for control blocks. +#ifndef OS_EVFLAGS_NUM +#define OS_EVFLAGS_NUM 1 +#endif + +// + +// + +// Mutex Configuration +// ====================== + +// Object specific Memory allocation +// Enables object specific memory allocation. +#ifndef OS_MUTEX_OBJ_MEM +#define OS_MUTEX_OBJ_MEM 0 +#endif + +// Number of Mutex objects <1-1000> +// Defines maximum number of objects that can be active at the same time. +// Applies to objects with system provided memory for control blocks. +#ifndef OS_MUTEX_NUM +#define OS_MUTEX_NUM 1 +#endif + +// + +// + +// Semaphore Configuration +// ========================== + +// Object specific Memory allocation +// Enables object specific memory allocation. +#ifndef OS_SEMAPHORE_OBJ_MEM +#define OS_SEMAPHORE_OBJ_MEM 0 +#endif + +// Number of Semaphore objects <1-1000> +// Defines maximum number of objects that can be active at the same time. +// Applies to objects with system provided memory for control blocks. +#ifndef OS_SEMAPHORE_NUM +#define OS_SEMAPHORE_NUM 1 +#endif + +// + +// + +// Memory Pool Configuration +// ============================ + +// Object specific Memory allocation +// Enables object specific memory allocation. +#ifndef OS_MEMPOOL_OBJ_MEM +#define OS_MEMPOOL_OBJ_MEM 0 +#endif + +// Number of Memory Pool objects <1-1000> +// Defines maximum number of objects that can be active at the same time. +// Applies to objects with system provided memory for control blocks. +#ifndef OS_MEMPOOL_NUM +#define OS_MEMPOOL_NUM 1 +#endif + +// Data Storage Memory size [bytes] <0-1073741824:8> +// Defines the combined data storage memory size. +// Applies to objects with system provided memory for data storage. +// Default: 0 +#ifndef OS_MEMPOOL_DATA_SIZE +#define OS_MEMPOOL_DATA_SIZE 0 +#endif + +// + +// + +// Message Queue Configuration +// ============================== + +// Object specific Memory allocation +// Enables object specific memory allocation. +#ifndef OS_MSGQUEUE_OBJ_MEM +#define OS_MSGQUEUE_OBJ_MEM 0 +#endif + +// Number of Message Queue objects <1-1000> +// Defines maximum number of objects that can be active at the same time. +// Applies to objects with system provided memory for control blocks. +#ifndef OS_MSGQUEUE_NUM +#define OS_MSGQUEUE_NUM 1 +#endif + +// Data Storage Memory size [bytes] <0-1073741824:8> +// Defines the combined data storage memory size. +// Applies to objects with system provided memory for data storage. +// Default: 0 +#ifndef OS_MSGQUEUE_DATA_SIZE +#define OS_MSGQUEUE_DATA_SIZE 0 +#endif + +// + +// + +// Event Recorder Configuration +// =============================== + +// Global Initialization +// Initialize Event Recorder during 'osKernelInitialize'. +#ifndef OS_EVR_INIT +#define OS_EVR_INIT 0 +#endif + +// Start recording +// Start event recording after initialization. +#ifndef OS_EVR_START +#define OS_EVR_START 1 +#endif + +// Global Event Filter Setup +// Initial recording level applied to all components. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_LEVEL +#define OS_EVR_LEVEL 0x00U +#endif + +// RTOS Event Filter Setup +// Recording levels for RTX components. +// Only applicable if events for the respective component are generated. + +// Memory Management +// Recording level for Memory Management events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_MEMORY_LEVEL +#define OS_EVR_MEMORY_LEVEL 0x01U +#endif + +// Kernel +// Recording level for Kernel events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_KERNEL_LEVEL +#define OS_EVR_KERNEL_LEVEL 0x01U +#endif + +// Thread +// Recording level for Thread events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_THREAD_LEVEL +#define OS_EVR_THREAD_LEVEL 0x05U +#endif + +// Generic Wait +// Recording level for Generic Wait events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_WAIT_LEVEL +#define OS_EVR_WAIT_LEVEL 0x01U +#endif + +// Thread Flags +// Recording level for Thread Flags events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_THFLAGS_LEVEL +#define OS_EVR_THFLAGS_LEVEL 0x01U +#endif + +// Event Flags +// Recording level for Event Flags events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_EVFLAGS_LEVEL +#define OS_EVR_EVFLAGS_LEVEL 0x01U +#endif + +// Timer +// Recording level for Timer events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_TIMER_LEVEL +#define OS_EVR_TIMER_LEVEL 0x01U +#endif + +// Mutex +// Recording level for Mutex events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_MUTEX_LEVEL +#define OS_EVR_MUTEX_LEVEL 0x01U +#endif + +// Semaphore +// Recording level for Semaphore events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_SEMAPHORE_LEVEL +#define OS_EVR_SEMAPHORE_LEVEL 0x01U +#endif + +// Memory Pool +// Recording level for Memory Pool events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_MEMPOOL_LEVEL +#define OS_EVR_MEMPOOL_LEVEL 0x01U +#endif + +// Message Queue +// Recording level for Message Queue events. +// Error events +// API function call events +// Operation events +// Detailed operation events +// +#ifndef OS_EVR_MSGQUEUE_LEVEL +#define OS_EVR_MSGQUEUE_LEVEL 0x01U +#endif + +// + +// + +// RTOS Event Generation +// Enables event generation for RTX components (requires RTX source variant). + +// Memory Management +// Enables Memory Management event generation. +#ifndef OS_EVR_MEMORY +#define OS_EVR_MEMORY 1 +#endif + +// Kernel +// Enables Kernel event generation. +#ifndef OS_EVR_KERNEL +#define OS_EVR_KERNEL 1 +#endif + +// Thread +// Enables Thread event generation. +#ifndef OS_EVR_THREAD +#define OS_EVR_THREAD 1 +#endif + +// Generic Wait +// Enables Generic Wait event generation. +#ifndef OS_EVR_WAIT +#define OS_EVR_WAIT 1 +#endif + +// Thread Flags +// Enables Thread Flags event generation. +#ifndef OS_EVR_THFLAGS +#define OS_EVR_THFLAGS 1 +#endif + +// Event Flags +// Enables Event Flags event generation. +#ifndef OS_EVR_EVFLAGS +#define OS_EVR_EVFLAGS 1 +#endif + +// Timer +// Enables Timer event generation. +#ifndef OS_EVR_TIMER +#define OS_EVR_TIMER 1 +#endif + +// Mutex +// Enables Mutex event generation. +#ifndef OS_EVR_MUTEX +#define OS_EVR_MUTEX 1 +#endif + +// Semaphore +// Enables Semaphore event generation. +#ifndef OS_EVR_SEMAPHORE +#define OS_EVR_SEMAPHORE 1 +#endif + +// Memory Pool +// Enables Memory Pool event generation. +#ifndef OS_EVR_MEMPOOL +#define OS_EVR_MEMPOOL 1 +#endif + +// Message Queue +// Enables Message Queue event generation. +#ifndef OS_EVR_MSGQUEUE +#define OS_EVR_MSGQUEUE 1 +#endif + +// + +// + +// Number of Threads which use standard C/C++ library libspace +// (when thread specific memory allocation is not used). +#if (OS_THREAD_OBJ_MEM == 0) +#define OS_THREAD_LIBSPACE_NUM 4 +#else +#define OS_THREAD_LIBSPACE_NUM OS_THREAD_NUM +#endif + +//------------- <<< end of configuration section >>> --------------------------- + +#endif // RTX_CONFIG_H_ diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/handlers.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/handlers.c new file mode 100644 index 0000000..6afdccc --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/CMSIS/handlers.c @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2013-2017 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * ----------------------------------------------------------------------------- + * + * Project: CMSIS-RTOS RTX + * Title: Exception handlers (C functions) + * + * ----------------------------------------------------------------------------- + */ +#include "RTE_Components.h" +#include CMSIS_device_header + + +//Fault Status Register (IFSR/DFSR) definitions +#define FSR_ALIGNMENT_FAULT 0x01 //DFSR only. Fault on first lookup +#define FSR_INSTRUCTION_CACHE_MAINTENANCE 0x04 //DFSR only - async/external +#define FSR_SYNC_EXT_TTB_WALK_FIRST 0x0c //sync/external +#define FSR_SYNC_EXT_TTB_WALK_SECOND 0x0e //sync/external +#define FSR_SYNC_PARITY_TTB_WALK_FIRST 0x1c //sync/external +#define FSR_SYNC_PARITY_TTB_WALK_SECOND 0x1e //sync/external +#define FSR_TRANSLATION_FAULT_FIRST 0x05 //MMU Fault - internal +#define FSR_TRANSLATION_FAULT_SECOND 0x07 //MMU Fault - internal +#define FSR_ACCESS_FLAG_FAULT_FIRST 0x03 //MMU Fault - internal +#define FSR_ACCESS_FLAG_FAULT_SECOND 0x06 //MMU Fault - internal +#define FSR_DOMAIN_FAULT_FIRST 0x09 //MMU Fault - internal +#define FSR_DOMAIN_FAULT_SECOND 0x0b //MMU Fault - internal +#define FSR_PERMISSION_FAULT_FIRST 0x0f //MMU Fault - internal +#define FSR_PERMISSION_FAULT_SECOND 0x0d //MMU Fault - internal +#define FSR_DEBUG_EVENT 0x02 //internal +#define FSR_SYNC_EXT_ABORT 0x08 //sync/external +#define FSR_TLB_CONFLICT_ABORT 0x10 //sync/external +#define FSR_LOCKDOWN 0x14 //internal +#define FSR_COPROCESSOR_ABORT 0x1a //internal +#define FSR_SYNC_PARITY_ERROR 0x19 //sync/external +#define FSR_ASYNC_EXTERNAL_ABORT 0x16 //DFSR only - async/external +#define FSR_ASYNC_PARITY_ERROR 0x18 //DFSR only - async/external + +void CDAbtHandler(uint32_t DFSR, uint32_t DFAR, uint32_t LR) { + uint32_t FS = (DFSR & (1 << 10)) >> 6 | (DFSR & 0x0f); //Store Fault Status + + switch(FS) { + //Synchronous parity errors - retry + case FSR_SYNC_PARITY_ERROR: + case FSR_SYNC_PARITY_TTB_WALK_FIRST: + case FSR_SYNC_PARITY_TTB_WALK_SECOND: + return; + + //Your code here. Value in DFAR is invalid for some fault statuses. + case FSR_ALIGNMENT_FAULT: + case FSR_INSTRUCTION_CACHE_MAINTENANCE: + case FSR_SYNC_EXT_TTB_WALK_FIRST: + case FSR_SYNC_EXT_TTB_WALK_SECOND: + case FSR_TRANSLATION_FAULT_FIRST: + case FSR_TRANSLATION_FAULT_SECOND: + case FSR_ACCESS_FLAG_FAULT_FIRST: + case FSR_ACCESS_FLAG_FAULT_SECOND: + case FSR_DOMAIN_FAULT_FIRST: + case FSR_DOMAIN_FAULT_SECOND: + case FSR_PERMISSION_FAULT_FIRST: + case FSR_PERMISSION_FAULT_SECOND: + case FSR_DEBUG_EVENT: + case FSR_SYNC_EXT_ABORT: + case FSR_TLB_CONFLICT_ABORT: + case FSR_LOCKDOWN: + case FSR_COPROCESSOR_ABORT: + case FSR_ASYNC_EXTERNAL_ABORT: //DFAR invalid + case FSR_ASYNC_PARITY_ERROR: //DFAR invalid + default: + while(1); + } +} + +void CPAbtHandler(uint32_t IFSR, uint32_t IFAR, uint32_t LR) { + uint32_t FS = (IFSR & (1 << 10)) >> 6 | (IFSR & 0x0f); //Store Fault Status + + switch(FS) { + //Synchronous parity errors - retry + case FSR_SYNC_PARITY_ERROR: + case FSR_SYNC_PARITY_TTB_WALK_FIRST: + case FSR_SYNC_PARITY_TTB_WALK_SECOND: + return; + + //Your code here. Value in IFAR is invalid for some fault statuses. + case FSR_SYNC_EXT_TTB_WALK_FIRST: + case FSR_SYNC_EXT_TTB_WALK_SECOND: + case FSR_TRANSLATION_FAULT_FIRST: + case FSR_TRANSLATION_FAULT_SECOND: + case FSR_ACCESS_FLAG_FAULT_FIRST: + case FSR_ACCESS_FLAG_FAULT_SECOND: + case FSR_DOMAIN_FAULT_FIRST: + case FSR_DOMAIN_FAULT_SECOND: + case FSR_PERMISSION_FAULT_FIRST: + case FSR_PERMISSION_FAULT_SECOND: + case FSR_DEBUG_EVENT: //IFAR invalid + case FSR_SYNC_EXT_ABORT: + case FSR_TLB_CONFLICT_ABORT: + case FSR_LOCKDOWN: + case FSR_COPROCESSOR_ABORT: + default: + while(1); + } +} + + +//returns amount to decrement lr by +//this will be 0 when we have emulated the instruction and want to execute the next instruction +//this will be 2 when we have performed some maintenance and want to retry the instruction in Thumb (state == 2) +//this will be 4 when we have performed some maintenance and want to retry the instruction in ARM (state == 4) +uint32_t CUndefHandler(uint32_t opcode, uint32_t state, uint32_t LR) { + const int THUMB = 2; + const int ARM = 4; + //Lazy VFP/NEON initialisation and switching + + // (ARM ARM section A7.5) VFP data processing instruction? + // (ARM ARM section A7.6) VFP/NEON register load/store instruction? + // (ARM ARM section A7.8) VFP/NEON register data transfer instruction? + // (ARM ARM section A7.9) VFP/NEON 64-bit register data transfer instruction? + if ((state == ARM && ((opcode & 0x0C000000) >> 26 == 0x03)) || + (state == THUMB && ((opcode & 0xEC000000) >> 26 == 0x3B))) { + if (((opcode & 0x00000E00) >> 9) == 5) { + __FPU_Enable(); + return state; + } + } + + // (ARM ARM section A7.4) NEON data processing instruction? + if ((state == ARM && ((opcode & 0xFE000000) >> 24 == 0xF2)) || + (state == THUMB && ((opcode & 0xEF000000) >> 24 == 0xEF)) || + // (ARM ARM section A7.7) NEON load/store instruction? + (state == ARM && ((opcode >> 24) == 0xF4)) || + (state == THUMB && ((opcode >> 24) == 0xF9))) { + __FPU_Enable(); + return state; + } + + //Add code here for other Undef cases + while(1); +} diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/ARMCA5.sct b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/ARMCA5.sct new file mode 100644 index 0000000..41e562c --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/ARMCA5.sct @@ -0,0 +1,77 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-a5 -xc +;************************************************** +; Copyright (c) 2017 ARM Ltd. All rights reserved. +;************************************************** + +; Scatter-file for RTX Example on Versatile Express + +; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map. + +; This platform has 2GB SDRAM starting at 0x80000000. + +#include "mem_ARMCA5.h" + +SDRAM __ROM_BASE __ROM_SIZE ; load region size_region +{ + VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address + { + * (RESET, +FIRST) ; Vector table and other startup code + * (InRoot$$Sections) ; All (library) code that must be in a root region + * (+RO-CODE) ; Application RO code (.text) + * (+RO-DATA) ; Application RO data (.constdata) + } + + RW_DATA __RAM_BASE __RW_DATA_SIZE + { * (+RW) } ; Application RW data (.data) + + ZI_DATA (__RAM_BASE+ + __RW_DATA_SIZE) __ZI_DATA_SIZE + { * (+ZI) } ; Application ZI data (.bss) + + ARM_LIB_HEAP (__RAM_BASE + +__RW_DATA_SIZE + +__ZI_DATA_SIZE) EMPTY __HEAP_SIZE ; Heap region growing up + { } + + ARM_LIB_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE + -__SVC_STACK_SIZE + -__ABT_STACK_SIZE + -__UND_STACK_SIZE) EMPTY -__STACK_SIZE ; Stack region growing down + { } + + UND_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE + -__SVC_STACK_SIZE + -__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack + { } + + ABT_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE + -__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack + { } + + SVC_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE + -__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack + { } + + IRQ_STACK (__RAM_BASE + +__RAM_SIZE + -__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack + { } + + FIQ_STACK (__RAM_BASE + +__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack + { } + + TTB __TTB_BASE EMPTY __TTB_SIZE ; Level-1 Translation Table for MMU + { } +} diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mem_ARMCA5.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mem_ARMCA5.h new file mode 100644 index 0000000..04669d0 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mem_ARMCA5.h @@ -0,0 +1,94 @@ +/**************************************************************************//** + * @file mem_ARMCA5.h + * @brief Memory base and size definitions (used in scatter file) + * @version V1.00 + * @date 10. January 2018 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __MEM_ARMCA5_H +#define __MEM_ARMCA5_H + +/*---------------------------------------------------------------------------- + User Stack & Heap size definition + *----------------------------------------------------------------------------*/ +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/*--------------------- ROM Configuration ------------------------------------ +// +// ROM Configuration +// ROM Base Address <0x0-0xFFFFFFFF:8> +// ROM Size (in Bytes) <0x0-0xFFFFFFFF:8> +// + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x80000000 +#define __ROM_SIZE 0x00200000 + +/*--------------------- RAM Configuration ----------------------------------- +// RAM Configuration +// RAM Base Address <0x0-0xFFFFFFFF:8> +// RAM Total Size (in Bytes) <0x0-0xFFFFFFFF:8> +// RW_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8> +// ZI_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8> +// Stack / Heap Configuration +// Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +// Exceptional Modes +// UND Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// ABT Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// SVC Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// IRQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// FIQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +// +// +// + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x80200000 +#define __RAM_SIZE 0x00200000 + +#define __RW_DATA_SIZE 0x00100000 +#define __ZI_DATA_SIZE 0x000F0000 + +#define __STACK_SIZE 0x00001000 +#define __HEAP_SIZE 0x00008000 + +#define __UND_STACK_SIZE 0x00000100 +#define __ABT_STACK_SIZE 0x00000100 +#define __SVC_STACK_SIZE 0x00000100 +#define __IRQ_STACK_SIZE 0x00000100 +#define __FIQ_STACK_SIZE 0x00000100 + +/*----------------------------------------------------------------------------*/ + +/*--------------------- TTB Configuration ------------------------------------ +// +// TTB Configuration +// TTB Base Address <0x0-0xFFFFFFFF:8> +// TTB Size (in Bytes) <0x0-0xFFFFFFFF:8> +// + *----------------------------------------------------------------------------*/ +#define __TTB_BASE 0x80500000 +#define __TTB_SIZE 0x00004000 + +#endif /* __MEM_ARMCA5_H */ diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mmu_ARMCA5.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mmu_ARMCA5.c new file mode 100644 index 0000000..2aa1a8d --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/mmu_ARMCA5.c @@ -0,0 +1,235 @@ +/**************************************************************************//** + * @file mmu_ARMCA5.c + * @brief MMU Configuration for ARM Cortex-A5 Device Series + * @version V1.1.0 + * @date 23. November 2018 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* Memory map description from: DUI0447G_v2m_p1_trm.pdf 4.2.2 ARM Cortex-A Series memory map + + Memory Type +0xffffffff |--------------------------| ------------ + | FLAG SYNC | Device Memory +0xfffff000 |--------------------------| ------------ + | Fault | Fault +0xfff00000 |--------------------------| ------------ + | | Normal + | | + | Daughterboard | + | memory | + | | +0x80505000 |--------------------------| ------------ + |TTB (L2 Sync Flags ) 4k | Normal +0x80504C00 |--------------------------| ------------ + |TTB (L2 Peripherals-B) 16k| Normal +0x80504800 |--------------------------| ------------ + |TTB (L2 Peripherals-A) 16k| Normal +0x80504400 |--------------------------| ------------ + |TTB (L2 Priv Periphs) 4k | Normal +0x80504000 |--------------------------| ------------ + | TTB (L1 Descriptors) | Normal +0x80500000 |--------------------------| ------------ + | Heap | Normal + |--------------------------| ------------ + | Stack | Normal +0x80400000 |--------------------------| ------------ + | ZI Data | Normal +0x80300000 |--------------------------| ------------ + | RW Data | Normal +0x80200000 |--------------------------| ------------ + | RO Data | Normal + |--------------------------| ------------ + | RO Code | USH Normal +0x80000000 |--------------------------| ------------ + | Daughterboard | Fault + | HSB AXI buses | +0x40000000 |--------------------------| ------------ + | Daughterboard | Fault + | test chips peripherals | +0x2c002000 |--------------------------| ------------ + | Private Address | Device Memory +0x2c000000 |--------------------------| ------------ + | Daughterboard | Fault + | test chips peripherals | +0x20000000 |--------------------------| ------------ + | Peripherals | Device Memory RW/RO + | | & Fault +0x00000000 |--------------------------| +*/ + +// L1 Cache info and restrictions about architecture of the caches (CCSIR register): +// Write-Through support *not* available +// Write-Back support available. +// Read allocation support available. +// Write allocation support available. + +//Note: You should use the Shareable attribute carefully. +//For cores without coherency logic (such as SCU) marking a region as shareable forces the processor to not cache that region regardless of the inner cache settings. +//Cortex-A versions of RTX use LDREX/STREX instructions relying on Local monitors. Local monitors will be used only when the region gets cached, regions that are not cached will use the Global Monitor. +//Some Cortex-A implementations do not include Global Monitors, so wrongly setting the attribute Shareable may cause STREX to fail. + +//Recall: When the Shareable attribute is applied to a memory region that is not Write-Back, Normal memory, data held in this region is treated as Non-cacheable. +//When SMP bit = 0, Inner WB/WA Cacheable Shareable attributes are treated as Non-cacheable. +//When SMP bit = 1, Inner WB/WA Cacheable Shareable attributes are treated as Cacheable. + + +//Following MMU configuration is expected +//SCTLR.AFE == 1 (Simplified access permissions model - AP[2:1] define access permissions, AP[0] is an access flag) +//SCTLR.TRE == 0 (TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor) +//Domain 0 is always the Client domain +//Descriptors should place all memory in domain 0 + +#include "ARMCA5.h" + + +// L2 table pointers +//---------------------------------------- +#define PRIVATE_TABLE_L2_BASE_4k (0x80504000) //Map 4k Private Address space +#define SYNC_FLAGS_TABLE_L2_BASE_4k (0x80504C00) //Map 4k Flag synchronization +#define PERIPHERAL_A_TABLE_L2_BASE_64k (0x80504400) //Map 64k Peripheral #1 0x1C000000 - 0x1C00FFFFF +#define PERIPHERAL_B_TABLE_L2_BASE_64k (0x80504800) //Map 64k Peripheral #2 0x1C100000 - 0x1C1FFFFFF + +//--------------------- PERIPHERALS ------------------- +#define PERIPHERAL_A_FAULT (0x00000000 + 0x1c000000) //0x1C000000-0x1C00FFFF (1M) +#define PERIPHERAL_B_FAULT (0x00100000 + 0x1c000000) //0x1C100000-0x1C10FFFF (1M) + +//--------------------- SYNC FLAGS -------------------- +#define FLAG_SYNC 0xFFFFF000 +#define F_SYNC_BASE 0xFFF00000 //1M aligned + +//Import symbols from linker +extern uint32_t Image$$VECTORS$$Base; +extern uint32_t Image$$RW_DATA$$Base; +extern uint32_t Image$$ZI_DATA$$Base; +extern uint32_t Image$$TTB$$ZI$$Base; + +static uint32_t Sect_Normal; //outer & inner wb/wa, non-shareable, executable, rw, domain 0, base addr 0 +static uint32_t Sect_Normal_Cod; //outer & inner wb/wa, non-shareable, executable, ro, domain 0, base addr 0 +static uint32_t Sect_Normal_RO; //as Sect_Normal_Cod, but not executable +static uint32_t Sect_Normal_RW; //as Sect_Normal_Cod, but writeable and not executable +static uint32_t Sect_Device_RO; //device, non-shareable, non-executable, ro, domain 0, base addr 0 +static uint32_t Sect_Device_RW; //as Sect_Device_RO, but writeable + +/* Define global descriptors */ +static uint32_t Page_L1_4k = 0x0; //generic +static uint32_t Page_L1_64k = 0x0; //generic +static uint32_t Page_4k_Device_RW; //Shared device, not executable, rw, domain 0 +static uint32_t Page_64k_Device_RW; //Shared device, not executable, rw, domain 0 + +void MMU_CreateTranslationTable(void) +{ + mmu_region_attributes_Type region; + + //Create 4GB of faulting entries + MMU_TTSection (&Image$$TTB$$ZI$$Base, 0, 4096, DESCRIPTOR_FAULT); + + /* + * Generate descriptors. Refer to core_ca.h to get information about attributes + * + */ + //Create descriptors for Vectors, RO, RW, ZI sections + section_normal(Sect_Normal, region); + section_normal_cod(Sect_Normal_Cod, region); + section_normal_ro(Sect_Normal_RO, region); + section_normal_rw(Sect_Normal_RW, region); + //Create descriptors for peripherals + section_device_ro(Sect_Device_RO, region); + section_device_rw(Sect_Device_RW, region); + //Create descriptors for 64k pages + page64k_device_rw(Page_L1_64k, Page_64k_Device_RW, region); + //Create descriptors for 4k pages + page4k_device_rw(Page_L1_4k, Page_4k_Device_RW, region); + + + /* + * Define MMU flat-map regions and attributes + * + */ + + //Define Image + MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$VECTORS$$Base, 2, Sect_Normal_Cod); + MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$RW_DATA$$Base, 1, Sect_Normal_RW); + MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$ZI_DATA$$Base, 1, Sect_Normal_RW); + + //all DRAM executable, rw, cacheable - applications may choose to divide memory into ro executable + MMU_TTSection (&Image$$TTB$$ZI$$Base, (uint32_t)&Image$$TTB$$ZI$$Base, 2043, Sect_Normal); + + //--------------------- PERIPHERALS ------------------- + MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_FLASH_BASE0 , 64, Sect_Device_RO); + MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_FLASH_BASE1 , 64, Sect_Device_RO); + MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_SRAM_BASE , 64, Sect_Device_RW); + MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_VRAM_BASE , 32, Sect_Device_RW); + MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_ETHERNET_BASE , 16, Sect_Device_RW); + MMU_TTSection (&Image$$TTB$$ZI$$Base, VE_A5_MP_USB_BASE , 16, Sect_Device_RW); + + // Create (16 * 64k)=1MB faulting entries to cover peripheral range 0x1C000000-0x1C00FFFF + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, PERIPHERAL_A_FAULT , 16, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, DESCRIPTOR_FAULT); + // Define peripheral range 0x1C000000-0x1C00FFFF + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_DAP_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_SYSTEM_REG_BASE, 1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_SERIAL_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_AACI_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_MMCI_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_KMI0_BASE , 2, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_UART_BASE , 4, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_WDT_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_64k, Page_64k_Device_RW); + + // Create (16 * 64k)=1MB faulting entries to cover peripheral range 0x1C100000-0x1C10FFFF + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, PERIPHERAL_B_FAULT , 16, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, DESCRIPTOR_FAULT); + // Define peripheral range 0x1C100000-0x1C10FFFF + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_TIMER_BASE , 2, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_DVI_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_RTC_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_UART4_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW); + MMU_TTPage64k(&Image$$TTB$$ZI$$Base, VE_A5_MP_CLCD_BASE , 1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW); + + // Create (256 * 4k)=1MB faulting entries to cover private address space. Needs to be marked as Device memory + MMU_TTPage4k (&Image$$TTB$$ZI$$Base, __get_CBAR() ,256, Page_L1_4k, (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT); + // Define private address space entry. + MMU_TTPage4k (&Image$$TTB$$ZI$$Base, __get_CBAR() , 3, Page_L1_4k, (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, Page_4k_Device_RW); + // Define L2CC entry. Uncomment if PL310 is present + // MMU_TTPage4k (&Image$$TTB$$ZI$$Base, VE_A5_MP_PL310_BASE , 1, Page_L1_4k, (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, Page_4k_Device_RW); + + // Create (256 * 4k)=1MB faulting entries to synchronization space (Useful if some non-cacheable DMA agent is present in the SoC) + MMU_TTPage4k (&Image$$TTB$$ZI$$Base, F_SYNC_BASE , 256, Page_L1_4k, (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT); + // Define synchronization space entry. + MMU_TTPage4k (&Image$$TTB$$ZI$$Base, FLAG_SYNC , 1, Page_L1_4k, (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, Page_4k_Device_RW); + + /* Set location of level 1 page table + ; 31:14 - Translation table base addr (31:14-TTBCR.N, TTBCR.N is 0 out of reset) + ; 13:7 - 0x0 + ; 6 - IRGN[0] 0x1 (Inner WB WA) + ; 5 - NOS 0x0 (Non-shared) + ; 4:3 - RGN 0x01 (Outer WB WA) + ; 2 - IMP 0x0 (Implementation Defined) + ; 1 - S 0x0 (Non-shared) + ; 0 - IRGN[1] 0x0 (Inner WB WA) */ + __set_TTBR0(((uint32_t)&Image$$TTB$$ZI$$Base) | 0x48); + __ISB(); + + /* Set up domain access control register + ; We set domain 0 to Client and all other domains to No Access. + ; All translation table entries specify domain 0 */ + __set_DACR(1); + __ISB(); +} diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/startup_ARMCA5.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/startup_ARMCA5.c new file mode 100644 index 0000000..535a200 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/startup_ARMCA5.c @@ -0,0 +1,138 @@ +/****************************************************************************** + * @file startup_ARMCA5.c + * @brief CMSIS Device System Source File for Arm Cortex-A5 Device Series + * @version V1.00 + * @date 10. January 2018 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +/*---------------------------------------------------------------------------- + Definitions + *----------------------------------------------------------------------------*/ +#define USR_MODE 0x10 // User mode +#define FIQ_MODE 0x11 // Fast Interrupt Request mode +#define IRQ_MODE 0x12 // Interrupt Request mode +#define SVC_MODE 0x13 // Supervisor mode +#define ABT_MODE 0x17 // Abort mode +#define UND_MODE 0x1B // Undefined Instruction mode +#define SYS_MODE 0x1F // System mode + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +void Vectors (void) __attribute__ ((naked, section("RESET"))); +void Reset_Handler (void) __attribute__ ((naked)); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +void Undef_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PAbt_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DAbt_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void FIQ_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector Table + *----------------------------------------------------------------------------*/ +void Vectors(void) { + __ASM volatile( + "LDR PC, =Reset_Handler \n" + "LDR PC, =Undef_Handler \n" + "LDR PC, =SVC_Handler \n" + "LDR PC, =PAbt_Handler \n" + "LDR PC, =DAbt_Handler \n" + "NOP \n" + "LDR PC, =IRQ_Handler \n" + "LDR PC, =FIQ_Handler \n" + ); +} + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +void Reset_Handler(void) { + __ASM volatile( + + // Mask interrupts + "CPSID if \n" + + // Put any cores other than 0 to sleep + "MRC p15, 0, R0, c0, c0, 5 \n" // Read MPIDR + "ANDS R0, R0, #3 \n" + "goToSleep: \n" + "WFINE \n" + "BNE goToSleep \n" + + // Reset SCTLR Settings + "MRC p15, 0, R0, c1, c0, 0 \n" // Read CP15 System Control register + "BIC R0, R0, #(0x1 << 12) \n" // Clear I bit 12 to disable I Cache + "BIC R0, R0, #(0x1 << 2) \n" // Clear C bit 2 to disable D Cache + "BIC R0, R0, #0x1 \n" // Clear M bit 0 to disable MMU + "BIC R0, R0, #(0x1 << 11) \n" // Clear Z bit 11 to disable branch prediction + "BIC R0, R0, #(0x1 << 13) \n" // Clear V bit 13 to disable hivecs + "MCR p15, 0, R0, c1, c0, 0 \n" // Write value back to CP15 System Control register + "ISB \n" + + // Configure ACTLR + "MRC p15, 0, r0, c1, c0, 1 \n" // Read CP15 Auxiliary Control Register + "ORR r0, r0, #(1 << 1) \n" // Enable L2 prefetch hint (UNK/WI since r4p1) + "MCR p15, 0, r0, c1, c0, 1 \n" // Write CP15 Auxiliary Control Register + + // Set Vector Base Address Register (VBAR) to point to this application's vector table + "LDR R0, =Vectors \n" + "MCR p15, 0, R0, c12, c0, 0 \n" + + // Setup Stack for each exceptional mode + "CPS #0x11 \n" + "LDR SP, =Image$$FIQ_STACK$$ZI$$Limit \n" + "CPS #0x12 \n" + "LDR SP, =Image$$IRQ_STACK$$ZI$$Limit \n" + "CPS #0x13 \n" + "LDR SP, =Image$$SVC_STACK$$ZI$$Limit \n" + "CPS #0x17 \n" + "LDR SP, =Image$$ABT_STACK$$ZI$$Limit \n" + "CPS #0x1B \n" + "LDR SP, =Image$$UND_STACK$$ZI$$Limit \n" + "CPS #0x1F \n" + "LDR SP, =Image$$ARM_LIB_STACK$$ZI$$Limit \n" + + // Call SystemInit + "BL SystemInit \n" + + // Unmask interrupts + "CPSIE if \n" + + // Call __main + "BL __main \n" + ); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) { + while(1); +} diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.c new file mode 100644 index 0000000..5f599f6 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.c @@ -0,0 +1,93 @@ +/****************************************************************************** + * @file system_ARMCA5.c + * @brief CMSIS Device System Source File for Arm Cortex-A5 Device Series + * @version V1.0.1 + * @date 13. February 2019 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "RTE_Components.h" +#include CMSIS_device_header +#include "irq_ctrl.h" + +#define SYSTEM_CLOCK 12000000U + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System Initialization + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +/* do not use global variables because this function is called before + reaching pre-main. RW section may be overwritten afterwards. */ + + // Invalidate entire Unified TLB + __set_TLBIALL(0); + + // Invalidate entire branch predictor array + __set_BPIALL(0); + __DSB(); + __ISB(); + + // Invalidate instruction cache and flush branch target cache + __set_ICIALLU(0); + __DSB(); + __ISB(); + + // Invalidate data cache + L1C_InvalidateDCacheAll(); + +#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) + // Enable FPU + __FPU_Enable(); +#endif + + // Create Translation Table + MMU_CreateTranslationTable(); + + // Enable MMU + MMU_Enable(); + + // Enable Caches + L1C_EnableCaches(); + L1C_EnableBTAC(); + +#if (__L2C_PRESENT == 1) + // Enable GIC + L2C_Enable(); +#endif + + // IRQ Initialize + IRQ_Initialize(); +} diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.h new file mode 100644 index 0000000..6a2a6da --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/Device/ARMCA5/system_ARMCA5.h @@ -0,0 +1,65 @@ +/****************************************************************************** + * @file system_ARMCA5.h + * @brief CMSIS Device System Header File for Arm Cortex-A5 Device Series + * @version V1.00 + * @date 10. January 2018 + * + * @note + * + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __SYSTEM_ARMCA5_H +#define __SYSTEM_ARMCA5_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + \brief Setup the microcontroller system. + + Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + + +/** + \brief Update SystemCoreClock variable. + + Updates the SystemCoreClock with current core Clock retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +/** + \brief Create Translation Table. + + Creates Memory Management Unit Translation Table. + */ +extern void MMU_CreateTranslationTable(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __SYSTEM_ARMCA5_H */ diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/RTE_Components.h b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/RTE_Components.h new file mode 100644 index 0000000..e894dc6 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/RTE/RTE_Components.h @@ -0,0 +1,20 @@ +/* + * Auto generated Run-Time-Environment Component Configuration File + * *** Do not modify ! *** + * + * Project: DspLibTest_FVP_A5 + * RTE configuration: DspLibTest_FVP_A5.rteconfig +*/ +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + +/* + * Define the Device Header File: +*/ +#define CMSIS_device_header "ARMCA5.h" + +#define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ + #define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */ + #define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */ + +#endif /* RTE_COMPONENTS_H */ diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/main.c b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/main.c new file mode 100644 index 0000000..6ca58ab --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_FVP_A5/main.c @@ -0,0 +1,34 @@ +/* -------------------------------------------------------------------------- + * Copyright (c) 2013-2017 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + *---------------------------------------------------------------------------*/ + +#include + +#include "jtest.h" +#include "all_tests.h" +#include "arm_math.h" + + +int main (void) { + + JTEST_INIT(); /* Initialize test framework. */ + JTEST_GROUP_CALL(all_tests); /* Run all tests. */ + JTEST_ACT_EXIT_FW(); /* Exit test framework. */ + + while(1); /* Never return */ +} diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx index 15df8ff..3d9cf53 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/ARM/DspLibTest_MPS2.uvprojx @@ -334,7 +334,7 @@ ARM_MATH_CM0 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -1175,7 +1175,7 @@ ARM_MATH_CM3 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2016,7 +2016,7 @@ ARM_MATH_CM4 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2857,7 +2857,7 @@ ARM_MATH_CM4 __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3698,7 +3698,7 @@ ARM_MATH_CM7 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -4539,7 +4539,7 @@ ARM_MATH_CM7 __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -5380,7 +5380,7 @@ ARM_MATH_CM7 __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6222,7 +6222,7 @@ -fhonor-nans ARM_MATH_ARMV8MBL - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -7064,7 +7064,7 @@ -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans ARM_MATH_ARMV8MML - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -7906,7 +7906,7 @@ -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans ARM_MATH_ARMV8MML __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -8748,7 +8748,7 @@ -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans ARM_MATH_ARMV8MML __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -9590,7 +9590,7 @@ -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans ARM_MATH_ARMV8MML __DSP_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -10432,7 +10432,7 @@ -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -11274,7 +11274,7 @@ -Xclang -target-feature -Xclang +t2xtpk -fhonor-nans ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx index cfc18b2..451ab46 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_MPS2/GCC/DspLibTest_MPS2.uvprojx @@ -240,7 +240,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections ARM_MATH_CM0 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -964,7 +964,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections ARM_MATH_CM3 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -1688,7 +1688,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections ARM_MATH_CM4 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2412,7 +2412,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off ARM_MATH_CM4 __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3136,7 +3136,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections ARM_MATH_CM7 - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3860,7 +3860,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off ARM_MATH_CM7 __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -4584,7 +4584,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off ARM_MATH_CM7 __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -5308,7 +5308,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base ARM_MATH_ARMV8MBL - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MBL\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6032,7 +6032,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main ARM_MATH_ARMV8MML - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6756,7 +6756,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off ARM_MATH_ARMV8MML __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -7480,7 +7480,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off ARM_MATH_ARMV8MML __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -8204,7 +8204,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp ARM_MATH_ARMV8MML __DSP_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -8928,7 +8928,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -9652,7 +9652,7 @@ -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off ARM_MATH_ARMV8MML __DSP_PRESENT=1U __FPU_PRESENT=1U - ..\..\..\Include;..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx new file mode 100644 index 0000000..f1a60d5 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARM/DspLibTest_FVP.uvoptx @@ -0,0 +1,2479 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests;..\..\ + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM0 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + 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..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM3l + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM3 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM3$Device\ARM\ARMCM3\Include\ARMCM3.h + + + + + + + + + + $$Device:ARMCM3$Device\ARM\SVD\ARMCM3.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM3l\ + DspLibTest_FVP + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM3l\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 0 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + ..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM3 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM4l + 0x4 + ARM-ADS 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM4 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 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system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + 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..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + 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..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM4lf + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM4_FP + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h + + + + + + + + + + $$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM4lf\ + DspLibTest_FVP + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM4lf\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 0 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + 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--cpreproc --cpreproc_opts=-D,ARMCM4 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + 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MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM7lfdp + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM7_DP + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7_DP$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM7_DP$Device\ARM\ARMCM7\Include\ARMCM7_DP.h + + + + + + + + + + $$Device:ARMCM7_DP$Device\ARM\SVD\ARMCM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM7lfdp\ + DspLibTest_FVP + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM7lfdp\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 0 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 3 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + ..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM7 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 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..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + 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..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + 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a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx new file mode 100644 index 0000000..6edc42b --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/DspLibTest_FVP.uvoptx @@ -0,0 +1,3304 @@ + + + + 1.0 + +
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a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMCLANG/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt new file mode 100644 index 0000000..d9cb90a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MBLl_config.txt @@ -0,0 +1,11 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt new file mode 100644 index 0000000..9c3cfc2 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLl_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt new file mode 100644 index 0000000..011260a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLld_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt new file mode 100644 index 0000000..2a0a82a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLldfsp_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt new file mode 100644 index 0000000..4140d9b --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/ARMv8MMLlfsp_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx new file mode 100644 index 0000000..44294c2 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/DspLibTest_FVP.uvoptx @@ -0,0 +1,3304 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + 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+ + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\ARMv8MMLldfsp\ + DspLibTest_FVP + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\ARMv8MMLldfsp\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + + + + SARMV8M.DLL + -MPU + TCM.DLL + -pV8MML + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 0 + 4096 + + 1 + BIN\UL2V8M.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + "ARMV8MML" + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20200000 + 0x20000 + + + 1 + 0x200000 + 0x200000 + + + + + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 2 + 1 + + -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off + + + ..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 0 + 0 + + + ARMv8MML + + + + + + 1 + 0 + 0 + 0 + 1 + + + + + + -Wl,--gc-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard + ..\..\Common\platform\GCC\ARMCMx.ld + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 2 + 2 + 2 + 2 + 0 + 5 + 0 + 1 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 1 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/GCC/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt new file mode 100644 index 0000000..8e33c76 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM0l_config.txt @@ -0,0 +1,8 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm0ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm0ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm0ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt new file mode 100644 index 0000000..2caf254 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM3l_config.txt @@ -0,0 +1,8 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm3ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm3ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm3ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt new file mode 100644 index 0000000..1c9fece --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4l_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm4ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt new file mode 100644 index 0000000..eb832ed --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM4lf_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt new file mode 100644 index 0000000..4e591c9 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7l_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt new file mode 100644 index 0000000..1888d60 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfdp_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt new file mode 100644 index 0000000..1888d60 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_FVP/cortexM7lfsp_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx new file mode 100644 index 0000000..4806df2 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/DspLibTest_MPS2.uvoptx @@ -0,0 +1,2479 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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--cpreproc_opts=-D,ARMCM3 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + 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..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM4l + 0x4 + ARM-ADS + 0 + + + ARMCM4 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM4$Device\ARM\ARMCM4\Include\ARMCM4.h + + + + + + + + + + $$Device:ARMCM4$Device\ARM\SVD\ARMCM4.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM4l\ + DspLibTest_MPS2 + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM4l\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 0 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM4 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM7 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 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system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + 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..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM7lfsp + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM7_SP + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7_SP$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM7_SP$Device\ARM\ARMCM7\Include\ARMCM7_SP.h + + + + + + + + + + $$Device:ARMCM7_SP$Device\ARM\SVD\ARMCM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM7lfsp\ + DspLibTest_MPS2 + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM7lfsp\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 0 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 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+ + --cpreproc --cpreproc_opts=-D,ARMCM7 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + 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MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + 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..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + 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ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM7_DP + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7_DP$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM7_DP$Device\ARM\ARMCM7\Include\ARMCM7_DP.h + + + + + + + + + + $$Device:ARMCM7_DP$Device\ARM\SVD\ARMCM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM7lfdp\ + DspLibTest_MPS2 + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM7lfdp\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 0 + 4096 + + 1 + BIN\UL2CM3.DLL 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM7 + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 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..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARM/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx new file mode 100644 index 0000000..f0a68be --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/DspLibTest_MPS2.uvoptx @@ -0,0 +1,3304 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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$$Device:ARMv8MML_DSP_SP$Device\ARM\ARMv8MML\Include\ARMv8MML_DSP_SP.h + + + + + + + + + + $$Device:ARMv8MML_DSP_SP$Device\ARM\SVD\ARMv8MML.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\ARMv8MMLldfsp\ + DspLibTest_MPS2 + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\ARMv8MMLldfsp\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + + + + SARMV8M.DLL + -MPU + TCM.DLL + -pV8MML + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 0 + 4101 + + 1 + BIN\UL2V8M.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "ARMV8MML" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 1 + 1 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 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+ 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCLANG\armcc6_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 6 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + 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..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + 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a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMCLANG/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt new file mode 100644 index 0000000..d9cb90a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MBLl_config.txt @@ -0,0 +1,11 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt new file mode 100644 index 0000000..9c3cfc2 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLl_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt new file mode 100644 index 0000000..011260a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLld_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt new file mode 100644 index 0000000..2a0a82a --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLldfsp_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=1 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt new file mode 100644 index 0000000..4140d9b --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/ARMv8MMLlfsp_config.txt @@ -0,0 +1,13 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +cpu0.FPU=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +cpu0.DSP=0 # (bool , init-time) default = '1' : Set whether the model has the DSP extension +cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +cpu0.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +cpu0.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +cpu0.SECEXT=0 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +fvp_mps2.DISABLE_GATING=1 # (bool , init-time) default = '0' : Disable Memory gating logic +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx new file mode 100644 index 0000000..dd586a5 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/DspLibTest_MPS2.uvoptx @@ -0,0 +1,3304 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\ARMv8MMLldfsp\ + DspLibTest_MPS2 + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\ARMv8MMLldfsp\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + + + + SARMV8M.DLL + -MPU + TCM.DLL + -pV8MML + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 0 + 4101 + + 1 + BIN\UL2V8M.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + "ARMV8MML" + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20200000 + 0x20000 + + + 1 + 0x200000 + 0x200000 + + + + + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 2 + 1 + + -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off + + + ..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMv8MML\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 0 + 0 + + + ARMv8MML + + + + + + 1 + 0 + 0 + 0 + 1 + + + + + + -Wl,--gc-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard + ..\..\Common\platform\GCC\ARMCMx.ld + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 2 + 2 + 2 + 2 + 0 + 5 + 0 + 1 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 1 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + 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..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + 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..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/GCC/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt new file mode 100644 index 0000000..8e33c76 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM0l_config.txt @@ -0,0 +1,8 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm0ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm0ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm0ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm0ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt new file mode 100644 index 0000000..2caf254 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM3l_config.txt @@ -0,0 +1,8 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm3ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm3ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm3ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm3ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt new file mode 100644 index 0000000..1c9fece --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4l_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm4ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt new file mode 100644 index 0000000..eb832ed --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM4lf_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm4ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm4ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm4ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm4ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm4ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt new file mode 100644 index 0000000..4e591c9 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7l_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=0 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt new file mode 100644 index 0000000..1888d60 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfdp_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt new file mode 100644 index 0000000..1888d60 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_MPS2/cortexM7lfsp_config.txt @@ -0,0 +1,9 @@ +# Parameters: +# instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] +#---------------------------------------------------------------------------------------------- +armcortexm7ct.vfp-present=1 # (bool , init-time) default = '1' : Set whether the model has VFP support +armcortexm7ct.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. +armcortexm7ct.min_sync_level=0x3 # (int , run-time ) default = '0x0' : force minimum syncLevel (0=off=default,1=syncState,2=postInsnIO,3=postInsnAll) : [0x0..0x3] +armcortexm7ct.cpi_mul=0x1 # (int , run-time ) default = '0x1' : multiplier for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +armcortexm7ct.cpi_div=0x1 # (int , run-time ) default = '0x1' : divider for calculating CPI (Cycles Per Instruction) : [0x1..0x7FFFFFFF] +#---------------------------------------------------------------------------------------------- diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx new file mode 100644 index 0000000..576bcd4 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/DspLibTest_Simulator.uvoptx @@ -0,0 +1,3077 @@ + + + + 1.0 + +
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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM0 + ARMCM0 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + 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..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + 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..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + 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$$Device:ARMCM3$Device\ARM\ARMCM3\Include\ARMCM3.h + + + + + + + + + + $$Device:ARMCM3$Device\ARM\SVD\ARMCM3.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM3l\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM3l\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + python Scripts/get_ref_and_dsp_libs.py ARM M3l + python Scripts/get_ref_and_dsp_libs.py GCC M3l + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM3 + ARMCM3 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM3b + 0x4 + ARM-ADS + 5060020::V5.06 (build 20)::ARMCC + 0 + + + ARMCM3 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM3$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM3$Device\ARM\ARMCM3\Include\ARMCM3.h + + + + + + + + + + $$Device:ARMCM3$Device\ARM\SVD\ARMCM3.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM3b\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM3b\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + python Scripts/get_ref_and_dsp_libs.py ARM M3b + python Scripts/get_ref_and_dsp_libs.py GCC M3b + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM3 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM3 + ARMCM3 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM4l + 0x4 + ARM-ADS + 5060020::V5.06 (build 20)::ARMCC + 0 + + + ARMCM4 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM4$Device\ARM\ARMCM4\Include\ARMCM4.h + + + + + + + + + + $$Device:ARMCM4$Device\ARM\SVD\ARMCM4.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM4l\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM4l\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + python Scripts/get_ref_and_dsp_libs.py ARM M4l + python Scripts/get_ref_and_dsp_libs.py GCC M4l + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + 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..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM4b + 0x4 + ARM-ADS + 5060020::V5.06 (build 20)::ARMCC + 0 + + + ARMCM4 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM4$Device\ARM\ARMCM4\Include\ARMCM4.h + + + + + + + + + + $$Device:ARMCM4$Device\ARM\SVD\ARMCM4.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM4b\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM4b\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + python Scripts/get_ref_and_dsp_libs.py ARM M4b + python Scripts/get_ref_and_dsp_libs.py GCC M4b + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + 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..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + 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..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + 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..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM4bf + 0x4 + ARM-ADS + 5060020::V5.06 (build 20)::ARMCC + 0 + + + ARMCM4_FP + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM4_FP$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h + + + + + + + + + + $$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM4bf\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM4bf\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + python Scripts/get_ref_and_dsp_libs.py ARM M4bf + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM7l + 0x4 + ARM-ADS + 5060020::V5.06 (build 20)::ARMCC + 0 + + + ARMCM7 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM7$Device\ARM\ARMCM7\Include\ARMCM7.h + + + + + + + + + + $$Device:ARMCM7$Device\ARM\SVD\ARMCM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM7l\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM7l\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + python Scripts/get_ref_and_dsp_libs.py ARM M4l + python Scripts/get_ref_and_dsp_libs.py GCC M4l + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM7 + ARMCM7 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM7b + 0x4 + ARM-ADS + 5060020::V5.06 (build 20)::ARMCC + 0 + + + ARMCM7 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM7$Device\ARM\ARMCM7\Include\ARMCM7.h + + + + + + + + + + $$Device:ARMCM7$Device\ARM\SVD\ARMCM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM7b\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM7b\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + python Scripts/get_ref_and_dsp_libs.py ARM M4b + python Scripts/get_ref_and_dsp_libs.py GCC M4b + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 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..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc --cpreproc_opts=-D,ARMCM7 + ARMCM7 + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + ..\..\Common\platform\ARMCC\armcc5_arm.sct + + + + + + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 4 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARM/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx new file mode 100644 index 0000000..71442d8 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx @@ -0,0 +1,3065 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx new file mode 100644 index 0000000..a0396d8 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/DspLibTest_Simulator.uvoptx @@ -0,0 +1,3509 @@ + + + + 1.0 + +
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matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + cortexM7b + 0x3 + ARM-GNU + 0 + + + ARMCM7 + ARM + ARM.CMSIS.5.5.0-dev52 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL080000 -FP0($$Device:ARMCM7$Device\ARM\Flash\NEW_DEVICE.FLM)) + 0 + $$Device:ARMCM7$Device\ARM\ARMCM7\Include\ARMCM7.h + + + + + + + + + + $$Device:ARMCM7$Device\ARM\SVD\ARMCM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\IntermediateFiles\cortexM7b\ + DspLibTest_Simulator + 1 + 0 + 0 + 1 + 1 + .\IntermediateFiles\cortexM7b\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 0 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M7" + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + + + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 2 + 1 + + -fno-strict-aliasing -ffunction-sections -fdata-sections + ARM_MATH_BIG_ENDIAN + + ..\..\..\..\Core\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\..\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + + + + 0 + 0 + + + ARMCM7 + + + + + + 1 + 0 + 0 + 0 + 1 + + + + + + -Wl,--gc-sections + ..\..\Common\platform\GCC\ARMCMx.ld + + + + + + DSP_Lib Files + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 2 + 2 + 2 + 2 + 0 + 5 + 0 + 1 + + + ARM_MATH_MATRIX_CHECK, ARM_MATH_ROUNDING, ARM_MATH_LOOPUNROLL + + + + + + 2 + 2 + + + + + + + + + + + + BasicMathFunctions.c + 1 + ..\..\..\Source\BasicMathFunctions\BasicMathFunctions.c + + + CommonTables.c + 1 + ..\..\..\Source\CommonTables\CommonTables.c + + + ComplexMathFunctions.c + 1 + ..\..\..\Source\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\..\Source\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\..\Source\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\..\Source\FilteringFunctions\FilteringFunctions.c + + + MatrixFunctions.c + 1 + ..\..\..\Source\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\..\Source\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\..\Source\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\..\Source\TransformFunctions\TransformFunctions.c + + + + + Ref_Lib Files + + + BasicMathFunctions.c + 1 + ..\..\RefLibs\src\BasicMathFunctions\BasicMathFunctions.c + + + ComplexMathFunctions.c + 1 + ..\..\RefLibs\src\ComplexMathFunctions\ComplexMathFunctions.c + + + ControllerFunctions.c + 1 + ..\..\RefLibs\src\ControllerFunctions\ControllerFunctions.c + + + FastMathFunctions.c + 1 + ..\..\RefLibs\src\FastMathFunctions\FastMathFunctions.c + + + FilteringFunctions.c + 1 + ..\..\RefLibs\src\FilteringFunctions\FilteringFunctions.c + + + HelperFunctions.c + 1 + ..\..\RefLibs\src\HelperFunctions\HelperFunctions.c + + + Intrinsics_.c + 1 + ..\..\RefLibs\src\Intrinsics\Intrinsics_.c + + + MatrixFunctions.c + 1 + ..\..\RefLibs\src\MatrixFunctions\MatrixFunctions.c + + + StatisticsFunctions.c + 1 + ..\..\RefLibs\src\StatisticsFunctions\StatisticsFunctions.c + + + SupportFunctions.c + 1 + ..\..\RefLibs\src\SupportFunctions\SupportFunctions.c + + + TransformFunctions.c + 1 + ..\..\RefLibs\src\TransformFunctions\TransformFunctions.c + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 1 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_SV_Simulator/GCC/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx index 6f982a6..3599739 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvoptx @@ -101,6 +101,8 @@ 0 0 1 + 0 + 0 0 @@ -175,6 +177,10 @@ + + + + @@ -258,6 +264,8 @@ 0 0 1 + 0 + 0 0 @@ -349,6 +357,10 @@ + + + + @@ -432,6 +444,8 @@ 0 0 1 + 0 + 0 0 @@ -506,6 +520,10 @@ + + + + @@ -589,6 +607,8 @@ 0 0 1 + 0 + 0 0 @@ -680,6 +700,10 @@ + + + + @@ -763,6 +787,8 @@ 0 0 1 + 0 + 0 0 @@ -854,6 +880,10 @@ + + + + @@ -937,6 +967,8 @@ 0 0 1 + 0 + 0 0 @@ -1028,6 +1060,10 @@ + + + + @@ -1111,6 +1147,8 @@ 0 0 1 + 0 + 0 0 @@ -1185,6 +1223,10 @@ + + + + @@ -1268,6 +1310,8 @@ 0 0 1 + 0 + 0 0 @@ -1359,6 +1403,10 @@ + + + + @@ -1442,6 +1490,8 @@ 0 0 1 + 0 + 0 0 @@ -1533,6 +1583,10 @@ + + + + @@ -1616,6 +1670,8 @@ 0 0 1 + 0 + 0 0 @@ -1707,6 +1763,10 @@ + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx index c243680..c0b17be 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARM/DspLibTest_Simulator.uvprojx @@ -11,11 +11,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM0 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -183,6 +184,7 @@ 0 0 0 + 0 0 0 8 @@ -323,6 +325,7 @@ 0 0 0 + 0 0 0 0 @@ -333,9 +336,9 @@ 0 - ARM_MATH_CM0 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -350,8 +353,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM0 - ARM_MATH_CM0 + --cpreproc --cpreproc_opts=-D,ARMCM0 + ARMCM0 @@ -366,7 +369,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -853,11 +856,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM0 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -1025,6 +1029,7 @@ 0 0 0 + 0 0 0 8 @@ -1165,6 +1170,7 @@ 0 0 0 + 0 0 0 0 @@ -1175,9 +1181,9 @@ 0 - ARM_MATH_CM0, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -1192,8 +1198,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM0 - ARM_MATH_CM0 + --cpreproc --cpreproc_opts=-D,ARMCM0 + ARMCM0 @@ -1208,7 +1214,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -1695,11 +1701,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM3 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -1867,6 +1874,7 @@ 0 0 0 + 0 0 0 8 @@ -2007,6 +2015,7 @@ 0 0 0 + 0 0 0 0 @@ -2017,9 +2026,9 @@ 0 - ARM_MATH_CM3 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2034,8 +2043,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM3 - ARM_MATH_CM3 + --cpreproc --cpreproc_opts=-D,ARMCM3 + ARMCM3 @@ -2050,7 +2059,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -2537,11 +2546,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM3 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -2709,6 +2719,7 @@ 0 0 0 + 0 0 0 8 @@ -2849,6 +2860,7 @@ 0 0 0 + 0 0 0 0 @@ -2859,9 +2871,9 @@ 0 - ARM_MATH_CM3,ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2876,8 +2888,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM3 - ARM_MATH_CM3 + --cpreproc --cpreproc_opts=-D,ARMCM3 + ARMCM3 @@ -2892,7 +2904,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -3379,11 +3391,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM4 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -3551,6 +3564,7 @@ 0 0 0 + 0 0 0 8 @@ -3691,6 +3705,7 @@ 0 0 0 + 0 0 0 0 @@ -3701,9 +3716,9 @@ 0 - ARM_MATH_CM4 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3718,8 +3733,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM4 - ARM_MATH_CM4 + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 @@ -3734,7 +3749,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -4221,11 +4236,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM4 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -4393,6 +4409,7 @@ 0 0 0 + 0 0 0 8 @@ -4533,6 +4550,7 @@ 0 0 0 + 0 0 0 0 @@ -4543,9 +4561,9 @@ 0 - ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -4560,8 +4578,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM4 - ARM_MATH_CM4 + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 @@ -4576,7 +4594,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -5062,12 +5080,13 @@ cortexM4lf 0x4 ARM-ADS - 5060422::V5.06 update 4 (build 422)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -5235,6 +5254,7 @@ 0 0 2 + 0 0 0 8 @@ -5375,6 +5395,7 @@ 0 0 0 + 0 0 0 0 @@ -5385,9 +5406,9 @@ 0 - ARM_MATH_CM4 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -5402,8 +5423,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM4 - ARM_MATH_CM4 + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 @@ -5418,7 +5439,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -5905,11 +5926,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -6077,6 +6099,7 @@ 0 0 2 + 0 0 0 8 @@ -6217,6 +6240,7 @@ 0 0 0 + 0 0 0 0 @@ -6227,9 +6251,9 @@ 0 - ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN, __FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6244,8 +6268,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM4 - ARM_MATH_CM4 + --cpreproc --cpreproc_opts=-D,ARMCM4 + ARMCM4 @@ -6260,7 +6284,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -6747,11 +6771,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM7 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -6919,6 +6944,7 @@ 0 0 0 + 0 0 0 8 @@ -7059,6 +7085,7 @@ 0 0 0 + 0 0 0 0 @@ -7069,9 +7096,9 @@ 0 - ARM_MATH_CM7 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -7086,8 +7113,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM7 - ARM_MATH_CM7 + --cpreproc --cpreproc_opts=-D,ARMCM7 + ARMCM7 @@ -7102,7 +7129,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct @@ -7589,11 +7616,12 @@ 0x4 ARM-ADS 5060020::V5.06 (build 20)::ARMCC + 0 ARMCM7 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -7761,6 +7789,7 @@ 0 0 0 + 0 0 0 8 @@ -7901,6 +7930,7 @@ 0 0 0 + 0 0 0 0 @@ -7911,9 +7941,9 @@ 0 - ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -7928,8 +7958,8 @@ 0 0 - --cpreproc --cpreproc_opts=-D,ARM_MATH_CM7 - ARM_MATH_CM7 + --cpreproc --cpreproc_opts=-D,ARMCM7 + ARMCM7 @@ -7944,7 +7974,7 @@ 0x00000000 0x20000000 - + ..\..\Common\platform\ARMCC\armcc5_arm.sct diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx new file mode 100644 index 0000000..0092179 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/DspLibTest_Simulator.uvoptx @@ -0,0 +1,2829 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ + + + + + + Libraries + + + arm_math.lib + 4 + .\Lib\arm_math.lib + + + arm_ref.lib + 4 + .\Lib\arm_ref.lib + + + + + Startup + + + main.c + 1 + ..\..\Common\src\main.c + + + system_generic.c + 1 + ..\..\Common\platform\system_generic.c + + + startup_generic.S + 2 + ..\..\Common\platform\startup_generic.S + + + + + JTest + + + jtest_cycle.c + 1 + ..\..\Common\JTest\src\jtest_cycle.c + + + jtest_fw.c + 1 + ..\..\Common\JTest\src\jtest_fw.c + + + jtest_dump_str_segments.c + 1 + ..\..\Common\JTest\src\jtest_dump_str_segments.c + + + jtest_trigger_action.c + 1 + ..\..\Common\JTest\src\jtest_trigger_action.c + + + + + AllTests + + + all_tests.c + 1 + ..\..\Common\src\all_tests.c + + + + + Transform + + + cfft_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_tests.c + + + transform_test_group.c + 1 + ..\..\Common\src\transform_tests\transform_test_group.c + + + transform_tests_common_data.c + 1 + ..\..\Common\src\transform_tests\transform_tests_common_data.c + + + cfft_family_tests.c + 1 + ..\..\Common\src\transform_tests\cfft_family_tests.c + + + rfft_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_tests.c + + + rfft_fast_tests.c + 1 + ..\..\Common\src\transform_tests\rfft_fast_tests.c + + + dct4_tests.c + 1 + ..\..\Common\src\transform_tests\dct4_tests.c + + + + + BasicMath + + + basic_math_test_common_data.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_common_data.c + + + abs_tests.c + 1 + ..\..\Common\src\basic_math_tests\abs_tests.c + + + basic_math_test_group.c + 1 + ..\..\Common\src\basic_math_tests\basic_math_test_group.c + + + negate_tests.c + 1 + ..\..\Common\src\basic_math_tests\negate_tests.c + + + add_tests.c + 1 + ..\..\Common\src\basic_math_tests\add_tests.c + + + mult_tests.c + 1 + ..\..\Common\src\basic_math_tests\mult_tests.c + + + sub_tests.c + 1 + ..\..\Common\src\basic_math_tests\sub_tests.c + + + dot_prod_tests.c + 1 + ..\..\Common\src\basic_math_tests\dot_prod_tests.c + + + offset_tests.c + 1 + ..\..\Common\src\basic_math_tests\offset_tests.c + + + shift_tests.c + 1 + ..\..\Common\src\basic_math_tests\shift_tests.c + + + scale_tests.c + 1 + ..\..\Common\src\basic_math_tests\scale_tests.c + + + + + ComplexMath + + + complex_math_test_group.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_group.c + + + complex_math_test_common_data.c + 1 + ..\..\Common\src\complex_math_tests\complex_math_test_common_data.c + + + cmplx_conj_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_conj_tests.c + + + cmplx_mag_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_tests.c + + + cmplx_mag_squared_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mag_squared_tests.c + + + cmplx_dot_prod_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_dot_prod_tests.c + + + cmplx_mult_cmplx_tests.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_cmplx_tests.c + + + cmplx_mult_real_test.c + 1 + ..\..\Common\src\complex_math_tests\cmplx_mult_real_test.c + + + + + Controller + + + controller_test_group.c + 1 + ..\..\Common\src\controller_tests\controller_test_group.c + + + pid_reset_tests.c + 1 + ..\..\Common\src\controller_tests\pid_reset_tests.c + + + sin_cos_tests.c + 1 + ..\..\Common\src\controller_tests\sin_cos_tests.c + + + pid_tests.c + 1 + ..\..\Common\src\controller_tests\pid_tests.c + + + controller_test_common_data.c + 1 + ..\..\Common\src\controller_tests\controller_test_common_data.c + + + + + FastMath + + + fast_math_tests.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests.c + + + fast_math_tests_common_data.c + 1 + ..\..\Common\src\fast_math_tests\fast_math_tests_common_data.c + + + + + Filtering + + + filtering_test_common_data.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_common_data.c + + + filtering_test_group.c + 1 + ..\..\Common\src\filtering_tests\filtering_test_group.c + + + biquad_tests.c + 1 + ..\..\Common\src\filtering_tests\biquad_tests.c + + + conv_tests.c + 1 + ..\..\Common\src\filtering_tests\conv_tests.c + + + correlate_tests.c + 1 + ..\..\Common\src\filtering_tests\correlate_tests.c + + + fir_tests.c + 1 + ..\..\Common\src\filtering_tests\fir_tests.c + + + iir_tests.c + 1 + ..\..\Common\src\filtering_tests\iir_tests.c + + + lms_tests.c + 1 + ..\..\Common\src\filtering_tests\lms_tests.c + + + + + Matrix + + + matrix_test_common_data.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_common_data.c + + + matrix_test_group.c + 1 + ..\..\Common\src\matrix_tests\matrix_test_group.c + + + mat_cmplx_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_cmplx_mult_tests.c + + + mat_add_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_add_tests.c + + + mat_mult_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_tests.c + + + mat_mult_fast_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_mult_fast_tests.c + + + mat_sub_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_sub_tests.c + + + mat_inverse_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_inverse_tests.c + + + mat_trans_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_trans_tests.c + + + mat_init_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_init_tests.c + + + mat_scale_tests.c + 1 + ..\..\Common\src\matrix_tests\mat_scale_tests.c + + + + + Statistics + + + max_tests.c + 1 + ..\..\Common\src\statistics_tests\max_tests.c + + + statistics_test_common_data.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_common_data.c + + + statistics_test_group.c + 1 + ..\..\Common\src\statistics_tests\statistics_test_group.c + + + mean_tests.c + 1 + ..\..\Common\src\statistics_tests\mean_tests.c + + + min_tests.c + 1 + ..\..\Common\src\statistics_tests\min_tests.c + + + power_tests.c + 1 + ..\..\Common\src\statistics_tests\power_tests.c + + + rms_tests.c + 1 + ..\..\Common\src\statistics_tests\rms_tests.c + + + std_tests.c + 1 + ..\..\Common\src\statistics_tests\std_tests.c + + + var_tests.c + 1 + ..\..\Common\src\statistics_tests\var_tests.c + + + + + Support + + + copy_tests.c + 1 + ..\..\Common\src\support_tests\copy_tests.c + + + support_test_common_data.c + 1 + ..\..\Common\src\support_tests\support_test_common_data.c + + + support_test_group.c + 1 + ..\..\Common\src\support_tests\support_test_group.c + + + fill_tests.c + 1 + ..\..\Common\src\support_tests\fill_tests.c + + + x_to_y_tests.c + 1 + ..\..\Common\src\support_tests\x_to_y_tests.c + + + + + Intrinsics + + + intrinsics_tests.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests.c + + + intrinsics_tests_common_data.c + 1 + ..\..\Common\src\intrinsics_tests\intrinsics_tests_common_data.c + + + + + MathHelper + + + math_helper.c + 1 + ..\..\Common\src\math_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Lib/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Lib/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Lib/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Logs/.gitignore b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Logs/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/ARMCLANG/Logs/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx index ccc34c2..b703132 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvoptx @@ -101,6 +101,8 @@ 0 0 1 + 0 + 0 0 @@ -175,6 +177,10 @@ + + + + @@ -258,6 +264,8 @@ 0 0 1 + 0 + 0 0 @@ -438,6 +446,10 @@ + + + + @@ -521,6 +533,8 @@ 0 0 1 + 0 + 0 0 @@ -595,6 +609,10 @@ + + + + @@ -678,6 +696,8 @@ 0 0 1 + 0 + 0 0 @@ -891,6 +911,10 @@ + + + + @@ -974,6 +998,8 @@ 0 0 1 + 0 + 0 0 @@ -1048,6 +1074,10 @@ + + + + @@ -1131,6 +1161,8 @@ 0 0 1 + 0 + 0 0 @@ -1306,6 +1338,10 @@ + + + + @@ -1389,6 +1425,8 @@ 0 0 1 + 0 + 0 0 @@ -1416,7 +1454,7 @@ 0 DLGDARM - (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=2393,275,2627,812,0)(1012=-1,-1,-1,-1,0) + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=1046,183,1280,720,0)(1012=-1,-1,-1,-1,0) 0 @@ -1463,6 +1501,10 @@ + + + + @@ -1546,6 +1588,8 @@ 0 0 1 + 0 + 0 0 @@ -1724,6 +1768,10 @@ + + + + @@ -1807,6 +1855,8 @@ 0 0 1 + 0 + 0 0 @@ -1881,6 +1931,10 @@ + + + + @@ -1964,6 +2018,8 @@ 0 0 1 + 0 + 0 0 @@ -2139,6 +2195,10 @@ + + + + diff --git a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx index 033eba8..564f2ef 100644 --- a/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx +++ b/DSP/DSP_Lib_TestSuite/DspLibTest_Simulator/GCC/DspLibTest_Simulator.uvprojx @@ -10,11 +10,12 @@ cortexM0l 0x3 ARM-GNU + 0 ARMCM0 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -166,6 +167,7 @@ 0 0 0 + 0 0 0 @@ -238,9 +240,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM0 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -248,7 +250,7 @@ 0 - ARM_MATH_CM0 + ARMCM0 @@ -734,11 +736,12 @@ cortexM0b 0x3 ARM-GNU + 0 ARMCM0 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -890,6 +893,7 @@ 0 0 0 + 0 0 0 @@ -962,9 +966,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM0 ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM0\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -972,7 +976,7 @@ 0 - ARM_MATH_CM0 + ARMCM0 @@ -1458,11 +1462,12 @@ cortexM3l 0x3 ARM-GNU + 0 ARMCM3 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -1614,6 +1619,7 @@ 0 0 0 + 0 0 0 @@ -1686,9 +1692,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM3 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -1696,7 +1702,7 @@ 0 - ARM_MATH_CM3 + ARMCM3 @@ -2182,11 +2188,12 @@ cortexM3b 0x3 ARM-GNU + 0 ARMCM3 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -2338,6 +2345,7 @@ 0 0 0 + 0 0 0 @@ -2410,9 +2418,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM3,ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM3\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -2420,7 +2428,7 @@ 0 - ARM_MATH_CM3 + ARMCM3 @@ -2906,11 +2914,12 @@ cortexM4l 0x3 ARM-GNU + 0 ARMCM4 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -3062,6 +3071,7 @@ 0 0 0 + 0 0 0 @@ -3134,9 +3144,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM4 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3144,7 +3154,7 @@ 0 - ARM_MATH_CM4 + ARMCM4 @@ -3630,11 +3640,12 @@ cortexM4b 0x3 ARM-GNU + 0 ARMCM4 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -3786,6 +3797,7 @@ 0 0 0 + 0 0 0 @@ -3858,9 +3870,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -3868,7 +3880,7 @@ 0 - ARM_MATH_CM4 + ARMCM4 @@ -4354,11 +4366,12 @@ cortexM4lf 0x3 ARM-GNU + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -4510,6 +4523,7 @@ 0 0 2 + 0 0 0 @@ -4582,9 +4596,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM4 __FPU_PRESENT=1U + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -4592,7 +4606,7 @@ 0 - ARM_MATH_CM4 + ARMCM4 @@ -5078,11 +5092,12 @@ cortexM4bf 0x3 ARM-GNU + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -5234,6 +5249,7 @@ 0 0 2 + 0 0 0 @@ -5306,9 +5322,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN, __FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM4\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -5316,7 +5332,7 @@ 0 - ARM_MATH_CM4 + ARMCM4 @@ -5802,11 +5818,12 @@ cortexM7l 0x3 ARM-GNU + 0 ARMCM7 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -5958,6 +5975,7 @@ 0 0 0 + 0 0 0 @@ -6030,9 +6048,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM7 + - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6040,7 +6058,7 @@ 0 - ARM_MATH_CM7 + ARMCM7 @@ -6526,11 +6544,12 @@ cortexM7b 0x3 ARM-GNU + 0 ARMCM7 ARM - ARM.CMSIS.5.0.1-dev6 + ARM.CMSIS.5.5.0-dev52 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -6682,6 +6701,7 @@ 0 0 0 + 0 0 0 @@ -6754,9 +6774,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests + ..\..\..\..\Core\Include;..\..\..\Include;..\..\..\..\Device\ARM\ARMCM7\Include;..\..\RefLibs\inc;..\..\Common\JTest\inc;..\..\Common\JTest\inc\arr_desc;..\..\Common\inc;..\..\Common\inc\templates;..\..\Common\inc\basic_math_tests;..\..\Common\inc\complex_math_tests;..\..\Common\inc\statistics_tests;..\..\Common\inc\matrix_tests;..\..\Common\inc\support_tests;..\..\Common\inc\controller_tests;..\..\Common\inc\transform_tests;..\..\Common\inc\fast_math_tests;..\..\Common\inc\filtering_tests;..\..\Common\inc\intrinsics_tests @@ -6764,7 +6784,7 @@ 0 - ARM_MATH_CM7 + ARMCM7 diff --git a/DSP/DSP_Lib_TestSuite/HowTo.txt b/DSP/DSP_Lib_TestSuite/HowTo.txt index 1e51404..41ca5a6 100644 --- a/DSP/DSP_Lib_TestSuite/HowTo.txt +++ b/DSP/DSP_Lib_TestSuite/HowTo.txt @@ -1,4 +1,4 @@ -HowTo DSP_Lib_TestSuite 16.12.2016 +HowTo DSP_Lib_TestSuite 18.02.2019 ======================================= This file describes the folder structure, content, prerequisites and instructions to validate the @@ -34,17 +34,10 @@ Prerequisites Setup ------ - - Copy DSP_Lib_TestSuite to the CMSIS installation/pack folder. - ... - .\Keil_v5\ARM\PACK\ARM\CMSIS\DSP_Lib - .\Keil_v5\ARM\PACK\ARM\CMSIS\DSP_Lib_TestSuite <- location of DSP_Lib_TestSuite - .\Keil_v5\ARM\PACK\ARM\CMSIS\Include - ... - - - remove 'read-only' tag from folder ./CMSIS/Lib + - remove 'read-only' tag from folder .\CMSIS\DSP\Lib (required for rebuild of the DSP_Lib libraries) - - open a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite. + - open a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite. @@ -54,23 +47,23 @@ How to run the tests a) build the DSP_Lib libraries: - batch file: buildDspLibs.bat Note: only require if the DSP_Lib source code got updated or the desired configuration is missing - buildDspLibs.bat overwrites the prebuild libraries in .\CMSIS\Lib. - Log files of the build process are generated in folder .\CMSIS\DSP_Lib/[ARM|GCC] - - run: buildDspLibs.bat in a Windows command window in folder ./CMSIS/DSP_Lib_TestSuite + buildDspLibs.bat overwrites the prebuild libraries in .\CMSIS\DSP\Lib. + Log files of the build process are generated in folder .\CMSIS\DSP\DSP_Lib/[ARM|GCC] + - run: buildDspLibs.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite buildDspLibs ARM -> builds the ARMCC libraries buildDspLibs GCC -> builds the GCC libraries b) build the reference libraries: - batch file: buildRefLibs.bat - Log files of the build process are generated in folder .\CMSIS\DSP_Lib_TestSuite\RefLibs/[ARM|GCC] - - run: buildRefLibs.bat in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite + Log files of the build process are generated in folder .\CMSIS\DSP\DSP_Lib_TestSuite\RefLibs/[ARM|GCC] + - run: buildRefLibs.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite buildRefLibs ARM -> builds the ARMCC reference libraries buildRefLibs GCC -> builds the GCC reference libraries c) running an individual test using uVision (MDK-ARM): - batch file: runTest.bat - - run: runTest.bat in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite + - run: runTest.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite runTest -> prints usage information e.g. runTest ARM cortexM4lf Simulator -> runs the test for toolchain ARM, Cortex-M4 littel endian with FPU, uVision Simulator. @@ -78,7 +71,7 @@ c) running an individual test using uVision (MDK-ARM): d) parsing the test output log file - script: parseLog.py - - run: parseLog.py python script in a Windows command window in folder .\CMSIS\DSP_Lib_TestSuite + - run: parseLog.py python script in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite command line options should match the invocation of the runTest executed before. e.g: runTest ARM cortexM4lf Simulator -> python parseLog.py ARM cortexM4lf Simulator @@ -118,15 +111,15 @@ Setup 'MPS2' How to select tests for "run all tests" ---------------------------------------- - - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\all_tests.c + - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\all_tests.c comment out all unwanted test groups. e.g. // JTEST_GROUP_CALL(complex_math_tests); - - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\/_group.c + - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\/_group.c comment out all unwanted sub test groups. e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\basic_math_test_group.c -> // JTEST_GROUP_CALL(abs_tests); - - edit .\CMSIS\DSP_Lib_TestSuite\Common\src\/_tests.c + - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\/_tests.c comment out all unwanted tests. e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\abs_tests.c -> // JTEST_TEST_CALL(arm_abs_f32_test); diff --git a/DSP/DSP_Lib_TestSuite/HowTo_SV.txt b/DSP/DSP_Lib_TestSuite/HowTo_SV.txt new file mode 100644 index 0000000..ccf7531 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/HowTo_SV.txt @@ -0,0 +1,117 @@ +HowTo DSP_Lib_TestSuite (Source Variant) 18.02.2019 +====================================================== + +This file describes the folder structure, content, prerequisites and instructions to validate the +build of the CMSIS-DSP library. This is done by processing input data sets using the DSP Library +functions executing on a target simulator or hardware. The output data sets are then compared +with the reference data set produced by unoptimized DSP functions and a Signal to Noise Ratio (SNR) +is computed. If the SNR is below a defined threshold the test is considered "passed". + + +Folder structure +---------------- + .\DSP_Lib_TestSuite Batch files for building the reference libraries and running the tests. + .\DSP_Lib_TestSuite\Common + .\DSP_Lib_TestSuite\Common\inc DSP_Lib test include files + .\DSP_Lib_TestSuite\Common\JTest JTEST Test Framework + INI files for uVision + .\DSP_Lib_TestSuite\Common\platform ARM/GCC device startup/system files + .\DSP_Lib_TestSuite\Common\src DSP_Lib test source files + .\DSP_Lib_TestSuite\DspLibTest_FVP ARM/GCC DSP_Lib test projects for Fixed Virtual Platforms + .\DSP_Lib_TestSuite\DspLibTest_MPS2 ARM/GCC DSP_Lib test projects for MPS2 + .\DSP_Lib_TestSuite\DspLibTest_Simulator ARM/GCC DSP_Lib test projects for uVision simulator + .\DSP_Lib_TestSuite\RefLibs ARM/GCC DSP_Lib reference libraries (and projects) + + + +Prerequisites +-------------- + - Python (running on Windows). Tested with ActivePython 2.7.8.10. + - Keil MDK-ARM (tested with MDK-ARM 5.22: http://www2.keil.com/mdk5) + - ULINKpro debug adapter (http://www2.keil.com/mdk5/ulink) + - MPS2 (Cortex-M Prototyping System:https://www.arm.com/products/tools/development-boards/versatile-express/cortex-m-prototyping-system.php) + - CMSIS 5.0.0 (https://github.com/ARM-software/CMSIS_5/releases/tag/5.0.0) + + +Setup +------ + - open a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite. + + + +How to run the tests +--------------------- + +a) running an individual test using uVision (MDK-ARM): + - batch file: runTest_SV.bat + - run: runTest_SV.bat in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite + runTest_SV -> prints usage information + e.g. runTest_SV ARM cortexM4lf Simulator -> runs the test for toolchain ARM, Cortex-M4 littel endian with FPU, uVision Simulator. + + Tests running on MPS2 requires additional steps to setup. See section 'MPS2'. + +d) parsing the test output log file + - script: parseLog_SV.py + - run: parseLog_SV.py python script in a Windows command window in folder .\CMSIS\DSP\DSP_Lib_TestSuite + command line options should match the invocation of the runTest executed before. + e.g: runTest ARM cortexM4lf Simulator -> python parseLog.py ARM cortexM4lf Simulator + + - check the test log + depending on your test parameters change into the required folder + .\DSP_Lib_TestSuite\DspLibTest_[FVP|MPS2|Simulator]\[ARM|GCC]\Logs + the folder will contain the following files (e.g. for a 'runTest') : + DspLibTest_Simulator.log raw result of the last test run. + DspLibTest_Simulator_cortexM4lf.log raw result of a cortexM4lf test run + DspLibTest_Simulator_cortexM4lf_build.log build result of cortexM4lf test + DspLibTest_Simulator_cortexM4lf_parsed.log parsed log of raw result of a cortexM4lf test run + DspLibTest_Simulator_cortexM4lf_time.log log how long the test took (some tests e.g. M0 take really a long time!). + 'runTest' produces files of the format: DspLibTest__... + + +Differences between the tests for FVP, MPS2, Simulator +------------------------------------------------------ + - all tests are identical except for: + 'Simulator' uses uVision with uVision simulator and generates also code coverage information + can be used for little/big endian tests + ! do not use 'Simulator' for M7 with FPU -> no uVision simulation available. + ! do not use 'Simulator' for ARMv8-M devices -> no uVision simulation available. + 'MPS2' uses uVision with ULINKpro debugger and MPS2. No code coverage information is generated. + can be used for little endian only (because of the lack of MPS2 FPGA images). + 'FVP' uses uVision with Models debugger. No code coverage information is generated. + can be used for little/big endian tests. + ! config files must be prepared. + ! uVision target for big endianess are not yet prepared. + + +Setup 'MPS2' +------------- + - load the appropriate FPGA image to the MPS2 board matching the CPU of the test builds prior to running the test + - check if ULINKpro can connect with the configured debug connection (JTAG or SWD) as this must + match the protocol implemented in the FPGA image. + + +How to select tests for "run all tests" +---------------------------------------- + - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\all_tests.c + comment out all unwanted test groups. + e.g. // JTEST_GROUP_CALL(complex_math_tests); + + - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\/_group.c + comment out all unwanted sub test groups. + e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\basic_math_test_group.c -> // JTEST_GROUP_CALL(abs_tests); + + - edit .\CMSIS\DSP\DSP_Lib_TestSuite\Common\src\/_tests.c + comment out all unwanted tests. + e.g. file .\DSP_Lib_TestSuite\Common\src\basic_math_tests\abs_tests.c -> // JTEST_TEST_CALL(arm_abs_f32_test); + + +Notes +----- + - How to use ARM Clang (ARM Compiler 6): + in uVision 'Options for Target' tab you can select which compiler to use + by default uVision uses ARMCC V5 for Cortex-M devices and ARMCLANG V6 only for ARMv8M. + Only ARMv8M cores have been tested using ARMCLANG + + - test data used for the tests is used as provided by DSP Concepts. + + - some tests run for a very long time before they finish. This is expected + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx index b45ee7f..a5dd9e8 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx +++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvoptx @@ -101,6 +101,8 @@ 0 0 1 + 0 + 0 0 @@ -154,11 +156,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -242,6 +249,8 @@ 0 0 1 + 0 + 0 0 @@ -295,11 +304,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -383,6 +397,8 @@ 0 0 1 + 0 + 0 0 @@ -436,11 +452,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -524,6 +545,8 @@ 0 0 1 + 0 + 0 0 @@ -577,11 +600,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -665,6 +693,8 @@ 0 0 1 + 0 + 0 0 @@ -718,11 +748,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -806,6 +841,8 @@ 0 0 1 + 0 + 0 0 @@ -859,11 +896,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -947,6 +989,8 @@ 0 0 1 + 0 + 0 0 @@ -1000,11 +1044,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1088,6 +1137,8 @@ 0 0 1 + 0 + 0 0 @@ -1141,11 +1192,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1229,6 +1285,8 @@ 0 0 1 + 0 + 0 0 @@ -1282,11 +1340,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1370,6 +1433,8 @@ 0 0 1 + 0 + 0 0 @@ -1423,11 +1488,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1511,6 +1581,8 @@ 0 0 1 + 0 + 0 0 @@ -1564,11 +1636,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1652,6 +1729,8 @@ 0 0 1 + 0 + 0 0 @@ -1705,11 +1784,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1793,6 +1877,8 @@ 0 0 1 + 0 + 0 0 @@ -1846,11 +1932,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1934,6 +2025,8 @@ 0 0 1 + 0 + 0 0 @@ -1987,11 +2080,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2075,6 +2173,8 @@ 0 0 1 + 0 + 0 13 @@ -2133,11 +2233,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2221,6 +2326,8 @@ 0 0 1 + 0 + 0 13 @@ -2284,11 +2391,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2372,6 +2484,8 @@ 0 0 1 + 0 + 0 13 @@ -2435,11 +2549,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2523,6 +2642,8 @@ 0 0 1 + 0 + 0 13 @@ -2586,11 +2707,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2674,6 +2800,8 @@ 0 0 1 + 0 + 0 13 @@ -2737,11 +2865,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2825,6 +2958,8 @@ 0 0 1 + 0 + 0 13 @@ -2888,11 +3023,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2976,6 +3116,8 @@ 0 0 1 + 0 + 0 13 @@ -3039,11 +3181,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx index 6b3db76..4cd53ae 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx +++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARM/RefLibs.uvprojx @@ -10,12 +10,13 @@ cortexM0l 0x4 ARM-ADS - 5060422::V5.06 update 4 (build 422)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM0 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -183,6 +184,7 @@ 0 0 0 + 0 0 0 8 @@ -323,6 +325,7 @@ 0 0 0 + 0 0 0 0 @@ -333,9 +336,9 @@ 0 - ARM_MATH_CM0 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -712,12 +715,13 @@ cortexM0b 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM0 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -885,6 +889,7 @@ 0 0 0 + 0 0 0 8 @@ -1025,6 +1030,7 @@ 0 0 0 + 0 0 0 0 @@ -1035,9 +1041,9 @@ 0 - ARM_MATH_CM0, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -1414,12 +1420,13 @@ cortexM3l 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM3 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -1587,6 +1594,7 @@ 0 0 0 + 0 0 0 8 @@ -1727,6 +1735,7 @@ 0 0 0 + 0 0 0 0 @@ -1737,9 +1746,9 @@ 0 - ARM_MATH_CM3 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -2116,12 +2125,13 @@ cortexM3b 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM3 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -2289,6 +2299,7 @@ 0 0 0 + 0 0 0 8 @@ -2429,6 +2440,7 @@ 0 0 0 + 0 0 0 0 @@ -2439,9 +2451,9 @@ 0 - ARM_MATH_CM3, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -2818,12 +2830,13 @@ cortexM4l 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM4 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -2991,6 +3004,7 @@ 0 0 0 + 0 0 0 8 @@ -3131,6 +3145,7 @@ 0 0 0 + 0 0 0 0 @@ -3141,9 +3156,9 @@ 0 - ARM_MATH_CM4 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -3520,12 +3535,13 @@ cortexM4b 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM4 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -3693,6 +3709,7 @@ 0 0 0 + 0 0 0 8 @@ -3833,6 +3850,7 @@ 0 0 0 + 0 0 0 0 @@ -3843,9 +3861,9 @@ 0 - ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -4222,12 +4240,13 @@ cortexM4lf 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -4395,6 +4414,7 @@ 0 0 2 + 0 0 0 8 @@ -4535,6 +4555,7 @@ 0 0 0 + 0 0 0 0 @@ -4545,9 +4566,9 @@ 0 - ARM_MATH_CM4,__FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -4924,12 +4945,13 @@ cortexM4bf 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -5097,6 +5119,7 @@ 0 0 2 + 0 0 0 8 @@ -5237,6 +5260,7 @@ 0 0 0 + 0 0 0 0 @@ -5247,9 +5271,9 @@ 0 - ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -5626,12 +5650,13 @@ cortexM7l 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM7 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -5799,6 +5824,7 @@ 0 0 0 + 0 0 0 8 @@ -5939,6 +5965,7 @@ 0 0 0 + 0 0 0 0 @@ -5949,9 +5976,9 @@ 0 - ARM_MATH_CM7 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -6328,12 +6355,13 @@ cortexM7lfsp 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM7_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE @@ -6501,6 +6529,7 @@ 0 0 2 + 0 0 0 8 @@ -6641,6 +6670,7 @@ 0 0 0 + 0 0 0 0 @@ -6651,9 +6681,9 @@ 0 - ARM_MATH_CM7,__FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -7030,12 +7060,13 @@ cortexM7lfdp 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM7_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE @@ -7203,6 +7234,7 @@ 0 0 3 + 0 0 0 8 @@ -7343,6 +7375,7 @@ 0 0 0 + 0 0 0 0 @@ -7353,9 +7386,9 @@ 0 - ARM_MATH_CM7,__FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -7732,12 +7765,13 @@ cortexM7b 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM7 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -7905,6 +7939,7 @@ 0 0 0 + 0 0 0 8 @@ -8045,6 +8080,7 @@ 0 0 0 + 0 0 0 0 @@ -8055,9 +8091,9 @@ 0 - ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -8434,12 +8470,13 @@ cortexM7bfsp 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM7_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE @@ -8607,6 +8644,7 @@ 0 0 2 + 0 0 0 8 @@ -8747,6 +8785,7 @@ 0 0 0 + 0 0 0 0 @@ -8757,9 +8796,9 @@ 0 - ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -9136,12 +9175,13 @@ cortexM7bfdp 0x4 ARM-ADS - 5060417::V5.06 update 4 (build 417)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 ARMCM7_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE @@ -9309,6 +9349,7 @@ 0 0 3 + 0 0 0 8 @@ -9449,6 +9490,7 @@ 0 0 0 + 0 0 0 0 @@ -9459,9 +9501,9 @@ 0 - ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -9838,12 +9880,13 @@ ARMv8MBLl 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 ARMv8MBL ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE @@ -10011,6 +10054,7 @@ 0 0 0 + 0 0 0 8 @@ -10138,32 +10182,33 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - ARM_MATH_ARMV8MBL + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -10540,12 +10585,13 @@ ARMv8MMLl 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 ARMv8MML ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE @@ -10713,6 +10759,7 @@ 0 0 0 + 0 1 1 8 @@ -10840,39 +10887,40 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - ARM_MATH_ARMV8MML + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc 1 0 0 - 1 + 0 0 0 0 @@ -11242,12 +11290,13 @@ ARMv8MMLlfsp 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 ARMv8MML_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE @@ -11415,6 +11464,7 @@ 0 0 2 + 0 1 1 8 @@ -11542,39 +11592,40 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - ARM_MATH_ARMV8MML, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc 1 0 0 - 1 + 0 0 0 0 @@ -11944,12 +11995,13 @@ ARMv8MMLlfdp 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 ARMv8MML_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE @@ -12117,6 +12169,7 @@ 0 0 3 + 0 1 1 8 @@ -12244,39 +12297,40 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - ARM_MATH_ARMV8MML, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc 1 0 0 - 1 + 0 0 0 0 @@ -12646,12 +12700,13 @@ ARMv8MMLld 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 ARMv8MML_DSP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE @@ -12819,6 +12874,7 @@ 0 0 0 + 0 1 1 8 @@ -12946,39 +13002,40 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - ARM_MATH_ARMV8MML, __DSP_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc 1 0 0 - 1 + 0 0 0 0 @@ -13348,12 +13405,13 @@ ARMv8MMLldfsp 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 ARMv8MML_DSP_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE @@ -13521,6 +13579,7 @@ 0 0 2 + 0 1 1 8 @@ -13648,39 +13707,40 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc 1 0 0 - 1 + 0 0 0 0 @@ -14050,12 +14110,13 @@ ARMv8MMLldfdp 0x4 ARM-ADS - 6060000::V6.6::.\ARMCLANG + 6110000::V6.11::.\ARMCLANG 6.11 + 1 ARMv8MML_DSP_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE @@ -14223,6 +14284,7 @@ 0 0 3 + 0 1 1 8 @@ -14350,32 +14412,33 @@ 1 - 1 + 2 0 0 - 0 + 1 0 0 0 0 0 - 0 + 3 0 0 0 + 0 0 - 0 - 0 - 0 - 0 + 3 + 3 + 1 + 1 0 0 0 - ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -14750,4 +14813,10 @@ + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/Lib/.gitignore b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/Lib/.gitignore new file mode 100644 index 0000000..5e7d273 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/Lib/.gitignore @@ -0,0 +1,4 @@ +# Ignore everything in this directory +* +# Except this file +!.gitignore diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvoptx b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvoptx new file mode 100644 index 0000000..a5dd9e8 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/ARMCLANG/RefLibs.uvoptx @@ -0,0 +1,3945 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ + FilteringFunctions + + + biquad.c + 1 + ..\src\FilteringFunctions\biquad.c + + + conv.c + 1 + ..\src\FilteringFunctions\conv.c + + + correlate.c + 1 + ..\src\FilteringFunctions\correlate.c + + + fir.c + 1 + ..\src\FilteringFunctions\fir.c + + + fir_decimate.c + 1 + ..\src\FilteringFunctions\fir_decimate.c + + + fir_lattice.c + 1 + ..\src\FilteringFunctions\fir_lattice.c + + + fir_sparse.c + 1 + ..\src\FilteringFunctions\fir_sparse.c + + + iir_lattice.c + 1 + ..\src\FilteringFunctions\iir_lattice.c + + + lms.c + 1 + ..\src\FilteringFunctions\lms.c + + + fir_interpolate.c + 1 + ..\src\FilteringFunctions\fir_interpolate.c + + + + + MatrixFunctions + + + mat_cmplx_mult.c + 1 + ..\src\MatrixFunctions\mat_cmplx_mult.c + + + mat_inverse.c + 1 + ..\src\MatrixFunctions\mat_inverse.c + + + mat_mult.c + 1 + ..\src\MatrixFunctions\mat_mult.c + + + mat_scale.c + 1 + ..\src\MatrixFunctions\mat_scale.c + + + mat_sub.c + 1 + ..\src\MatrixFunctions\mat_sub.c + + + mat_trans.c + 1 + ..\src\MatrixFunctions\mat_trans.c + + + mat_add.c + 1 + ..\src\MatrixFunctions\mat_add.c + + + + + StatisticsFunctions + + + max.c + 1 + ..\src\StatisticsFunctions\max.c + + + mean.c + 1 + ..\src\StatisticsFunctions\mean.c + + + min.c + 1 + ..\src\StatisticsFunctions\min.c + + + power.c + 1 + ..\src\StatisticsFunctions\power.c + + + rms.c + 1 + ..\src\StatisticsFunctions\rms.c + + + std.c + 1 + ..\src\StatisticsFunctions\std.c + + + var.c + 1 + ..\src\StatisticsFunctions\var.c + + + + + SupportFunctions + + + copy.c + 1 + ..\src\SupportFunctions\copy.c + + + fill.c + 1 + ..\src\SupportFunctions\fill.c + + + fixed_to_fixed.c + 1 + ..\src\SupportFunctions\fixed_to_fixed.c + + + fixed_to_float.c + 1 + ..\src\SupportFunctions\fixed_to_float.c + + + float_to_fixed.c + 1 + ..\src\SupportFunctions\float_to_fixed.c + + + + + TransformFunctions + + + cfft.c + 1 + ..\src\TransformFunctions\cfft.c + + + rfft.c + 1 + ..\src\TransformFunctions\rfft.c + + + dct4.c + 1 + ..\src\TransformFunctions\dct4.c + + + + + Intrinsics + + + intrinsics.c + 1 + ..\src\Intrinsics\intrinsics.c + + + + + HelperFunctions + + + ref_helper.c + 1 + ..\src\HelperFunctions\ref_helper.c + + + mat_helper.c + 1 + ..\src\HelperFunctions\mat_helper.c + + + + + + + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/CMakeLists.txt b/DSP/DSP_Lib_TestSuite/RefLibs/CMakeLists.txt new file mode 100644 index 0000000..2fbb191 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/CMakeLists.txt @@ -0,0 +1,78 @@ +cmake_minimum_required (VERSION 3.6) + +project(DspRefLibs) + +# Needed to find the config modules +list(APPEND CMAKE_MODULE_PATH ${CMAKE_CURRENT_SOURCE_DIR}/../..) + + + + +set(REFSRC src/BasicMathFunctions/abs.c + src/BasicMathFunctions/add.c + src/BasicMathFunctions/dot_prod.c + src/BasicMathFunctions/mult.c + src/BasicMathFunctions/negate.c + src/BasicMathFunctions/offset.c + src/BasicMathFunctions/scale.c + src/BasicMathFunctions/shift.c + src/BasicMathFunctions/sub.c + src/ComplexMathFunctions/cmplx_conj.c + src/ComplexMathFunctions/cmplx_dot_prod.c + src/ComplexMathFunctions/cmplx_mag.c + src/ComplexMathFunctions/cmplx_mag_squared.c + src/ComplexMathFunctions/cmplx_mult_cmplx.c + src/ComplexMathFunctions/cmplx_mult_real.c + src/ControllerFunctions/pid.c + src/ControllerFunctions/sin_cos.c + src/FastMathFunctions/cos.c + src/FastMathFunctions/sin.c + src/FastMathFunctions/sqrt.c + src/FilteringFunctions/biquad.c + src/FilteringFunctions/conv.c + src/FilteringFunctions/correlate.c + src/FilteringFunctions/fir.c + src/FilteringFunctions/fir_decimate.c + src/FilteringFunctions/fir_interpolate.c + src/FilteringFunctions/fir_lattice.c + src/FilteringFunctions/fir_sparse.c + src/FilteringFunctions/iir_lattice.c + src/FilteringFunctions/lms.c + src/HelperFunctions/mat_helper.c + src/HelperFunctions/ref_helper.c + src/Intrinsics/intrinsics.c + src/MatrixFunctions/mat_add.c + src/MatrixFunctions/mat_cmplx_mult.c + src/MatrixFunctions/mat_inverse.c + src/MatrixFunctions/mat_mult.c + src/MatrixFunctions/mat_scale.c + src/MatrixFunctions/mat_sub.c + src/MatrixFunctions/mat_trans.c + src/StatisticsFunctions/max.c + src/StatisticsFunctions/mean.c + src/StatisticsFunctions/min.c + src/StatisticsFunctions/power.c + src/StatisticsFunctions/rms.c + src/StatisticsFunctions/std.c + src/StatisticsFunctions/var.c + src/SupportFunctions/copy.c + src/SupportFunctions/fill.c + src/SupportFunctions/fixed_to_fixed.c + src/SupportFunctions/fixed_to_float.c + src/SupportFunctions/float_to_fixed.c + src/TransformFunctions/bitreversal.c + src/TransformFunctions/cfft.c + src/TransformFunctions/dct4.c + src/TransformFunctions/rfft.c + ) + +add_library(DspRefLibs STATIC ${REFSRC}) + +include(config) +configdsp(DspRefLibs ../../Source) + +### Includes +target_include_directories(DspRefLibs PUBLIC "inc") +target_include_directories(DspRefLibs PUBLIC "../../Include") + + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx index 206acb2..65c2f34 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx +++ b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvoptx @@ -101,6 +101,8 @@ 0 0 1 + 0 + 0 0 @@ -154,11 +156,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -242,6 +249,8 @@ 0 0 1 + 0 + 0 0 @@ -295,11 +304,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -383,6 +397,8 @@ 0 0 1 + 0 + 0 0 @@ -436,11 +452,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -524,6 +545,8 @@ 0 0 1 + 0 + 0 0 @@ -577,11 +600,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -665,6 +693,8 @@ 0 0 1 + 0 + 0 0 @@ -718,11 +748,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -806,6 +841,8 @@ 0 0 1 + 0 + 0 0 @@ -859,11 +896,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -947,6 +989,8 @@ 0 0 1 + 0 + 0 0 @@ -1000,11 +1044,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1088,6 +1137,8 @@ 0 0 1 + 0 + 0 0 @@ -1141,11 +1192,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1229,6 +1285,8 @@ 0 0 1 + 0 + 0 0 @@ -1282,11 +1340,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1370,6 +1433,8 @@ 0 0 1 + 0 + 0 0 @@ -1423,11 +1488,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1511,6 +1581,8 @@ 0 0 1 + 0 + 0 0 @@ -1564,11 +1636,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1652,6 +1729,8 @@ 0 0 1 + 0 + 0 0 @@ -1705,11 +1784,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1793,6 +1877,8 @@ 0 0 1 + 0 + 0 0 @@ -1846,11 +1932,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -1934,6 +2025,8 @@ 0 0 1 + 0 + 0 0 @@ -1987,11 +2080,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2075,6 +2173,8 @@ 0 0 1 + 0 + 0 13 @@ -2133,11 +2233,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2221,6 +2326,8 @@ 0 0 1 + 0 + 0 13 @@ -2279,11 +2386,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2367,6 +2479,8 @@ 0 0 1 + 0 + 0 13 @@ -2425,11 +2539,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2513,6 +2632,8 @@ 0 0 1 + 0 + 0 13 @@ -2571,11 +2692,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2659,6 +2785,8 @@ 0 0 1 + 0 + 0 13 @@ -2717,11 +2845,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2805,6 +2938,8 @@ 0 0 1 + 0 + 0 13 @@ -2863,11 +2998,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + @@ -2951,6 +3091,8 @@ 0 0 1 + 0 + 0 13 @@ -3009,11 +3151,16 @@ 0 - - - 0 0 - 0 + 0 + + + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx index b0f0526..c9f78a0 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx +++ b/DSP/DSP_Lib_TestSuite/RefLibs/GCC/RefLibs.uvprojx @@ -10,11 +10,12 @@ cortexM0l 0x3 ARM-GNU + 0 ARMCM0 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -166,6 +167,7 @@ 0 0 0 + 0 0 0 @@ -238,9 +240,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM0 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -606,11 +608,12 @@ cortexM0b 0x3 ARM-GNU + 0 ARMCM0 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE @@ -762,6 +765,7 @@ 0 0 0 + 0 0 0 @@ -834,9 +838,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM0, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -1202,11 +1206,12 @@ cortexM3l 0x3 ARM-GNU + 0 ARMCM3 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -1358,6 +1363,7 @@ 0 0 0 + 0 0 0 @@ -1430,9 +1436,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM3 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -1798,11 +1804,12 @@ cortexM3b 0x3 ARM-GNU + 0 ARMCM3 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x40000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE @@ -1954,6 +1961,7 @@ 0 0 0 + 0 0 0 @@ -2026,9 +2034,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM3, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -2394,11 +2402,12 @@ cortexM4l 0x3 ARM-GNU + 0 ARMCM4 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -2550,6 +2559,7 @@ 0 0 0 + 0 0 0 @@ -2622,9 +2632,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM4 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -2990,11 +3000,12 @@ cortexM4b 0x3 ARM-GNU + 0 ARMCM4 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") CLOCK(12000000) ESEL ELITTLE @@ -3146,6 +3157,7 @@ 0 0 0 + 0 0 0 @@ -3218,9 +3230,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM4, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -3586,11 +3598,12 @@ cortexM4lf 0x3 ARM-GNU + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -3742,6 +3755,7 @@ 0 0 2 + 0 0 0 @@ -3814,9 +3828,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM4,__FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -4182,11 +4196,12 @@ cortexM4bf 0x3 ARM-GNU + 0 ARMCM4_FP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE @@ -4338,6 +4353,7 @@ 0 0 2 + 0 0 0 @@ -4410,9 +4426,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM4,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -4778,11 +4794,12 @@ cortexM7l 0x3 ARM-GNU + 0 ARMCM7 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -4934,6 +4951,7 @@ 0 0 0 + 0 0 0 @@ -5006,9 +5024,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM7 + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -5374,11 +5392,12 @@ cortexM7b 0x3 ARM-GNU + 0 ARMCM7 ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") CLOCK(12000000) ESEL ELITTLE @@ -5530,6 +5549,7 @@ 0 0 0 + 0 0 0 @@ -5602,9 +5622,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections - ARM_MATH_CM7, ARM_MATH_BIG_ENDIAN + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -5970,11 +5990,12 @@ cortexM7lfsp 0x3 ARM-GNU + 0 ARMCM7_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE @@ -6126,6 +6147,7 @@ 0 0 2 + 0 0 0 @@ -6198,9 +6220,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM7,__FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -6566,11 +6588,12 @@ cortexM7bfsp 0x3 ARM-GNU + 0 ARMCM7_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ESEL ELITTLE @@ -6722,6 +6745,7 @@ 0 0 2 + 0 0 0 @@ -6794,9 +6818,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -7162,11 +7186,12 @@ cortexM7lfdp 0x3 ARM-GNU + 0 ARMCM7_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE @@ -7318,6 +7343,7 @@ 0 0 3 + 0 0 0 @@ -7390,9 +7416,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM7,__FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -7758,11 +7784,12 @@ cortexM7bfdp 0x3 ARM-GNU + 0 ARMCM7_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ESEL ELITTLE @@ -7914,6 +7941,7 @@ 0 0 3 + 0 0 0 @@ -7986,9 +8014,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_CM7,ARM_MATH_BIG_ENDIAN,__FPU_PRESENT=1U + ARM_MATH_BIG_ENDIAN - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -8354,11 +8382,12 @@ ARMv8MBLl 0x3 ARM-GNU + 0 ARMv8MBL ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MBL") TZ CLOCK(12000000) ESEL ELITTLE @@ -8510,6 +8539,7 @@ 0 0 2 + 0 1 1 @@ -8582,9 +8612,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.base - ARM_MATH_ARMV8MBL + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -8950,11 +8980,12 @@ ARMv8MMLl 0x3 ARM-GNU + 0 ARMv8MML ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") TZ CLOCK(12000000) ESEL ELITTLE @@ -9106,6 +9137,7 @@ 0 0 2 + 0 1 1 @@ -9178,9 +9210,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main - ARM_MATH_ARMV8MML + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -9546,11 +9578,12 @@ ARMv8MMLlfsp 0x3 ARM-GNU + 0 ARMv8MML_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) TZ CLOCK(12000000) ESEL ELITTLE @@ -9702,6 +9735,7 @@ 0 0 2 + 0 1 1 @@ -9774,9 +9808,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -10142,11 +10176,12 @@ ARMv8MMLlfdp 0x3 ARM-GNU + 0 ARMv8MML_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) TZ CLOCK(12000000) ESEL ELITTLE @@ -10298,6 +10333,7 @@ 0 0 3 + 0 1 1 @@ -10370,9 +10406,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -10738,11 +10774,12 @@ ARMv8MMLld 0x3 ARM-GNU + 0 ARMv8MML_DSP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") DSP TZ CLOCK(12000000) ESEL ELITTLE @@ -10894,6 +10931,7 @@ 0 0 2 + 0 1 1 @@ -10966,9 +11004,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp - ARM_MATH_ARMV8MML, __DSP_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -11334,11 +11372,12 @@ ARMv8MMLldfsp 0x3 ARM-GNU + 0 ARMv8MML_DSP_SP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(SFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE @@ -11490,6 +11529,7 @@ 0 0 2 + 0 1 1 @@ -11562,9 +11602,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -11930,11 +11970,12 @@ ARMv8MMLldfdp 0x3 ARM-GNU + 0 ARMv8MML_DSP_DP ARM - ARM.CMSIS.5.0.0 + ARM.CMSIS.5.5.0-dev2 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x20200000,0x00020000) IROM(0x00000000,0x00200000) IROM2(0x00200000,0x00200000) CPUTYPE("ARMV8MML") FPU3(DFPU) DSP TZ CLOCK(12000000) ESEL ELITTLE @@ -12086,6 +12127,7 @@ 0 0 3 + 0 1 1 @@ -12158,9 +12200,9 @@ 1 -fno-strict-aliasing -ffunction-sections -fdata-sections -march=armv8-m.main+dsp -mfpu=fpv5-d16 -mfloat-abi=hard -ffp-contract=off - ARM_MATH_ARMV8MML, __DSP_PRESENT=1U, __FPU_PRESENT=1U + - ..\inc;..\..\..\Include + ..\..\..\..\Core\Include;..\..\..\Include;..\inc @@ -12524,4 +12566,10 @@ + + + + + + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h b/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h index 3a6e6df..69d83d1 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h +++ b/DSP/DSP_Lib_TestSuite/RefLibs/inc/ref.h @@ -59,10 +59,15 @@ extern "C" } dataType; +#ifndef FLT_MAX #define FLT_MAX 3.40282347e+38F +#endif + #define DBL_MAX 1.79769313486231571e+308 +#ifndef FLT_MIN #define FLT_MIN 1.175494351e-38F +#endif #define DBL_MIN 2.22507385850720138e-308 #define SCHAR_MIN (-128) diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c new file mode 100644 index 0000000..3f4dfbc --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/BasicMathFunctions/BasicMathFunctions.c @@ -0,0 +1,11 @@ + +#include "abs.c" +#include "add.c" +#include "dot_prod.c" +#include "mult.c" +#include "negate.c" +#include "offset.c" +#include "scale.c" +#include "shift.c" +#include "sub.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c new file mode 100644 index 0000000..4db36be --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/ComplexMathFunctions/ComplexMathFunctions.c @@ -0,0 +1,8 @@ + +#include "cmplx_conj.c" +#include "cmplx_dot_prod.c" +#include "cmplx_mag.c" +#include "cmplx_mag_squared.c" +#include "cmplx_mult_cmplx.c" +#include "cmplx_mult_real.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c new file mode 100644 index 0000000..0c39953 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/ControllerFunctions/ControllerFunctions.c @@ -0,0 +1,4 @@ + +#include "pid.c" +#include "sin_cos.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c new file mode 100644 index 0000000..bc59cb4 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FastMathFunctions/FastMathFunctions.c @@ -0,0 +1,5 @@ + +#include "cos.c" +#include "sin.c" +#include "sqrt.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c new file mode 100644 index 0000000..8faec35 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/FilteringFunctions.c @@ -0,0 +1,12 @@ + +#include "biquad.c" +#include "conv.c" +#include "correlate.c" +#include "fir.c" +#include "fir_decimate.c" +#include "fir_interpolate.c" +#include "fir_lattice.c" +#include "fir_sparse.c" +#include "iir_lattice.c" +#include "lms.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c index c340deb..1eb7667 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/biquad.c @@ -6,15 +6,15 @@ void ref_biquad_cascade_df2T_f32( float32_t * pDst, uint32_t blockSize) { - float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t acc; /* accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn; /* temporary input */ - float32_t d1, d2; /* state variables */ - uint32_t sample, stage = S->numStages; /* loop counters */ + float32_t *pIn = pSrc; /* source pointer */ + float32_t *pOut = pDst; /* destination pointer */ + float32_t *pState = S->pState; /* State pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ + float32_t acc; /* accumulator */ + float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ + float32_t Xn; /* temporary input */ + float32_t d1, d2; /* state variables */ + uint32_t sample, stage = S->numStages; /* loop counters */ do { @@ -72,19 +72,19 @@ void ref_biquad_cascade_df2T_f32( void ref_biquad_cascade_stereo_df2T_f32( const arm_biquad_cascade_stereo_df2T_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize) { - float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t acc1a, acc1b; /* accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn1a, Xn1b; /* temporary input */ - float32_t d1a, d2a, d1b, d2b; /* state variables */ - uint32_t sample, stage = S->numStages; /* loop counters */ + float32_t *pIn = pSrc; /* source pointer */ + float32_t *pOut = pDst; /* destination pointer */ + float32_t *pState = S->pState; /* State pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ + float32_t acc1a, acc1b; /* accumulator */ + float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ + float32_t Xn1a, Xn1b; /* temporary input */ + float32_t d1a, d2a, d1b, d2b; /* state variables */ + uint32_t sample, stage = S->numStages; /* loop counters */ do { @@ -220,19 +220,19 @@ void ref_biquad_cascade_df2T_f64( void ref_biquad_cascade_df1_f32( const arm_biquad_casd_df1_inst_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize) { - float32_t *pIn = pSrc; /* source pointer */ - float32_t *pOut = pDst; /* destination pointer */ - float32_t *pState = S->pState; /* pState pointer */ - float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ - float32_t acc; /* Simulates the accumulator */ - float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ - float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ - float32_t Xn; /* temporary input */ - uint32_t sample, stage = S->numStages; /* loop counters */ + float32_t *pIn = pSrc; /* source pointer */ + float32_t *pOut = pDst; /* destination pointer */ + float32_t *pState = S->pState; /* pState pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* coefficient pointer */ + float32_t acc; /* Simulates the accumulator */ + float32_t b0, b1, b2, a1, a2; /* Filter coefficients */ + float32_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */ + float32_t Xn; /* temporary input */ + uint32_t sample, stage = S->numStages; /* loop counters */ do { @@ -302,24 +302,24 @@ void ref_biquad_cascade_df1_f32( void ref_biquad_cas_df1_32x64_q31( const arm_biquad_cas_df1_32x64_ins_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize) { - q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q63_t *pState = S->pState; /* state pointer initialization */ - q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q63_t acc; /* accumulator */ - q31_t Xn1, Xn2; /* Input Filter state variables */ - q63_t Yn1, Yn2; /* Output Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn; /* temporary input */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* loop counters */ - q31_t acc_l, acc_h; /* temporary output */ - uint32_t uShift = ((uint32_t) S->postShift + 1U); - uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ + q31_t *pIn = pSrc; /* input pointer initialization */ + q31_t *pOut = pDst; /* output pointer initialization */ + q63_t *pState = S->pState; /* state pointer initialization */ + const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ + q63_t acc; /* accumulator */ + q31_t Xn1, Xn2; /* Input Filter state variables */ + q63_t Yn1, Yn2; /* Output Filter state variables */ + q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ + q31_t Xn; /* temporary input */ + int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ + uint32_t sample, stage = S->numStages; /* loop counters */ + q31_t acc_l, acc_h; /* temporary output */ + uint32_t uShift = ((uint32_t) S->postShift + 1U); + uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ do { @@ -395,17 +395,17 @@ void ref_biquad_cascade_df1_q31( q31_t * pDst, uint32_t blockSize) { - q63_t acc; /* accumulator */ - uint32_t uShift = ((uint32_t) S->postShift + 1U); - uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ - q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q31_t *pState = S->pState; /* pState pointer initialization */ - q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t Xn; /* temporary input */ - uint32_t sample, stage = S->numStages; /* loop counters */ + q63_t acc; /* accumulator */ + uint32_t uShift = ((uint32_t) S->postShift + 1U); + uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */ + q31_t *pIn = pSrc; /* input pointer initialization */ + q31_t *pOut = pDst; /* output pointer initialization */ + q31_t *pState = S->pState; /* pState pointer initialization */ + const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ + q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ + q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ + q31_t Xn; /* temporary input */ + uint32_t sample, stage = S->numStages; /* loop counters */ do { @@ -490,16 +490,16 @@ void ref_biquad_cascade_df1_fast_q31( q31_t * pDst, uint32_t blockSize) { - q31_t acc = 0; /* accumulator */ - q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q31_t *pIn = pSrc; /* input pointer initialization */ - q31_t *pOut = pDst; /* output pointer initialization */ - q31_t *pState = S->pState; /* pState pointer initialization */ - q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ - q31_t Xn; /* temporary input */ - int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ - uint32_t sample, stage = S->numStages; /* loop counters */ + q31_t acc = 0; /* accumulator */ + q31_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ + q31_t b0, b1, b2, a1, a2; /* Filter coefficients */ + q31_t *pIn = pSrc; /* input pointer initialization */ + q31_t *pOut = pDst; /* output pointer initialization */ + q31_t *pState = S->pState; /* pState pointer initialization */ + const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */ + q31_t Xn; /* temporary input */ + int32_t shift = (int32_t) S->postShift + 1; /* Shift to be applied to the output */ + uint32_t sample, stage = S->numStages; /* loop counters */ do { @@ -568,16 +568,16 @@ void ref_biquad_cascade_df1_fast_q15( q15_t * pDst, uint32_t blockSize) { - q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q15_t Xn; /* temporary input */ - q31_t acc; /* Accumulator */ - int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ + q15_t *pIn = pSrc; /* Source pointer */ + q15_t *pOut = pDst; /* Destination pointer */ + q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ + q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ + q15_t Xn; /* temporary input */ + q31_t acc; /* Accumulator */ + int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ do { @@ -643,16 +643,16 @@ void ref_biquad_cascade_df1_q15( q15_t * pDst, uint32_t blockSize) { - q15_t *pIn = pSrc; /* Source pointer */ - q15_t *pOut = pDst; /* Destination pointer */ - q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ - q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ - q15_t Xn; /* temporary input */ - q63_t acc; /* Accumulator */ - int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ + q15_t *pIn = pSrc; /* Source pointer */ + q15_t *pOut = pDst; /* Destination pointer */ + q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ + q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ + q15_t Xn; /* temporary input */ + q63_t acc; /* Accumulator */ + int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ do { diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c index 8a7a90c..40ab773 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir.c @@ -2,16 +2,16 @@ void ref_fir_f32( const arm_fir_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize) { - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i; /* Loop counters */ - float32_t acc; + float32_t *pState = S->pState; /* State pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + float32_t *pStateCurnt; /* Points to the current sample of the state */ + uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + uint32_t i; /* Loop counters */ + float32_t acc; /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -56,16 +56,16 @@ void ref_fir_f32( void ref_fir_q31( const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize) { - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i; /* Loop counters */ - q63_t acc; + q31_t *pState = S->pState; /* State pointer */ + const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q31_t *pStateCurnt; /* Points to the current sample of the state */ + uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + uint32_t i; /* Loop counter */ + q63_t acc; /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -110,16 +110,16 @@ void ref_fir_q31( void ref_fir_fast_q31( const arm_fir_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize) { - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i; /* Loop counters */ - q31_t acc; + q31_t *pState = S->pState; /* State pointer */ + const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q31_t *pStateCurnt; /* Points to the current sample of the state */ + uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + uint32_t i; /* Loop counter */ + q31_t acc; /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -164,16 +164,16 @@ void ref_fir_fast_q31( void ref_fir_q15( const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize) { - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i; /* Loop counters */ - q63_t acc; + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q15_t *pStateCurnt; /* Points to the current sample of the state */ + uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + uint32_t i; /* Loop counter */ + q63_t acc; /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -218,16 +218,16 @@ void ref_fir_q15( void ref_fir_fast_q15( const arm_fir_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize) { - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i; /* Loop counters */ - q31_t acc; + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q15_t *pStateCurnt; /* Points to the current sample of the state */ + uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + uint32_t i; /* Loop counter */ + q31_t acc; /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -272,16 +272,16 @@ void ref_fir_fast_q15( void ref_fir_q7( const arm_fir_instance_q7 * S, - q7_t * pSrc, - q7_t * pDst, - uint32_t blockSize) + q7_t * pSrc, + q7_t * pDst, + uint32_t blockSize) { - q7_t *pState = S->pState; /* State pointer */ - q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *pStateCurnt; /* Points to the current sample of the state */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i; /* Loop counters */ - q31_t acc; + q7_t *pState = S->pState; /* State pointer */ + const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q7_t *pStateCurnt; /* Points to the current sample of the state */ + uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + uint32_t i; /* Loop counter */ + q31_t acc; /* S->pState points to state array which contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c index 9ef1e5e..fc82124 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_decimate.c @@ -6,13 +6,13 @@ void ref_fir_decimate_f32( float32_t * pDst, uint32_t blockSize) { - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t sum0; /* Accumulator */ - float32_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - uint32_t i, blkCnt; /* Loop counters */ + float32_t *pState = S->pState; /* State pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + float32_t *pStateCurnt; /* Points to the current sample of the state */ + float32_t sum0; /* Accumulator */ + float32_t x0, c0; /* Temporary variables to hold state and coefficient values */ + uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + uint32_t i, blkCnt; /* Loop counters */ /* S->pState buffer contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -82,13 +82,13 @@ void ref_fir_decimate_q31( q31_t * pDst, uint32_t blockSize) { - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q63_t sum0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt; /* Loop counters */ + q31_t *pState = S->pState; /* State pointer */ + const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q31_t *pStateCurnt; /* Points to the current sample of the state */ + q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ + q63_t sum0; /* Accumulator */ + uint32_t numTaps = S->numTaps; /* Number of taps */ + uint32_t i, blkCnt; /* Loop counters */ /* S->pState buffer contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -159,13 +159,13 @@ void ref_fir_decimate_fast_q31( q31_t * pDst, uint32_t blockSize) { - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q31_t sum0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt; /* Loop counters */ + q31_t *pState = S->pState; /* State pointer */ + const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q31_t *pStateCurnt; /* Points to the current sample of the state */ + q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ + q31_t sum0; /* Accumulator */ + uint32_t numTaps = S->numTaps; /* Number of taps */ + uint32_t i, blkCnt; /* Loop counters */ /* S->pState buffer contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -236,13 +236,13 @@ void ref_fir_decimate_q15( q15_t * pDst, uint32_t blockSize) { - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q63_t sum0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt; /* Loop counters */ + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q15_t *pStateCurnt; /* Points to the current sample of the state */ + q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ + q63_t sum0; /* Accumulator */ + uint32_t numTaps = S->numTaps; /* Number of taps */ + uint32_t i, blkCnt; /* Loop counters */ /* S->pState buffer contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ @@ -313,13 +313,13 @@ void ref_fir_decimate_fast_q15( q15_t * pDst, uint32_t blockSize) { - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t x0, c0; /* Temporary variables to hold state and coefficient values */ - q31_t sum0; /* Accumulator */ - uint32_t numTaps = S->numTaps; /* Number of taps */ - uint32_t i, blkCnt; /* Loop counters */ + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q15_t *pStateCurnt; /* Points to the current sample of the state */ + q15_t x0, c0; /* Temporary variables to hold state and coefficient values */ + q31_t sum0; /* Accumulator */ + uint32_t numTaps = S->numTaps; /* Number of taps */ + uint32_t i, blkCnt; /* Loop counters */ /* S->pState buffer contains previous frame (numTaps - 1) samples */ /* pStateCurnt points to the location where the new input data should be written */ diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c index 4cb52eb..bfc5c09 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_interpolate.c @@ -2,17 +2,18 @@ void ref_fir_interpolate_f32( const arm_fir_interpolate_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize) { - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *pStateCurnt; /* Points to the current sample of the state */ - float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - float32_t sum; /* Accumulator */ - uint32_t i, blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ + float32_t *pState = S->pState; /* State pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + float32_t *pStateCurnt; /* Points to the current sample of the state */ + float32_t *ptr1; /* Temporary pointer for state buffer */ + const float32_t *ptr2; /* Temporary pointer for coefficient buffer */ + float32_t sum; /* Accumulator */ + uint32_t i, blkCnt; /* Loop counters */ + uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ /* S->pState buffer contains previous frame (phaseLen - 1) samples */ @@ -93,21 +94,19 @@ void ref_fir_interpolate_f32( void ref_fir_interpolate_q31( const arm_fir_interpolate_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize) { - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *pStateCurnt; /* Points to the current sample of the state */ - q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - - /* Run the below code for Cortex-M0 */ - - q63_t sum; /* Accumulator */ - q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ + q31_t *pState = S->pState; /* State pointer */ + const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q31_t *pStateCurnt; /* Points to the current sample of the state */ + q31_t *ptr1; /* Temporary pointer for state buffer */ + const q31_t *ptr2; /* Temporary pointer for coefficient buffer */ + q63_t sum; /* Accumulator */ + q31_t x0, c0; /* Temporary variables to hold state and coefficient values */ + uint32_t i, blkCnt; /* Loop counters */ + uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */ /* S->pState buffer contains previous frame (phaseLen - 1) samples */ @@ -194,18 +193,19 @@ void ref_fir_interpolate_q31( void ref_fir_interpolate_q15( const arm_fir_interpolate_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize) { - q15_t *pState = S->pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *pStateCurnt; /* Points to the current sample of the state */ - q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */ - q63_t sum; /* Accumulator */ - q15_t x0, c0; /* Temporary variables to hold state and coefficient values */ - uint32_t i, blkCnt, tapCnt; /* Loop counters */ - uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q15_t *pStateCurnt; /* Points to the current sample of the state */ + q15_t *ptr1; /* Temporary pointer for state buffer */ + const q15_t *ptr2; /* Temporary pointer for coefficient buffer */ + q63_t sum; /* Accumulator */ + q15_t x0, c0; /* Temporary variables to hold state and coefficient values */ + uint32_t i, blkCnt, tapCnt; /* Loop counters */ + uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */ /* S->pState buffer contains previous frame (phaseLen - 1) samples */ diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c index b7178a7..efaa44a 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_lattice.c @@ -2,17 +2,17 @@ void ref_fir_lattice_f32( const arm_fir_lattice_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - uint32_t blockSize) + float32_t * pSrc, + float32_t * pDst, + uint32_t blockSize) { - float32_t *pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *px; /* temporary state pointer */ - float32_t *pk; /* temporary coefficient pointer */ - float32_t fcurr, fnext, gcurr, gnext; /* temporary variables */ - uint32_t numStages = S->numStages; /* Length of the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ + float32_t *pState; /* State pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + float32_t *px; /* temporary state pointer */ + const float32_t *pk; /* temporary coefficient pointer */ + float32_t fcurr, fnext, gcurr, gnext; /* temporary variables */ + uint32_t numStages = S->numStages; /* Length of the filter */ + uint32_t blkCnt, stageCnt; /* temporary variables for counts */ pState = &S->pState[0]; @@ -78,17 +78,17 @@ void ref_fir_lattice_f32( void ref_fir_lattice_q31( const arm_fir_lattice_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - uint32_t blockSize) + q31_t * pSrc, + q31_t * pDst, + uint32_t blockSize) { - q31_t *pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *px; /* temporary state pointer */ - q31_t *pk; /* temporary coefficient pointer */ - q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */ - uint32_t numStages = S->numStages; /* Length of the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ + q31_t *pState; /* State pointer */ + const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q31_t *px; /* temporary state pointer */ + const q31_t *pk; /* temporary coefficient pointer */ + q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */ + uint32_t numStages = S->numStages; /* Length of the filter */ + uint32_t blkCnt, stageCnt; /* temporary variables for counts */ pState = &S->pState[0]; @@ -155,17 +155,17 @@ void ref_fir_lattice_q31( void ref_fir_lattice_q15( const arm_fir_lattice_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - uint32_t blockSize) + q15_t * pSrc, + q15_t * pDst, + uint32_t blockSize) { - q15_t *pState; /* State pointer */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *px; /* temporary state pointer */ - q15_t *pk; /* temporary coefficient pointer */ - q31_t fcurnt, fnext, gcurnt, gnext; /* temporary variables */ - uint32_t numStages = S->numStages; /* Length of the filter */ - uint32_t blkCnt, stageCnt; /* temporary variables for counts */ + q15_t *pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q15_t *px; /* temporary state pointer */ + const q15_t *pk; /* temporary coefficient pointer */ + q31_t fcurnt, fnext, gcurnt, gnext; /* temporary variables */ + uint32_t numStages = S->numStages; /* Length of the filter */ + uint32_t blkCnt, stageCnt; /* temporary variables for counts */ pState = &S->pState[0]; diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c index 11e79f9..060128f 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/FilteringFunctions/fir_sparse.c @@ -1,24 +1,24 @@ #include "ref.h" void ref_fir_sparse_f32( - arm_fir_sparse_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, - float32_t * pScratchIn, - uint32_t blockSize) + arm_fir_sparse_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, + float32_t * pScratchIn, + uint32_t blockSize) { - float32_t *pState = S->pState; /* State pointer */ - float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - float32_t *px; /* Scratch buffer pointer */ - float32_t *py = pState; /* Temporary pointers for state buffer */ - float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - float32_t *pOut; /* Destination pointer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - float32_t coeff = *pCoeffs++; /* Read the first coefficient value */ + float32_t *pState = S->pState; /* State pointer */ + const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + float32_t *px; /* Scratch buffer pointer */ + float32_t *py = pState; /* Temporary pointers for state buffer */ + float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ + float32_t *pOut; /* Destination pointer */ + int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ + uint32_t delaySize = S->maxDelay + blockSize; /* state length */ + uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */ + int32_t readIndex; /* Read index of the state buffer */ + uint32_t tapCnt, blkCnt; /* loop counters */ + float32_t coeff = *pCoeffs++; /* Read the first coefficient value */ /* BlockSize of Input samples are copied into the state buffer */ @@ -110,26 +110,26 @@ void ref_fir_sparse_f32( } void ref_fir_sparse_q31( - arm_fir_sparse_instance_q31 * S, - q31_t * pSrc, - q31_t * pDst, - q31_t * pScratchIn, - uint32_t blockSize) + arm_fir_sparse_instance_q31 * S, + q31_t * pSrc, + q31_t * pDst, + q31_t * pScratchIn, + uint32_t blockSize) { - q31_t *pState = S->pState; /* State pointer */ - q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q31_t *px; /* Scratch buffer pointer */ - q31_t *py = pState; /* Temporary pointers for state buffer */ - q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q31_t *pOut; /* Destination pointer */ - q63_t out; /* Temporary output variable */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Filter order */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q31_t coeff = *pCoeffs++; /* Read the first coefficient value */ - q31_t in; + q31_t *pState = S->pState; /* State pointer */ + const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q31_t *px; /* Scratch buffer pointer */ + q31_t *py = pState; /* Temporary pointers for state buffer */ + q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ + q31_t *pOut; /* Destination pointer */ + q63_t out; /* Temporary output variable */ + int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ + uint32_t delaySize = S->maxDelay + blockSize; /* state length */ + uint16_t numTaps = S->numTaps; /* Filter order */ + int32_t readIndex; /* Read index of the state buffer */ + uint32_t tapCnt, blkCnt; /* loop counters */ + q31_t coeff = *pCoeffs++; /* Read the first coefficient value */ + q31_t in; /* BlockSize of Input samples are copied into the state buffer */ @@ -237,27 +237,27 @@ void ref_fir_sparse_q31( } void ref_fir_sparse_q15( - arm_fir_sparse_instance_q15 * S, - q15_t * pSrc, - q15_t * pDst, - q15_t * pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize) + arm_fir_sparse_instance_q15 * S, + q15_t * pSrc, + q15_t * pDst, + q15_t * pScratchIn, + q31_t * pScratchOut, + uint32_t blockSize) { - q15_t *pState = S->pState; /* State pointer */ - q15_t *pIn = pSrc; /* Working pointer for input */ - q15_t *pOut = pDst; /* Working pointer for output */ - q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q15_t *px; /* Temporary pointers for scratch buffer */ - q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q15_t *py = pState; /* Temporary pointers for state buffer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Filter order */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q15_t coeff = *pCoeffs++; /* Read the first coefficient value */ - q31_t *pScr2 = pScratchOut; /* Working pointer for pScratchOut */ + q15_t *pState = S->pState; /* State pointer */ + const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q15_t *pIn = pSrc; /* Working pointer for input */ + q15_t *pOut = pDst; /* Working pointer for output */ + q15_t *px; /* Temporary pointers for scratch buffer */ + q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ + q15_t *py = pState; /* Temporary pointers for state buffer */ + int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ + uint32_t delaySize = S->maxDelay + blockSize; /* state length */ + uint16_t numTaps = S->numTaps; /* Filter order */ + int32_t readIndex; /* Read index of the state buffer */ + uint32_t tapCnt, blkCnt; /* loop counters */ + q15_t coeff = *pCoeffs++; /* Read the first coefficient value */ + q31_t *pScr2 = pScratchOut; /* Working pointer for pScratchOut */ /* BlockSize of Input samples are copied into the state buffer */ /* StateIndex points to the starting position to write in the state buffer */ @@ -358,27 +358,27 @@ void ref_fir_sparse_q15( } void ref_fir_sparse_q7( - arm_fir_sparse_instance_q7 * S, - q7_t *pSrc, - q7_t *pDst, - q7_t *pScratchIn, - q31_t * pScratchOut, - uint32_t blockSize) + arm_fir_sparse_instance_q7 * S, + q7_t *pSrc, + q7_t *pDst, + q7_t *pScratchIn, + q31_t * pScratchOut, + uint32_t blockSize) { - q7_t *pState = S->pState; /* State pointer */ - q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ - q7_t *px; /* Scratch buffer pointer */ - q7_t *py = pState; /* Temporary pointers for state buffer */ - q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ - q7_t *pOut = pDst; /* Destination pointer */ - int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ - uint32_t delaySize = S->maxDelay + blockSize; /* state length */ - uint16_t numTaps = S->numTaps; /* Filter order */ - int32_t readIndex; /* Read index of the state buffer */ - uint32_t tapCnt, blkCnt; /* loop counters */ - q7_t coeff = *pCoeffs++; /* Read the coefficient value */ - q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */ - q31_t in; + q7_t *pState = S->pState; /* State pointer */ + const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ + q7_t *px; /* Scratch buffer pointer */ + q7_t *py = pState; /* Temporary pointers for state buffer */ + q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */ + q7_t *pOut = pDst; /* Destination pointer */ + int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */ + uint32_t delaySize = S->maxDelay + blockSize; /* state length */ + uint16_t numTaps = S->numTaps; /* Filter order */ + int32_t readIndex; /* Read index of the state buffer */ + uint32_t tapCnt, blkCnt; /* loop counters */ + q7_t coeff = *pCoeffs++; /* Read the coefficient value */ + q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */ + q31_t in; /* BlockSize of Input samples are copied into the state buffer */ /* StateIndex points to the starting position to write in the state buffer */ diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c new file mode 100644 index 0000000..aa5a40f --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/HelperFunctions/HelperFunctions.c @@ -0,0 +1,4 @@ + +#include "mat_helper.c" +#include "ref_helper.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c new file mode 100644 index 0000000..ed4b7c5 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/Intrinsics/Intrinsics_.c @@ -0,0 +1,3 @@ + +#include "intrinsics.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c new file mode 100644 index 0000000..b611bfd --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/MatrixFunctions/MatrixFunctions.c @@ -0,0 +1,9 @@ + +#include "mat_add.c" +#include "mat_cmplx_mult.c" +#include "mat_inverse.c" +#include "mat_mult.c" +#include "mat_scale.c" +#include "mat_sub.c" +#include "mat_trans.c" + diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c new file mode 100644 index 0000000..426c3f7 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/StatisticsFunctions.c @@ -0,0 +1,8 @@ + +#include "max.c" +#include "mean.c" +#include "min.c" +#include "power.c" +#include "rms.c" +#include "std.c" +#include "var.c" diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c index 7b91163..58393ca 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/StatisticsFunctions/rms.c @@ -21,7 +21,7 @@ void ref_rms_q31( q31_t * pResult) { uint32_t i; - q63_t sumsq=0; + uint64_t sumsq = 0; /* accumulator (can get never negative. changed type from q63 to uint64 */ q63_t tmp1; q31_t tmp2; diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c new file mode 100644 index 0000000..647eb46 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/SupportFunctions/SupportFunctions.c @@ -0,0 +1,6 @@ + +#include "copy.c" +#include "fill.c" +#include "fixed_to_fixed.c" +#include "fixed_to_float.c" +#include "float_to_fixed.c" diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c new file mode 100644 index 0000000..d0d10c4 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/TransformFunctions.c @@ -0,0 +1,4 @@ + +#include "cfft.c" +#include "dct4.c" +#include "rfft.c" diff --git a/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c index 1f2be89..1b564fc 100644 --- a/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c +++ b/DSP/DSP_Lib_TestSuite/RefLibs/src/TransformFunctions/bitreversal.c @@ -8,7 +8,7 @@ ;* @param[in] *pBitRevTab points to bit reversal table. ;* @return none. ;*/ -void arm_bitreversal_32(uint32_t *pSrc, uint32_t bitRevLen, uint32_t *pBitRevTab) +void ref_arm_bitreversal_32(uint32_t *pSrc, uint32_t bitRevLen, uint32_t *pBitRevTab) { uint32_t a,b,i,tmp; diff --git a/DSP/DSP_Lib_TestSuite/buildDspLibs.bat b/DSP/DSP_Lib_TestSuite/buildDspLibs.bat new file mode 100644 index 0000000..aca6675 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/buildDspLibs.bat @@ -0,0 +1,116 @@ +@echo off + +set UVEXE=C:\Keil_v5\UV4\UV4.EXE +set CURDIR=%CD% + +if .%1==. goto help +for %%a in (ARM GCC) do if %1==%%a goto startBuild +goto help + +:startBuild +echo. +echo Building DSP Libraries %1 + +if %1==ARM goto buildARM +if %1==GCC goto buildGCC +goto err + +:buildARM +:buildGCC +cd ..\Projects\%1 + +echo Building DSP Library for Cortex-M0 Little Endian +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l" -o "DspLib_cortexM0l_build.log" + +echo Building DSP Library for Cortex-M3 Little Endian +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l" -o "DspLib_cortexM3l_build.log" + +echo Building DSP Library for Cortex-M4 Little Endian +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log" + +echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log" + +echo Building DSP Library for Cortex-M7 Little Endian +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log" + +echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log" + +echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log" + +echo Building DSP Library for ARMv8-M Baseline Little Endian +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl" -o "DspLib_ARMv8MBLl_build.log" + +echo Building DSP Library for ARMv8-M Mainline Little Endian +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log" + +echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log" + +REM echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log" + +echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log" + +echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU +%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log" + +REM echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log" + + +REM big endian libraries are skipped! + +REM echo Building DSP Library for Cortex-M0 Big Endian +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log" + +REM echo Building DSP Library for Cortex-M3 Big Endian +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log" + +REM echo Building DSP Library for Cortex-M4 Big Endian +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log" + +REM echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log" + +REM echo Building DSP Library for Cortex-M7 Big Endian +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log" + +REM echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log" + +REM echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU +REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log" + +goto deleteIntermediateFiles + + +:deleteIntermediateFiles +echo. +echo Deleting intermediate files +rmdir /S /Q IntermediateFiles +del /Q *.bak +del /Q *.dep +del /Q *.uvguix.* +del /Q ArInp.* + +goto changeDir + + +:changeDir +cd %CURDIR% +goto end + +:err + +:help +echo Syntax: buildDspLibs toolchain +echo. +echo toolchain: ARM ^| GCC +echo. +echo e.g.: buildDspLibs ARM + +:end diff --git a/DSP/DSP_Lib_TestSuite/buildRefLibs.bat b/DSP/DSP_Lib_TestSuite/buildRefLibs.bat new file mode 100644 index 0000000..0f101eb --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/buildRefLibs.bat @@ -0,0 +1,118 @@ +@echo off + +set UVEXE=C:\Keil_v5\UV4\UV4.EXE +set CURDIR=%CD% + +if .%1==. goto help +for %%a in (ARM ARMCLANG GCC) do if %1==%%a goto startBuild +goto help + +:startBuild +echo. +echo Building DSP Reference Libraries %1 + +if %1==ARM goto buildARM +if %1==ARMCLANG goto buildARMCLANG +if %1==GCC goto buildGCC +goto err + +:buildARM +:buildARMCLANG +:buildGCC +cd .\RefLibs\%1 + +echo Building DSP Reference Library for Cortex-M0 Little Endian +%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM0l" -o "RefLib_cortexM0l_build.log" + +echo Building DSP Reference Library for Cortex-M3 Little Endian +%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM3l" -o "RefLib_cortexM3l_build.log" + +echo Building DSP Reference Library for Cortex-M4 Little Endian +%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM4l" -o "RefLib_cortexM4l_build.log" + +echo Building DSP Reference Library for Cortex-M4 Little Endian with single precision FPU +%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM4lf" -o "RefLib_cortexM4lf_build.log" + +echo Building DSP Reference Library for Cortex-M7 Little Endian +%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7l" -o "RefLib_cortexM7l_build.log" + +echo Building DSP Reference Library for Cortex-M7 Little Endian with single precision FPU +%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7lfsp" -o "RefLib_cortexM7lfsp_build.log" + +echo Building DSP Reference Library for Cortex-M7 Little Endian with double precision FPU +%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7lfdp" -o "RefLib_cortexM7lfdp_build.log" + +echo Building DSP Reference Library for ARMv8-M Baseline Little Endian +%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MBLl" -o "RefLib_ARMv8MBLl_build.log" + +echo Building DSP Reference Library for ARMv8-M Mainline Little Endian +%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLl" -o "RefLib_ARMv8MMLl_build.log" + +echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with single precision FPU +%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLlfsp" -o "RefLib_ARMv8MMLlfsp_build.log" + +REM echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with double precision FPU +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLlfdp" -o "RefLib_ARMv8MMLlfdp_build.log" + +echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions +%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLld" -o "RefLib_ARMv8MMLld_build.log" + +echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU +%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLldfsp" -o "RefLib_ARMv8MMLldfsp_build.log" + +REM echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLldfdp" -o "RefLib_ARMv8MMLldfdp_build.log" + + +REM big endian libraries are skipped! + +REM echo Building DSP Reference Library for Cortex-M0 Big Endian +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM0b" -o "RefLib_cortexM0b_build.log" + +REM echo Building DSP Reference Library for Cortex-M3 Big Endian +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM3b" -o "RefLib_cortexM3b_build.log" + +REM echo Building DSP Reference Library for Cortex-M4 Big Endian +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM4b" -o "RefLib_cortexM4b_build.log" + +REM echo Building DSP Reference Library for Cortex-M4 Big Endian Big Endian with single precision FPU +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM4bf" -o "RefLib_cortexM4bf_build.log" + +REM echo Building DSP Reference Library for Cortex-M7 Big Endian +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7b" -o "RefLib_cortexM7b_build.log" + +REM echo Building DSP Reference Library for Cortex-M7 Big Endian with single precision FPU +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7bfsp" -o "RefLib_cortexM7bfsp_build.log" + +REM echo Building DSP Reference Library for Cortex-M7 Big Endian with double precision FPU +REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7bfdp" -o "RefLib_cortexM7bfdp_build.log" + +goto deleteIntermediateFiles + + +:deleteIntermediateFiles +echo. +echo Deleting intermediate files +rmdir /S /Q IntermediateFiles +del /Q *.bak +del /Q *.dep +del /Q *.uvguix.* +del /Q ArInp.* + +goto changeDir + + +:changeDir +cd %CURDIR% +goto end + +:err + +:help +echo Syntax: buildRefLibs toolchain +echo. +echo toolchain: ARM ^| ARMCLANG ^| GCC +echo. +echo e.g.: buildRefLibs ARM + +:end diff --git a/DSP/DSP_Lib_TestSuite/log2txt.py b/DSP/DSP_Lib_TestSuite/log2txt.py new file mode 100644 index 0000000..7cbbb96 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/log2txt.py @@ -0,0 +1,110 @@ +#!/usr/bin/python3 + +import sys +import os + +error = 1 + + +def parseLog(filename): + + inFileName = filename + outFileName = os.path.splitext(inFileName)[0] + '_parsed' + os.path.splitext(inFileName)[1] + + infile = open(inFileName).read() + infile = infile.split('\n') + + outfile = open(outFileName, 'w') + + count = 0 + strName = "" + strNr = -1 + strFUT = "" + coverageInfo = 0 + + for line in infile: + if line.find("==================================================") != -1: + continue + if line.find("--------------------------------------------------") != -1: + continue + if line.find("Start: Group") != -1: + outfile.write("\n") + continue + if line.find("End: Group") != -1: + outfile.write("\n") + continue + if line.find("Start: Test") != -1: + outfile.write("\n") + continue + if line.find("End: Test") != -1: + outfile.write("\n") + continue + if line.find("Start Dump: String") != -1: + continue + if line.find("End Dump: String") != -1: + strName = strName.rstrip("\n") + outfile.write(strName) + if strNr == 3: + strFUT = strName +# else: +# strFUT == "" + if strName == "Group Name:": + strNr = 1 + outfile.write(" ") + elif strName == "Test Name:": + strNr = 2 + outfile.write(" ") + elif strName == "Function Under Test:": + strNr = 3 + outfile.write(" ") + else: + strNr = 4 + if len(strName) < 128: + outfile.write("\n") + strName = "" + continue + if line.find("Start: Coverage Information") != -1: + coverageInfo = 1 + outfile.write(line) + outfile.write("\n") + if line.find("End: Coverage Information") != -1: + strFUT == "" + coverageInfo = 0 + if coverageInfo == 1: +# if line.find(strFUT) == -1: #this line contains no relevant coverage info +# continue + if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1: + outfile.write(line + "\n") + continue + if line.find("0x") == 0: #this is a line to translate + line = line[12:35] + line[37:61] + nums = line.split(' ') + for num in nums: + intNum = int(num, base=16) +# if intNum == 10: +# continue + if intNum == 0: + continue + strName += str(chr(intNum)) + continue + outfile.write(line) + outfile.write("\n") + +def print_usage(sys_argv): + script_name = sys_argv[0] + usage_str = "Syntax: {0} filename\n" + + print (usage_str) + +def exit_on_error(sys_argv): + print_usage(sys_argv) + exit(1) + +if __name__ == '__main__': + arg_len = len(sys.argv) + + if arg_len != 2: + exit_on_error(sys.argv) + + if error == parseLog(sys.argv[1]): + exit_on_error(sys.argv) diff --git a/DSP/DSP_Lib_TestSuite/parseLog.py b/DSP/DSP_Lib_TestSuite/parseLog.py index 0bbc357..97354f7 100644 --- a/DSP/DSP_Lib_TestSuite/parseLog.py +++ b/DSP/DSP_Lib_TestSuite/parseLog.py @@ -1,6 +1,8 @@ +#!/usr/bin/python3 + import sys -toolchain_list = ["ARM", "GCC"] +toolchain_list = ["ARM", "GCC", "ARMCLANG"] core_list = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp", "ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ] test_list = ["MPS2", "FVP", "Simulator"] @@ -9,15 +11,15 @@ error = 1 def parseLog(toolchain, core, test): if toolchain not in toolchain_list: - print "Error: Unkown toolchain '{0}'".format(toolchain) + print ("Error: Unkown toolchain '{0}'".format(toolchain)) return error if core not in core_list: - print "Error: Unkown core '{0}'".format(core) + print ("Error: Unkown core '{0}'".format(core)) return error if test not in test_list: - print "Error: Unkown test '{0}'".format(test) + print ("Error: Unkown test '{0}'".format(test)) return error inFileName = ".\DspLibTest_{2}\{0}\Logs\DspLibTest_{2}_{1}.log".format(toolchain, core, test) @@ -110,7 +112,7 @@ def print_usage(sys_argv): argument_desc += "\n test: {0}".format(" ".join(test_list)) argument_desc += "\n\ne.g.: parseLog ARM cortexM3l FVP" - print usage_str + argument_desc + print (usage_str + argument_desc) def exit_on_error(sys_argv): print_usage(sys_argv) diff --git a/DSP/DSP_Lib_TestSuite/parseLog_SV.py b/DSP/DSP_Lib_TestSuite/parseLog_SV.py new file mode 100644 index 0000000..19d507c --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/parseLog_SV.py @@ -0,0 +1,128 @@ +#!/usr/bin/python3 + +import sys + +toolchain_list = ["ARM", "GCC", "ARMCLANG"] +core_list = ["cortexM0l", "cortexM3l", "cortexM4l", "cortexM4lf", "cortexM7l", "cortexM7lfsp", "cortexM7lfdp", + "ARMv8MBLl", "ARMv8MMLl", "ARMv8MMLlfsp", "ARMv8MMLlfdp", "ARMv8MMLld", "ARMv8MMLldfsp", "ARMv8MMLldfdp" ] +test_list = ["MPS2", "FVP", "Simulator"] +error = 1 + + +def parseLog(toolchain, core, test): + if toolchain not in toolchain_list: + print ("Error: Unkown toolchain '{0}'".format(toolchain)) + return error + + if core not in core_list: + print ("Error: Unkown core '{0}'".format(core)) + return error + + if test not in test_list: + print ("Error: Unkown test '{0}'".format(test)) + return error + + inFileName = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}.log".format(toolchain, core, test) + outFileName = ".\DspLibTest_SV_{2}\{0}\Logs\DspLibTest_{2}_{1}_parsed.log".format(toolchain, core, test) + + infile = open(inFileName).read() + infile = infile.split('\n') + + outfile = open(outFileName, 'w') + + count = 0 + strName = "" + strNr = -1 + strFUT = "" + coverageInfo = 0 + + for line in infile: + if line.find("==================================================") != -1: + continue + if line.find("--------------------------------------------------") != -1: + continue + if line.find("Start: Group") != -1: + outfile.write("\n") + continue + if line.find("End: Group") != -1: + outfile.write("\n") + continue + if line.find("Start: Test") != -1: + outfile.write("\n") + continue + if line.find("End: Test") != -1: + outfile.write("\n") + continue + if line.find("Start Dump: String") != -1: + continue + if line.find("End Dump: String") != -1: + strName = strName.rstrip("\n") + outfile.write(strName) + if strNr == 3: + strFUT = strName +# else: +# strFUT == "" + if strName == "Group Name:": + strNr = 1 + outfile.write(" ") + elif strName == "Test Name:": + strNr = 2 + outfile.write(" ") + elif strName == "Function Under Test:": + strNr = 3 + outfile.write(" ") + else: + strNr = 4 + if len(strName) < 128: + outfile.write("\n") + strName = "" + continue + if line.find("Start: Coverage Information") != -1: + coverageInfo = 1 + outfile.write(line) + outfile.write("\n") + if line.find("End: Coverage Information") != -1: + strFUT == "" + coverageInfo = 0 + if coverageInfo == 1: +# if line.find(strFUT) == -1: #this line contains no relevant coverage info +# continue + if line.find("- 0%") == -1 and line.find("src") == -1 and line.find("Functions") != -1: + outfile.write(line + "\n") + continue + if line.find("0x") == 0: #this is a line to translate + line = line[12:35] + line[37:61] + nums = line.split(' ') + for num in nums: + intNum = int(num, base=16) +# if intNum == 10: +# continue + if intNum == 0: + continue + strName += str(chr(intNum)) + continue + outfile.write(line) + outfile.write("\n") + +def print_usage(sys_argv): + script_name = sys_argv[0] + usage_str = "Syntax: {0} toolchain core test\n".format(sys.argv[0]) + argument_desc = "\n toolchain: {0}".format(" ".join(toolchain_list)) + argument_desc += "\n core: {0}".format(" ".join(core_list)) + argument_desc += "\n test: {0}".format(" ".join(test_list)) + argument_desc += "\n\ne.g.: parseLog ARM cortexM3l FVP" + + print (usage_str + argument_desc) + +def exit_on_error(sys_argv): + print_usage(sys_argv) + exit(1) + +if __name__ == '__main__': + arg_len = len(sys.argv) + + if arg_len != 4: + exit_on_error(sys.argv) + + if error == parseLog(sys.argv[1], sys.argv[2], sys.argv[3]): + exit_on_error(sys.argv) diff --git a/DSP/DSP_Lib_TestSuite/runTest.bat b/DSP/DSP_Lib_TestSuite/runTest.bat new file mode 100644 index 0000000..1d8d4b7 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/runTest.bat @@ -0,0 +1,141 @@ +@echo off + +set UVEXE=C:\Keil_v5\UV4\UV4.EXE + +if .%1==. goto help +for %%a in (ARM GCC ARMCLANG) do if %1==%%a goto checkParam2 +echo parameter %1 not supported. +goto help + +:checkParam2 +if .%2==. goto help +for %%a in ( ^ + cortexM0l ^ + cortexM3l ^ + cortexM4l ^ + cortexM4lf ^ + cortexM7l ^ + cortexM7lfsp ^ + cortexM7lfdp ^ + ARMv8MBLl ^ + ARMv8MMLl ^ + ARMv8MMLlfsp ^ + ARMv8MMLlfdp ^ + ARMv8MMLld ^ + ARMv8MMLldfsp ^ + ARMv8MMLldfdp ^ + ) do if %2==%%a goto checkParam3 +echo parameter %2 not supported. +goto help + +:checkParam3 +if .%3==. goto help +for %%a in (MPS2 FVP Simulator) do if %3==%%a goto CheckLibraries +echo parameter %3 not supported. +goto help + +:CheckLibraries +if %1==ARM goto CheckLibrariesARM +if %1==ARMCLANG goto CheckLibrariesARMCLANG +if %1==GCC goto CheckLibrariesGCC +goto end + +:CheckLibrariesARM +if not exist ".\RefLibs\%1\Lib\arm_%2_ref.lib" (echo ".\RefLibs\%1\Lib\arm_%2_ref.lib" not found. & goto end) +if not exist "..\Lib\%1\arm_%2_math.lib" (echo "..\Lib\%1\arm_%2_ref.lib" not found. & goto end) +goto CopyLibrariesARM + +:CheckLibrariesARMCLANG +if not exist ".\RefLibs\%1\Lib\arm_%2_ref.lib" (echo ".\RefLibs\%1\Lib\arm_%2_ref.lib" not found. & goto end) +if not exist "..\Lib\%1\arm_%2_math.lib" (echo "..\Lib\%1\arm_%2_ref.lib" not found. & goto end) +goto CopyLibrariesARMCLANG + +:CheckLibrariesGCC +if not exist ".\RefLibs\%1\Lib\libarm_%2_ref.a" (echo ".\RefLibs\%1\Lib\libarm_%2_ref.a" not found. & goto end) +if not exist "..\Lib\%1\libarm_%2_math.a" (echo "..\Lib\%1\libarm_%2_math.a" not found. & goto end) +goto CopyLibrariesGCC + +:CopyLibrariesARM +copy /B ".\RefLibs\%1\Lib\arm_%2_ref.lib" .\DspLibTest_%3\%1\Lib\arm_ref.lib /B /Y +copy /B "..\Lib\%1\arm_%2_math.lib" .\DspLibTest_%3\%1\Lib\arm_math.lib /B /Y +goto buildProject + +:CopyLibrariesARMCLANG +copy /B ".\RefLibs\%1\Lib\arm_%2_ref.lib" .\DspLibTest_%3\%1\Lib\arm_ref.lib /B /Y +copy /B "..\Lib\%1\arm_%2_math.lib" .\DspLibTest_%3\%1\Lib\arm_math.lib /B /Y +goto buildProject + +:CopyLibrariesGCC +copy /B ".\RefLibs\%1\Lib\libarm_%2_ref.a" .\DspLibTest_%3\%1\Lib\libarm_ref.a /B /Y +copy /B "..\Lib\%1\libarm_%2_math.a" .\DspLibTest_%3\%1\Lib\libarm_math.a /B /Y +goto buildProject + +:buildProject + echo Build Test Project ... +%UVEXE% -r -j0 .\DspLibTest_%3\%1\DspLibTest_%3.uvprojx -t "%2" -o ".\Logs\DspLibTest_%3_%2_build.log" + + echo Run Test ... +del /Q ".\DspLibTest_%3\%1\Logs\DspLibTest_%3.log" 2>NUL +del /Q ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2.log" 2>NUL + +rem get start time (The format of %TIME% is HH:MM:SS,CS for example 23:59:59,99) +set STARTTIME=%TIME% + +rem run the test +%UVEXE% -d .\DspLibTest_%3\%1\DspLibTest_%3.uvprojx -t "%2" + +rem get end time +set ENDTIME=%TIME% + +rem calculate duration +rem Change formatting for the start and end times +for /F "tokens=1-4 delims=:.," %%a in ("%STARTTIME%") do ( + set /A "start=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100" +) + +for /F "tokens=1-4 delims=:.," %%a in ("%ENDTIME%") do ( + set /A "end=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100" +) + +rem Test midnight rollover. If so, add 1 day=8640000 1/100ths secs +if %end% lss %start% set /a end+=8640000 + +rem Calculate the elapsed time by subtracting values +set /A elapsed=end-start + +rem Format the results for output +set /A hh=elapsed/(60*60*100), rest=elapsed%%(60*60*100), mm=rest/(60*100), rest%%=60*100, ss=rest/100, cc=rest%%100 +if %hh% lss 10 set hh=0%hh% +if %mm% lss 10 set mm=0%mm% +if %ss% lss 10 set ss=0%ss% +if %cc% lss 10 set cc=0%cc% + +set DURATION=%hh%:%mm%:%ss%,%cc% + +rem write time to file +echo Test %1 %2 : > ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" +echo Start time: %STARTTIME% >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" +echo End time: %ENDTIME% >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" +echo Duration: %DURATION% >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" + + echo Copy Logfile ... +copy /B ".\DspLibTest_%3\%1\Logs\DspLibTest_%3.log" ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2.log" + +goto end + + +:help +echo. +echo Syntax: runTest toolchain core test +echo. +echo toolchain: ARM ^| GCC +echo core: cortexM0l ^| cortexM3l ^| cortexM4l ^| cortexM4lf ^| cortexM7l ^| cortexM7lfsp ^| cortexM7lfdp +echo ARMv8MBLl +echo ARMv8MMLl ^| ARMv8MMLlfsp ^| ARMv8MMLlfdp +echo ARMv8MMLld ^| ARMv8MMLldfsp ^| ARMv8MMLldfdp +echo test: MPS2 ^| FVP ^| Simulator +echo. +echo e.g.: runTest ARM cortexM3l Simulator + +:end +@echo on diff --git a/DSP/DSP_Lib_TestSuite/runTest_SV.bat b/DSP/DSP_Lib_TestSuite/runTest_SV.bat new file mode 100644 index 0000000..e695441 --- /dev/null +++ b/DSP/DSP_Lib_TestSuite/runTest_SV.bat @@ -0,0 +1,105 @@ +@echo off + +set UVEXE=C:\Keil_v5\UV4\UV4.EXE + +if .%1==. goto help +for %%a in (ARM GCC ARMCLANG) do if %1==%%a goto checkParam2 +echo parameter %1 not supported. +goto help + +:checkParam2 +if .%2==. goto help +for %%a in ( ^ + cortexM0l ^ + cortexM3l ^ + cortexM4l ^ + cortexM4lf ^ + cortexM7l ^ + cortexM7lfsp ^ + cortexM7lfdp ^ + ARMv8MBLl ^ + ARMv8MMLl ^ + ARMv8MMLlfsp ^ + ARMv8MMLlfdp ^ + ARMv8MMLld ^ + ARMv8MMLldfsp ^ + ARMv8MMLldfdp ^ + ) do if %2==%%a goto checkParam3 +echo parameter %2 not supported. +goto help + +:checkParam3 +if .%3==. goto help +for %%a in (MPS2 FVP Simulator) do if %3==%%a goto buildProject +echo parameter %3 not supported. +goto help + +:buildProject + echo Build Test Project ... +%UVEXE% -r -j0 .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2" -o ".\Logs\DspLibTest_%3_%2_build.log" + + echo Run Test ... +del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" 2>NUL +del /Q ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log" 2>NUL + +rem get start time (The format of %TIME% is HH:MM:SS,CS for example 23:59:59,99) +set STARTTIME=%TIME% + +rem run the test +%UVEXE% -d .\DspLibTest_SV_%3\%1\DspLibTest_%3.uvprojx -t "%2" + +rem get end time +set ENDTIME=%TIME% + +rem calculate duration +rem Change formatting for the start and end times +for /F "tokens=1-4 delims=:.," %%a in ("%STARTTIME%") do ( + set /A "start=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100" +) + +for /F "tokens=1-4 delims=:.," %%a in ("%ENDTIME%") do ( + set /A "end=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100" +) + +rem Test midnight rollover. If so, add 1 day=8640000 1/100ths secs +if %end% lss %start% set /a end+=8640000 + +rem Calculate the elapsed time by subtracting values +set /A elapsed=end-start + +rem Format the results for output +set /A hh=elapsed/(60*60*100), rest=elapsed%%(60*60*100), mm=rest/(60*100), rest%%=60*100, ss=rest/100, cc=rest%%100 +if %hh% lss 10 set hh=0%hh% +if %mm% lss 10 set mm=0%mm% +if %ss% lss 10 set ss=0%ss% +if %cc% lss 10 set cc=0%cc% + +set DURATION=%hh%:%mm%:%ss%,%cc% + +rem write time to file +echo Test %1 %2 : > ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log" +echo Start time: %STARTTIME% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log" +echo End time: %ENDTIME% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log" +echo Duration: %DURATION% >> ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2_time.log" + + echo Copy Logfile ... +copy /B ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3.log" ".\DspLibTest_SV_%3\%1\Logs\DspLibTest_%3_%2.log" + +goto end + + +:help +echo. +echo Syntax: runTest toolchain core test +echo. +echo toolchain: ARM ^| ARMCLANG ^| GCC +echo core: cortexM0l ^| cortexM3l ^| cortexM4l ^| cortexM4lf ^| cortexM7l ^| cortexM7lfsp ^| cortexM7lfdp +echo ARMv8MBLl +echo ARMv8MMLl ^| ARMv8MMLlfsp ^| ARMv8MMLlfdp +echo ARMv8MMLld ^| ARMv8MMLldfsp ^| ARMv8MMLldfdp +echo test: MPS2 ^| FVP ^| Simulator +echo. +echo e.g.: runTest ARM cortexM3l Simulator + +:end +@echo on -- cgit