diff options
Diffstat (limited to 'docs/Core/html/group__mpu__functions.html')
| -rw-r--r-- | docs/Core/html/group__mpu__functions.html | 59 |
1 files changed, 51 insertions, 8 deletions
diff --git a/docs/Core/html/group__mpu__functions.html b/docs/Core/html/group__mpu__functions.html index 0803dee..82bccc6 100644 --- a/docs/Core/html/group__mpu__functions.html +++ b/docs/Core/html/group__mpu__functions.html @@ -3,8 +3,8 @@ <head> <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> <meta http-equiv="X-UA-Compatible" content="IE=9"/> -<title>MPU Functions for Armv7-M</title> -<title>CMSIS-Core (Cortex-M): MPU Functions for Armv7-M</title> +<title>MPU Functions for Armv6-M/v7-M</title> +<title>CMSIS-Core (Cortex-M): MPU Functions for Armv6-M/v7-M</title> <link href="tabs.css" rel="stylesheet" type="text/css"/> <link href="cmsis.css" rel="stylesheet" type="text/css" /> <script type="text/javascript" src="jquery.js"></script> @@ -32,7 +32,7 @@ <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> <td style="padding-left: 0.5em;"> <div id="projectname">CMSIS-Core (Cortex-M) -  <span id="projectnumber">Version 5.1.2</span> +  <span id="projectnumber">Version 5.3.0</span> </div> <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div> </td> @@ -113,7 +113,7 @@ $(document).ready(function(){initNavTree('group__mpu__functions.html','');}); <a href="#define-members">Macros</a> | <a href="#func-members">Functions</a> </div> <div class="headertitle"> -<div class="title">MPU Functions for Armv7-M</div> </div> +<div class="title">MPU Functions for Armv6-M/v7-M</div> </div> </div><!--header--> <div class="contents"> @@ -160,6 +160,8 @@ Functions</h2></td></tr> <tr class="separator:ga16931f9ad84d7289e8218e169ae6db5d"><td class="memSeparator" colspan="2"> </td></tr> <tr class="memitem:ga042ba1a6a1a58795231459ac0410b809"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#ga042ba1a6a1a58795231459ac0410b809">ARM_MPU_SetRegionEx</a> (uint32_t rnr, uint32_t rbar, uint32_t rasr)</td></tr> <tr class="separator:ga042ba1a6a1a58795231459ac0410b809"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gac1a949403bf84eecaf407003fb553ae7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (volatile uint32_t *dst, const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</td></tr> +<tr class="separator:gac1a949403bf84eecaf407003fb553ae7"><td class="memSeparator" colspan="2"> </td></tr> <tr class="memitem:gafa27b26d5847fa8e465584e376b6078a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a> (MPU_Region_t const *table, uint32_t cnt)</td></tr> <tr class="separator:gafa27b26d5847fa8e465584e376b6078a"><td class="memSeparator" colspan="2"> </td></tr> </table> @@ -403,7 +405,7 @@ Functions</h2></td></tr> </table> </dd> </dl> -<p>The function <a class="el" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a> writes to the register <a class="el" href="structMPU__Type.html#a769178ef949f0d5d8f18ddbd9e4e926f">MPU->CTRL</a> and sets bit ENABLE. The parameter <em>MPU_CTRL</em> provides additional bit values (see table below) that configure the MPU behaviour. For processors that implement an <b>MPU Fault Handler</b> the <a class="el" href="group__NVIC__gr.html">MemoryManagement_IRQn</a> exception is enabled by setting the bit MEMFAULTACT in register SBC->SHCSR.</p> +<p>The function <a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> writes to the register <a class="el" href="structMPU__Type.html#a769178ef949f0d5d8f18ddbd9e4e926f">MPU->CTRL</a> and sets bit ENABLE. The parameter <em>MPU_CTRL</em> provides additional bit values (see table below) that configure the MPU behaviour. For processors that implement an <b>MPU Fault Handler</b> the <a class="el" href="group__NVIC__gr.html">MemoryManagement_IRQn</a> exception is enabled by setting the bit MEMFAULTACT in register SBC->SHCSR.</p> <p>The following table contains possible values for the parameter <em>MPU_CTRL</em> that set specific bits in register MPU->CTRL. </p> <table class="doxtable"> <tr> @@ -453,11 +455,11 @@ Functions</h2></td></tr> </table> </dd> </dl> -<dl class="section note"><dt>Note</dt><dd>only up to 16 regions can be handled as the function <a class="el" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a> uses the REGION field in <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU->RBAR</a>.</dd></dl> +<dl class="section note"><dt>Note</dt><dd>only up to 16 regions can be handled as the function <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a> uses the REGION field in <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU->RBAR</a>.</dd></dl> <p><b>Example:</b> </p> <div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[3][4] = {</div> <div class="line"> {</div> -<div class="line"> { .<a class="code" href="structARM__MPU__Region__t.html#aa5e3c6aeaddbc0c283085dc971dd1a22">RBAR</a> = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0UL, 0x08000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB) },</div> +<div class="line"> { .<a class="code" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0UL, 0x08000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB) },</div> <div class="line"> { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(1UL, 0x20000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },</div> <div class="line"> { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(2UL, 0x40020000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB) }, </div> <div class="line"> { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(3UL, 0x40022000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB) }</div> @@ -483,6 +485,47 @@ Functions</h2></td></tr> </div><!-- fragment --> </div> </div> +<a class="anchor" id="gac1a949403bf84eecaf407003fb553ae7"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td> + <td>(</td> + <td class="paramtype">volatile uint32_t * </td> + <td class="paramname"><em>dst</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> </td> + <td class="paramname"><em>src</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>len</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Memcopy with strictly ordered memory access, e.g. for register targets. </p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">dst</td><td>Destination data is copied to. </td></tr> + <tr><td class="paramname">src</td><td>Source data is copied from. </td></tr> + <tr><td class="paramname">len</td><td>Amount of data words to be copied. </td></tr> + </table> + </dd> +</dl> + +</div> +</div> <a class="anchor" id="ga16931f9ad84d7289e8218e169ae6db5d"></a> <div class="memitem"> <div class="memproto"> @@ -564,7 +607,7 @@ Functions</h2></td></tr> <!-- start footer part --> <div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> <ul> - <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved. + <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved. <!-- <a href="http://www.doxygen.org/index.html"> <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 |