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+</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">MISRA-C:2004 Compliance Exceptions </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>CMSIS-CORE uses the common coding rules for CMSIS components that are documented under <a href="../../General/html/index.html"><b>Introduction</b></a>.</p> +<p>CMSIS-CORE violates the following MISRA-C:2004 rules:</p> +<ul> +<li>Required Rule 8.5, object/function definition in header file.<br/> + Violated since function definitions in header files are used for function inlining'.</li> +</ul> +<ul> +<li>Advisory Rule 12.4, Side effects on right hand side of logical operator.<br/> + Violated because volatile is used for core register definitions.</li> +</ul> +<ul> +<li>Advisory Rule 14.7, Return statement before end of function.<br/> + Violated to simplify code logic.</li> +</ul> +<ul> +<li>Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br/> + Violated since unions are used for effective representation of core registers.</li> +</ul> +<ul> +<li>Advisory Rule 19.4, Disallowed definition for macro.<br/> + Violated since macros are used for assembler keywords.</li> +</ul> +<ul> +<li>Advisory Rule 19.7, Function-like macro defined.<br/> + Violated since function-like macros are used to generate more efficient code.</li> +</ul> +<ul> +<li>Advisory Rule 19.16, all preprocessing directives must be valid.<br/> + Violated to set default settings for macros.</li> +</ul> +<p><device>.h files generated by <b>SVDConv.exe</b> violate the following MISRA-C:2004 rules:</p> +<ul> +<li>Advisory Rule 20.2, Re-use of C90 identifier pattern.<br/> + Violated since CMSIS macros begin with '__'. Since CMSIS is developed and verified with various compilers this approach is acceptable and avoids conflicts with user symbols.</li> +</ul> +<ul> +<li>Advisory Rule 19.1, Declaration before #include.<br/> + Violated since Interrupt Number Definition Type (IRQn_Type) must be defined before including the core header file. </li> +</ul> +</div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/_reg_map_pg.html b/Documentation/Core/html/_reg_map_pg.html new file mode 100644 index 0000000..64d9ec3 --- /dev/null +++ b/Documentation/Core/html/_reg_map_pg.html @@ -0,0 +1,303 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Register Mapping</title> +<title>CMSIS-CORE: Register Mapping</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('_reg_map_pg.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Register Mapping </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>The table below associates some common register names used in CMSIS to the register names used in Technical Reference Manuals.</p> +<table class="cmtable" summary="Register Mapping"> +<tr> +<th>CMSIS Register Name </th><th>Cortex-M3, Cortex-M4, and Cortex-M7 </th><th>Cortex-M0 and Cortex-M0+ </th><th>Register Name </th></tr> +<tr> +<th colspan="4">Nested Vectored Interrupt Controller (NVIC) Register Access </th></tr> +<tr> +<td>NVIC->ISER[] </td><td>NVIC_ISER0..7 </td><td>ISER </td><td>Interrupt Set-Enable Registers </td></tr> +<tr> +<td>NVIC->ICER[] </td><td>NVIC_ICER0..7 </td><td>ICER </td><td>Interrupt Clear-Enable Registers </td></tr> +<tr> +<td>NVIC->ISPR[] </td><td>NVIC_ISPR0..7 </td><td>ISPR </td><td>Interrupt Set-Pending Registers </td></tr> +<tr> +<td>NVIC->ICPR[] </td><td>NVIC_ICPR0..7 </td><td>ICPR </td><td>Interrupt Clear-Pending Registers </td></tr> +<tr> +<td>NVIC->IABR[] </td><td>NVIC_IABR0..7 </td><td>- </td><td>Interrupt Active Bit Register </td></tr> +<tr> +<td>NVIC->IP[] </td><td>NVIC_IPR0..59 </td><td>IPR0..7 </td><td>Interrupt Priority Register </td></tr> +<tr> +<td>NVIC->STIR </td><td>STIR </td><td>- </td><td>Software Triggered Interrupt Register </td></tr> +<tr> +<th colspan="4">System Control Block (SCB) Register Access </th></tr> +<tr> +<td>SCB->CPUID </td><td>CPUID </td><td>CPUID </td><td>CPUID Base Register </td></tr> +<tr> +<td>SCB->ICSR </td><td>ICSR </td><td>ICSR </td><td>Interrupt Control and State Register </td></tr> +<tr> +<td>SCB->VTOR </td><td>VTOR </td><td>- </td><td>Vector Table Offset Register </td></tr> +<tr> +<td>SCB->AIRCR </td><td>AIRCR </td><td>AIRCR </td><td>Application Interrupt and Reset Control Register </td></tr> +<tr> +<td>SCB->SCR </td><td>SCR </td><td>SCR </td><td>System Control Register </td></tr> +<tr> +<td>SCB->CCR </td><td>CCR </td><td>CCR </td><td>Configuration and Control Register </td></tr> +<tr> +<td>SCB->SHP[] </td><td>SHPR1..3 </td><td>SHPR2..3 </td><td>System Handler Priority Registers </td></tr> +<tr> +<td>SCB->SHCSR </td><td>SHCSR </td><td>SHCSR </td><td>System Handler Control and State Register </td></tr> +<tr> +<td>SCB->CFSR </td><td>CFSR </td><td>- </td><td>Configurable Fault Status Registers </td></tr> +<tr> +<td>SCB->HFSR </td><td>HFSR </td><td>- </td><td>HardFault Status Register </td></tr> +<tr> +<td>SCB->DFSR </td><td>DFSR </td><td>- </td><td>Debug Fault Status Register </td></tr> +<tr> +<td>SCB->MMFAR </td><td>MMFAR </td><td>- </td><td>MemManage Fault Address Register </td></tr> +<tr> +<td>SCB->BFAR </td><td>BFAR </td><td>- </td><td>BusFault Address Register </td></tr> +<tr> +<td>SCB->AFSR </td><td>AFSR </td><td>- </td><td>Auxiliary Fault Status Register </td></tr> +<tr> +<td>SCB->PFR[] </td><td>ID_PFR0..1 </td><td>- </td><td>Processor Feature Registers </td></tr> +<tr> +<td>SCB->DFR </td><td>ID_DFR0 </td><td>- </td><td>Debug Feature Register </td></tr> +<tr> +<td>SCB->ADR </td><td>ID_AFR0 </td><td>- </td><td>Auxiliary Feature Register </td></tr> +<tr> +<td>SCB->MMFR[] </td><td>ID_MMFR0..3 </td><td>- </td><td>Memory Model Feature Registers </td></tr> +<tr> +<td>SCB->ISAR[] </td><td>ID_ISAR0..4 </td><td>- </td><td>Instruction Set Attributes Registers </td></tr> +<tr> +<td>SCB->CPACR </td><td>CPACR </td><td>- </td><td>Coprocessor Access Control Register </td></tr> +<tr> +<th colspan="4">System Control and ID Registers not in the SCB (SCnSCB) Register Access </th></tr> +<tr> +<td>SCnSCB->ICTR </td><td>ICTR </td><td>- </td><td>Interrupt Controller Type Register </td></tr> +<tr> +<td>SCnSCB->ACTLR </td><td>ACTLR </td><td>- </td><td>Auxiliary Control Register </td></tr> +<tr> +<th colspan="4">System Timer (SysTick) Control and Status Register Access </th></tr> +<tr> +<td>SysTick->CTRL </td><td>STCSR </td><td>SYST_CSR </td><td>SysTick Control and Status Register </td></tr> +<tr> +<td>SysTick->LOAD </td><td>STRVR </td><td>SYST_RVR </td><td>SysTick Reload Value Register </td></tr> +<tr> +<td>SysTick->VAL </td><td>STCVR </td><td>SYST_CVR </td><td>SysTick Current Value Register </td></tr> +<tr> +<td>SysTick->CALIB </td><td>STCR </td><td>SYST_CALIB </td><td>SysTick Calibaration Value Register </td></tr> +<tr> +<th colspan="4">Data Watchpoint and Trace (DWT) Register Access </th></tr> +<tr> +<td>DWT->CTRL </td><td>DWT_CTRL </td><td>- </td><td>Control Register </td></tr> +<tr> +<td>DWT->CYCCNT </td><td>DWT_CYCCNT </td><td>- </td><td>Cycle Count Register </td></tr> +<tr> +<td>DWT->CPICNT </td><td>DWT_CPICNT </td><td>- </td><td>CPI Count Register </td></tr> +<tr> +<td>DWT->EXCCNT </td><td>DWT_EXCCNT </td><td>- </td><td>Exception Overhead Count Register </td></tr> +<tr> +<td>DWT->SLEEPCNT </td><td>DWT_SLEEPCNT </td><td>- </td><td>Sleep Count Register </td></tr> +<tr> +<td>DWT->LSUCNT </td><td>DWT_LSUCNT </td><td>- </td><td>LSU Count Register </td></tr> +<tr> +<td>DWT->FOLDCNT </td><td>DWT_FOLDCNT </td><td>- </td><td>Folded-instruction Count Register </td></tr> +<tr> +<td>DWT->PCSR </td><td>DWT_PCSR </td><td>- </td><td>Program Counter Sample Register </td></tr> +<tr> +<td>DWT->COMP0..3 </td><td>DWT_COMP0..3 </td><td>- </td><td>Comparator Register 0..3 </td></tr> +<tr> +<td>DWT->MASK0..3 </td><td>DWT_MASK0..3 </td><td>- </td><td>Mask Register 0..3 </td></tr> +<tr> +<td>DWT->FUNCTION0..3 </td><td>DWT_FUNCTION0..3 </td><td>- </td><td>Function Register 0..3 </td></tr> +<tr> +<th colspan="4">Instrumentation Trace Macrocell (ITM) Register Access </th></tr> +<tr> +<td>ITM->PORT[] </td><td>ITM_STIM0..31 </td><td>- </td><td>Stimulus Port Registers </td></tr> +<tr> +<td>ITM->TER </td><td>ITM_TER </td><td>- </td><td>Trace Enable Register </td></tr> +<tr> +<td>ITM->TPR </td><td>ITM_TPR </td><td>- </td><td>ITM Trace Privilege Register </td></tr> +<tr> +<td>ITM->TCR </td><td>ITM_TCR </td><td>- </td><td>Trace Control Register </td></tr> +<tr> +<th colspan="4">Trace Port Interface (TPIU) Register Access </th></tr> +<tr> +<td>TPI->SSPSR </td><td>TPIU_SSPR </td><td>- </td><td>Supported Parallel Port Size Register </td></tr> +<tr> +<td>TPI->CSPSR </td><td>TPIU_CSPSR </td><td>- </td><td>Current Parallel Port Size Register </td></tr> +<tr> +<td>TPI->ACPR </td><td>TPIU_ACPR </td><td>- </td><td>Asynchronous Clock Prescaler Register </td></tr> +<tr> +<td>TPI->SPPR </td><td>TPIU_SPPR </td><td>- </td><td>Selected Pin Protocol Register </td></tr> +<tr> +<td>TPI->FFSR </td><td>TPIU_FFSR </td><td>- </td><td>Formatter and Flush Status Register </td></tr> +<tr> +<td>TPI->FFCR </td><td>TPIU_FFCR </td><td>- </td><td>Formatter and Flush Control Register </td></tr> +<tr> +<td>TPI->FSCR </td><td>TPIU_FSCR </td><td>- </td><td>Formatter Synchronization Counter Register </td></tr> +<tr> +<td>TPI->TRIGGER </td><td>TRIGGER </td><td>- </td><td>TRIGGER </td></tr> +<tr> +<td>TPI->FIFO0 </td><td>FIFO data 0 </td><td>- </td><td>Integration ETM Data </td></tr> +<tr> +<td>TPI->ITATBCTR2 </td><td>ITATBCTR2 </td><td>- </td><td>ITATBCTR2 </td></tr> +<tr> +<td>TPI->ITATBCTR0 </td><td>ITATBCTR0 </td><td>- </td><td>ITATBCTR0 </td></tr> +<tr> +<td>TPI->FIFO1 </td><td>FIFO data 1 </td><td>- </td><td>Integration ITM Data </td></tr> +<tr> +<td>TPI->ITCTRL </td><td>TPIU_ITCTRL </td><td>- </td><td>Integration Mode Control </td></tr> +<tr> +<td>TPI->CLAIMSET </td><td>CLAIMSET </td><td>- </td><td>Claim tag set </td></tr> +<tr> +<td>TPI->CLAIMCLR </td><td>CLAIMCLR </td><td>- </td><td>Claim tag clear </td></tr> +<tr> +<td>TPI->DEVID </td><td>TPIU_DEVID </td><td>- </td><td>TPIU_DEVID </td></tr> +<tr> +<td>TPI->DEVTYPE </td><td>TPIU_DEVTYPE </td><td>- </td><td>TPIU_DEVTYPE </td></tr> +<tr> +<th colspan="4">Memory Protection Unit (MPU) Register Access </th></tr> +<tr> +<td>MPU->TYPE </td><td>MPU_TYPE </td><td>- </td><td>MPU Type Register </td></tr> +<tr> +<td>MPU->CTRL </td><td>MPU_CTRL </td><td>- </td><td>MPU Control Register </td></tr> +<tr> +<td>MPU->RNR </td><td>MPU_RNR </td><td>- </td><td>MPU Region Number Register </td></tr> +<tr> +<td>MPU->RBAR </td><td>MPU_RBAR </td><td>- </td><td>MPU Region Base Address Register </td></tr> +<tr> +<td>MPU->RASR </td><td>MPU_RASR </td><td>- </td><td>MPU Region Attribute and Size Register </td></tr> +<tr> +<td>MPU->RBAR_A1..3 </td><td>MPU_RBAR_A1..3 </td><td>- </td><td>MPU alias Register </td></tr> +<tr> +<td>MPU->RSAR_A1..3 </td><td>MPU_RSAR_A1..3 </td><td>- </td><td>MPU alias Register </td></tr> +<tr> +<th colspan="4">Floating Point Unit (FPU) Register Access [only Cortex-M4 and Cortex-M7 both with FPU] </th></tr> +<tr> +<td>FPU->FPCCR </td><td>FPCCR </td><td>- </td><td>FP Context Control Register </td></tr> +<tr> +<td>FPU->FPCAR </td><td>FPCAR </td><td>- </td><td>FP Context Address Register </td></tr> +<tr> +<td>FPU->FPDSCR </td><td>FPDSCR </td><td>- </td><td>FP Default Status Control Register </td></tr> +<tr> +<td>FPU->MVFR0..1 </td><td>MVFR0..1 </td><td>- </td><td>Media and VFP Feature Registers </td></tr> +</table> +</div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/_templates_pg.html b/Documentation/Core/html/_templates_pg.html new file mode 100644 index 0000000..b5bc0e9 --- /dev/null +++ b/Documentation/Core/html/_templates_pg.html @@ -0,0 +1,212 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Template Files</title> +<title>CMSIS-CORE: Template Files</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('_templates_pg.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Template Files </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>ARM supplies CMSIS-CORE template files for the all supported Cortex-M processors and various compiler vendors. Refer to the list of <a class="el" href="index.html#tested_tools_sec">Tested and Verified Toolchains</a> for compliance. These template files include the following:</p> +<ul> +<li>Register names of the Core Peripherals and names of the Core Exception Vectors.</li> +<li>Functions to access core peripherals, special CPU instructions and SIMD instructions (for Cortex-M4 and Cortex-M7)</li> +<li>Generic startup code and system configuration code.</li> +</ul> +<p>The detailed file structure of the CMSIS-CORE is shown in the following picture.</p> +<div class="image"> +<img src="CMSIS_CORE_Files.png" alt="CMSIS_CORE_Files.png"/> +<div class="caption"> +CMSIS-CORE File Structure</div></div> + <h1><a class="anchor" id="template_files_sec"></a> +Template Files</h1> +<p>The CMSIS-CORE template files should be extended by the silicon vendor to reflect the actual device and device peripherals. Silicon vendors add in this context the:</p> +<ul> +<li><b>Device Peripheral Access Layer</b> that provides definitions for device-specific peripherals.</li> +<li><b>Access Functions for Peripherals</b> (optional) that provides additional helper functions to access device-specific peripherals.</li> +<li><b>Interrupt vectors</b> in the startup file that are device specific.</li> +</ul> +<table class="cmtable"> +<tr> +<th>Template File </th><th>Description </th></tr> +<tr> +<td>.\Device\_Template_Vendor\Vendor\Device\Source\ARM\startup_Device.s </td><td>Startup file template for ARM C/C++ Compiler. </td></tr> +<tr> +<td>.\Device\_Template_Vendor\Vendor\Device\Source\GCC\startup_Device.s </td><td>Startup file template for GNU GCC ARM Embedded Compiler. </td></tr> +<tr> +<td>.\Device\_Template_Vendor\Vendor\Device\Source\IAR\startup_Device.s </td><td>Startup file template for IAR C/C++ Compiler. </td></tr> +<tr> +<td>.\Device\_Template_Vendor\Vendor\Device\Source\system_Device.c </td><td>Generic system_Device.c file for system configuration (i.e. processor clock and memory bus system). </td></tr> +<tr> +<td>.\Device\_Template_Vendor\Vendor\Device\Include\Device.h </td><td>Generic device header file. Needs to be extended with the device-specific peripheral registers. Optionally functions that access the peripherals can be part of that file. </td></tr> +<tr> +<td>.\Device\_Template_Vendor\Vendor\Device\Include\system_Device.h </td><td>Generic system device configuration include file. </td></tr> +</table> +<p>In addition ARM provides the following core header files that do not need any modifications.</p> +<table class="cmtable"> +<tr> +<th>Core Header Files </th><th>Description </th></tr> +<tr> +<td><b>core_<cpu>.h</b> </td><td>Defines the core peripherals and provides helper functions that access the core registers. This file is available for all supported processors:<ul> +<li>core_cm0.h: for the Cortex-M0 processor</li> +<li>core_cm0plus.h: for the Cortex-M0+ processor</li> +<li>core_cm3.h: for the Cortex-M3 processor</li> +<li>core_cm4.h: for the Cortex-M4 processor</li> +<li>core_cm7.h: for the Cortex-M7 processor</li> +<li>core_sc000.h: for the SecurCore SC000 processor</li> +<li>core_sc300.h: for the SecurCore SC300 processor </li> +</ul> +</td></tr> +<tr> +<td><b>core_cmInstr.h</b> </td><td>Defines intrinsic functions to access special Cortex-M instructions. </td></tr> +<tr> +<td><b>core_cmFunc.h</b> </td><td>Defines functions to access the Cortex-M core peripherals. </td></tr> +<tr> +<td><b>core_cm4_simd.h</b> </td><td>Defines intrinsic functions to access the SIMD instructions for Cortex-M4 and Cortex-M7. </td></tr> +</table> +<h1><a class="anchor" id="adapt_template_files_sec"></a> +Adaption of Template Files to Devices</h1> +<p>Copy the complete folder including files and replace:</p> +<ul> +<li>folder name 'Vendor' with the abbreviation for the device vendor e.g.: NXP.</li> +<li>folder name 'Device' with the specific device name e.g.: LPC17xx.</li> +<li>in the filenames 'Device' with the specific device name e.g.: LPC17xx.</li> +</ul> +<p>Each template file contains comments that start with <b>ToDo:</b> that describe a required modification. The template files contain placeholders:</p> +<table class="cmtable"> +<tr> +<th>Placeholder </th><th>Replaced with </th></tr> +<tr> +<td><Device> </td><td>the specific device name or device family name; i.e. LPC17xx. </td></tr> +<tr> +<td><DeviceInterrupt> </td><td>a specific interrupt name of the device; i.e. TIM1 for Timer 1. </td></tr> +<tr> +<td><DeviceAbbreviation> </td><td>short name or abbreviation of the device family; i.e. LPC. </td></tr> +<tr> +<td>Cortex-M# </td><td>the specific Cortex-M processor name; i.e. Cortex-M3. </td></tr> +</table> +<p>The adaption of the template files is described in detail on the following pages:</p> +<ul> +<li><a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a></li> +<li><a class="el" href="system_c_pg.html">System Configuration Files system_<device>.c and system_<device>.h</a></li> +<li><a class="el" href="device_h_pg.html">Device Header File <device.h></a> </li> +</ul> +</div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/_templates_pg.js b/Documentation/Core/html/_templates_pg.js new file mode 100644 index 0000000..972e1a1 --- /dev/null +++ b/Documentation/Core/html/_templates_pg.js @@ -0,0 +1,19 @@ +var _templates_pg = +[ + [ "Template Files", "_templates_pg.html#template_files_sec", null ], + [ "Adaption of Template Files to Devices", "_templates_pg.html#adapt_template_files_sec", null ], + [ "Startup File startup_<device>.s", "startup_s_pg.html", [ + [ "startup_Device.s Template File", "startup_s_pg.html#startup_s_sec", null ] + ] ], + [ "System Configuration Files system_<device>.c and system_<device>.h", "system_c_pg.html", [ + [ "system_Device.c Template File", "system_c_pg.html#system_Device_sec", null ], + [ "system_Device.h Template File", "system_c_pg.html#system_Device_h_sec", null ] + ] ], + [ "Device Header File <device.h>", "device_h_pg.html", [ + [ "Interrupt Number Definition", "device_h_pg.html#interrupt_number_sec", null ], + [ "Configuration of the Processor and Core Peripherals", "device_h_pg.html#core_config_sect", null ], + [ "CMSIS Version and Processor Information", "device_h_pg.html#core_version_sect", null ], + [ "Device Peripheral Access Layer", "device_h_pg.html#device_access", null ], + [ "Device.h Template File", "device_h_pg.html#device_h_sec", null ] + ] ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/_using__a_r_m_pg.html b/Documentation/Core/html/_using__a_r_m_pg.html new file mode 100644 index 0000000..b8b2a16 --- /dev/null +++ b/Documentation/Core/html/_using__a_r_m_pg.html @@ -0,0 +1,169 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Using CMSIS with generic ARM Processors</title> +<title>CMSIS-CORE: Using CMSIS with generic ARM Processors</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('_using__a_r_m_pg.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Using CMSIS with generic ARM Processors </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>ARM provides CMSIS-CORE files for the supported ARM Processors and for various compiler vendors. These files can be used when standard ARM processors should be used in a project. The table below lists the folder and device names of the ARM processors.</p> +<table class="cmtable"> +<tr> +<th>Folder </th><th>Processor </th><th>Description </th></tr> +<tr> +<td>".\Device\ARM\ARMCM0" </td><td>Cortex-M0 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the Cortex-M0 processor. The device name is ARMCM0 and the name of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is <ARMCM0.h>. </td></tr> +<tr> +<td>".\Device\ARM\ARMCM0plus" </td><td>Cortex-M0+ </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the Cortex-M0+ processor. The device name is ARMCM0plus and the name of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is <ARMCM0plus.h>. </td></tr> +<tr> +<td>".\Device\ARM\ARMCM3" </td><td>Cortex-M3 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the Cortex-M3 processor. The device name is ARMCM3 and the name of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is <ARMCM3.h>. </td></tr> +<tr> +<td>".\Device\ARM\ARMCM4" </td><td>Cortex-M4 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the Cortex-M4 processor. The device name is ARMCM4 and the name of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is <ARMCM4.h>. </td></tr> +<tr> +<td>".\Device\ARM\ARMCM7" </td><td>Cortex-M7 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the Cortex-M7 processor. The device name is ARMCM7 and the name of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is <ARMCM7.h>. </td></tr> +<tr> +<td>".\Device\ARM\ARMSC000" </td><td>SecurCore SC000 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the SecurCore SC000 processor. The device name is ARMSC000 and the name of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is <ARMSC000.h>. </td></tr> +<tr> +<td>".\Device\ARM\ARMSC300" </td><td>SecurCore SC300 </td><td>Contains <b>Include</b> and <b>Source</b> template files configured for the SecurCore SC300 processor. The device name is ARMSC300 and the name of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is <ARMSC300.h>. </td></tr> +</table> +<h1><a class="anchor" id="Using_ARM_Lib_sec"></a> +Create generic Libraries with CMSIS</h1> +<p>The CMSIS Processor and Core Peripheral files allow also to create generic libraries. The <a href="../../DSP/html/index.html"><b>CMSIS-DSP</b> </a> Libraries are an example for such a generic library.</p> +<p>To build a generic Library set the define <b><b>CMSIS_GENERIC</b> and include the relevant <b>core_<cpu>.h</b> CMSIS CPU & Core Access header file for the processor. The define <b></b>CMSIS_GENERIC</b> disables device-dependent features such as the <b>SysTick</b> timer and the <b>Interrupt System</b>. Refer to <a class="el" href="device_h_pg.html#core_config_sect">Configuration of the Processor and Core Peripherals</a> for a list of the available <b>core_<cpu>.h</b> header files.</p> +<p><b>Example:</b> </p> +<p>The following code section shows the usage of the <b>core_<cpu>.h</b> header files to build a generic library for Cortex-M0, Cortex-M3, Cortex-M4, or Cortex-M7. To select the processor, the source code uses the define <b>CORTEX_M7</b>, <b>CORTEX_M4</b>, <b>CORTEX_M3</b>, <b>CORTEX_M0</b>, or <b>CORTEX_M0PLUS</b>. By using this header file, the source code can access the functions for <a class="el" href="group___core___register__gr.html">Core Register Access</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html">Intrinsic Functions for CPU Instructions</a>, <a class="el" href="group__intrinsic___s_i_m_d__gr.html">Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]</a>, and <a class="el" href="group___i_t_m___debug__gr.html">Debug Access</a>.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CMSIS_GENERIC </span><span class="comment">/* disable NVIC and Systick functions */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor">#if defined (CORTEX_M7)</span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor"> #include "core_cm7.h"</span></div> +<div class="line"><span class="preprocessor">#if defined (CORTEX_M4)</span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor"> #include "core_cm4.h"</span></div> +<div class="line"><span class="preprocessor">#elif defined (CORTEX_M3)</span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor"> #include "core_cm3.h"</span></div> +<div class="line"><span class="preprocessor">#elif defined (CORTEX_M0)</span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor"> #include "core_cm0.h"</span></div> +<div class="line"><span class="preprocessor">#elif defined (CORTEX_M0PLUS)</span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor"> #include "core_cm0plus.h"</span></div> +<div class="line"><span class="preprocessor">#else</span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor"> #error "Processor not specified or unsupported."</span></div> +<div class="line"><span class="preprocessor">#endif</span></div> +</div><!-- fragment --> </div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="_using_pg.html">Using CMSIS in Embedded Applications</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/_using__c_m_s_i_s.html b/Documentation/Core/html/_using__c_m_s_i_s.html new file mode 100644 index 0000000..6c17a2e --- /dev/null +++ b/Documentation/Core/html/_using__c_m_s_i_s.html @@ -0,0 +1,177 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Basic CMSIS Example</title> +<title>CMSIS-CORE: Basic CMSIS Example</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('_using__c_m_s_i_s.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Basic CMSIS Example </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>A typical example for using the CMSIS layer is provided below. The example is based on a STM32F10x Device.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#include <stm32f10x.h></span> <span class="comment">// File name depends on device used</span></div> +<div class="line"> </div> +<div class="line">uint32_t <span class="keyword">volatile</span> msTicks; <span class="comment">// Counter for millisecond Interval</span></div> +<div class="line"> </div> +<div class="line"><span class="keywordtype">void</span> SysTick_Handler (<span class="keywordtype">void</span>) { <span class="comment">// SysTick Interrupt Handler</span></div> +<div class="line"> msTicks++; <span class="comment">// Increment Counter</span></div> +<div class="line">}</div> +<div class="line"> </div> +<div class="line"><span class="keywordtype">void</span> WaitForTick (<span class="keywordtype">void</span>) {</div> +<div class="line"> uint32_t curTicks;</div> +<div class="line"> </div> +<div class="line"> curTicks = msTicks; <span class="comment">// Save Current SysTick Value</span></div> +<div class="line"> <span class="keywordflow">while</span> (msTicks == curTicks) { <span class="comment">// Wait for next SysTick Interrupt</span></div> +<div class="line"> <a class="code" href="group__intrinsic___c_p_u__gr.html#gad3efec76c3bfa2b8528ded530386c563" title="Wait For Event.">__WFE</a> (); <span class="comment">// Power-Down until next Event/Interrupt</span></div> +<div class="line"> }</div> +<div class="line">}</div> +<div class="line"> </div> +<div class="line"><span class="keywordtype">void</span> TIM1_UP_IRQHandler (<span class="keywordtype">void</span>) { <span class="comment">// Timer Interrupt Handler</span></div> +<div class="line"> ; <span class="comment">// Add user code here</span></div> +<div class="line">}</div> +<div class="line"> </div> +<div class="line"><span class="keywordtype">void</span> timer1_init(<span class="keywordtype">int</span> frequency) { <span class="comment">// Set up Timer (device specific)</span></div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798" title="Set the priority for an interrupt.">NVIC_SetPriority</a> (TIM1_UP_IRQn, 1); <span class="comment">// Set Timer priority</span></div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f" title="Enable an external interrupt.">NVIC_EnableIRQ</a> (TIM1_UP_IRQn); <span class="comment">// Enable Timer Interrupt</span></div> +<div class="line">}</div> +<div class="line"> </div> +<div class="line"> </div> +<div class="line"><span class="keywordtype">void</span> Device_Initialization (<span class="keywordtype">void</span>) { <span class="comment">// Configure & Initialize MCU</span></div> +<div class="line"> <span class="keywordflow">if</span> (<a class="code" href="group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427" title="System Tick Timer Configuration.">SysTick_Config</a> (<a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6" title="Variable to hold the system core clock value.">SystemCoreClock</a> / 1000)) { <span class="comment">// SysTick 1mSec</span></div> +<div class="line"> : <span class="comment">// Handle Error </span></div> +<div class="line"> }</div> +<div class="line"> timer1_init (); <span class="comment">// setup device-specific timer</span></div> +<div class="line">}</div> +<div class="line"> </div> +<div class="line"> </div> +<div class="line"><span class="comment">// The processor clock is initialized by CMSIS startup + system file</span></div> +<div class="line"><span class="keywordtype">void</span> main (<span class="keywordtype">void</span>) { <span class="comment">// user application starts here</span></div> +<div class="line"> Device_Initialization (); <span class="comment">// Configure & Initialize MCU</span></div> +<div class="line"> <span class="keywordflow">while</span> (1) { <span class="comment">// Endless Loop (the Super-Loop)</span></div> +<div class="line"> <a class="code" href="group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013" title="Globally disables interrupts and configurable fault handlers.">__disable_irq</a> (); <span class="comment">// Disable all interrupts</span></div> +<div class="line"> Get_InputValues (); <span class="comment">// Read Values</span></div> +<div class="line"> <a class="code" href="group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27" title="Globally enables interrupts and configurable fault handlers.">__enable_irq</a> (); <span class="comment">// Enable all interrupts </span></div> +<div class="line"> Calculation_Response (); <span class="comment">// Calculate Results</span></div> +<div class="line"> Output_Response (); <span class="comment">// Output Results</span></div> +<div class="line"> WaitForTick (); <span class="comment">// Synchronize to SysTick Timer</span></div> +<div class="line"> }</div> +<div class="line">}</div> +</div><!-- fragment --> </div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="_using_pg.html">Using CMSIS in Embedded Applications</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/_using__v_t_o_r_pg.html b/Documentation/Core/html/_using__v_t_o_r_pg.html new file mode 100644 index 0000000..ec02a35 --- /dev/null +++ b/Documentation/Core/html/_using__v_t_o_r_pg.html @@ -0,0 +1,181 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Using Interrupt Vector Remap</title> +<title>CMSIS-CORE: Using Interrupt Vector Remap</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('_using__v_t_o_r_pg.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Using Interrupt Vector Remap </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>Most Cortex-M processors provide VTOR register for remapping interrupt vectors. The following example shows a typical use case where the interrupt vectors are copied to RAM and the SysTick_Handler is replaced.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#include "ARMCM3.h"</span> <span class="comment">// Device header</span></div> +<div class="line"> </div> +<div class="line"><span class="comment">/* externals from startup_ARMCM3.s */</span></div> +<div class="line"><span class="keyword">extern</span> uint32_t __Vectors[]; <span class="comment">/* vector table ROM */</span></div> +<div class="line"> </div> +<div class="line"><span class="preprocessor">#define VECTORTABLE_SIZE (256) </span><span class="comment">/* size Cortex-M3 vector table */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define VECTORTABLE_ALIGNMENT (0x100ul) </span><span class="comment">/* 16 Cortex + 32 ARMCM3 = 48 words */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span> <span class="comment">/* next power of 2 = 256 */</span></div> +<div class="line"> </div> +<div class="line"><span class="comment">/* new vector table in RAM */</span></div> +<div class="line">uint32_t vectorTable_RAM[VECTORTABLE_SIZE] __attribute__(( aligned (VECTORTABLE_ALIGNMENT) ));</div> +<div class="line"> </div> +<div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div> +<div class="line"><span class="comment"> SysTick_Handler</span></div> +<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div> +<div class="line"><span class="keyword">volatile</span> uint32_t msTicks = 0; <span class="comment">/* counts 1ms timeTicks */</span></div> +<div class="line"><span class="keywordtype">void</span> SysTick_Handler(<span class="keywordtype">void</span>) {</div> +<div class="line"> msTicks++; <span class="comment">/* increment counter */</span></div> +<div class="line">}</div> +<div class="line"> </div> +<div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div> +<div class="line"><span class="comment"> SysTick_Handler (RAM)</span></div> +<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div> +<div class="line"><span class="keyword">volatile</span> uint32_t msTicks_RAM = 0; <span class="comment">/* counts 1ms timeTicks */</span></div> +<div class="line"><span class="keywordtype">void</span> SysTick_Handler_RAM(<span class="keywordtype">void</span>) {</div> +<div class="line"> msTicks_RAM++; <span class="comment">/* increment counter */</span></div> +<div class="line">}</div> +<div class="line"> </div> +<div class="line"><span class="comment">/*----------------------------------------------------------------------------</span></div> +<div class="line"><span class="comment"> MAIN function</span></div> +<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div> +<div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div> +<div class="line"> uint32_t i;</div> +<div class="line"> </div> +<div class="line"> <span class="keywordflow">for</span> (i = 0; i < VECTORTABLE_SIZE; i++) {</div> +<div class="line"> vectorTable_RAM[i] = __Vectors[i]; <span class="comment">/* copy vector table to RAM */</span></div> +<div class="line"> }</div> +<div class="line"> <span class="comment">/* replace SysTick Handler */</span></div> +<div class="line"> vectorTable_RAM[<a class="code" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7" title="Exception 15: System Tick Interrupt.">SysTick_IRQn</a> + 16] = (uint32_t)SysTick_Handler_RAM;</div> +<div class="line"> </div> +<div class="line"> <span class="comment">/* relocate vector table */</span> </div> +<div class="line"> <a class="code" href="group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013" title="Globally disables interrupts and configurable fault handlers.">__disable_irq</a>();</div> +<div class="line"> SCB->VTOR = (uint32_t)&vectorTable_RAM;</div> +<div class="line"> <a class="code" href="group__intrinsic___c_p_u__gr.html#gacb2a8ca6eae1ba4b31161578b720c199" title="Data Synchronization Barrier.">__DSB</a>();</div> +<div class="line"> <a class="code" href="group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27" title="Globally enables interrupts and configurable fault handlers.">__enable_irq</a>();</div> +<div class="line"> </div> +<div class="line"> <a class="code" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f" title="Function to update the variable SystemCoreClock.">SystemCoreClockUpdate</a>(); <span class="comment">/* Get Core Clock Frequency */</span></div> +<div class="line"> <a class="code" href="group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427" title="System Tick Timer Configuration.">SysTick_Config</a>(<a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6" title="Variable to hold the system core clock value.">SystemCoreClock</a> / 1000ul); <span class="comment">/* Setup SysTick Timer for 1 msec */</span></div> +<div class="line"> </div> +<div class="line"> <span class="keywordflow">while</span>(1);</div> +<div class="line">}</div> +</div><!-- fragment --> </div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="_using_pg.html">Using CMSIS in Embedded Applications</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/_using_pg.html b/Documentation/Core/html/_using_pg.html new file mode 100644 index 0000000..591e7bc --- /dev/null +++ b/Documentation/Core/html/_using_pg.html @@ -0,0 +1,172 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Using CMSIS in Embedded Applications</title> +<title>CMSIS-CORE: Using CMSIS in Embedded Applications</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('_using_pg.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Using CMSIS in Embedded Applications </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>To use the CMSIS-CORE the following files are added to the embedded application:</p> +<ul> +<li><a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> with reset handler and exception vectors.</li> +<li><a class="el" href="system_c_pg.html">System Configuration Files system_<device>.c and system_<device>.h</a> with general device configuration (i.e. for clock and BUS setup).</li> +<li><a class="el" href="device_h_pg.html">Device Header File <device.h></a> gives access to processor core and all peripherals.</li> +</ul> +<dl class="section note"><dt>Note</dt><dd>The files <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> and <a class="el" href="system_c_pg.html">System Configuration Files system_<device>.c and system_<device>.h</a> may require application specific adaptations and therefore should be copied into the application project folder prior configuration. The <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is included in all source files that need device access and can be stored on a central include folder that is generic for all projects.</dd></dl> +<p>The <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> is executed after reset and calls <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>. After the system initialization control is transferred to the C/C++ run-time library which performs initialization and calls the <b>main</b> function in the user code. In addition the <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> contains all exception and interrupt vectors and implements a default function for every interrupt. It may also contain stack and heap configurations for the user application.</p> +<p>The <a class="el" href="system_c_pg.html">System Configuration Files system_<device>.c and system_<device>.h</a> performs the setup for the processor clock. The variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> indicates the CPU clock speed. <a class="el" href="group__system__init__gr.html">System and Clock Configuration</a> describes the minimum feature set. In addition the file may contain functions for the memory BUS setup and clock re-configuration.</p> +<p>The <a class="el" href="device_h_pg.html">Device Header File <device.h></a> is the central include file that the application programmer is using in the C source code. It provides the following features:</p> +<ul> +<li><a class="el" href="group__peripheral__gr.html">Peripheral Access</a> provides a standardized register layout for all peripherals. Optionally functions for device-specific peripherals may be available.</li> +<li><a class="el" href="group___n_v_i_c__gr.html">Interrupts and Exceptions (NVIC)</a> can be accessed with standardized symbols and functions for the Nested Interrupt Vector Controller (NVIC) are provided.</li> +<li><a class="el" href="group__intrinsic___c_p_u__gr.html">Intrinsic Functions for CPU Instructions</a> allow to access special instructions, for example for activating sleep mode or the NOP instruction.</li> +<li><a class="el" href="group__intrinsic___s_i_m_d__gr.html">Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]</a> provide access to the DSP-oriented instructions.</li> +<li><a class="el" href="group___sys_tick__gr.html">Systick Timer (SYSTICK)</a> function to configure and start a periodic timer interrupt.</li> +<li><a class="el" href="group___i_t_m___debug__gr.html">Debug Access</a> are functions that allow printf-style I/O via the CoreSight Debug Unit and ITM communication.</li> +</ul> +<div class="image"> +<img src="CMSIS_CORE_Files_user.png" alt="CMSIS_CORE_Files_user.png"/> +<div class="caption"> +CMSIS-CORE User Files</div></div> +<p> The CMSIS-CORE are device specific. In addition, the <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> is also compiler vendor specific. The various compiler vendor tool chains may provide folders that contain the CMSIS files for each supported device.</p> +<p>For example, the following files are provided in MDK-ARM to support the STM32F10x Connectivity Line device variants:</p> +<table class="cmtable"> +<tr> +<th>File </th><th>Description </th></tr> +<tr> +<td>".\ARM\Startup\ST\STM32F10x\startup_stm32f10x_cl.s" </td><td><a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> for the STM32F10x Connectivity Line device variants. </td></tr> +<tr> +<td>".\ARM\Startup\ST\STM32F10x\system_stmf10x.c" </td><td><a class="el" href="system_c_pg.html">System Configuration Files system_<device>.c and system_<device>.h</a> for the STM32F10x device families. </td></tr> +<tr> +<td>".\ARM\INC\ST\STM32F10x\stm32f10x.h" </td><td><a class="el" href="device_h_pg.html">Device Header File <device.h></a> for the STM32F10x device families. </td></tr> +<tr> +<td>".\ARM\INC\ST\STM32F10x\system_stm32f10x.h" </td><td><a class="el" href="system_c_pg.html#system_Device_h_sec">system_Device.h Template File</a> for the STM32F10x device families. </td></tr> +</table> +<dl class="section note"><dt>Note</dt><dd>The silicon vendors create these device-specific CMSIS-CORE files based on <a class="el" href="_templates_pg.html">Template Files</a> provide by ARM.</dd></dl> +<p>Thereafter, the functions described under <a href="Modules.html"><b>Reference</b> </a> can be used in the application.</p> +<p><b>Examples</b> </p> +<ul> +<li><a class="el" href="_using__c_m_s_i_s.html">Basic CMSIS Example</a> is a simple example that shows the usage of the CMSIS layer.</li> +<li><a class="el" href="_using__v_t_o_r_pg.html">Using Interrupt Vector Remap</a> shows how to remap the interrupt vector table.</li> +<li><a class="el" href="_using__a_r_m_pg.html">Using CMSIS with generic ARM Processors</a> explains how to use CMSIS-CORE for ARM processors. </li> +</ul> +</div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/_using_pg.js b/Documentation/Core/html/_using_pg.js new file mode 100644 index 0000000..69ebae1 --- /dev/null +++ b/Documentation/Core/html/_using_pg.js @@ -0,0 +1,8 @@ +var _using_pg = +[ + [ "Basic CMSIS Example", "_using__c_m_s_i_s.html", null ], + [ "Using Interrupt Vector Remap", "_using__v_t_o_r_pg.html", null ], + [ "Using CMSIS with generic ARM Processors", "_using__a_r_m_pg.html", [ + [ "Create generic Libraries with CMSIS", "_using__a_r_m_pg.html#Using_ARM_Lib_sec", null ] + ] ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/annotated.html b/Documentation/Core/html/annotated.html new file mode 100644 index 0000000..9459e29 --- /dev/null +++ b/Documentation/Core/html/annotated.html @@ -0,0 +1,152 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Data Structures</title> +<title>CMSIS-CORE: Data Structures</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script 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options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Data Structures</div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock">Here are the data structures with brief descriptions:</div><div class="directory"> +<table class="directory"> +<tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="union_a_p_s_r___type.html" target="_self">APSR_Type</a></td><td class="desc">Union type to access the Application Program Status Register (APSR)</td></tr> +<tr id="row_1_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="union_c_o_n_t_r_o_l___type.html" target="_self">CONTROL_Type</a></td><td class="desc">Union type to access the Control Registers (CONTROL)</td></tr> +<tr id="row_2_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_core_debug___type.html" target="_self">CoreDebug_Type</a></td><td class="desc">Structure type to access the Core Debug Register (CoreDebug)</td></tr> +<tr id="row_3_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_d_w_t___type.html" target="_self">DWT_Type</a></td><td class="desc">Structure type to access the Data Watchpoint and Trace Register (DWT)</td></tr> +<tr id="row_4_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_f_p_u___type.html" target="_self">FPU_Type</a></td><td class="desc">Structure type to access the Floating Point Unit (FPU)</td></tr> +<tr id="row_5_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="union_i_p_s_r___type.html" target="_self">IPSR_Type</a></td><td class="desc">Union type to access the Interrupt Program Status Register (IPSR)</td></tr> +<tr id="row_6_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_i_t_m___type.html" target="_self">ITM_Type</a></td><td class="desc">Structure type to access the Instrumentation Trace Macrocell Register (ITM)</td></tr> +<tr id="row_7_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_m_p_u___type.html" target="_self">MPU_Type</a></td><td class="desc">Structure type to access the Memory Protection Unit (MPU)</td></tr> +<tr id="row_8_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_n_v_i_c___type.html" target="_self">NVIC_Type</a></td><td class="desc">Structure type to access the Nested Vectored Interrupt Controller (NVIC)</td></tr> +<tr id="row_9_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_s_c_b___type.html" target="_self">SCB_Type</a></td><td class="desc">Structure type to access the System Control Block (SCB)</td></tr> +<tr id="row_10_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_s_cn_s_c_b___type.html" target="_self">SCnSCB_Type</a></td><td class="desc">Structure type to access the System Control and ID Register not in the SCB</td></tr> +<tr id="row_11_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_sys_tick___type.html" target="_self">SysTick_Type</a></td><td class="desc">Structure type to access the System Timer (SysTick)</td></tr> +<tr id="row_12_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_t_p_i___type.html" target="_self">TPI_Type</a></td><td class="desc">Structure type to access the Trace Port Interface Register (TPI)</td></tr> +<tr id="row_13_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="unionx_p_s_r___type.html" target="_self">xPSR_Type</a></td><td class="desc">Union type to access the Special-Purpose Program Status Registers (xPSR)</td></tr> +</table> +</div><!-- directory --> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:22 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/annotated.js b/Documentation/Core/html/annotated.js new file mode 100644 index 0000000..fa4ad87 --- /dev/null +++ b/Documentation/Core/html/annotated.js @@ -0,0 +1,17 @@ +var annotated = +[ + [ "APSR_Type", "union_a_p_s_r___type.html", "union_a_p_s_r___type" ], + [ "CONTROL_Type", "union_c_o_n_t_r_o_l___type.html", "union_c_o_n_t_r_o_l___type" ], + [ "CoreDebug_Type", "struct_core_debug___type.html", "struct_core_debug___type" ], + [ "DWT_Type", "struct_d_w_t___type.html", "struct_d_w_t___type" ], + [ "FPU_Type", "struct_f_p_u___type.html", "struct_f_p_u___type" ], + [ "IPSR_Type", "union_i_p_s_r___type.html", "union_i_p_s_r___type" ], + [ "ITM_Type", "struct_i_t_m___type.html", "struct_i_t_m___type" ], + [ "MPU_Type", "struct_m_p_u___type.html", "struct_m_p_u___type" ], + [ "NVIC_Type", "struct_n_v_i_c___type.html", "struct_n_v_i_c___type" ], + [ "SCB_Type", "struct_s_c_b___type.html", "struct_s_c_b___type" ], + [ "SCnSCB_Type", "struct_s_cn_s_c_b___type.html", "struct_s_cn_s_c_b___type" ], + [ "SysTick_Type", "struct_sys_tick___type.html", "struct_sys_tick___type" ], + [ "TPI_Type", "struct_t_p_i___type.html", "struct_t_p_i___type" ], + [ "xPSR_Type", "unionx_p_s_r___type.html", "unionx_p_s_r___type" ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/bc_s.png b/Documentation/Core/html/bc_s.png Binary files differnew file mode 100644 index 0000000..66f8e9a --- /dev/null +++ b/Documentation/Core/html/bc_s.png diff --git a/Documentation/Core/html/bdwn.png b/Documentation/Core/html/bdwn.png Binary files differnew file mode 100644 index 0000000..d400769 --- /dev/null +++ b/Documentation/Core/html/bdwn.png diff --git a/Documentation/Core/html/check.png b/Documentation/Core/html/check.png Binary files differnew file mode 100644 index 0000000..094e59c --- /dev/null +++ b/Documentation/Core/html/check.png diff --git a/Documentation/Core/html/classes.html b/Documentation/Core/html/classes.html new file mode 100644 index 0000000..2773f85 --- /dev/null +++ b/Documentation/Core/html/classes.html @@ -0,0 +1,158 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Data Structure Index</title> +<title>CMSIS-CORE: Data Structure Index</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> + <div id="navrow2" class="tabs2"> + <ul class="tablist"> + <li><a href="annotated.html"><span>Data Structures</span></a></li> + <li><a href="functions.html"><span>Data Fields</span></a></li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('classes.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Data Structure Index</div> </div> +</div><!--header--> +<div class="contents"> +<div class="qindex"><a class="qindex" href="#letter_A">A</a> | <a class="qindex" href="#letter_C">C</a> | <a class="qindex" href="#letter_D">D</a> | <a class="qindex" href="#letter_F">F</a> | <a class="qindex" href="#letter_I">I</a> | <a class="qindex" href="#letter_M">M</a> | <a class="qindex" href="#letter_N">N</a> | <a class="qindex" href="#letter_S">S</a> | <a class="qindex" href="#letter_T">T</a> | <a class="qindex" href="#letter_X">X</a></div> +<table style="margin: 10px; white-space: nowrap;" align="center" width="95%" border="0" cellspacing="0" cellpadding="0"> +<tr><td rowspan="2" valign="bottom"><a name="letter_A"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  A  </div></td></tr></table> +</td><td rowspan="2" valign="bottom"><a name="letter_D"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  D  </div></td></tr></table> +</td><td valign="top"><a class="el" href="struct_i_t_m___type.html">ITM_Type</a>   </td><td rowspan="2" valign="bottom"><a name="letter_S"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  S  </div></td></tr></table> +</td><td rowspan="2" valign="bottom"><a name="letter_X"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  X  </div></td></tr></table> +</td></tr> +<tr><td rowspan="2" valign="bottom"><a name="letter_M"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  M  </div></td></tr></table> +</td></tr> +<tr><td valign="top"><a class="el" href="union_a_p_s_r___type.html">APSR_Type</a>   </td><td valign="top"><a class="el" href="struct_d_w_t___type.html">DWT_Type</a>   </td><td valign="top"><a class="el" href="struct_s_c_b___type.html">SCB_Type</a>   </td><td valign="top"><a class="el" href="unionx_p_s_r___type.html">xPSR_Type</a>   </td></tr> +<tr><td rowspan="2" valign="bottom"><a name="letter_C"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  C  </div></td></tr></table> +</td><td rowspan="2" valign="bottom"><a name="letter_F"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  F  </div></td></tr></table> +</td><td valign="top"><a class="el" href="struct_m_p_u___type.html">MPU_Type</a>   </td><td valign="top"><a class="el" href="struct_s_cn_s_c_b___type.html">SCnSCB_Type</a>   </td><td></td></tr> +<tr><td rowspan="2" valign="bottom"><a name="letter_N"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  N  </div></td></tr></table> +</td><td valign="top"><a class="el" href="struct_sys_tick___type.html">SysTick_Type</a>   </td><td></td></tr> +<tr><td valign="top"><a class="el" href="union_c_o_n_t_r_o_l___type.html">CONTROL_Type</a>   </td><td valign="top"><a class="el" href="struct_f_p_u___type.html">FPU_Type</a>   </td><td rowspan="2" valign="bottom"><a name="letter_T"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  T  </div></td></tr></table> +</td><td></td></tr> +<tr><td valign="top"><a class="el" href="struct_core_debug___type.html">CoreDebug_Type</a>   </td><td rowspan="2" valign="bottom"><a name="letter_I"></a><table border="0" cellspacing="0" cellpadding="0"><tr><td><div class="ah">  I  </div></td></tr></table> +</td><td valign="top"><a class="el" href="struct_n_v_i_c___type.html">NVIC_Type</a>   </td><td></td></tr> +<tr><td></td><td></td><td valign="top"><a class="el" href="struct_t_p_i___type.html">TPI_Type</a>   </td><td></td></tr> +<tr><td></td><td valign="top"><a class="el" href="union_i_p_s_r___type.html">IPSR_Type</a>   </td><td></td><td></td><td></td></tr> +<tr><td></td><td></td><td></td><td></td><td></td></tr> +</table> +<div class="qindex"><a class="qindex" href="#letter_A">A</a> | <a class="qindex" href="#letter_C">C</a> | <a class="qindex" href="#letter_D">D</a> | <a class="qindex" href="#letter_F">F</a> | <a class="qindex" href="#letter_I">I</a> | <a class="qindex" href="#letter_M">M</a> | <a class="qindex" href="#letter_N">N</a> | <a class="qindex" href="#letter_S">S</a> | <a class="qindex" href="#letter_T">T</a> | <a class="qindex" href="#letter_X">X</a></div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:22 for CMSIS-CORE by ARM Ltd. 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padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} + +.params, .retval, .exception, .tparams { + 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"-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Revision History of CMSIS-CORE</title> +<title>CMSIS-CORE: Revision History of CMSIS-CORE</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" 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src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('core_revision_history.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span 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showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Revision History of CMSIS-CORE </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><table class="cmtable" summary="Core Exception Name"> +<tr> +<th>Version </th><th>Description </th></tr> +<tr> +<td>V4.30 </td><td>Corrected: DoxyGen function parameter comments.<br/> + Corrected: IAR toolchain: removed for <a class="el" href="group___n_v_i_c__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46">NVIC_SystemReset</a> the attribute(noreturn).<br/> + Corrected: GCC toolchain: supressed irrelevant compiler warnings.<br/> + Added: Support files for ARM Compiler v6 (cmsis_armcc_v6.h). </td></tr> +<tr> +<td>V4.20 </td><td>Corrected: MISRA-C:2004 violations. <br/> + Corrected: predefined macro for TI CCS Compiler. <br/> + Corrected: function <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga15d8899a173effb8ad8c7268da32b60e">__SHADD16</a> in arm_math.h. <br/> + Updated: cache functions for Cortex-M7. <br/> + Added: macros <a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a>, <a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">_FLD2VAL</a> to core_*.h. <br/> + Updated: functions <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga87618799672e1511e33964bc71467eb3">__QASX</a>, <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gab41eb2b17512ab01d476fc9d5bd19520">__QSAX</a>, <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gae0a649035f67627464fd80e7218c89d5">__SHASX</a>, <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gafadbd89c36b5addcf1ca10dd392db3e9">__SHSAX</a>. <br/> + Corrected: potential bug in function <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga15d8899a173effb8ad8c7268da32b60e">__SHADD16</a>. </td></tr> +<tr> +<td>V4.10 </td><td>Corrected: MISRA-C:2004 violations. <br/> + Corrected: intrinsic functions <a class="el" href="group__intrinsic___c_p_u__gr.html#gacb2a8ca6eae1ba4b31161578b720c199">__DSB</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#gab1c9b393641dc2d397b3408fdbe72b96">__DMB</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga93c09b4709394d81977300d5f84950e5">__ISB</a>. <br/> + Corrected: register definitions for ITCMCR register. <br/> + Corrected: register definitions for <a class="el" href="union_c_o_n_t_r_o_l___type.html">CONTROL_Type</a> register. <br/> + Added: functions <a class="el" href="group__fpu__functions__m7.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a>, <a class="el" href="group___dcache__functions__m7.html#ga503ef7ef58c0773defd15a82f6336c09">SCB_InvalidateDCache_by_Addr</a> to core_cm7.h. <br/> + Added: register definitions for <a class="el" href="union_a_p_s_r___type.html">APSR_Type</a>, <a class="el" href="union_i_p_s_r___type.html">IPSR_Type</a>, <a class="el" href="unionx_p_s_r___type.html">xPSR_Type</a> register. <br/> + Added: <a class="el" href="group___core___register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9">__set_BASEPRI_MAX</a> function to core_cmFunc.h. <br/> + Added: intrinsic functions <a class="el" href="group__intrinsic___c_p_u__gr.html#gad6f9f297f6b91a995ee199fbc796b863">__RBIT</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga90884c591ac5d73d6069334eba9d6c02">__CLZ</a> for Cortex-M0/CortexM0+. <br/> + </td></tr> +<tr> +<td>V4.00 </td><td>Added: Cortex-M7 support.<br/> + Added: intrinsic functions for <a class="el" href="group__intrinsic___c_p_u__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga9464d75db32846aa8295c3c3adfacb41">__LDRBT</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#gaa762b8bc5634ce38cb14d62a6b2aee32">__LDRHT</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga616504f5da979ba8a073d428d6e8d5c7">__LDRT</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#gad41aa59c92c0a165b7f98428d3320cd5">__STRBT</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga2b5d93b8e461755b1072a03df3f1722e">__STRHT</a>, and <a class="el" href="group__intrinsic___c_p_u__gr.html#ga625bc4ac0b1d50de9bcd13d9f050030e">__STRT</a> <br/> + </td></tr> +<tr> +<td>V3.40 </td><td>Corrected: C++ include guard settings.<br/> + </td></tr> +<tr> +<td>V3.30 </td><td>Added: COSMIC tool chain support.<br/> + Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4.<br/> + Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4.<br/> + Corrected: GCC/CLang warnings.<br/> + </td></tr> +<tr> +<td>V3.20 </td><td>Added: <a class="el" href="group__intrinsic___c_p_u__gr.html#ga92f5621626711931da71eaa8bf301af7">__BKPT</a> instruction intrinsic.<br/> + Added: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaea60757232f740ec6b09980eebb614ff">__SMMLA</a> instruction intrinsic for Cortex-M4.<br/> + Corrected: <a class="el" href="group___i_t_m___debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a>.<br/> + Corrected: <a class="el" href="group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">__enable_irq</a>, <a class="el" href="group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a> and inline assembly for GCC Compiler.<br/> + Corrected: <a class="el" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a> and VTOR_TBLOFF for Cortex-M0/M0+, SC000. Corrected: rework of in-line assembly functions to remove potential compiler warnings.<br/> + </td></tr> +<tr> +<td>V3.01 </td><td>Added support for Cortex-M0+ processor. <br/> + </td></tr> +<tr> +<td>V3.00 </td><td>Added support for GNU GCC ARM Embedded Compiler. <br/> + Added function <a class="el" href="group__intrinsic___c_p_u__gr.html#gaf66beb577bb9d90424c3d1d7f684c024">__ROR</a>.<br/> + Added <a class="el" href="_reg_map_pg.html">Register Mapping</a> for TPIU, DWT. <br/> + Added support for <a class="el" href="device_h_pg.html#core_config_sect">SC000 and SC300 processors</a>.<br/> + Corrected <a class="el" href="group___i_t_m___debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a> function. <br/> + Corrected the functions <a class="el" href="group__intrinsic___c_p_u__gr.html#gaab6482d1f59f59e2b6b7efc1af391c99">__STREXB</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga0a354bdf71caa52f081a4a54e84c8d2a">__STREXH</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga335deaaa7991490e1450cb7d1e4c5197">__STREXW</a> for the GNU GCC compiler section. <br/> + Documentation restructured. </td></tr> +<tr> +<td>V2.10 </td><td>Updated documentation.<br/> + Updated CMSIS core include files.<br/> + Changed CMSIS/Device folder structure.<br/> + Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library.<br/> + Reworked CMSIS DSP library examples. </td></tr> +<tr> +<td>V2.00 </td><td>Added support for Cortex-M4 processor. </td></tr> +<tr> +<td>V1.30 </td><td>Reworked Startup Concept.<br/> + Added additional Debug Functionality.<br/> + Changed folder structure.<br/> + Added doxygen comments.<br/> + Added definitions for bit. </td></tr> +<tr> +<td>V1.01 </td><td>Added support for Cortex-M0 processor. </td></tr> +<tr> +<td>V1.01 </td><td>Added intrinsic functions for <a class="el" href="group__intrinsic___c_p_u__gr.html#ga9e3ac13d8dcf4331176b624cf6234a7e">__LDREXB</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga9feffc093d6f68b120d592a7a0d45a15">__LDREXH</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#gabd78840a0f2464905b7cec791ebc6a4c">__LDREXW</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#gaab6482d1f59f59e2b6b7efc1af391c99">__STREXB</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga0a354bdf71caa52f081a4a54e84c8d2a">__STREXH</a>, <a class="el" href="group__intrinsic___c_p_u__gr.html#ga335deaaa7991490e1450cb7d1e4c5197">__STREXW</a>, and <a class="el" href="group__intrinsic___c_p_u__gr.html#ga354c5ac8870cc3dfb823367af9c4b412">__CLREX</a> </td></tr> +<tr> +<td>V1.00 </td><td>Initial Release for Cortex-M3 processor. </td></tr> +</table> +</div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/device_h_pg.html b/Documentation/Core/html/device_h_pg.html new file mode 100644 index 0000000..0d6f05d --- /dev/null +++ b/Documentation/Core/html/device_h_pg.html @@ -0,0 +1,570 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Device Header File <device.h></title> +<title>CMSIS-CORE: Device Header File <device.h></title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('device_h_pg.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Device Header File <device.h> </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>The <a class="el" href="device_h_pg.html">Device Header File <device.h></a> contains the following sections that are device specific:</p> +<ul> +<li><a class="el" href="device_h_pg.html#interrupt_number_sec">Interrupt Number Definition</a> provides interrupt numbers (IRQn) for all exceptions and interrupts of the device.</li> +<li><a class="el" href="device_h_pg.html#core_config_sect">Configuration of the Processor and Core Peripherals</a> reflect the features of the device.</li> +<li><a class="el" href="device_h_pg.html#device_access">Device Peripheral Access Layer</a> provides definitions for the <a class="el" href="group__peripheral__gr.html">Peripheral Access</a> to all device peripherals. It contains all data structures and the address mapping for device-specific peripherals.</li> +<li><b>Access Functions for Peripherals (optional)</b> provide additional helper functions for peripherals that are useful for programming of these peripherals. Access Functions may be provided as inline functions or can be extern references to a device-specific library provided by the silicon vendor.</li> +</ul> +<p><a href="Modules.html"><b>Reference</b> </a> describes the standard features and functions of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> in detail.</p> +<h1><a class="anchor" id="interrupt_number_sec"></a> +Interrupt Number Definition</h1> +<p><a class="el" href="device_h_pg.html">Device Header File <device.h></a> contains the enumeration <a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all exceptions and interrupts of the device.</p> +<ul> +<li>Negative IRQn values represent processor core exceptions (internal interrupts).</li> +<li>Positive IRQn values represent device-specific exceptions (external interrupts). The first device-specific interrupt has the IRQn value 0. The IRQn values needs extension to reflect the device-specific interrupt vector table in the <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a>.</li> +</ul> +<p><b>Example:</b> </p> +<p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p> +<div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">enum</span> IRQn</div> +<div class="line">{</div> +<div class="line"><span class="comment">/****** Cortex-M0 Processor Exceptions Numbers ***************************************************/</span></div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30" title="Exception 2: Non Maskable Interrupt.">NonMaskableInt_IRQn</a> = -14, </div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85" title="Exception 3: Hard Fault Interrupt.">HardFault_IRQn</a> = -13, </div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237" title="Exception 11: SV Call Interrupt.">SVCall_IRQn</a> = -5, </div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2" title="Exception 14: Pend SV Interrupt [not on Cortex-M0 variants].">PendSV_IRQn</a> = -2, </div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7" title="Exception 15: System Tick Interrupt.">SysTick_IRQn</a> = -1, </div> +<div class="line"><span class="comment">/****** LPC11xx/LPC11Cxx Specific Interrupt Numbers **********************************************/</span></div> +<div class="line"> WAKEUP0_IRQn = 0, </div> +<div class="line"> WAKEUP1_IRQn = 1, </div> +<div class="line"> WAKEUP2_IRQn = 2,</div> +<div class="line"> : :</div> +<div class="line"> : :</div> +<div class="line"> EINT1_IRQn = 30, </div> +<div class="line"> EINT0_IRQn = 31, </div> +<div class="line">} <a class="code" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8" title="Definition of IRQn numbers.">IRQn_Type</a>;</div> +</div><!-- fragment --><h1><a class="anchor" id="core_config_sect"></a> +Configuration of the Processor and Core Peripherals</h1> +<p>The <a class="el" href="device_h_pg.html">Device Header File <device.h></a> configures the Cortex-M or SecurCore processor and the core peripherals with <em>#defines</em> that are set prior to including the file <b>core_<cpu>.h</b>.</p> +<p>The following tables list the <em>#defines</em> along with the possible values for each processor core. If these <em>#defines</em> are missing default values are used.</p> +<p><b>core_cm0.h</b> </p> +<table class="cmtable"> +<tr> +<th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> +<tr> +<td>__CM0_REV </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number) </td></tr> +<tr> +<td>__NVIC_PRIO_BITS </td><td>2 </td><td>2 </td><td>Number of priority bits implemented in the NVIC (device specific) </td></tr> +<tr> +<td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> +</table> +<p><b>core_cm0plus.h</b> </p> +<table class="cmtable"> +<tr> +<th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> +<tr> +<td>__CM0PLUS_REV </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number) </td></tr> +<tr> +<td>__NVIC_PRIO_BITS </td><td>2 </td><td>2 </td><td>Number of priority bits implemented in the NVIC (device specific) </td></tr> +<tr> +<td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> +</table> +<p><b>core_cm3.h</b> </p> +<table class="cmtable"> +<tr> +<th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> +<tr> +<td>__CM3_REV </td><td>0x0101 | 0x0200 </td><td>0x0200 </td><td>Core revision number ([15:8] revision number, [7:0] patch number) </td></tr> +<tr> +<td>__NVIC_PRIO_BITS </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific) </td></tr> +<tr> +<td>__MPU_PRESENT </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not </td></tr> +<tr> +<td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> +</table> +<p><b>core_cm4.h</b> </p> +<table class="cmtable"> +<tr> +<th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> +<tr> +<td>__CM4_REV </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number) </td></tr> +<tr> +<td>__NVIC_PRIO_BITS </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific) </td></tr> +<tr> +<td>__MPU_PRESENT </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not </td></tr> +<tr> +<td>__FPU_PRESENT </td><td>0 .. 1 </td><td>0 </td><td>Defines if a FPU is present or not </td></tr> +<tr> +<td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> +</table> +<p><b>core_cm7.h</b> </p> +<table class="cmtable"> +<tr> +<th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> +<tr> +<td>__CM7_REV </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number) </td></tr> +<tr> +<td>__MPU_PRESENT </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not </td></tr> +<tr> +<td>__NVIC_PRIO_BITS </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific) </td></tr> +<tr> +<td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> +<tr> +<td>__FPU_PRESENT </td><td>0 .. 1 </td><td>0 </td><td>Defines if a FPU is present or not. See <b>__FPU_DP</b> description below. </td></tr> +<tr> +<td>__FPU_DP </td><td>0 .. 1 </td><td>0 </td><td>The combination of the defines <b>__FPU_PRESENT</b> and <b>__FPU_DP</b> determine the whether the FPU is with single or double precision as shown in the table below. <br/> +<br/> + <table class="cmtable"> +<tr bgcolor="cyan"> +<td><b>__FPU_PRESENT</b> </td><td><b>__FPU_DP</b> </td><td><b>Description</b> </td></tr> +<tr> +<td align="center">0 </td><td align="center"><em>ignored</em> </td><td>Processor has no FPU. The value set for <b>__FPU_DP</b> has no influence. </td></tr> +<tr> +<td align="center">1 </td><td align="center">0 </td><td>Processor with FPU with single precision. The file <b>ARMCM7_SP.h</b> has preconfigured settings for this combination. </td></tr> +<tr> +<td align="center">1 </td><td align="center">1 </td><td>Processor with FPU with double precision. The file <b>ARMCM7_DP.h</b> has preconfigured settings for this combination. </td></tr> +</table> +</td></tr> +<tr> +<td>__ICACHE_PRESENT </td><td>0 .. 1 </td><td>1 </td><td>Instruction Chache present or not </td></tr> +<tr> +<td>__DCACHE_PRESENT </td><td>0 .. 1 </td><td>1 </td><td>Data Chache present or not </td></tr> +<tr> +<td>__DTCM_PRESENT </td><td>0 .. 1 </td><td>1 </td><td><p class="starttd">Data Tightly Coupled Memory is present or not </p> +<p class="endtd"></p> +</td></tr> +</table> +<p><b>core_sc000.h</b> </p> +<table class="cmtable"> +<tr> +<th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> +<tr> +<td>__SC000_REV </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number) </td></tr> +<tr> +<td>__NVIC_PRIO_BITS </td><td>2 </td><td>2 </td><td>Number of priority bits implemented in the NVIC (device specific) </td></tr> +<tr> +<td>__MPU_PRESENT </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not </td></tr> +<tr> +<td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> +</table> +<p><b>core_sc300.h</b> </p> +<table class="cmtable"> +<tr> +<th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> +<tr> +<td>__SC300_REV </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number) </td></tr> +<tr> +<td>__NVIC_PRIO_BITS </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific) </td></tr> +<tr> +<td>__MPU_PRESENT </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not </td></tr> +<tr> +<td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> +</table> +<p><b>Example</b> </p> +<p>The following code exemplifies the configuration of the Cortex-M4 Processor and Core Peripherals.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CM4_REV 0x0001 </span><span class="comment">/* Core revision r0p1 */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __MPU_PRESENT 1 </span><span class="comment">/* MPU present or not */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __NVIC_PRIO_BITS 3 </span><span class="comment">/* Number of Bits used for Priority Levels */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __Vendor_SysTickConfig 0 </span><span class="comment">/* Set to 1 if different SysTick Config is used */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __FPU_PRESENT 1 </span><span class="comment">/* FPU present or not */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span>.</div> +<div class="line">.</div> +<div class="line"><span class="preprocessor">#include <core_cm4.h></span> <span class="comment">/* Cortex-M4 processor and core peripherals */</span></div> +</div><!-- fragment --><h1><a class="anchor" id="core_version_sect"></a> +CMSIS Version and Processor Information</h1> +<p>Defines in the core_<em>cpu</em>.h file identify the version of the CMSIS-CORE and the processor used. The following shows the defines in the various core_<em>cpu</em>.h files that may be used in the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> to verify a minimum version or ensure that the right processor core is used.</p> +<p><b>core_cm0.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CM0_CMSIS_VERSION_MAIN (0x03) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0_CMSIS_VERSION_SUB (0x00) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16) | \</span></div> +<div class="line"><span class="preprocessor"> __CM0_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span>... </div> +<div class="line"><span class="preprocessor">#define __CORTEX_M (0x00) </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div> +</div><!-- fragment --><p><b>core_cm0plus.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CM0PLUS_CMSIS_VERSION_MAIN (0x03) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0PLUS_CMSIS_VERSION_SUB (0x00) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0PLUS_CMSIS_VERSION ((__CM0P_CMSIS_VERSION_MAIN << 16) | \</span></div> +<div class="line"><span class="preprocessor"> __CM0P_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span>... </div> +<div class="line"><span class="preprocessor">#define __CORTEX_M (0x00) </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div> +</div><!-- fragment --><p><b>core_cm3.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CM3_CMSIS_VERSION_MAIN (0x03) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM3_CMSIS_VERSION_SUB (0x00) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | \</span></div> +<div class="line"><span class="preprocessor"> __CM3_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span>... </div> +<div class="line"><span class="preprocessor">#define __CORTEX_M (0x03) </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div> +</div><!-- fragment --><p><b>core_cm4.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CM4_CMSIS_VERSION_MAIN (0x04) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM4_CMSIS_VERSION_SUB (0x00) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16) | \</span></div> +<div class="line"><span class="preprocessor"> __CM4_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span>... </div> +<div class="line"><span class="preprocessor">#define __CORTEX_M (0x04) </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div> +</div><!-- fragment --><p><b>core_cm7.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CM7_CMSIS_VERSION_MAIN (0x04) </span></div> +<div class="line"><span class="preprocessor">#define __CM7_CMSIS_VERSION_SUB (0x00) </span></div> +<div class="line"><span class="preprocessor">#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16) | \</span></div> +<div class="line"><span class="preprocessor"> __CM7_CMSIS_VERSION_SUB ) </span></div> +<div class="line"><span class="preprocessor">#define __CORTEX_M (0x07) </span></div> +</div><!-- fragment --><p><b>core_sc000.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __SC000_CMSIS_VERSION_MAIN (0x04) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION_SUB (0x00) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16) | \</span></div> +<div class="line"><span class="preprocessor"> __SC000_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span>... </div> +<div class="line"><span class="preprocessor">#define __CORTEX_SC (000) </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div> +</div><!-- fragment --><p><b>core_sc300.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __SC300_CMSIS_VERSION_MAIN (0x04) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION_SUB (0x00) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16) | \</span></div> +<div class="line"><span class="preprocessor"> __SC300_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> +<div class="line"><span class="preprocessor"></span>... </div> +<div class="line"><span class="preprocessor">#define __CORTEX_SC (300) </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div> +</div><!-- fragment --><h1><a class="anchor" id="device_access"></a> +Device Peripheral Access Layer</h1> +<p>The <a class="el" href="device_h_pg.html">Device Header File <device.h></a> contains for each peripheral:</p> +<ul> +<li>Register Layout Typedef</li> +<li>Base Address</li> +<li>Access Definitions</li> +</ul> +<p>The section <a class="el" href="group__peripheral__gr.html">Peripheral Access</a> shows examples for peripheral definitions.</p> +<h1><a class="anchor" id="device_h_sec"></a> +Device.h Template File</h1> +<p>The silicon vendor needs to extend the Device.h template file with the CMSIS features described above. In addition the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> may contain functions to access device-specific peripherals. The <a class="el" href="system_c_pg.html#system_Device_h_sec">system_Device.h Template File</a> which is provided as part of the CMSIS specification is shown below.</p> +<pre class="fragment">/**************************************************************************//** + * @file <Device>.h + * @brief CMSIS Cortex-M# Core Peripheral Access Layer Header File for + * Device <Device> + * @version V3.10 + * @date 23. November 2012 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef <Device>_H /* ToDo: replace '<Device>' with your device name */ +#define <Device>_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* ToDo: replace '<Device>' with your device name; add your doxyGen comment */ +/** @addtogroup <Device>_Definitions <Device> Definitions + This file defines all structures and symbols for <Device>: + - registers and bitfields + - peripheral base address + - peripheral ID + - Peripheral definitions + @{ +*/ + + +/******************************************************************************/ +/* Processor and Core Peripherals */ +/******************************************************************************/ +/** @addtogroup <Device>_CMSIS Device CMSIS Definitions + Configuration of the Cortex-M# Processor and Core Peripherals + @{ +*/ + +/* + * ========================================================================== + * ---------- Interrupt Number Definition ----------------------------------- + * ========================================================================== + */ + +typedef enum IRQn +{ +/****** Cortex-M# Processor Exceptions Numbers ***************************************************/ + +/* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M0 device */ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /*!< 3 Hard Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 SV Call Interrupt */ + PendSV_IRQn = -2, /*!< 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 System Tick Interrupt */ + +/* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M3 / Cortex-M4 device */ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /*!< 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /*!< 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /*!< 6 Usage Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /*!< 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 System Tick Interrupt */ + +/****** Device Specific Interrupt Numbers ********************************************************/ +/* ToDo: add here your device specific external interrupt numbers + according the interrupt handlers defined in startup_Device.s + eg.: Interrupt for Timer#1 TIM1_IRQHandler -> TIM1_IRQn */ + <DeviceInterrupt>_IRQn = 0, /*!< Device Interrupt */ +} IRQn_Type; + + +/* + * ========================================================================== + * ----------- Processor and Core Peripheral Section ------------------------ + * ========================================================================== + */ + +/* Configuration of the Cortex-M# Processor and Core Peripherals */ +/* ToDo: set the defines according your Device */ +/* ToDo: define the correct core revision + __CM0_REV if your device is a CORTEX-M0 device + __CM3_REV if your device is a CORTEX-M3 device + __CM4_REV if your device is a CORTEX-M4 device */ +#define __CM#_REV 0x0201 /*!< Core Revision r2p1 */ +#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ +#define __MPU_PRESENT 0 /*!< MPU present or not */ +/* ToDo: define __FPU_PRESENT if your devise is a CORTEX-M4 */ +#define __FPU_PRESENT 0 /*!< FPU present or not */ + +/*@}*/ /* end of group <Device>_CMSIS */ + + +/* ToDo: include the correct core_cm#.h file + core_cm0.h if your device is a CORTEX-M0 device + core_cm3.h if your device is a CORTEX-M3 device + core_cm4.h if your device is a CORTEX-M4 device */ +#include <core_cm#.h> /* Cortex-M# processor and core peripherals */ +/* ToDo: include your system_<Device>.h file + replace '<Device>' with your device name */ +#include "system_<Device>.h" /* <Device> System include file */ + + +/******************************************************************************/ +/* Device Specific Peripheral registers structures */ +/******************************************************************************/ +/** @addtogroup <Device>_Peripherals <Device> Peripherals + <Device> Device Specific Peripheral registers structures + @{ +*/ + +#if defined ( __CC_ARM ) +#pragma anon_unions +#endif + +/* ToDo: add here your device specific peripheral access structure typedefs + following is an example for a timer */ + +/*------------- 16-bit Timer/Event Counter (TMR) -----------------------------*/ +/** @addtogroup <Device>_TMR <Device> 16-bit Timer/Event Counter (TMR) + @{ +*/ +typedef struct +{ + __IO uint32_t EN; /*!< Offset: 0x0000 Timer Enable Register */ + __IO uint32_t RUN; /*!< Offset: 0x0004 Timer RUN Register */ + __IO uint32_t CR; /*!< Offset: 0x0008 Timer Control Register */ + __IO uint32_t MOD; /*!< Offset: 0x000C Timer Mode Register */ + uint32_t RESERVED0[1]; + __IO uint32_t ST; /*!< Offset: 0x0014 Timer Status Register */ + __IO uint32_t IM; /*!< Offset: 0x0018 Interrupt Mask Register */ + __IO uint32_t UC; /*!< Offset: 0x001C Timer Up Counter Register */ + __IO uint32_t RG0 /*!< Offset: 0x0020 Timer Register */ + uint32_t RESERVED1[2]; + __IO uint32_t CP; /*!< Offset: 0x002C Capture register */ +} <DeviceAbbreviation>_TMR_TypeDef; +/*@}*/ /* end of group <Device>_TMR */ + + +#if defined ( __CC_ARM ) +#pragma no_anon_unions +#endif + +/*@}*/ /* end of group <Device>_Peripherals */ + + +/******************************************************************************/ +/* Peripheral memory map */ +/******************************************************************************/ +/* ToDo: add here your device peripherals base addresses + following is an example for timer */ +/** @addtogroup <Device>_MemoryMap <Device> Memory Mapping + @{ +*/ + +/* Peripheral and SRAM base address */ +#define <DeviceAbbreviation>_FLASH_BASE (0x00000000UL) /*!< (FLASH ) Base Address */ +#define <DeviceAbbreviation>_SRAM_BASE (0x20000000UL) /*!< (SRAM ) Base Address */ +#define <DeviceAbbreviation>_PERIPH_BASE (0x40000000UL) /*!< (Peripheral) Base Address */ + +/* Peripheral memory map */ +#define <DeviceAbbreviation>TIM0_BASE (<DeviceAbbreviation>_PERIPH_BASE) /*!< (Timer0 ) Base Address */ +#define <DeviceAbbreviation>TIM1_BASE (<DeviceAbbreviation>_PERIPH_BASE + 0x0800) /*!< (Timer1 ) Base Address */ +#define <DeviceAbbreviation>TIM2_BASE (<DeviceAbbreviation>_PERIPH_BASE + 0x1000) /*!< (Timer2 ) Base Address */ +/*@}*/ /* end of group <Device>_MemoryMap */ + + +/******************************************************************************/ +/* Peripheral declaration */ +/******************************************************************************/ +/* ToDo: add here your device peripherals pointer definitions + following is an example for timer */ + +/** @addtogroup <Device>_PeripheralDecl <Device> Peripheral Declaration + @{ +*/ + +#define <DeviceAbbreviation>_TIM0 ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE) +#define <DeviceAbbreviation>_TIM1 ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE) +#define <DeviceAbbreviation>_TIM2 ((<DeviceAbbreviation>_TMR_TypeDef *) <DeviceAbbreviation>TIM0_BASE) +/*@}*/ /* end of group <Device>_PeripheralDecl */ + +/*@}*/ /* end of group <Device>_Definitions */ + +#ifdef __cplusplus +} +#endif + +#endif /* <Device>_H */ +</pre> </div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="_templates_pg.html">Template Files</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. 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+a { + color: #3A568E; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4464A5; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9AAED5; + color: #ffffff; + border: 1px double #849CCC; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C3CFE6; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + min-height: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C3CFE6; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C3CFE6; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EDF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9AAED5; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A2B4D8; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4769AD; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td, .fieldtable tr { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow, .fieldtable tr.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4464A5; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4464A5; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 0px 6px 0px; + color: #233456; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #708CC4; + border-top:1px solid #5072B7; + border-left:1px solid #5072B7; + border-right:1px solid #C3CFE6; + border-bottom:1px solid #C3CFE6; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3A568E; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #293C63; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2B4069; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #354E81; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A7B8DA; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A7B8DA; + border-bottom: 1px solid #A7B8DA; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A7B8DA; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + font-size: 90%; + color: #233456; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A7B8DA; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#889FCE; + border:solid 1px #C1CDE5; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#344D7E; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #27395E; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6583BF; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#344D7E; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C3CFE6; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5072B7; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #8EA4D0; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#314877; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D7DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4464A5; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/Documentation/Core/html/doxygen.png b/Documentation/Core/html/doxygen.png Binary files differnew file mode 100644 index 0000000..7765a33 --- /dev/null +++ b/Documentation/Core/html/doxygen.png diff --git a/Documentation/Core/html/dynsections.js b/Documentation/Core/html/dynsections.js new file mode 100644 index 0000000..116542f --- /dev/null +++ b/Documentation/Core/html/dynsections.js @@ -0,0 +1,78 @@ +function toggleVisibility(linkObj) +{ + var base = $(linkObj).attr('id'); + var summary = $('#'+base+'-summary'); + var content = $('#'+base+'-content'); + var trigger = $('#'+base+'-trigger'); + var src=$(trigger).attr('src'); + if (content.is(':visible')===true) { + content.hide(); + summary.show(); + $(linkObj).addClass('closed').removeClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png'); + } else { + content.show(); + summary.hide(); + $(linkObj).removeClass('closed').addClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-10)+'open.png'); + } + return false; +} + +function updateStripes() +{ + $('table.directory tr'). + removeClass('even').filter(':visible:even').addClass('even'); +} +function toggleLevel(level) +{ + $('table.directory tr').each(function(){ + var l = this.id.split('_').length-1; + var i = $('#img'+this.id.substring(3)); + var a = $('#arr'+this.id.substring(3)); + if (l<level+1) { + i.attr('src','ftv2folderopen.png'); + a.attr('src','ftv2mnode.png'); + $(this).show(); + } else if (l==level+1) { + i.attr('src','ftv2folderclosed.png'); + a.attr('src','ftv2pnode.png'); + $(this).show(); + } else { + $(this).hide(); + } + }); + updateStripes(); +} +function toggleFolder(id) +{ + var n = $('[id^=row_'+id+']'); + var i = $('[id^=img_'+id+']'); + var a = $('[id^=arr_'+id+']'); + var c = n.slice(1); + if (c.filter(':first').is(':visible')===true) { + i.attr('src','ftv2folderclosed.png'); + a.attr('src','ftv2pnode.png'); + c.hide(); + } else { + i.attr('src','ftv2folderopen.png'); + a.attr('src','ftv2mnode.png'); + c.show(); + } + updateStripes(); +} + +function toggleInherit(id) +{ + var rows = $('tr.inherit.'+id); + var img = $('tr.inherit_header.'+id+' img'); + var src = $(img).attr('src'); + if (rows.filter(':first').is(':visible')===true) { + rows.css('display','none'); + $(img).attr('src',src.substring(0,src.length-8)+'closed.png'); + } else { + rows.css('display','table-row'); // using show() causes jump in firefox + $(img).attr('src',src.substring(0,src.length-10)+'open.png'); + } +} + diff --git a/Documentation/Core/html/ftv2blank.png b/Documentation/Core/html/ftv2blank.png Binary files differnew file mode 100644 index 0000000..63c605b --- /dev/null +++ b/Documentation/Core/html/ftv2blank.png diff --git a/Documentation/Core/html/ftv2cl.png b/Documentation/Core/html/ftv2cl.png Binary files differnew file mode 100644 index 0000000..edd2ddc --- /dev/null +++ b/Documentation/Core/html/ftv2cl.png diff --git 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b/Documentation/Core/html/ftv2vertline.png diff --git a/Documentation/Core/html/functions.html b/Documentation/Core/html/functions.html new file mode 100644 index 0000000..a91ed5c --- /dev/null +++ b/Documentation/Core/html/functions.html @@ -0,0 +1,627 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Data Fields</title> +<title>CMSIS-CORE: Data Fields</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> 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</tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> + <div id="navrow2" class="tabs2"> + <ul class="tablist"> + <li><a href="annotated.html"><span>Data Structures</span></a></li> + <li class="current"><a href="functions.html"><span>Data Fields</span></a></li> + </ul> + </div> + <div id="navrow3" class="tabs2"> + <ul class="tablist"> + <li class="current"><a href="functions.html"><span>All</span></a></li> + <li><a href="functions_vars.html"><span>Variables</span></a></li> + </ul> + </div> + <div id="navrow4" class="tabs3"> + <ul class="tablist"> + <li><a href="#index__"><span>_</span></a></li> + <li><a href="#index_a"><span>a</span></a></li> + <li><a href="#index_b"><span>b</span></a></li> + <li><a href="#index_c"><span>c</span></a></li> + <li><a href="#index_d"><span>d</span></a></li> + <li><a href="#index_e"><span>e</span></a></li> + <li><a href="#index_f"><span>f</span></a></li> + <li><a href="#index_h"><span>h</span></a></li> + <li><a href="#index_i"><span>i</span></a></li> + <li><a href="#index_l"><span>l</span></a></li> + <li><a href="#index_m"><span>m</span></a></li> + <li><a href="#index_n"><span>n</span></a></li> + <li><a href="#index_p"><span>p</span></a></li> + <li><a href="#index_q"><span>q</span></a></li> + <li><a href="#index_r"><span>r</span></a></li> + <li><a href="#index_s"><span>s</span></a></li> + <li><a href="#index_t"><span>t</span></a></li> + <li><a href="#index_u"><span>u</span></a></li> + <li><a href="#index_v"><span>v</span></a></li> + <li><a href="#index_w"><span>w</span></a></li> + <li><a href="#index_z"><span>z</span></a></li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('functions.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="contents"> +<div class="textblock">Here is a list of all struct and union fields with links to the structures/unions they belong to:</div> + +<h3><a class="anchor" id="index__"></a>- _ -</h3><ul> +<li>_reserved0 +: <a class="el" href="union_a_p_s_r___type.html#afbce95646fd514c10aa85ec0a33db728">APSR_Type</a> +, <a class="el" href="union_c_o_n_t_r_o_l___type.html#af8c314273a1e4970a5671bd7f8184f50">CONTROL_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#af438e0f407357e914a70b5bd4d6a97c5">xPSR_Type</a> +, <a class="el" href="union_i_p_s_r___type.html#ad2eb0a06de4f03f58874a727716aa9aa">IPSR_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_a"></a>- a -</h3><ul> +<li>ACPR +: <a class="el" href="struct_t_p_i___type.html#a9e5e4421ef9c3d5b7ff8b24abd4e99b3">TPI_Type</a> +</li> +<li>ACTLR +: <a class="el" href="struct_s_cn_s_c_b___type.html#a13af9b718dde7481f1c0344f00593c23">SCnSCB_Type</a> +</li> +<li>ADR +: <a class="el" href="struct_s_c_b___type.html#af084e1b2dad004a88668efea1dfe7fa1">SCB_Type</a> +</li> +<li>AFSR +: <a class="el" href="struct_s_c_b___type.html#ab65372404ce64b0f0b35e2709429404e">SCB_Type</a> +</li> +<li>AIRCR +: <a class="el" href="struct_s_c_b___type.html#ad3e5b8934c647eb1b7383c1894f01380">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_b"></a>- b -</h3><ul> +<li>b +: <a class="el" href="union_a_p_s_r___type.html#a7dbc79a057ded4b11ca5323fc2d5ab14">APSR_Type</a> +, <a class="el" href="union_i_p_s_r___type.html#add0d6497bd50c25569ea22b48a03ec50">IPSR_Type</a> +, <a class="el" href="union_c_o_n_t_r_o_l___type.html#adc6a38ab2980d0e9577b5a871da14eb9">CONTROL_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a3b1063bb5cdad67e037cba993b693b70">xPSR_Type</a> +</li> +<li>BFAR +: <a class="el" href="struct_s_c_b___type.html#a3f8e7e58be4e41c88dfa78f54589271c">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_c"></a>- c -</h3><ul> +<li>C +: <a class="el" href="union_a_p_s_r___type.html#a86e2c5b891ecef1ab55b1edac0da79a6">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a40213a6b5620410cac83b0d89564609d">xPSR_Type</a> +</li> +<li>CALIB +: <a class="el" href="struct_sys_tick___type.html#afcadb0c6d35b21cdc0018658a13942de">SysTick_Type</a> +</li> +<li>CCR +: <a class="el" href="struct_s_c_b___type.html#a2d6653b0b70faac936046a02809b577f">SCB_Type</a> +</li> +<li>CFSR +: <a class="el" href="struct_s_c_b___type.html#a0cda9e061b42373383418663092ad19a">SCB_Type</a> +</li> +<li>CLAIMCLR +: <a class="el" href="struct_t_p_i___type.html#a0e10e292cb019a832b03ddd055b2f6ac">TPI_Type</a> +</li> +<li>CLAIMSET +: <a class="el" href="struct_t_p_i___type.html#af8b7d15fa5252b733dd4b11fa1b5730a">TPI_Type</a> +</li> +<li>COMP0 +: <a class="el" href="struct_d_w_t___type.html#a61c2965af5bc0643f9af65620b0e67c9">DWT_Type</a> +</li> +<li>COMP1 +: <a class="el" href="struct_d_w_t___type.html#a38714af6b7fa7c64d68f5e1efbe7a931">DWT_Type</a> +</li> +<li>COMP2 +: <a class="el" href="struct_d_w_t___type.html#a5ae6dde39989f27bae90afc2347deb46">DWT_Type</a> +</li> +<li>COMP3 +: <a class="el" href="struct_d_w_t___type.html#a85eb73d1848ac3f82d39d6c3e8910847">DWT_Type</a> +</li> +<li>CPACR +: <a class="el" href="struct_s_c_b___type.html#ac6a860c1b8d8154a1f00d99d23b67764">SCB_Type</a> +</li> +<li>CPICNT +: <a class="el" href="struct_d_w_t___type.html#a2c08096c82abe245c0fa97badc458154">DWT_Type</a> +</li> +<li>CPUID +: <a class="el" href="struct_s_c_b___type.html#a21e08d546d8b641bee298a459ea73e46">SCB_Type</a> +</li> +<li>CSPSR +: <a class="el" href="struct_t_p_i___type.html#a8826aa84e5806053395a742d38d59d0f">TPI_Type</a> +</li> +<li>CTRL +: <a class="el" href="struct_d_w_t___type.html#add790c53410023b3b581919bb681fe2a">DWT_Type</a> +, <a class="el" href="struct_m_p_u___type.html#a4d81d6aa73a9287bafba2bcc5ffc6d18">MPU_Type</a> +, <a class="el" href="struct_sys_tick___type.html#a875e7afa5c4fd43997fb544a4ac6e37e">SysTick_Type</a> +</li> +<li>CYCCNT +: <a class="el" href="struct_d_w_t___type.html#a102eaa529d9098242851cb57c52b42d9">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_d"></a>- d -</h3><ul> +<li>DCRDR +: <a class="el" href="struct_core_debug___type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55">CoreDebug_Type</a> +</li> +<li>DCRSR +: <a class="el" href="struct_core_debug___type.html#af907cf64577eaf927dac6787df6dd98b">CoreDebug_Type</a> +</li> +<li>DEMCR +: <a class="el" href="struct_core_debug___type.html#aeb3126abc4c258a858f21f356c0df6ee">CoreDebug_Type</a> +</li> +<li>DEVID +: <a class="el" href="struct_t_p_i___type.html#abc0ecda8a5446bc754080276bad77514">TPI_Type</a> +</li> +<li>DEVTYPE +: <a class="el" href="struct_t_p_i___type.html#ad98855854a719bbea33061e71529a472">TPI_Type</a> +</li> +<li>DFR +: <a class="el" href="struct_s_c_b___type.html#a85dd6fe77aab17e7ea89a52c59da6004">SCB_Type</a> +</li> +<li>DFSR +: <a class="el" href="struct_s_c_b___type.html#a191579bde0d21ff51d30a714fd887033">SCB_Type</a> +</li> +<li>DHCSR +: <a class="el" href="struct_core_debug___type.html#ad63554e4650da91a8e79929cbb63db66">CoreDebug_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_e"></a>- e -</h3><ul> +<li>EXCCNT +: <a class="el" href="struct_d_w_t___type.html#a9fe20c16c5167ca61486caf6832686d1">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_f"></a>- f -</h3><ul> +<li>FFCR +: <a class="el" href="struct_t_p_i___type.html#a3f68b6e73561b4849ebf953a894df8d2">TPI_Type</a> +</li> +<li>FFSR +: <a class="el" href="struct_t_p_i___type.html#a6c47a0b4c7ffc66093ef993d36bb441c">TPI_Type</a> +</li> +<li>FIFO0 +: <a class="el" href="struct_t_p_i___type.html#aa4d7b5cf39dff9f53bf7f69bc287a814">TPI_Type</a> +</li> +<li>FIFO1 +: <a class="el" href="struct_t_p_i___type.html#a061372fcd72f1eea871e2d9c1be849bc">TPI_Type</a> +</li> +<li>FOLDCNT +: <a class="el" href="struct_d_w_t___type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97">DWT_Type</a> +</li> +<li>FPCA +: <a class="el" href="union_c_o_n_t_r_o_l___type.html#ac62cfff08e6f055e0101785bad7094cd">CONTROL_Type</a> +</li> +<li>FPCAR +: <a class="el" href="struct_f_p_u___type.html#a55263b468d0f8e11ac77aec9ff87c820">FPU_Type</a> +</li> +<li>FPCCR +: <a class="el" href="struct_f_p_u___type.html#af1b708c5e413739150df3d16ca3b7061">FPU_Type</a> +</li> +<li>FPDSCR +: <a class="el" href="struct_f_p_u___type.html#a58d1989664a06db6ec2e122eefa9f04a">FPU_Type</a> +</li> +<li>FSCR +: <a class="el" href="struct_t_p_i___type.html#ad6901bfd8a0089ca7e8a20475cf494a8">TPI_Type</a> +</li> +<li>FUNCTION0 +: <a class="el" href="struct_d_w_t___type.html#a579ae082f58a0317b7ef029b20f52889">DWT_Type</a> +</li> +<li>FUNCTION1 +: <a class="el" href="struct_d_w_t___type.html#a8dfcf25675f9606aa305c46e85182e4e">DWT_Type</a> +</li> +<li>FUNCTION2 +: <a class="el" href="struct_d_w_t___type.html#ab1b60d6600c38abae515bab8e86a188f">DWT_Type</a> +</li> +<li>FUNCTION3 +: <a class="el" href="struct_d_w_t___type.html#a52d4ff278fae6f9216c63b74ce328841">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_h"></a>- h -</h3><ul> +<li>HFSR +: <a class="el" href="struct_s_c_b___type.html#a14ad254659362b9752c69afe3fd80934">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_i"></a>- i -</h3><ul> +<li>IABR +: <a class="el" href="struct_n_v_i_c___type.html#a4bca5452748ba84d64536fb6a5d795af">NVIC_Type</a> +</li> +<li>ICER +: <a class="el" href="struct_n_v_i_c___type.html#a245df8bac1da05c39eadabede9323203">NVIC_Type</a> +</li> +<li>ICPR +: <a class="el" href="struct_n_v_i_c___type.html#a8d8f45d9c5c67bba3c153c55574bac95">NVIC_Type</a> +</li> +<li>ICSR +: <a class="el" href="struct_s_c_b___type.html#a0ca18ef984d132c6bf4d9b61cd00f05a">SCB_Type</a> +</li> +<li>ICTR +: <a class="el" href="struct_s_cn_s_c_b___type.html#a34ec1d771245eb9bd0e3ec9336949762">SCnSCB_Type</a> +</li> +<li>IP +: <a class="el" href="struct_n_v_i_c___type.html#a7ff7364a4260df67a2784811e8da4efd">NVIC_Type</a> +</li> +<li>ISAR +: <a class="el" href="struct_s_c_b___type.html#ae0136a2d2d3c45f016b2c449e92b2066">SCB_Type</a> +</li> +<li>ISER +: <a class="el" href="struct_n_v_i_c___type.html#a9fccef5a60a0d5e81fcd7869a6274f47">NVIC_Type</a> +</li> +<li>ISPR +: <a class="el" href="struct_n_v_i_c___type.html#a8f731a9f428efc86e8d311b52ce823d0">NVIC_Type</a> +</li> +<li>ISR +: <a class="el" href="union_i_p_s_r___type.html#ab46e5f1b2f4d17cfb9aca4fffcbb2fa5">IPSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a3e9120dcf1a829fc8d2302b4d0673970">xPSR_Type</a> +</li> +<li>IT +: <a class="el" href="unionx_p_s_r___type.html#a3200966922a194d84425e2807a7f1328">xPSR_Type</a> +</li> +<li>ITATBCTR0 +: <a class="el" href="struct_t_p_i___type.html#aaa573b2e073e76e93c51ecec79c616d0">TPI_Type</a> +</li> +<li>ITATBCTR2 +: <a class="el" href="struct_t_p_i___type.html#ab358319b969d3fed0f89bbe33e9f1652">TPI_Type</a> +</li> +<li>ITCTRL +: <a class="el" href="struct_t_p_i___type.html#aaa4c823c10f115f7517c82ef86a5a68d">TPI_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_l"></a>- l -</h3><ul> +<li>LOAD +: <a class="el" href="struct_sys_tick___type.html#a4780a489256bb9f54d0ba8ed4de191cd">SysTick_Type</a> +</li> +<li>LSUCNT +: <a class="el" href="struct_d_w_t___type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_m"></a>- m -</h3><ul> +<li>MASK0 +: <a class="el" href="struct_d_w_t___type.html#a821eb5e71f340ec077efc064cfc567db">DWT_Type</a> +</li> +<li>MASK1 +: <a class="el" href="struct_d_w_t___type.html#aabf94936c9340e62fed836dcfb152405">DWT_Type</a> +</li> +<li>MASK2 +: <a class="el" href="struct_d_w_t___type.html#a00ac4d830dfe0070a656cda9baed170f">DWT_Type</a> +</li> +<li>MASK3 +: <a class="el" href="struct_d_w_t___type.html#a2a509d8505c37a3b64f6b24993df5f3f">DWT_Type</a> +</li> +<li>MMFAR +: <a class="el" href="struct_s_c_b___type.html#a2d03d0b7cec2254f39eb1c46c7445e80">SCB_Type</a> +</li> +<li>MMFR +: <a class="el" href="struct_s_c_b___type.html#aa11887804412bda283cc85a83fdafa7c">SCB_Type</a> +</li> +<li>MVFR0 +: <a class="el" href="struct_f_p_u___type.html#a4f19014defe6033d070b80af19ef627c">FPU_Type</a> +</li> +<li>MVFR1 +: <a class="el" href="struct_f_p_u___type.html#a66f8cfa49a423b480001a4e101bf842d">FPU_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_n"></a>- n -</h3><ul> +<li>N +: <a class="el" href="union_a_p_s_r___type.html#a7e7bbba9b00b0bb3283dc07f1abe37e0">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a2db9a52f6d42809627d1a7a607c5dbc5">xPSR_Type</a> +</li> +<li>nPRIV +: <a class="el" href="union_c_o_n_t_r_o_l___type.html#a35c1732cf153b7b5c4bd321cf1de9605">CONTROL_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_p"></a>- p -</h3><ul> +<li>PCSR +: <a class="el" href="struct_d_w_t___type.html#a6353ca1d1ad9bc1be05d3b5632960113">DWT_Type</a> +</li> +<li>PFR +: <a class="el" href="struct_s_c_b___type.html#a681c9d9e518b217976bef38c2423d83d">SCB_Type</a> +</li> +<li>PORT +: <a class="el" href="struct_i_t_m___type.html#af4c205be465780a20098387120bdb482">ITM_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_q"></a>- q -</h3><ul> +<li>Q +: <a class="el" href="union_a_p_s_r___type.html#a22d10913489d24ab08bd83457daa88de">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#add7cbd2b0abd8954d62cd7831796ac7c">xPSR_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_r"></a>- r -</h3><ul> +<li>RASR +: <a class="el" href="struct_m_p_u___type.html#a9236c629b7cf86f8bd2459c610fdf715">MPU_Type</a> +</li> +<li>RASR_A1 +: <a class="el" href="struct_m_p_u___type.html#ab5a224ccd12ac55ddfe11d9eca42de48">MPU_Type</a> +</li> +<li>RASR_A2 +: <a class="el" href="struct_m_p_u___type.html#ac60e0919871b66446a039838bcaaec3b">MPU_Type</a> +</li> +<li>RASR_A3 +: <a class="el" href="struct_m_p_u___type.html#a9c0b2d3e3e16bb4e7dfa069652d5a155">MPU_Type</a> +</li> +<li>RBAR +: <a class="el" href="struct_m_p_u___type.html#ac953770d38a7d322b971d93eb8a5b062">MPU_Type</a> +</li> +<li>RBAR_A1 +: <a class="el" href="struct_m_p_u___type.html#a13d69b9bea12861383f3a62764b02f63">MPU_Type</a> +</li> +<li>RBAR_A2 +: <a class="el" href="struct_m_p_u___type.html#a57dc551614932150e684fcc60590c2c4">MPU_Type</a> +</li> +<li>RBAR_A3 +: <a class="el" href="struct_m_p_u___type.html#a345911aabecd1f7d93a1bff7738b0d86">MPU_Type</a> +</li> +<li>RESERVED0 +: <a class="el" href="struct_n_v_i_c___type.html#a2de17698945ea49abd58a2d45bdc9c80">NVIC_Type</a> +, <a class="el" href="struct_s_c_b___type.html#ac89a5d9901e3748d22a7090bfca2bee6">SCB_Type</a> +, <a class="el" href="struct_s_cn_s_c_b___type.html#afe1d5fd2966d5062716613b05c8d0ae1">SCnSCB_Type</a> +, <a class="el" href="struct_i_t_m___type.html#a2c5ae30385b5f370d023468ea9914c0e">ITM_Type</a> +, <a class="el" href="struct_f_p_u___type.html#a7b2967b069046c8544adbbc1db143a36">FPU_Type</a> +, <a class="el" href="struct_d_w_t___type.html#addd893d655ed90d40705b20170daac59">DWT_Type</a> +, <a class="el" href="struct_t_p_i___type.html#af143c5e8fc9a3b2be2878e9c1f331aa9">TPI_Type</a> +</li> +<li>RESERVED1 +: <a class="el" href="struct_i_t_m___type.html#afffce5b93bbfedbaee85357d0b07ebce">ITM_Type</a> +, <a class="el" href="struct_d_w_t___type.html#a069871233a8c1df03521e6d7094f1de4">DWT_Type</a> +, <a class="el" href="struct_t_p_i___type.html#ac3956fe93987b725d89d3be32738da12">TPI_Type</a> +</li> +<li>RESERVED2 +: <a class="el" href="struct_i_t_m___type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b">ITM_Type</a> +, <a class="el" href="struct_d_w_t___type.html#a8556ca1c32590517602d92fe0cd55738">DWT_Type</a> +, <a class="el" href="struct_t_p_i___type.html#ac7bbb92e6231b9b38ac483f7d161a096">TPI_Type</a> +, <a class="el" href="struct_n_v_i_c___type.html#a0953af43af8ec7fd5869a1d826ce5b72">NVIC_Type</a> +</li> +<li>RESERVED3 +: <a class="el" href="struct_t_p_i___type.html#a31700c8cdd26e4c094db72af33d9f24c">TPI_Type</a> +, <a class="el" href="struct_n_v_i_c___type.html#a9dd330835dbf21471e7b5be8692d77ab">NVIC_Type</a> +</li> +<li>RESERVED4 +: <a class="el" href="struct_n_v_i_c___type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790">NVIC_Type</a> +, <a class="el" href="struct_t_p_i___type.html#a684071216fafee4e80be6aaa932cec46">TPI_Type</a> +</li> +<li>RESERVED5 +: <a class="el" href="struct_t_p_i___type.html#a3f80dd93f6bab6524603a7aa58de9a30">TPI_Type</a> +, <a class="el" href="struct_n_v_i_c___type.html#a4f753b4f824270175af045ac99bc12e8">NVIC_Type</a> +</li> +<li>RESERVED7 +: <a class="el" href="struct_t_p_i___type.html#a476ca23fbc9480f1697fbec871130550">TPI_Type</a> +</li> +<li>RNR +: <a class="el" href="struct_m_p_u___type.html#aa800d44f4d3520cc891d7b8d711320c1">MPU_Type</a> +</li> +<li>RSERVED1 +: <a class="el" href="struct_n_v_i_c___type.html#a6d1daf7ab6f2ba83f57ff67ae6f571fe">NVIC_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_s"></a>- s -</h3><ul> +<li>SCR +: <a class="el" href="struct_s_c_b___type.html#a3a4840c6fa4d1ee75544f4032c88ec34">SCB_Type</a> +</li> +<li>SHCSR +: <a class="el" href="struct_s_c_b___type.html#a7b5ae9741a99808043394c4743b635c4">SCB_Type</a> +</li> +<li>SHP +: <a class="el" href="struct_s_c_b___type.html#a85768f4b3dbbc41fd760041ee1202162">SCB_Type</a> +</li> +<li>SLEEPCNT +: <a class="el" href="struct_d_w_t___type.html#a416a54e2084ce66e5ca74f152a5ecc70">DWT_Type</a> +</li> +<li>SPPR +: <a class="el" href="struct_t_p_i___type.html#a12f79d4e3ddc69893ba8bff890d04cc5">TPI_Type</a> +</li> +<li>SPSEL +: <a class="el" href="union_c_o_n_t_r_o_l___type.html#a8cc085fea1c50a8bd9adea63931ee8e2">CONTROL_Type</a> +</li> +<li>SSPSR +: <a class="el" href="struct_t_p_i___type.html#a7b72598e20066133e505bb781690dc22">TPI_Type</a> +</li> +<li>STIR +: <a class="el" href="struct_n_v_i_c___type.html#a37de89637466e007171c6b135299bc75">NVIC_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_t"></a>- t -</h3><ul> +<li>T +: <a class="el" href="unionx_p_s_r___type.html#a7eed9fe24ae8d354cd76ae1c1110a658">xPSR_Type</a> +</li> +<li>TCR +: <a class="el" href="struct_i_t_m___type.html#a04b9fbc83759cb818dfa161d39628426">ITM_Type</a> +</li> +<li>TER +: <a class="el" href="struct_i_t_m___type.html#acd03c6858f7b678dab6a6121462e7807">ITM_Type</a> +</li> +<li>TPR +: <a class="el" href="struct_i_t_m___type.html#ae907229ba50538bf370fbdfd54c099a2">ITM_Type</a> +</li> +<li>TRIGGER +: <a class="el" href="struct_t_p_i___type.html#a4d4cd2357f72333a82a1313228287bbd">TPI_Type</a> +</li> +<li>TYPE +: <a class="el" href="struct_m_p_u___type.html#a0433efc1383674bc8e86cc0e830b462d">MPU_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_u"></a>- u -</h3><ul> +<li>u16 +: <a class="el" href="struct_i_t_m___type.html#a962a970dfd286cad7f8a8577e87d4ad3">ITM_Type</a> +</li> +<li>u32 +: <a class="el" href="struct_i_t_m___type.html#a5834885903a557674f078f3b71fa8bc8">ITM_Type</a> +</li> +<li>u8 +: <a class="el" href="struct_i_t_m___type.html#ae773bf9f9dac64e6c28b14aa39f74275">ITM_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_v"></a>- v -</h3><ul> +<li>V +: <a class="el" href="union_a_p_s_r___type.html#a8004d224aacb78ca37774c35f9156e7e">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#af14df16ea0690070c45b95f2116b7a0a">xPSR_Type</a> +</li> +<li>VAL +: <a class="el" href="struct_sys_tick___type.html#a9b5420d17e8e43104ddd4ae5a610af93">SysTick_Type</a> +</li> +<li>VTOR +: <a class="el" href="struct_s_c_b___type.html#a187a4578e920544ed967f98020fb8170">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_w"></a>- w -</h3><ul> +<li>w +: <a class="el" href="union_a_p_s_r___type.html#ae4c2ef8c9430d7b7bef5cbfbbaed3a94">APSR_Type</a> +, <a class="el" href="union_c_o_n_t_r_o_l___type.html#a6b642cca3d96da660b1198c133ca2a1f">CONTROL_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a1a47176768f45f79076c4f5b1b534bc2">xPSR_Type</a> +, <a class="el" href="union_i_p_s_r___type.html#a4adca999d3a0bc1ae682d73ea7cfa879">IPSR_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_z"></a>- z -</h3><ul> +<li>Z +: <a class="el" href="union_a_p_s_r___type.html#a3b04d58738b66a28ff13f23d8b0ba7e5">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a1e5d9801013d5146f2e02d9b7b3da562">xPSR_Type</a> +</li> +</ul> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:22 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/functions_vars.html b/Documentation/Core/html/functions_vars.html new file mode 100644 index 0000000..397d484 --- /dev/null +++ b/Documentation/Core/html/functions_vars.html @@ -0,0 +1,627 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Data Fields - Variables</title> +<title>CMSIS-CORE: Data Fields - Variables</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script 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id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + 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<li><a href="#index__"><span>_</span></a></li> + <li><a href="#index_a"><span>a</span></a></li> + <li><a href="#index_b"><span>b</span></a></li> + <li><a href="#index_c"><span>c</span></a></li> + <li><a href="#index_d"><span>d</span></a></li> + <li><a href="#index_e"><span>e</span></a></li> + <li><a href="#index_f"><span>f</span></a></li> + <li><a href="#index_h"><span>h</span></a></li> + <li><a href="#index_i"><span>i</span></a></li> + <li><a href="#index_l"><span>l</span></a></li> + <li><a href="#index_m"><span>m</span></a></li> + <li><a href="#index_n"><span>n</span></a></li> + <li><a href="#index_p"><span>p</span></a></li> + <li><a href="#index_q"><span>q</span></a></li> + <li><a href="#index_r"><span>r</span></a></li> + <li><a href="#index_s"><span>s</span></a></li> + <li><a href="#index_t"><span>t</span></a></li> + <li><a href="#index_u"><span>u</span></a></li> + <li><a href="#index_v"><span>v</span></a></li> + <li><a href="#index_w"><span>w</span></a></li> + <li><a href="#index_z"><span>z</span></a></li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('functions_vars.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a 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id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="contents"> +  + +<h3><a class="anchor" id="index__"></a>- _ -</h3><ul> +<li>_reserved0 +: <a class="el" href="union_a_p_s_r___type.html#afbce95646fd514c10aa85ec0a33db728">APSR_Type</a> +, <a class="el" href="union_c_o_n_t_r_o_l___type.html#af8c314273a1e4970a5671bd7f8184f50">CONTROL_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#af438e0f407357e914a70b5bd4d6a97c5">xPSR_Type</a> +, <a class="el" href="union_i_p_s_r___type.html#ad2eb0a06de4f03f58874a727716aa9aa">IPSR_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_a"></a>- a -</h3><ul> +<li>ACPR +: <a class="el" href="struct_t_p_i___type.html#a9e5e4421ef9c3d5b7ff8b24abd4e99b3">TPI_Type</a> +</li> +<li>ACTLR +: <a class="el" href="struct_s_cn_s_c_b___type.html#a13af9b718dde7481f1c0344f00593c23">SCnSCB_Type</a> +</li> +<li>ADR +: <a class="el" href="struct_s_c_b___type.html#af084e1b2dad004a88668efea1dfe7fa1">SCB_Type</a> +</li> +<li>AFSR +: <a class="el" href="struct_s_c_b___type.html#ab65372404ce64b0f0b35e2709429404e">SCB_Type</a> +</li> +<li>AIRCR +: <a class="el" href="struct_s_c_b___type.html#ad3e5b8934c647eb1b7383c1894f01380">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_b"></a>- b -</h3><ul> +<li>b +: <a class="el" href="union_a_p_s_r___type.html#a7dbc79a057ded4b11ca5323fc2d5ab14">APSR_Type</a> +, <a class="el" href="union_i_p_s_r___type.html#add0d6497bd50c25569ea22b48a03ec50">IPSR_Type</a> +, <a class="el" href="union_c_o_n_t_r_o_l___type.html#adc6a38ab2980d0e9577b5a871da14eb9">CONTROL_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a3b1063bb5cdad67e037cba993b693b70">xPSR_Type</a> +</li> +<li>BFAR +: <a class="el" href="struct_s_c_b___type.html#a3f8e7e58be4e41c88dfa78f54589271c">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_c"></a>- c -</h3><ul> +<li>C +: <a class="el" href="union_a_p_s_r___type.html#a86e2c5b891ecef1ab55b1edac0da79a6">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a40213a6b5620410cac83b0d89564609d">xPSR_Type</a> +</li> +<li>CALIB +: <a class="el" href="struct_sys_tick___type.html#afcadb0c6d35b21cdc0018658a13942de">SysTick_Type</a> +</li> +<li>CCR +: <a class="el" href="struct_s_c_b___type.html#a2d6653b0b70faac936046a02809b577f">SCB_Type</a> +</li> +<li>CFSR +: <a class="el" href="struct_s_c_b___type.html#a0cda9e061b42373383418663092ad19a">SCB_Type</a> +</li> +<li>CLAIMCLR +: <a class="el" href="struct_t_p_i___type.html#a0e10e292cb019a832b03ddd055b2f6ac">TPI_Type</a> +</li> +<li>CLAIMSET +: <a class="el" href="struct_t_p_i___type.html#af8b7d15fa5252b733dd4b11fa1b5730a">TPI_Type</a> +</li> +<li>COMP0 +: <a class="el" href="struct_d_w_t___type.html#a61c2965af5bc0643f9af65620b0e67c9">DWT_Type</a> +</li> +<li>COMP1 +: <a class="el" href="struct_d_w_t___type.html#a38714af6b7fa7c64d68f5e1efbe7a931">DWT_Type</a> +</li> +<li>COMP2 +: <a class="el" href="struct_d_w_t___type.html#a5ae6dde39989f27bae90afc2347deb46">DWT_Type</a> +</li> +<li>COMP3 +: <a class="el" href="struct_d_w_t___type.html#a85eb73d1848ac3f82d39d6c3e8910847">DWT_Type</a> +</li> +<li>CPACR +: <a class="el" href="struct_s_c_b___type.html#ac6a860c1b8d8154a1f00d99d23b67764">SCB_Type</a> +</li> +<li>CPICNT +: <a class="el" href="struct_d_w_t___type.html#a2c08096c82abe245c0fa97badc458154">DWT_Type</a> +</li> +<li>CPUID +: <a class="el" href="struct_s_c_b___type.html#a21e08d546d8b641bee298a459ea73e46">SCB_Type</a> +</li> +<li>CSPSR +: <a class="el" href="struct_t_p_i___type.html#a8826aa84e5806053395a742d38d59d0f">TPI_Type</a> +</li> +<li>CTRL +: <a class="el" href="struct_d_w_t___type.html#add790c53410023b3b581919bb681fe2a">DWT_Type</a> +, <a class="el" href="struct_m_p_u___type.html#a4d81d6aa73a9287bafba2bcc5ffc6d18">MPU_Type</a> +, <a class="el" href="struct_sys_tick___type.html#a875e7afa5c4fd43997fb544a4ac6e37e">SysTick_Type</a> +</li> +<li>CYCCNT +: <a class="el" href="struct_d_w_t___type.html#a102eaa529d9098242851cb57c52b42d9">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_d"></a>- d -</h3><ul> +<li>DCRDR +: <a class="el" href="struct_core_debug___type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55">CoreDebug_Type</a> +</li> +<li>DCRSR +: <a class="el" href="struct_core_debug___type.html#af907cf64577eaf927dac6787df6dd98b">CoreDebug_Type</a> +</li> +<li>DEMCR +: <a class="el" href="struct_core_debug___type.html#aeb3126abc4c258a858f21f356c0df6ee">CoreDebug_Type</a> +</li> +<li>DEVID +: <a class="el" href="struct_t_p_i___type.html#abc0ecda8a5446bc754080276bad77514">TPI_Type</a> +</li> +<li>DEVTYPE +: <a class="el" href="struct_t_p_i___type.html#ad98855854a719bbea33061e71529a472">TPI_Type</a> +</li> +<li>DFR +: <a class="el" href="struct_s_c_b___type.html#a85dd6fe77aab17e7ea89a52c59da6004">SCB_Type</a> +</li> +<li>DFSR +: <a class="el" href="struct_s_c_b___type.html#a191579bde0d21ff51d30a714fd887033">SCB_Type</a> +</li> +<li>DHCSR +: <a class="el" href="struct_core_debug___type.html#ad63554e4650da91a8e79929cbb63db66">CoreDebug_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_e"></a>- e -</h3><ul> +<li>EXCCNT +: <a class="el" href="struct_d_w_t___type.html#a9fe20c16c5167ca61486caf6832686d1">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_f"></a>- f -</h3><ul> +<li>FFCR +: <a class="el" href="struct_t_p_i___type.html#a3f68b6e73561b4849ebf953a894df8d2">TPI_Type</a> +</li> +<li>FFSR +: <a class="el" href="struct_t_p_i___type.html#a6c47a0b4c7ffc66093ef993d36bb441c">TPI_Type</a> +</li> +<li>FIFO0 +: <a class="el" href="struct_t_p_i___type.html#aa4d7b5cf39dff9f53bf7f69bc287a814">TPI_Type</a> +</li> +<li>FIFO1 +: <a class="el" href="struct_t_p_i___type.html#a061372fcd72f1eea871e2d9c1be849bc">TPI_Type</a> +</li> +<li>FOLDCNT +: <a class="el" href="struct_d_w_t___type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97">DWT_Type</a> +</li> +<li>FPCA +: <a class="el" href="union_c_o_n_t_r_o_l___type.html#ac62cfff08e6f055e0101785bad7094cd">CONTROL_Type</a> +</li> +<li>FPCAR +: <a class="el" href="struct_f_p_u___type.html#a55263b468d0f8e11ac77aec9ff87c820">FPU_Type</a> +</li> +<li>FPCCR +: <a class="el" href="struct_f_p_u___type.html#af1b708c5e413739150df3d16ca3b7061">FPU_Type</a> +</li> +<li>FPDSCR +: <a class="el" href="struct_f_p_u___type.html#a58d1989664a06db6ec2e122eefa9f04a">FPU_Type</a> +</li> +<li>FSCR +: <a class="el" href="struct_t_p_i___type.html#ad6901bfd8a0089ca7e8a20475cf494a8">TPI_Type</a> +</li> +<li>FUNCTION0 +: <a class="el" href="struct_d_w_t___type.html#a579ae082f58a0317b7ef029b20f52889">DWT_Type</a> +</li> +<li>FUNCTION1 +: <a class="el" href="struct_d_w_t___type.html#a8dfcf25675f9606aa305c46e85182e4e">DWT_Type</a> +</li> +<li>FUNCTION2 +: <a class="el" href="struct_d_w_t___type.html#ab1b60d6600c38abae515bab8e86a188f">DWT_Type</a> +</li> +<li>FUNCTION3 +: <a class="el" href="struct_d_w_t___type.html#a52d4ff278fae6f9216c63b74ce328841">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_h"></a>- h -</h3><ul> +<li>HFSR +: <a class="el" href="struct_s_c_b___type.html#a14ad254659362b9752c69afe3fd80934">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_i"></a>- i -</h3><ul> +<li>IABR +: <a class="el" href="struct_n_v_i_c___type.html#a4bca5452748ba84d64536fb6a5d795af">NVIC_Type</a> +</li> +<li>ICER +: <a class="el" href="struct_n_v_i_c___type.html#a245df8bac1da05c39eadabede9323203">NVIC_Type</a> +</li> +<li>ICPR +: <a class="el" href="struct_n_v_i_c___type.html#a8d8f45d9c5c67bba3c153c55574bac95">NVIC_Type</a> +</li> +<li>ICSR +: <a class="el" href="struct_s_c_b___type.html#a0ca18ef984d132c6bf4d9b61cd00f05a">SCB_Type</a> +</li> +<li>ICTR +: <a class="el" href="struct_s_cn_s_c_b___type.html#a34ec1d771245eb9bd0e3ec9336949762">SCnSCB_Type</a> +</li> +<li>IP +: <a class="el" href="struct_n_v_i_c___type.html#a7ff7364a4260df67a2784811e8da4efd">NVIC_Type</a> +</li> +<li>ISAR +: <a class="el" href="struct_s_c_b___type.html#ae0136a2d2d3c45f016b2c449e92b2066">SCB_Type</a> +</li> +<li>ISER +: <a class="el" href="struct_n_v_i_c___type.html#a9fccef5a60a0d5e81fcd7869a6274f47">NVIC_Type</a> +</li> +<li>ISPR +: <a class="el" href="struct_n_v_i_c___type.html#a8f731a9f428efc86e8d311b52ce823d0">NVIC_Type</a> +</li> +<li>ISR +: <a class="el" href="union_i_p_s_r___type.html#ab46e5f1b2f4d17cfb9aca4fffcbb2fa5">IPSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a3e9120dcf1a829fc8d2302b4d0673970">xPSR_Type</a> +</li> +<li>IT +: <a class="el" href="unionx_p_s_r___type.html#a3200966922a194d84425e2807a7f1328">xPSR_Type</a> +</li> +<li>ITATBCTR0 +: <a class="el" href="struct_t_p_i___type.html#aaa573b2e073e76e93c51ecec79c616d0">TPI_Type</a> +</li> +<li>ITATBCTR2 +: <a class="el" href="struct_t_p_i___type.html#ab358319b969d3fed0f89bbe33e9f1652">TPI_Type</a> +</li> +<li>ITCTRL +: <a class="el" href="struct_t_p_i___type.html#aaa4c823c10f115f7517c82ef86a5a68d">TPI_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_l"></a>- l -</h3><ul> +<li>LOAD +: <a class="el" href="struct_sys_tick___type.html#a4780a489256bb9f54d0ba8ed4de191cd">SysTick_Type</a> +</li> +<li>LSUCNT +: <a class="el" href="struct_d_w_t___type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">DWT_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_m"></a>- m -</h3><ul> +<li>MASK0 +: <a class="el" href="struct_d_w_t___type.html#a821eb5e71f340ec077efc064cfc567db">DWT_Type</a> +</li> +<li>MASK1 +: <a class="el" href="struct_d_w_t___type.html#aabf94936c9340e62fed836dcfb152405">DWT_Type</a> +</li> +<li>MASK2 +: <a class="el" href="struct_d_w_t___type.html#a00ac4d830dfe0070a656cda9baed170f">DWT_Type</a> +</li> +<li>MASK3 +: <a class="el" href="struct_d_w_t___type.html#a2a509d8505c37a3b64f6b24993df5f3f">DWT_Type</a> +</li> +<li>MMFAR +: <a class="el" href="struct_s_c_b___type.html#a2d03d0b7cec2254f39eb1c46c7445e80">SCB_Type</a> +</li> +<li>MMFR +: <a class="el" href="struct_s_c_b___type.html#aa11887804412bda283cc85a83fdafa7c">SCB_Type</a> +</li> +<li>MVFR0 +: <a class="el" href="struct_f_p_u___type.html#a4f19014defe6033d070b80af19ef627c">FPU_Type</a> +</li> +<li>MVFR1 +: <a class="el" href="struct_f_p_u___type.html#a66f8cfa49a423b480001a4e101bf842d">FPU_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_n"></a>- n -</h3><ul> +<li>N +: <a class="el" href="union_a_p_s_r___type.html#a7e7bbba9b00b0bb3283dc07f1abe37e0">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a2db9a52f6d42809627d1a7a607c5dbc5">xPSR_Type</a> +</li> +<li>nPRIV +: <a class="el" href="union_c_o_n_t_r_o_l___type.html#a35c1732cf153b7b5c4bd321cf1de9605">CONTROL_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_p"></a>- p -</h3><ul> +<li>PCSR +: <a class="el" href="struct_d_w_t___type.html#a6353ca1d1ad9bc1be05d3b5632960113">DWT_Type</a> +</li> +<li>PFR +: <a class="el" href="struct_s_c_b___type.html#a681c9d9e518b217976bef38c2423d83d">SCB_Type</a> +</li> +<li>PORT +: <a class="el" href="struct_i_t_m___type.html#af4c205be465780a20098387120bdb482">ITM_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_q"></a>- q -</h3><ul> +<li>Q +: <a class="el" href="union_a_p_s_r___type.html#a22d10913489d24ab08bd83457daa88de">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#add7cbd2b0abd8954d62cd7831796ac7c">xPSR_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_r"></a>- r -</h3><ul> +<li>RASR +: <a class="el" href="struct_m_p_u___type.html#a9236c629b7cf86f8bd2459c610fdf715">MPU_Type</a> +</li> +<li>RASR_A1 +: <a class="el" href="struct_m_p_u___type.html#ab5a224ccd12ac55ddfe11d9eca42de48">MPU_Type</a> +</li> +<li>RASR_A2 +: <a class="el" href="struct_m_p_u___type.html#ac60e0919871b66446a039838bcaaec3b">MPU_Type</a> +</li> +<li>RASR_A3 +: <a class="el" href="struct_m_p_u___type.html#a9c0b2d3e3e16bb4e7dfa069652d5a155">MPU_Type</a> +</li> +<li>RBAR +: <a class="el" href="struct_m_p_u___type.html#ac953770d38a7d322b971d93eb8a5b062">MPU_Type</a> +</li> +<li>RBAR_A1 +: <a class="el" href="struct_m_p_u___type.html#a13d69b9bea12861383f3a62764b02f63">MPU_Type</a> +</li> +<li>RBAR_A2 +: <a class="el" href="struct_m_p_u___type.html#a57dc551614932150e684fcc60590c2c4">MPU_Type</a> +</li> +<li>RBAR_A3 +: <a class="el" href="struct_m_p_u___type.html#a345911aabecd1f7d93a1bff7738b0d86">MPU_Type</a> +</li> +<li>RESERVED0 +: <a class="el" href="struct_n_v_i_c___type.html#a2de17698945ea49abd58a2d45bdc9c80">NVIC_Type</a> +, <a class="el" href="struct_s_c_b___type.html#ac89a5d9901e3748d22a7090bfca2bee6">SCB_Type</a> +, <a class="el" href="struct_s_cn_s_c_b___type.html#afe1d5fd2966d5062716613b05c8d0ae1">SCnSCB_Type</a> +, <a class="el" href="struct_i_t_m___type.html#a2c5ae30385b5f370d023468ea9914c0e">ITM_Type</a> +, <a class="el" href="struct_f_p_u___type.html#a7b2967b069046c8544adbbc1db143a36">FPU_Type</a> +, <a class="el" href="struct_d_w_t___type.html#addd893d655ed90d40705b20170daac59">DWT_Type</a> +, <a class="el" href="struct_t_p_i___type.html#af143c5e8fc9a3b2be2878e9c1f331aa9">TPI_Type</a> +</li> +<li>RESERVED1 +: <a class="el" href="struct_i_t_m___type.html#afffce5b93bbfedbaee85357d0b07ebce">ITM_Type</a> +, <a class="el" href="struct_d_w_t___type.html#a069871233a8c1df03521e6d7094f1de4">DWT_Type</a> +, <a class="el" href="struct_t_p_i___type.html#ac3956fe93987b725d89d3be32738da12">TPI_Type</a> +</li> +<li>RESERVED2 +: <a class="el" href="struct_i_t_m___type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b">ITM_Type</a> +, <a class="el" href="struct_d_w_t___type.html#a8556ca1c32590517602d92fe0cd55738">DWT_Type</a> +, <a class="el" href="struct_t_p_i___type.html#ac7bbb92e6231b9b38ac483f7d161a096">TPI_Type</a> +, <a class="el" href="struct_n_v_i_c___type.html#a0953af43af8ec7fd5869a1d826ce5b72">NVIC_Type</a> +</li> +<li>RESERVED3 +: <a class="el" href="struct_t_p_i___type.html#a31700c8cdd26e4c094db72af33d9f24c">TPI_Type</a> +, <a class="el" href="struct_n_v_i_c___type.html#a9dd330835dbf21471e7b5be8692d77ab">NVIC_Type</a> +</li> +<li>RESERVED4 +: <a class="el" href="struct_n_v_i_c___type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790">NVIC_Type</a> +, <a class="el" href="struct_t_p_i___type.html#a684071216fafee4e80be6aaa932cec46">TPI_Type</a> +</li> +<li>RESERVED5 +: <a class="el" href="struct_t_p_i___type.html#a3f80dd93f6bab6524603a7aa58de9a30">TPI_Type</a> +, <a class="el" href="struct_n_v_i_c___type.html#a4f753b4f824270175af045ac99bc12e8">NVIC_Type</a> +</li> +<li>RESERVED7 +: <a class="el" href="struct_t_p_i___type.html#a476ca23fbc9480f1697fbec871130550">TPI_Type</a> +</li> +<li>RNR +: <a class="el" href="struct_m_p_u___type.html#aa800d44f4d3520cc891d7b8d711320c1">MPU_Type</a> +</li> +<li>RSERVED1 +: <a class="el" href="struct_n_v_i_c___type.html#a6d1daf7ab6f2ba83f57ff67ae6f571fe">NVIC_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_s"></a>- s -</h3><ul> +<li>SCR +: <a class="el" href="struct_s_c_b___type.html#a3a4840c6fa4d1ee75544f4032c88ec34">SCB_Type</a> +</li> +<li>SHCSR +: <a class="el" href="struct_s_c_b___type.html#a7b5ae9741a99808043394c4743b635c4">SCB_Type</a> +</li> +<li>SHP +: <a class="el" href="struct_s_c_b___type.html#a85768f4b3dbbc41fd760041ee1202162">SCB_Type</a> +</li> +<li>SLEEPCNT +: <a class="el" href="struct_d_w_t___type.html#a416a54e2084ce66e5ca74f152a5ecc70">DWT_Type</a> +</li> +<li>SPPR +: <a class="el" href="struct_t_p_i___type.html#a12f79d4e3ddc69893ba8bff890d04cc5">TPI_Type</a> +</li> +<li>SPSEL +: <a class="el" href="union_c_o_n_t_r_o_l___type.html#a8cc085fea1c50a8bd9adea63931ee8e2">CONTROL_Type</a> +</li> +<li>SSPSR +: <a class="el" href="struct_t_p_i___type.html#a7b72598e20066133e505bb781690dc22">TPI_Type</a> +</li> +<li>STIR +: <a class="el" href="struct_n_v_i_c___type.html#a37de89637466e007171c6b135299bc75">NVIC_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_t"></a>- t -</h3><ul> +<li>T +: <a class="el" href="unionx_p_s_r___type.html#a7eed9fe24ae8d354cd76ae1c1110a658">xPSR_Type</a> +</li> +<li>TCR +: <a class="el" href="struct_i_t_m___type.html#a04b9fbc83759cb818dfa161d39628426">ITM_Type</a> +</li> +<li>TER +: <a class="el" href="struct_i_t_m___type.html#acd03c6858f7b678dab6a6121462e7807">ITM_Type</a> +</li> +<li>TPR +: <a class="el" href="struct_i_t_m___type.html#ae907229ba50538bf370fbdfd54c099a2">ITM_Type</a> +</li> +<li>TRIGGER +: <a class="el" href="struct_t_p_i___type.html#a4d4cd2357f72333a82a1313228287bbd">TPI_Type</a> +</li> +<li>TYPE +: <a class="el" href="struct_m_p_u___type.html#a0433efc1383674bc8e86cc0e830b462d">MPU_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_u"></a>- u -</h3><ul> +<li>u16 +: <a class="el" href="struct_i_t_m___type.html#a962a970dfd286cad7f8a8577e87d4ad3">ITM_Type</a> +</li> +<li>u32 +: <a class="el" href="struct_i_t_m___type.html#a5834885903a557674f078f3b71fa8bc8">ITM_Type</a> +</li> +<li>u8 +: <a class="el" href="struct_i_t_m___type.html#ae773bf9f9dac64e6c28b14aa39f74275">ITM_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_v"></a>- v -</h3><ul> +<li>V +: <a class="el" href="union_a_p_s_r___type.html#a8004d224aacb78ca37774c35f9156e7e">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#af14df16ea0690070c45b95f2116b7a0a">xPSR_Type</a> +</li> +<li>VAL +: <a class="el" href="struct_sys_tick___type.html#a9b5420d17e8e43104ddd4ae5a610af93">SysTick_Type</a> +</li> +<li>VTOR +: <a class="el" href="struct_s_c_b___type.html#a187a4578e920544ed967f98020fb8170">SCB_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_w"></a>- w -</h3><ul> +<li>w +: <a class="el" href="union_a_p_s_r___type.html#ae4c2ef8c9430d7b7bef5cbfbbaed3a94">APSR_Type</a> +, <a class="el" href="union_c_o_n_t_r_o_l___type.html#a6b642cca3d96da660b1198c133ca2a1f">CONTROL_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a1a47176768f45f79076c4f5b1b534bc2">xPSR_Type</a> +, <a class="el" href="union_i_p_s_r___type.html#a4adca999d3a0bc1ae682d73ea7cfa879">IPSR_Type</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_z"></a>- z -</h3><ul> +<li>Z +: <a class="el" href="union_a_p_s_r___type.html#a3b04d58738b66a28ff13f23d8b0ba7e5">APSR_Type</a> +, <a class="el" href="unionx_p_s_r___type.html#a1e5d9801013d5146f2e02d9b7b3da562">xPSR_Type</a> +</li> +</ul> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:22 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/globals.html b/Documentation/Core/html/globals.html new file mode 100644 index 0000000..e00ba64 --- /dev/null +++ b/Documentation/Core/html/globals.html @@ -0,0 +1,676 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Globals</title> +<title>CMSIS-CORE: Globals</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> + <div id="navrow3" class="tabs2"> + <ul class="tablist"> + <li class="current"><a href="globals.html"><span>All</span></a></li> + <li><a href="globals_func.html"><span>Functions</span></a></li> + <li><a href="globals_vars.html"><span>Variables</span></a></li> + <li><a href="globals_enum.html"><span>Enumerations</span></a></li> + <li><a href="globals_eval.html"><span>Enumerator</span></a></li> + <li><a href="globals_defs.html"><span>Macros</span></a></li> + </ul> + </div> + <div id="navrow4" class="tabs3"> + <ul class="tablist"> + <li><a href="#index__"><span>_</span></a></li> + <li><a href="#index_b"><span>b</span></a></li> + <li><a href="#index_d"><span>d</span></a></li> + <li><a href="#index_h"><span>h</span></a></li> + <li><a href="#index_i"><span>i</span></a></li> + <li><a href="#index_m"><span>m</span></a></li> + <li><a href="#index_n"><span>n</span></a></li> + <li><a href="#index_p"><span>p</span></a></li> + <li><a href="#index_s"><span>s</span></a></li> + <li><a href="#index_u"><span>u</span></a></li> + <li><a href="#index_w"><span>w</span></a></li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('globals.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="contents"> +<div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div> + +<h3><a class="anchor" id="index__"></a>- _ -</h3><ul> +<li>__BKPT() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#ga92f5621626711931da71eaa8bf301af7">Ref_cmInstr.txt</a> +</li> +<li>__CLREX() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#ga354c5ac8870cc3dfb823367af9c4b412">Ref_cmInstr.txt</a> +</li> +<li>__CLZ() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#ga90884c591ac5d73d6069334eba9d6c02">Ref_cmInstr.txt</a> +</li> +<li>__disable_fault_irq() +: <a class="el" href="group___core___register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939">Ref_CoreReg.txt</a> +</li> +<li>__disable_irq() +: <a class="el" href="group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">Ref_CoreReg.txt</a> +</li> +<li>__DMB() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#gab1c9b393641dc2d397b3408fdbe72b96">Ref_cmInstr.txt</a> +</li> +<li>__DSB() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#gacb2a8ca6eae1ba4b31161578b720c199">Ref_cmInstr.txt</a> +</li> +<li>__enable_fault_irq() +: <a class="el" href="group___core___register__gr.html#ga6575d37863cec5d334864f93b5b783bf">Ref_CoreReg.txt</a> +</li> +<li>__enable_irq() +: <a class="el" href="group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">Ref_CoreReg.txt</a> +</li> +<li>__get_APSR() +: <a class="el" href="group___core___register__gr.html#ga811c0012221ee918a75111ca84c4d5e7">Ref_CoreReg.txt</a> +</li> +<li>__get_BASEPRI() +: <a class="el" href="group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667">Ref_CoreReg.txt</a> +</li> +<li>__get_CONTROL() +: <a class="el" href="group___core___register__gr.html#ga963cf236b73219ce78e965deb01b81a7">Ref_CoreReg.txt</a> +</li> +<li>__get_FAULTMASK() +: <a class="el" href="group___core___register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8">Ref_CoreReg.txt</a> +</li> +<li>__get_FPSCR() +: <a class="el" href="group___core___register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905">Ref_CoreReg.txt</a> +</li> +<li>__get_IPSR() +: <a class="el" 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href="group__intrinsic___s_i_m_d__gr.html#gafa9af218db3934a692fb06fa728d8031">Ref_cm4_simd.txt</a> +</li> +<li>__UQASX() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga5eff3ae5eabcd73f3049996ca391becb">Ref_cm4_simd.txt</a> +</li> +<li>__UQSAX() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gadecfdfabc328d8939d49d996f2fd4482">Ref_cm4_simd.txt</a> +</li> +<li>__UQSUB16() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga5ec4e2e231d15e5c692233feb3806187">Ref_cm4_simd.txt</a> +</li> +<li>__UQSUB8() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga9736fe816aec74fe886e7fb949734eab">Ref_cm4_simd.txt</a> +</li> +<li>__USAD8() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gac8855c07044239ea775c8128013204f0">Ref_cm4_simd.txt</a> +</li> +<li>__USADA8() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad032bd21f013c5d29f5fcb6b0f02bc3f">Ref_cm4_simd.txt</a> +</li> +<li>__USAT() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#ga76bbe4374a5912362866cdc1ded4064a">Ref_cmInstr.txt</a> +</li> +<li>__USAT16() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga967f516afff5900cf30f1a81907cdd89">Ref_cm4_simd.txt</a> +</li> +<li>__USAX() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga578a082747436772c482c96d7a58e45e">Ref_cm4_simd.txt</a> +</li> +<li>__USUB16() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga9f2b77e11fc4a77b26c36c423ed45b4e">Ref_cm4_simd.txt</a> +</li> +<li>__USUB8() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gacb7257dc3b8e9acbd0ef0e31ff87d4b8">Ref_cm4_simd.txt</a> +</li> +<li>__UXTAB16() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad25ce96db0f17096bbd815f4817faf09">Ref_cm4_simd.txt</a> +</li> +<li>__UXTB16() +: <a class="el" href="group__intrinsic___s_i_m_d__gr.html#gab41d713653b16f8d9fef44d14e397228">Ref_cm4_simd.txt</a> +</li> +<li>__WFE() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#gad3efec76c3bfa2b8528ded530386c563">Ref_cmInstr.txt</a> +</li> +<li>__WFI() +: <a class="el" href="group__intrinsic___c_p_u__gr.html#gaed91dfbf3d7d7b7fba8d912fcbeaad88">Ref_cmInstr.txt</a> +</li> +<li>_FLD2VAL +: <a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">Ref_Peripheral.txt</a> +</li> +<li>_VAL2FLD +: <a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">Ref_Peripheral.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_b"></a>- b -</h3><ul> +<li>BusFault_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_d"></a>- d -</h3><ul> +<li>DebugMonitor_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_h"></a>- h -</h3><ul> +<li>HardFault_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_i"></a>- i -</h3><ul> +<li>IRQn_Type +: <a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">Ref_NVIC.txt</a> +</li> +<li>ITM_CheckChar() +: <a class="el" href="group___i_t_m___debug__gr.html#ga7f9bbabd9756d1a7eafb2d9bf27e0535">Ref_Debug.txt</a> +</li> +<li>ITM_ReceiveChar() +: <a class="el" href="group___i_t_m___debug__gr.html#ga37b8f41cae703b5ff6947e271065558c">Ref_Debug.txt</a> +</li> +<li>ITM_RxBuffer +: <a class="el" href="group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">Ref_Debug.txt</a> +</li> +<li>ITM_SendChar() +: <a class="el" href="group___i_t_m___debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">Ref_Debug.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_m"></a>- m -</h3><ul> +<li>MemoryManagement_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_n"></a>- n -</h3><ul> +<li>NonMaskableInt_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30">Ref_NVIC.txt</a> +</li> +<li>NVIC_ClearPendingIRQ() +: <a class="el" href="group___n_v_i_c__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a">Ref_NVIC.txt</a> +</li> +<li>NVIC_DecodePriority() +: <a class="el" href="group___n_v_i_c__gr.html#gad3cbca1be7a4726afa9448a9acd89377">Ref_NVIC.txt</a> +</li> +<li>NVIC_DisableIRQ() +: <a class="el" href="group___n_v_i_c__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c">Ref_NVIC.txt</a> +</li> +<li>NVIC_EnableIRQ() +: <a class="el" href="group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">Ref_NVIC.txt</a> +</li> +<li>NVIC_EncodePriority() +: <a class="el" href="group___n_v_i_c__gr.html#ga0688c59605b119c53c71b2505ab23eb5">Ref_NVIC.txt</a> +</li> +<li>NVIC_GetActive() +: <a class="el" href="group___n_v_i_c__gr.html#gadf4252e600661fd762cfc0d1a9f5b892">Ref_NVIC.txt</a> +</li> +<li>NVIC_GetPendingIRQ() +: <a class="el" href="group___n_v_i_c__gr.html#ga95a8329a680b051ecf3ee8f516acc662">Ref_NVIC.txt</a> +</li> +<li>NVIC_GetPriority() +: <a class="el" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">Ref_NVIC.txt</a> +</li> +<li>NVIC_GetPriorityGrouping() +: <a class="el" href="group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78">Ref_NVIC.txt</a> +</li> +<li>NVIC_SetPendingIRQ() +: <a class="el" href="group___n_v_i_c__gr.html#ga3b885147ef9965ecede49614de8df9d2">Ref_NVIC.txt</a> +</li> +<li>NVIC_SetPriority() +: <a class="el" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798">Ref_NVIC.txt</a> +</li> +<li>NVIC_SetPriorityGrouping() +: <a class="el" href="group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354">Ref_NVIC.txt</a> +</li> +<li>NVIC_SystemReset() +: <a class="el" href="group___n_v_i_c__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_p"></a>- p -</h3><ul> +<li>PendSV_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2">Ref_NVIC.txt</a> +</li> +<li>PVD_STM_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_s"></a>- s -</h3><ul> +<li>SCB_CleanDCache() +: <a class="el" href="group___dcache__functions__m7.html#ga55583e3065c6eabca204b8b89b121c4c">core_cm7.txt</a> +</li> +<li>SCB_CleanDCache_by_Addr() +: <a class="el" href="group___dcache__functions__m7.html#ga696fadbf7b9cc71dad42fab61873a40d">core_cm7.txt</a> +</li> +<li>SCB_CleanInvalidateDCache() +: <a class="el" href="group___dcache__functions__m7.html#ga1b741def9e3b2ca97dc9ea49b8ce505c">core_cm7.txt</a> +</li> +<li>SCB_CleanInvalidateDCache_by_Addr() +: <a class="el" href="group___dcache__functions__m7.html#ga630131b2572eaa16b569ed364dfc895e">core_cm7.txt</a> +</li> +<li>SCB_DisableDCache() +: <a class="el" href="group___dcache__functions__m7.html#ga6468170f90d270caab8116e7a4f0b5fe">core_cm7.txt</a> +</li> +<li>SCB_DisableICache() +: <a class="el" href="group___icache__functions__m7.html#gaba757390852f95b3ac2d8638c717d8d8">core_cm7.txt</a> +</li> +<li>SCB_EnableDCache() +: <a class="el" href="group___dcache__functions__m7.html#ga63aa640d9006021a796a5dcf9c7180b6">core_cm7.txt</a> +</li> +<li>SCB_EnableICache() +: <a class="el" href="group___icache__functions__m7.html#gaf9e7c6c8e16ada1f95e5bf5a03505b68">core_cm7.txt</a> +</li> +<li>SCB_GetFPUType() +: <a class="el" href="group__fpu__functions__m7.html#ga6bcad99ce80a0e7e4ddc6f2379081756">core_cm7.txt</a> +</li> +<li>SCB_InvalidateDCache() +: <a class="el" href="group___dcache__functions__m7.html#gace2d30db08887d0bdb818b8a785a5ce6">core_cm7.txt</a> +</li> +<li>SCB_InvalidateDCache_by_Addr() +: <a class="el" href="group___dcache__functions__m7.html#ga503ef7ef58c0773defd15a82f6336c09">core_cm7.txt</a> +</li> +<li>SCB_InvalidateICache() +: <a class="el" href="group___icache__functions__m7.html#ga50d373a785edd782c5de5a3b55e30ff3">core_cm7.txt</a> +</li> +<li>SVCall_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237">Ref_NVIC.txt</a> +</li> +<li>SystemCoreClock +: <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">Ref_SystemAndClock.txt</a> +</li> +<li>SystemCoreClockUpdate() +: <a class="el" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">Ref_SystemAndClock.txt</a> +</li> +<li>SystemInit() +: <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">Ref_SystemAndClock.txt</a> +</li> +<li>SysTick_Config() +: <a class="el" href="group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427">Ref_Systick.txt</a> +</li> +<li>SysTick_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_u"></a>- u -</h3><ul> +<li>UsageFault_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf">Ref_NVIC.txt</a> +</li> +</ul> + + +<h3><a class="anchor" id="index_w"></a>- w -</h3><ul> +<li>WWDG_STM_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2">Ref_NVIC.txt</a> +</li> +</ul> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:22 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/globals_defs.html b/Documentation/Core/html/globals_defs.html new file mode 100644 index 0000000..a27df83 --- /dev/null +++ b/Documentation/Core/html/globals_defs.html @@ -0,0 +1,142 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Globals</title> +<title>CMSIS-CORE: Globals</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> + <div id="navrow3" class="tabs2"> + <ul class="tablist"> + <li><a href="globals.html"><span>All</span></a></li> + <li><a href="globals_func.html"><span>Functions</span></a></li> + <li><a href="globals_vars.html"><span>Variables</span></a></li> + <li><a href="globals_enum.html"><span>Enumerations</span></a></li> + <li><a href="globals_eval.html"><span>Enumerator</span></a></li> + <li class="current"><a href="globals_defs.html"><span>Macros</span></a></li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('globals_defs.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="contents"> + <ul> +<li>_FLD2VAL +: <a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">Ref_Peripheral.txt</a> +</li> +<li>_VAL2FLD +: <a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">Ref_Peripheral.txt</a> +</li> +</ul> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! 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+</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="contents"> + <ul> +<li>BusFault_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af">Ref_NVIC.txt</a> +</li> +<li>DebugMonitor_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c">Ref_NVIC.txt</a> +</li> +<li>HardFault_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85">Ref_NVIC.txt</a> +</li> +<li>MemoryManagement_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa">Ref_NVIC.txt</a> +</li> +<li>NonMaskableInt_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30">Ref_NVIC.txt</a> +</li> +<li>PendSV_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2">Ref_NVIC.txt</a> +</li> +<li>PVD_STM_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86">Ref_NVIC.txt</a> +</li> +<li>SVCall_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237">Ref_NVIC.txt</a> +</li> +<li>SysTick_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">Ref_NVIC.txt</a> +</li> +<li>UsageFault_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf">Ref_NVIC.txt</a> +</li> +<li>WWDG_STM_IRQn +: <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2">Ref_NVIC.txt</a> +</li> +</ul> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:22 for CMSIS-CORE by ARM Ltd. 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--> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:22 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group___core___register__gr.html b/Documentation/Core/html/group___core___register__gr.html new file mode 100644 index 0000000..6eff421 --- /dev/null +++ b/Documentation/Core/html/group___core___register__gr.html @@ -0,0 +1,1188 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Core Register Access</title> +<title>CMSIS-CORE: Core Register Access</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" 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style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return 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+<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:ga963cf236b73219ce78e965deb01b81a7"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga963cf236b73219ce78e965deb01b81a7">__get_CONTROL</a> (void)</td></tr> +<tr class="memdesc:ga963cf236b73219ce78e965deb01b81a7"><td class="mdescLeft"> </td><td class="mdescRight">Read the CONTROL register. <a href="#ga963cf236b73219ce78e965deb01b81a7"></a><br/></td></tr> +<tr class="separator:ga963cf236b73219ce78e965deb01b81a7"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gac64d37e7ff9de06437f9fb94bbab8b6c"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c">__set_CONTROL</a> (uint32_t control)</td></tr> +<tr class="memdesc:gac64d37e7ff9de06437f9fb94bbab8b6c"><td class="mdescLeft"> </td><td class="mdescRight">Set the CONTROL Register. <a href="#gac64d37e7ff9de06437f9fb94bbab8b6c"></a><br/></td></tr> +<tr class="separator:gac64d37e7ff9de06437f9fb94bbab8b6c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8">__get_IPSR</a> (void)</td></tr> +<tr class="memdesc:ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8"><td class="mdescLeft"> </td><td class="mdescRight">Read the IPSR register. <a href="#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8"></a><br/></td></tr> +<tr class="separator:ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga811c0012221ee918a75111ca84c4d5e7"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga811c0012221ee918a75111ca84c4d5e7">__get_APSR</a> (void)</td></tr> +<tr class="memdesc:ga811c0012221ee918a75111ca84c4d5e7"><td class="mdescLeft"> </td><td class="mdescRight">Read the APSR register. <a href="#ga811c0012221ee918a75111ca84c4d5e7"></a><br/></td></tr> +<tr class="separator:ga811c0012221ee918a75111ca84c4d5e7"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga732e08184154f44a617963cc65ff95bd"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga732e08184154f44a617963cc65ff95bd">__get_xPSR</a> (void)</td></tr> +<tr class="memdesc:ga732e08184154f44a617963cc65ff95bd"><td class="mdescLeft"> </td><td class="mdescRight">Read the xPSR register. <a href="#ga732e08184154f44a617963cc65ff95bd"></a><br/></td></tr> +<tr class="separator:ga732e08184154f44a617963cc65ff95bd"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga914dfa8eff7ca53380dd54cf1d8bebd9"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9">__get_PSP</a> (void)</td></tr> +<tr class="memdesc:ga914dfa8eff7ca53380dd54cf1d8bebd9"><td class="mdescLeft"> </td><td class="mdescRight">Read the PSP register. <a href="#ga914dfa8eff7ca53380dd54cf1d8bebd9"></a><br/></td></tr> +<tr class="separator:ga914dfa8eff7ca53380dd54cf1d8bebd9"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga48e5853f417e17a8a65080f6a605b743"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga48e5853f417e17a8a65080f6a605b743">__set_PSP</a> (uint32_t topOfProcStack)</td></tr> +<tr class="memdesc:ga48e5853f417e17a8a65080f6a605b743"><td class="mdescLeft"> </td><td class="mdescRight">Set the PSP register. <a href="#ga48e5853f417e17a8a65080f6a605b743"></a><br/></td></tr> +<tr class="separator:ga48e5853f417e17a8a65080f6a605b743"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gab898559392ba027814e5bbb5a98b38d2"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#gab898559392ba027814e5bbb5a98b38d2">__get_MSP</a> (void)</td></tr> +<tr class="memdesc:gab898559392ba027814e5bbb5a98b38d2"><td class="mdescLeft"> </td><td class="mdescRight">Read the MSP register. <a href="#gab898559392ba027814e5bbb5a98b38d2"></a><br/></td></tr> +<tr class="separator:gab898559392ba027814e5bbb5a98b38d2"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga0bf9564ebc1613a8faba014275dac2a4"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4">__set_MSP</a> (uint32_t topOfMainStack)</td></tr> +<tr class="memdesc:ga0bf9564ebc1613a8faba014275dac2a4"><td class="mdescLeft"> </td><td class="mdescRight">Set the MSP register. <a href="#ga0bf9564ebc1613a8faba014275dac2a4"></a><br/></td></tr> +<tr class="separator:ga0bf9564ebc1613a8faba014275dac2a4"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga799b5d9a2ae75e459264c8512c7c0e02"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02">__get_PRIMASK</a> (void)</td></tr> +<tr class="memdesc:ga799b5d9a2ae75e459264c8512c7c0e02"><td class="mdescLeft"> </td><td class="mdescRight">Read the PRIMASK register bit. <a href="#ga799b5d9a2ae75e459264c8512c7c0e02"></a><br/></td></tr> +<tr class="separator:ga799b5d9a2ae75e459264c8512c7c0e02"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga70b4e1a6c1c86eb913fb9d6e8400156f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f">__set_PRIMASK</a> (uint32_t priMask)</td></tr> +<tr class="memdesc:ga70b4e1a6c1c86eb913fb9d6e8400156f"><td class="mdescLeft"> </td><td class="mdescRight">Set the Priority Mask bit. <a href="#ga70b4e1a6c1c86eb913fb9d6e8400156f"></a><br/></td></tr> +<tr class="separator:ga70b4e1a6c1c86eb913fb9d6e8400156f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga32da759f46e52c95bcfbde5012260667"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667">__get_BASEPRI</a> (void)</td></tr> +<tr class="memdesc:ga32da759f46e52c95bcfbde5012260667"><td class="mdescLeft"> </td><td class="mdescRight">Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga32da759f46e52c95bcfbde5012260667"></a><br/></td></tr> +<tr class="separator:ga32da759f46e52c95bcfbde5012260667"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga360c73eb7ffb16088556f9278953b882"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a> (uint32_t basePri)</td></tr> +<tr class="memdesc:ga360c73eb7ffb16088556f9278953b882"><td class="mdescLeft"> </td><td class="mdescRight">Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga360c73eb7ffb16088556f9278953b882"></a><br/></td></tr> +<tr class="separator:ga360c73eb7ffb16088556f9278953b882"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga62fa63d39cf22df348857d5f44ab64d9"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9">__set_BASEPRI_MAX</a> (uint32_t basePri)</td></tr> +<tr class="memdesc:ga62fa63d39cf22df348857d5f44ab64d9"><td class="mdescLeft"> </td><td class="mdescRight">Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga62fa63d39cf22df348857d5f44ab64d9"></a><br/></td></tr> +<tr class="separator:ga62fa63d39cf22df348857d5f44ab64d9"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaa78e4e6bf619a65e9f01b4af13fed3a8"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8">__get_FAULTMASK</a> (void)</td></tr> +<tr class="memdesc:gaa78e4e6bf619a65e9f01b4af13fed3a8"><td class="mdescLeft"> </td><td class="mdescRight">Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gaa78e4e6bf619a65e9f01b4af13fed3a8"></a><br/></td></tr> +<tr class="separator:gaa78e4e6bf619a65e9f01b4af13fed3a8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaa5587cc09031053a40a35c14ec36078a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a">__set_FAULTMASK</a> (uint32_t faultMask)</td></tr> +<tr class="memdesc:gaa5587cc09031053a40a35c14ec36078a"><td class="mdescLeft"> </td><td class="mdescRight">Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gaa5587cc09031053a40a35c14ec36078a"></a><br/></td></tr> +<tr class="separator:gaa5587cc09031053a40a35c14ec36078a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad6d7eca9ddd1d9072dd7b020cfe64905"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905">__get_FPSCR</a> (void)</td></tr> +<tr class="memdesc:gad6d7eca9ddd1d9072dd7b020cfe64905"><td class="mdescLeft"> </td><td class="mdescRight">Read the FPSCR register [only Cortex-M4 and Cortex-M7]. <a href="#gad6d7eca9ddd1d9072dd7b020cfe64905"></a><br/></td></tr> +<tr class="separator:gad6d7eca9ddd1d9072dd7b020cfe64905"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga6f26bd75ca7e3247f27b272acc10536b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga6f26bd75ca7e3247f27b272acc10536b">__set_FPSCR</a> (uint32_t fpscr)</td></tr> +<tr class="memdesc:ga6f26bd75ca7e3247f27b272acc10536b"><td class="mdescLeft"> </td><td class="mdescRight">Set the FPSC register [only for Cortex-M4 and Cortex-M7]. <a href="#ga6f26bd75ca7e3247f27b272acc10536b"></a><br/></td></tr> +<tr class="separator:ga6f26bd75ca7e3247f27b272acc10536b"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga0f98dfbd252b89d12564472dbeba9c27"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">__enable_irq</a> (void)</td></tr> +<tr class="memdesc:ga0f98dfbd252b89d12564472dbeba9c27"><td class="mdescLeft"> </td><td class="mdescRight">Globally enables interrupts and configurable fault handlers. <a href="#ga0f98dfbd252b89d12564472dbeba9c27"></a><br/></td></tr> +<tr class="separator:ga0f98dfbd252b89d12564472dbeba9c27"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaeb8e5f7564a8ea23678fe3c987b04013"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a> (void)</td></tr> +<tr class="memdesc:gaeb8e5f7564a8ea23678fe3c987b04013"><td class="mdescLeft"> </td><td class="mdescRight">Globally disables interrupts and configurable fault handlers. <a href="#gaeb8e5f7564a8ea23678fe3c987b04013"></a><br/></td></tr> +<tr class="separator:gaeb8e5f7564a8ea23678fe3c987b04013"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga6575d37863cec5d334864f93b5b783bf"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga6575d37863cec5d334864f93b5b783bf">__enable_fault_irq</a> (void)</td></tr> +<tr class="memdesc:ga6575d37863cec5d334864f93b5b783bf"><td class="mdescLeft"> </td><td class="mdescRight">Enables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga6575d37863cec5d334864f93b5b783bf"></a><br/></td></tr> +<tr class="separator:ga6575d37863cec5d334864f93b5b783bf"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9d174f979b2f76fdb3228a9b338fd939"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___core___register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939">__disable_fault_irq</a> (void)</td></tr> +<tr class="memdesc:ga9d174f979b2f76fdb3228a9b338fd939"><td class="mdescLeft"> </td><td class="mdescRight">Disables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga9d174f979b2f76fdb3228a9b338fd939"></a><br/></td></tr> +<tr class="separator:ga9d174f979b2f76fdb3228a9b338fd939"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>The following functions provide access to Cortex-M core registers. </p> +<h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="ga9d174f979b2f76fdb3228a9b338fd939"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __disable_fault_irq </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function disables interrupts and all fault handlers by setting FAULTMASK. The function uses the instruction <b>CPSID f</b>.</p> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>Can be executed in privileged mode only.</li> +<li>An interrupt can enter pending state even if it is disabled. Disabling an interrupt only prevents the processor from taking that interrupt.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga6575d37863cec5d334864f93b5b783bf">__enable_fault_irq</a>; <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register.">__set_CONTROL</a>; <a class="el" href="group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_FAULTMASK</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gaeb8e5f7564a8ea23678fe3c987b04013"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __disable_irq </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function disables interrupts and all configurable fault handlers by setting PRIMASK. The function uses the instruction <b>CPSID i</b>.</p> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Can be executed in privileged mode only.</li> +<li>An interrupt can enter pending state even if it is disabled. Disabling an interrupt only prevents the processor from taking that interrupt.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">__enable_irq</a>; <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register.">__set_CONTROL</a>; <a class="el" href="group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit.">__set_PRIMASK</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga6575d37863cec5d334864f93b5b783bf"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __enable_fault_irq </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function enables interrupts and all fault handlers by clearing FAULTMASK. The function uses the instruction <b>CPSIE f</b>.</p> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>Can be executed in privileged mode only.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939">__disable_fault_irq</a>; <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register.">__set_CONTROL</a>; <a class="el" href="group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_FAULTMASK</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga0f98dfbd252b89d12564472dbeba9c27"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __enable_irq </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function enables interrupts and all configurable fault handlers by clearing PRIMASK. The function uses the instruction <b>CPSIE i</b>.</p> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Can be executed in privileged mode only.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a>; <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register.">__set_CONTROL</a>; <a class="el" href="group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit.">__set_PRIMASK</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga811c0012221ee918a75111ca84c4d5e7"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_APSR </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the Application Program Status Register (APSR) using the instruction <b>MRS</b>. <br/> +<br/> + The APSR contains the current state of the condition flags from instructions executed previously. The APSR is essential for controlling conditional branches. The following flags are used:</p> +<ul> +<li><b>N</b> (APSR[31]) (Negative flag)<ul> +<li>=1 The instruction result has a negative value (when interpreted as signed integer).</li> +<li>=0 The instruction result has a positive value or equal zero. <br/> +<br/> +</li> +</ul> +</li> +<li><b>Z</b> (APSR[30]) (Zero flag)<ul> +<li>=1 The instruction result is zero. Or, after a compare instruction, when the two values are the same. <br/> +<br/> +</li> +</ul> +</li> +<li><b>C</b> (APSR[29]) (Carry or borrow flag)<ul> +<li>=1 For unsigned additions, if an unsigned overflow occurred.</li> +<li>=<em>inverse of borrow output status</em> For unsigned subtract operations. <br/> +<br/> +</li> +</ul> +</li> +<li><b>V</b> (APSR[28]) (Overflow flag)<ul> +<li>=1 A signed overflow occurred (for signed additions or subtractions). <br/> +<br/> +</li> +</ul> +</li> +<li><b>Q</b> (APSR[27]) (DSP overflow or saturation flag) [not Cortex-M0]<ul> +<li>This flag is a <em>sticky</em> flag. Saturating and certain mutliplying instructions can set the flag, but cannot clear it.</li> +<li>=1 When saturation or an overflow occurred. <br/> +<br/> +</li> +</ul> +</li> +<li><b>GE</b> (APSR[19:16]) (Greater than or Equal flags) [not Cortex-M0]<ul> +<li>Can be set by the parallel add and subtract instructions.</li> +<li>Are used by the <code>SEL</code> instruction to perform byte-based selection from two registers.</li> +</ul> +</li> +</ul> +<dl class="section return"><dt>Returns</dt><dd>APSR register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Some instructions update all flags; some instructions update a subset of the flags.</li> +<li>If a flag is not updated, the original value is preserved.</li> +<li>Conditional instructions that are not executed have no effect on the flags.</li> +<li>The CMSIS does not provide a function to update this register.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga732e08184154f44a617963cc65ff95bd">__get_xPSR</a>; <a class="el" href="union_a_p_s_r___type.html" title="Union type to access the Application Program Status Register (APSR).">APSR_Type</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga32da759f46e52c95bcfbde5012260667"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_BASEPRI </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function returns the Base Priority Mask register (BASEPRI) using the instruction <b>MRS</b>. <br/> +<br/> + BASEPRI defines the minimum priority for exception processing. When BASEPRI is set to a non-zero value, it prevents the activation of all exceptions with the same or lower priority level as the BASEPRI value.</p> +<dl class="section return"><dt>Returns</dt><dd>BASEPRI register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Not for Cortex-M0, Cortex-M0+, or SC000.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9" title="Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI_MAX</a>; <a class="el" href="group___core___register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8" title="Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].">__get_FAULTMASK</a>; <a class="el" href="group___core___register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02" title="Read the PRIMASK register bit.">__get_PRIMASK</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga963cf236b73219ce78e965deb01b81a7"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_CONTROL </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the CONTROL register value using the instruction <b>MRS</b>. <br/> +<br/> + The CONTROL register controls the stack used and the privilege level for software execution when the processor is in thread mode and, if implemented, indicates whether the FPU state is active. This register uses the following bits: <br/> +</p> +<ul> +<li><b>CONTROL</b>[2] [only Cortex-M4 and Cortex-M7]<ul> +<li>=0 FPU not active</li> +<li>=1 FPU active <br/> +<br/> +</li> +</ul> +</li> +<li><b>CONTROL</b>[1]<ul> +<li>=0 In handler mode - MSP is selected. No alternate stack possible for handler mode.</li> +<li>=0 In thread mode - Default stack pointer MSP is used.</li> +<li>=1 In thread mode - Alternate stack pointer PSP is used. <br/> +<br/> +</li> +</ul> +</li> +<li><b>CONTROL</b>[0] [not Cortex-M0]<ul> +<li>=0 In thread mode and privileged state.</li> +<li>=1 In thread mode and user state.</li> +</ul> +</li> +</ul> +<dl class="section return"><dt>Returns</dt><dd>CONTROL register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The processor can be in user state or privileged state when running in thread mode.</li> +<li>Exception handlers always run in privileged state.</li> +<li>On reset, the processor is in thread mode with privileged access rights.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c">__set_CONTROL</a>; <a class="el" href="union_c_o_n_t_r_o_l___type.html" title="Union type to access the Control Registers (CONTROL).">CONTROL_Type</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gaa78e4e6bf619a65e9f01b4af13fed3a8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_FAULTMASK </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the Fault Mask register (FAULTMASK) value using the instruction <b>MRS</b>. <br/> +<br/> + FAULTMASK prevents activation of all exceptions except for the Non-Maskable Interrupt (NMI).</p> +<dl class="section return"><dt>Returns</dt><dd>FAULTMASK register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>Is cleared automatically upon exiting the exception handler, except when returning from the NMI handler.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a">__set_FAULTMASK</a>; <a class="el" href="group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__get_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02" title="Read the PRIMASK register bit.">__get_PRIMASK</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gad6d7eca9ddd1d9072dd7b020cfe64905"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_FPSCR </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the Floating-Point Status Control Register (FPSCR) value. <br/> +<br/> + FPSCR provides all necessary User level controls of the floating-point system.</p> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>FPSCR register value, when __FPU_PRESENT=1</li> +<li>=0, when __FPU_PRESENT=0</li> +</ul> +</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Only for Cortex-M4 and Cortex-M7.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga6f26bd75ca7e3247f27b272acc10536b">__set_FPSCR</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_IPSR </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the Interrupt Program Status Register (IPSR) using the instruction <b>MRS</b>. <br/> +<br/> + The ISPR contains the exception type number of the current Interrupt Service Routine (ISR). Each exception has an assocciated unique IRQn number. The following bits are used:</p> +<ul> +<li><b>ISR_NUMBER</b> (IPSR[8:0])<ul> +<li>=0 Thread mode</li> +<li>=1 Reserved</li> +<li>=2 NMI</li> +<li>=3 HardFault</li> +<li>=4 MemManage</li> +<li>=5 BusFault</li> +<li>=6 UsageFault</li> +<li>=7-10 Reserved</li> +<li>=11 SVCall</li> +<li>=12 Reserved for Debug</li> +<li>=13 Reserved</li> +<li>=14 PendSV</li> +<li>=15 SysTick</li> +<li>=16 IRQ0</li> +<li>...</li> +<li>=n+15 IRQ(n-1)</li> +</ul> +</li> +</ul> +<dl class="section return"><dt>Returns</dt><dd>ISPR register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>This register is read-only.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga732e08184154f44a617963cc65ff95bd">__get_xPSR</a>; <a class="el" href="union_i_p_s_r___type.html" title="Union type to access the Interrupt Program Status Register (IPSR).">IPSR_Type</a></li> +<li><a class="el" href="group___n_v_i_c__gr.html">Interrupts and Exceptions (NVIC)</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gab898559392ba027814e5bbb5a98b38d2"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_MSP </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the Main Status Pointer (MSP) value using the instruction <b>MRS</b>. <br/> +<br/> + Physically two different stack pointers (SP) exist:</p> +<ul> +<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li> +<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li> +</ul> +<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p> +<ul> +<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li> +<li>=1 PSP is the current stack pointer. The initial value is undefined.</li> +</ul> +<dl class="section return"><dt>Returns</dt><dd>MSP Register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Only one of the two SPs is visible at a time.</li> +<li>For many applications, the system can completely rely on the MSP.</li> +<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4">__set_MSP</a>; <a class="el" href="group___core___register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9" title="Read the PSP register.">__get_PSP</a>; <a class="el" href="group___core___register__gr.html#ga963cf236b73219ce78e965deb01b81a7" title="Read the CONTROL register.">__get_CONTROL</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga799b5d9a2ae75e459264c8512c7c0e02"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_PRIMASK </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the Priority Mask register (PRIMASK) value using the instruction <b>MRS</b>. <br/> +<br/> + PRIMASK is a 1-bit-wide interrupt mask register. When set, it blocks all interrupts apart from the non-maskable interrupt (NMI) and the hard fault exception. The PRIMASK prevents activation of all exceptions with configurable priority.</p> +<dl class="section return"><dt>Returns</dt><dd>PRIMASK register value<ul> +<li>=0 no effect</li> +<li>=1 prevents the activation of all exceptions with configurable priority</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f">__set_PRIMASK</a>; <a class="el" href="group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__get_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8" title="Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].">__get_FAULTMASK</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga914dfa8eff7ca53380dd54cf1d8bebd9"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_PSP </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the Program Status Pointer (PSP) value using the instruction <b>MRS</b>. <br/> +<br/> + Physically two different stack pointers (SP) exist:</p> +<ul> +<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li> +<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li> +</ul> +<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p> +<ul> +<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li> +<li>=1 PSP is the current stack pointer. The initial value is undefined.</li> +</ul> +<dl class="section return"><dt>Returns</dt><dd>PSP register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Only one of the two SPs is visible at a time.</li> +<li>For many applications, the system can completely rely on the MSP.</li> +<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga48e5853f417e17a8a65080f6a605b743">__set_PSP</a>; <a class="el" href="group___core___register__gr.html#gab898559392ba027814e5bbb5a98b38d2" title="Read the MSP register.">__get_MSP</a>; <a class="el" href="group___core___register__gr.html#ga963cf236b73219ce78e965deb01b81a7" title="Read the CONTROL register.">__get_CONTROL</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga732e08184154f44a617963cc65ff95bd"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __get_xPSR </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function reads the combined Program Status Register (xPSR) using the instruction <b>MRS</b>. <br/> +<br/> + xPSR provides information about program execution and the APSR flags. It consists of the following PSRs: </p> +<ul> +<li>Application Program Status Register (APSR) </li> +<li>Interrupt Program Status Register (IPSR) </li> +<li>Execution Program Status Register (EPSR)</li> +</ul> +<p>In addition to the flags described in <a class="el" href="group___core___register__gr.html#ga811c0012221ee918a75111ca84c4d5e7">__get_APSR</a> and <a class="el" href="group___core___register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8">__get_IPSR</a>, the register provides the following flags:</p> +<ul> +<li><b>IT</b> (xPSR[26:25]) (If-Then condition instruction)<ul> +<li>Contains up to four instructions following an IT instruction.</li> +<li>Each instruction in the block is conditional.</li> +<li>The conditions for the instructions are either all the same, or some can be the inverse of others. <br/> +<br/> +</li> +</ul> +</li> +<li><b>T</b> (xPSR[24]) (Thumb bit)<ul> +<li>=1 Indicates that that the processor is in Thumb state.</li> +<li>=0 Attempting to execute instructions when the T bit is 0 results in a fault or lockup.</li> +<li>The conditions for the instructions are either all the same, or some can be the inverse of others.</li> +</ul> +</li> +</ul> +<dl class="section return"><dt>Returns</dt><dd>xPSR register value</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The CMSIS does not provide functions that access EPSR.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga811c0012221ee918a75111ca84c4d5e7">__get_APSR</a>; <a class="el" href="group___core___register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8" title="Read the IPSR register.">__get_IPSR</a>; <a class="el" href="unionx_p_s_r___type.html" title="Union type to access the Special-Purpose Program Status Registers (xPSR).">xPSR_Type</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga360c73eb7ffb16088556f9278953b882"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_BASEPRI </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>basePri</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the Base Priority Mask register (BASEPRI) value using the instruction <b>MSR</b>. <br/> +<br/> + BASEPRI defines the minimum priority for exception processing. When BASEPRI is set to a non-zero value, it prevents the activation of all exceptions with the same or lower priority level as the BASEPRI value.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">basePri</td><td>BASEPRI value to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>Cannot be set in user state.</li> +<li>Useful for changing the masking level or disabling the masking.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667">__get_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9" title="Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI_MAX</a>; <a class="el" href="group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_FAULTMASK</a>; <a class="el" href="group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit.">__set_PRIMASK</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga62fa63d39cf22df348857d5f44ab64d9"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_BASEPRI_MAX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>basePri</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function only increases the Base Priority Mask register (BASEPRI) value using the instruction <b>MSR</b>. The value is set only if BASEPRI masking is disabled, or the new value increases the BASEPRI priority level. <br/> +<br/> + BASEPRI defines the minimum priority for exception processing.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">basePri</td><td>BASEPRI value to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>Cannot be set in user state.</li> +<li>Useful for increasing the masking level.</li> +<li>Has no effect when <em>basePri</em> is lower than the current value of BASEPRI.</li> +<li>Use <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a> to lower the Base Priority Mask register.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__get_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_FAULTMASK</a>; <a class="el" href="group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit.">__set_PRIMASK</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gac64d37e7ff9de06437f9fb94bbab8b6c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_CONTROL </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>control</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the CONTROL register value using the instruction <b>MSR</b>. <br/> +<br/> + The CONTROL register controls the stack used and the privilege level for software execution when the processor is in thread mode and, if implemented, indicates whether the FPU state is active. This register uses the following bits: <br/> +</p> +<ul> +<li><b>CONTROL</b>[2] [only Cortex-M4 and Cortex-M7]<ul> +<li>=0 FPU not active</li> +<li>=1 FPU active <br/> +<br/> +</li> +</ul> +</li> +<li><b>CONTROL</b>[1]<ul> +<li>Writeable only when the processor is in thread mode and privileged state (CONTROL[0]=0).</li> +<li>=0 In handler mode - MSP is selected. No alternate stack pointer possible for handler mode.</li> +<li>=0 In thread mode - Default stack pointer MSP is used.</li> +<li>=1 In thread mode - Alternate stack pointer PSP is used. <br/> +<br/> +</li> +</ul> +</li> +<li><b>CONTROL</b>[0] [not writeable for Cortex-M0]<ul> +<li>Writeable only when the processor is in privileged state.</li> +<li>Can be used to switch the processor to user state (thread mode).</li> +<li>Once in user state, trigger an interrupt and change the state to privileged in the exception handler (the only way).</li> +<li>=0 In thread mode and privileged state.</li> +<li>=1 In thread mode and user state.</li> +</ul> +</li> +</ul> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">control</td><td>CONTROL register value to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The processor can be in user state or privileged state when running in thread mode.</li> +<li>Exception handlers always run in privileged state.</li> +<li>On reset, the processor is in thread mode with privileged access rights.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga963cf236b73219ce78e965deb01b81a7">__get_CONTROL</a>; <a class="el" href="group___core___register__gr.html#ga48e5853f417e17a8a65080f6a605b743" title="Set the PSP register.">__set_PSP</a>; <a class="el" href="group___core___register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4" title="Set the MSP register.">__set_MSP</a>; <a class="el" href="union_c_o_n_t_r_o_l___type.html" title="Union type to access the Control Registers (CONTROL).">CONTROL_Type</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gaa5587cc09031053a40a35c14ec36078a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_FAULTMASK </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>faultMask</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the Fault Mask register (FAULTMASK) value using the instruction <b>MSR</b>. <br/> +<br/> + FAULTMASK prevents activation of all exceptions except for Non-Maskable Interrupt (NMI). FAULTMASK can be used to escalate a configurable fault handler (BusFault, usage fault, or memory management fault) to hard fault level without invoking a hard fault. This allows the fault handler to pretend to be the hard fault handler, whith the ability to:</p> +<ol type="1"> +<li><b>Mask BusFault</b> by setting the BFHFNMIGN in the Configuration Control register. It can be used to test the bus system without causing a lockup.</li> +<li><b>Bypass the MPU</b>, allowing accessing the MPU protected memory location without reprogramming the MPU to just carry out a few transfers for fixing faults.</li> +</ol> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">faultMask</td><td>FAULTMASK register value to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>Is cleared automatically upon exiting the exception handler, except when returning from the NMI handler.</li> +<li>When set, it changes the effective current priority level to -1, so that even the hard fault handler is blocked.</li> +<li>Can be used by fault handlers to change their priority to -1 to have access to some features for hard fault exceptions (see above).</li> +<li>When set, lockups can still be caused by incorrect or undefined instructions, or by using SVC in the wrong priority level.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8">__get_FAULTMASK</a>; <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit.">__set_PRIMASK</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga6f26bd75ca7e3247f27b272acc10536b"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_FPSCR </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>fpscr</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the Floating-Point Status Control Register (FPSCR) value. <br/> +<br/> + FPSCR provides all necessary User level control of the floating-point system. <br/> +</p> +<ul> +<li><b>N</b> (FPSC[31]) (Negative flag)<ul> +<li>=1 The instruction result has a negative value (when interpreted as signed integer).</li> +<li>=0 The instruction result has a positive value or equal zero. <br/> +<br/> +</li> +</ul> +</li> +<li><b>Z</b> (FPSC[30]) (Zero flag)<ul> +<li>=1 The instruction result is zero. Or, after a compare instruction, when the two values are the same. <br/> +<br/> +</li> +</ul> +</li> +<li><b>C</b> (FPSC[29]) (Carry or borrow flag)<ul> +<li>=1 For unsigned additions, if an unsigned overflow occurred.</li> +<li>=<em>inverse of borrow output status</em> For unsigned subtract operations. <br/> +<br/> +</li> +</ul> +</li> +<li><b>V</b> (FPSC[28]) (Overflow flag)<ul> +<li>=1 A signed overflow occurred (for signed additions or subtractions). <br/> +<br/> +</li> +</ul> +</li> +<li><b>AHP</b> (FPSC[26]) (Alternative half-precision flag)<ul> +<li>=1 Alternative half-precision format selected.</li> +<li>=0 IEEE half-precision format selected. <br/> +<br/> +</li> +</ul> +</li> +<li><b>DN</b> (FPSC[25]) (Default NaN mode control flag)<ul> +<li>=1 Any operation involving one or more NaNs returns the Default NaN.</li> +<li>=0 NaN operands propagate through to the output of a floating-point operation. <br/> +<br/> +</li> +</ul> +</li> +<li><b>FZ</b> (FPSC[24]) (Flush-to-zero mode control flag)<ul> +<li>=1 Flush-to-zero mode enabled.</li> +<li>=0 Flush-to-zero mode disabled. Behavior of the floating-point system is fully compliant with the IEEE 754 standard. <br/> +<br/> +</li> +</ul> +</li> +<li><b>RMode</b> (FPSC[23:22]) (Rounding Mode control flags)<ul> +<li>=0b00 Round to Nearest (RN) mode.</li> +<li>=0b01 Round towards Plus Infinity (RP) mode.</li> +<li>=0b10 Round towards Minus Infinity (RM) mode.</li> +<li>=0b11 Round towards Zero (RZ) mode.</li> +<li>The specified rounding mode is used by almost all floating-point instructions. <br/> +<br/> +</li> +</ul> +</li> +<li><b>IDC</b> (FPSC[7]) (Input Denormal cumulative exception flags)<ul> +<li>See Cumulative exception bits (FPSC[4:0]). <br/> +<br/> +</li> +</ul> +</li> +<li><b>IXC</b> (FPSC[4]) (Inexact cumulative exception flag)<ul> +<li>=1 Exception occurred.</li> +<li>=0 Value has to be set explicitly.</li> +<li>Flag is not cleared automatically. <br/> +<br/> +</li> +</ul> +</li> +<li><b>UFC</b> (FPSC[3]) (Underflow cumulative exception flag)<ul> +<li>=1 Exception occurred.</li> +<li>=0 Value has to be set explicitly.</li> +<li>Flag is not cleared automatically. <br/> +<br/> +</li> +</ul> +</li> +<li><b>OFC</b> (FPSC[2]) (Overflow cumulative exception flag)<ul> +<li>=1 Exception occurred.</li> +<li>=0 Value has to be set explicitly.</li> +<li>Flag is not cleared automatically. <br/> +<br/> +</li> +</ul> +</li> +<li><b>DZC</b> (FPSC[1]) (Division by Zero cumulative exception flag)<ul> +<li>=1 Exception occurred.</li> +<li>=0 Value has to be set explicitly.</li> +<li>Flag is not cleared automatically. <br/> +<br/> +</li> +</ul> +</li> +<li><b>IOC</b> (FPSC[0]) (Invalid Operation cumulative exception flag)<ul> +<li>=1 Exception occurred.</li> +<li>=0 Value has to be set explicitly.</li> +<li>Flag is not cleared automatically.</li> +</ul> +</li> +</ul> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">fpscr</td><td>FPSCR value to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Only for Cortex-M4 and Cortex-M7.</li> +<li>The variable <b>__FPU_PRESENT</b> has to be set to 1.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905">__get_FPSCR</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga0bf9564ebc1613a8faba014275dac2a4"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_MSP </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>topOfMainStack</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the Main Status Pointer (MSP) value using the instruction <b>MSR</b>. <br/> +<br/> + Physically two different stack pointers (SP) exist:</p> +<ul> +<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li> +<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li> +</ul> +<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p> +<ul> +<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li> +<li>=1 PSP is the current stack pointer. The initial value is undefined.</li> +</ul> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">topOfMainStack</td><td>MSP value to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Only one of the two SPs is visible at a time.</li> +<li>For many applications, the system can completely rely on the MSP.</li> +<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#gab898559392ba027814e5bbb5a98b38d2">__get_MSP</a>; <a class="el" href="group___core___register__gr.html#ga48e5853f417e17a8a65080f6a605b743" title="Set the PSP register.">__set_PSP</a>; <a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register.">__set_CONTROL</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga70b4e1a6c1c86eb913fb9d6e8400156f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_PRIMASK </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>priMask</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the Priority Mask register (PRIMASK) value using the instruction <b>MSR</b>. <br/> +<br/> + PRIMASK is a 1-bit-wide interrupt mask register. When set, it blocks all interrupts apart from the non-maskable interrupt (NMI) and the hard fault exception. The PRIMASK prevents activation of all exceptions with configurable priority.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">priMask</td><td>Priority Mask<ul> +<li>=0 no effect</li> +<li>=1 prevents the activation of all exceptions with configurable priority</li> +</ul> +</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>When set, PRIMASK effectively changes the current priority level to 0. This is the highest programmable level.</li> +<li>When set and a fault occurs, the hard fault handler will be executed.</li> +<li>Useful for temprorarily disabling all interrupts for timing critical tasks.</li> +<li>Does not have the ability to mask BusFault or bypass MPU.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02">__get_PRIMASK</a>; <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI</a>; <a class="el" href="group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_FAULTMASK</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga48e5853f417e17a8a65080f6a605b743"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __set_PSP </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>topOfProcStack</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the Program Status Pointer (PSP) value using the instruction <b>MSR</b>. <br/> +<br/> + Physically two different stack pointers (SP) exist:</p> +<ul> +<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li> +<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li> +</ul> +<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p> +<ul> +<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li> +<li>=1 PSP is the current stack pointer. The initial value is undefined.</li> +</ul> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">topOfProcStack</td><td>PSP value to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Only one of the two SPs is visible at a time.</li> +<li>For many applications, the system can completely rely on the MSP.</li> +<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___core___register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9">__get_PSP</a>; <a class="el" href="group___core___register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4" title="Set the MSP register.">__set_MSP</a>; <a class="el" href="group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register.">__set_CONTROL</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group___core___register__gr.js b/Documentation/Core/html/group___core___register__gr.js new file mode 100644 index 0000000..9bdcfdb --- /dev/null +++ b/Documentation/Core/html/group___core___register__gr.js @@ -0,0 +1,25 @@ +var group___core___register__gr = +[ + [ "__disable_fault_irq", "group___core___register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939", null ], + [ "__disable_irq", "group___core___register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013", null ], + [ "__enable_fault_irq", "group___core___register__gr.html#ga6575d37863cec5d334864f93b5b783bf", null ], + [ "__enable_irq", "group___core___register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27", null ], + [ "__get_APSR", "group___core___register__gr.html#ga811c0012221ee918a75111ca84c4d5e7", null ], + [ "__get_BASEPRI", "group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667", null ], + [ "__get_CONTROL", "group___core___register__gr.html#ga963cf236b73219ce78e965deb01b81a7", null ], + [ "__get_FAULTMASK", "group___core___register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8", null ], + [ "__get_FPSCR", "group___core___register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905", null ], + [ "__get_IPSR", "group___core___register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8", null ], + [ "__get_MSP", "group___core___register__gr.html#gab898559392ba027814e5bbb5a98b38d2", null ], + [ "__get_PRIMASK", "group___core___register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02", null ], + [ "__get_PSP", "group___core___register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9", null ], + [ "__get_xPSR", "group___core___register__gr.html#ga732e08184154f44a617963cc65ff95bd", null ], + [ "__set_BASEPRI", "group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882", null ], + [ "__set_BASEPRI_MAX", "group___core___register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9", null ], + [ "__set_CONTROL", "group___core___register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c", null ], + [ "__set_FAULTMASK", "group___core___register__gr.html#gaa5587cc09031053a40a35c14ec36078a", null ], + [ "__set_FPSCR", "group___core___register__gr.html#ga6f26bd75ca7e3247f27b272acc10536b", null ], + [ "__set_MSP", "group___core___register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4", null ], + [ "__set_PRIMASK", "group___core___register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f", null ], + [ "__set_PSP", "group___core___register__gr.html#ga48e5853f417e17a8a65080f6a605b743", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/group___dcache__functions__m7.html b/Documentation/Core/html/group___dcache__functions__m7.html new file mode 100644 index 0000000..8d2c5bb --- /dev/null +++ b/Documentation/Core/html/group___dcache__functions__m7.html @@ -0,0 +1,356 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>D-Cache Functions</title> +<title>CMSIS-CORE: D-Cache Functions</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:ga63aa640d9006021a796a5dcf9c7180b6"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#ga63aa640d9006021a796a5dcf9c7180b6">SCB_EnableDCache</a> (void)</td></tr> +<tr class="memdesc:ga63aa640d9006021a796a5dcf9c7180b6"><td class="mdescLeft"> </td><td class="mdescRight">Enable D-Cache. <a href="#ga63aa640d9006021a796a5dcf9c7180b6"></a><br/></td></tr> +<tr class="separator:ga63aa640d9006021a796a5dcf9c7180b6"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga6468170f90d270caab8116e7a4f0b5fe"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#ga6468170f90d270caab8116e7a4f0b5fe">SCB_DisableDCache</a> (void)</td></tr> +<tr class="memdesc:ga6468170f90d270caab8116e7a4f0b5fe"><td class="mdescLeft"> </td><td class="mdescRight">Disable D-Cache. <a href="#ga6468170f90d270caab8116e7a4f0b5fe"></a><br/></td></tr> +<tr class="separator:ga6468170f90d270caab8116e7a4f0b5fe"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gace2d30db08887d0bdb818b8a785a5ce6"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#gace2d30db08887d0bdb818b8a785a5ce6">SCB_InvalidateDCache</a> (void)</td></tr> +<tr class="memdesc:gace2d30db08887d0bdb818b8a785a5ce6"><td class="mdescLeft"> </td><td class="mdescRight">Invalidate D-Cache. <a href="#gace2d30db08887d0bdb818b8a785a5ce6"></a><br/></td></tr> +<tr class="separator:gace2d30db08887d0bdb818b8a785a5ce6"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga55583e3065c6eabca204b8b89b121c4c"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#ga55583e3065c6eabca204b8b89b121c4c">SCB_CleanDCache</a> (void)</td></tr> +<tr class="memdesc:ga55583e3065c6eabca204b8b89b121c4c"><td class="mdescLeft"> </td><td class="mdescRight">Clean D-Cache. <a href="#ga55583e3065c6eabca204b8b89b121c4c"></a><br/></td></tr> +<tr class="separator:ga55583e3065c6eabca204b8b89b121c4c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga1b741def9e3b2ca97dc9ea49b8ce505c"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#ga1b741def9e3b2ca97dc9ea49b8ce505c">SCB_CleanInvalidateDCache</a> (void)</td></tr> +<tr class="memdesc:ga1b741def9e3b2ca97dc9ea49b8ce505c"><td class="mdescLeft"> </td><td class="mdescRight">Clean & Invalidate D-Cache. <a href="#ga1b741def9e3b2ca97dc9ea49b8ce505c"></a><br/></td></tr> +<tr class="separator:ga1b741def9e3b2ca97dc9ea49b8ce505c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga503ef7ef58c0773defd15a82f6336c09"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#ga503ef7ef58c0773defd15a82f6336c09">SCB_InvalidateDCache_by_Addr</a> (uint32_t *addr, int32_t dsize)</td></tr> +<tr class="memdesc:ga503ef7ef58c0773defd15a82f6336c09"><td class="mdescLeft"> </td><td class="mdescRight">D-Cache Invalidate by address. <a href="#ga503ef7ef58c0773defd15a82f6336c09"></a><br/></td></tr> +<tr class="separator:ga503ef7ef58c0773defd15a82f6336c09"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga696fadbf7b9cc71dad42fab61873a40d"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#ga696fadbf7b9cc71dad42fab61873a40d">SCB_CleanDCache_by_Addr</a> (uint32_t *addr, int32_t dsize)</td></tr> +<tr class="memdesc:ga696fadbf7b9cc71dad42fab61873a40d"><td class="mdescLeft"> </td><td class="mdescRight">D-Cache Clean by address. <a href="#ga696fadbf7b9cc71dad42fab61873a40d"></a><br/></td></tr> +<tr class="separator:ga696fadbf7b9cc71dad42fab61873a40d"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga630131b2572eaa16b569ed364dfc895e"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html#ga630131b2572eaa16b569ed364dfc895e">SCB_CleanInvalidateDCache_by_Addr</a> (uint32_t *addr, int32_t dsize)</td></tr> +<tr class="memdesc:ga630131b2572eaa16b569ed364dfc895e"><td class="mdescLeft"> </td><td class="mdescRight">D-Cache Clean and Invalidate by address. <a href="#ga630131b2572eaa16b569ed364dfc895e"></a><br/></td></tr> +<tr class="separator:ga630131b2572eaa16b569ed364dfc895e"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>// close ICache functions </p> +<h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="ga55583e3065c6eabca204b8b89b121c4c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_CleanDCache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function cleans the entire data cache. </p> + +</div> +</div> +<a class="anchor" id="ga696fadbf7b9cc71dad42fab61873a40d"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_CleanDCache_by_Addr </td> + <td>(</td> + <td class="paramtype">uint32_t * </td> + <td class="paramname"><em>addr</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">int32_t </td> + <td class="paramname"><em>dsize</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">addr</td><td>address (aligned to 32-byte boundary) </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">dsize</td><td>size of memory block (in number of bytes)</td></tr> + </table> + </dd> +</dl> +<p>The function cleans a memory block of size <em>dsize</em> [bytes] starting at address <em>address</em>. The address is aligned to 32-byte boundry. </p> + +</div> +</div> +<a class="anchor" id="ga1b741def9e3b2ca97dc9ea49b8ce505c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_CleanInvalidateDCache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function cleans and invalidates the entire data cache. </p> + +</div> +</div> +<a class="anchor" id="ga630131b2572eaa16b569ed364dfc895e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr </td> + <td>(</td> + <td class="paramtype">uint32_t * </td> + <td class="paramname"><em>addr</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">int32_t </td> + <td class="paramname"><em>dsize</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">addr</td><td>address (aligned to 32-byte boundary) </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">dsize</td><td>size of memory block (in number of bytes)</td></tr> + </table> + </dd> +</dl> +<p>The function invalidates and cleans a memory block of size <em>dsize</em> [bytes] starting at address <em>address</em>. The address is aligned to 32-byte boundry. </p> + +</div> +</div> +<a class="anchor" id="ga6468170f90d270caab8116e7a4f0b5fe"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_DisableDCache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function turns off the entire data cache.</p> +<dl class="section note"><dt>Note</dt><dd>When disabling the data cache, you must clean (<a class="el" href="group___dcache__functions__m7.html#ga55583e3065c6eabca204b8b89b121c4c">SCB_CleanDCache</a>) the entire cache to ensure that any dirty data is flushed to external memory. </dd></dl> + +</div> +</div> +<a class="anchor" id="ga63aa640d9006021a796a5dcf9c7180b6"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_EnableDCache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function turns on the entire data cache. </p> +<dl class="section note"><dt>Note</dt><dd>Before enabling the data cache, you must invalidate the entire data cache (<a class="el" href="group___dcache__functions__m7.html#gace2d30db08887d0bdb818b8a785a5ce6">SCB_InvalidateDCache</a>), because external memory might have changed from when the cache was disabled.</dd> +<dd> +After reset, you must invalidate (<a class="el" href="group___dcache__functions__m7.html#gace2d30db08887d0bdb818b8a785a5ce6">SCB_InvalidateDCache</a>) each cache before enabling it. </dd></dl> + +</div> +</div> +<a class="anchor" id="gace2d30db08887d0bdb818b8a785a5ce6"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_InvalidateDCache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function invalidates the entire data cache.</p> +<dl class="section note"><dt>Note</dt><dd>After reset, you must invalidate each cache before enabling (<a class="el" href="group___dcache__functions__m7.html#ga63aa640d9006021a796a5dcf9c7180b6">SCB_EnableDCache</a>) it. </dd></dl> + +</div> +</div> +<a class="anchor" id="ga503ef7ef58c0773defd15a82f6336c09"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_InvalidateDCache_by_Addr </td> + <td>(</td> + <td class="paramtype">uint32_t * </td> + <td class="paramname"><em>addr</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">int32_t </td> + <td class="paramname"><em>dsize</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">addr</td><td>address (aligned to 32-byte boundary) </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">dsize</td><td>size of memory block (in number of bytes)</td></tr> + </table> + </dd> +</dl> +<p>The function invalidates a memory block of size <em>dsize</em> [bytes] starting at address <em>address</em>. The address is aligned to 32-byte boundry. </p> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group___dcache__functions__m7.js b/Documentation/Core/html/group___dcache__functions__m7.js new file mode 100644 index 0000000..c789ca5 --- /dev/null +++ b/Documentation/Core/html/group___dcache__functions__m7.js @@ -0,0 +1,11 @@ +var group___dcache__functions__m7 = +[ + [ "SCB_CleanDCache", "group___dcache__functions__m7.html#ga55583e3065c6eabca204b8b89b121c4c", null ], + [ "SCB_CleanDCache_by_Addr", "group___dcache__functions__m7.html#ga696fadbf7b9cc71dad42fab61873a40d", null ], + [ "SCB_CleanInvalidateDCache", "group___dcache__functions__m7.html#ga1b741def9e3b2ca97dc9ea49b8ce505c", null ], + [ "SCB_CleanInvalidateDCache_by_Addr", "group___dcache__functions__m7.html#ga630131b2572eaa16b569ed364dfc895e", null ], + [ "SCB_DisableDCache", "group___dcache__functions__m7.html#ga6468170f90d270caab8116e7a4f0b5fe", null ], + [ "SCB_EnableDCache", "group___dcache__functions__m7.html#ga63aa640d9006021a796a5dcf9c7180b6", null ], + [ "SCB_InvalidateDCache", "group___dcache__functions__m7.html#gace2d30db08887d0bdb818b8a785a5ce6", null ], + [ "SCB_InvalidateDCache_by_Addr", "group___dcache__functions__m7.html#ga503ef7ef58c0773defd15a82f6336c09", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/group___i_t_m___debug__gr.html b/Documentation/Core/html/group___i_t_m___debug__gr.html new file mode 100644 index 0000000..5c40fd2 --- /dev/null +++ b/Documentation/Core/html/group___i_t_m___debug__gr.html @@ -0,0 +1,280 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Debug Access</title> +<title>CMSIS-CORE: Debug Access</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); 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+</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('group___i_t_m___debug__gr.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#func-members">Functions</a> | +<a href="#var-members">Variables</a> </div> + <div class="headertitle"> +<div class="title">Debug Access</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Debug Access to the Instrumented Trace Macrocell (ITM) +<a href="#details">More...</a></p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:gaaa7c716331f74d644bf6bf25cd3392d1"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___i_t_m___debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a> (uint32_t ch)</td></tr> +<tr class="memdesc:gaaa7c716331f74d644bf6bf25cd3392d1"><td class="mdescLeft"> </td><td class="mdescRight">Transmits a character via channel 0. <a href="#gaaa7c716331f74d644bf6bf25cd3392d1"></a><br/></td></tr> +<tr class="separator:gaaa7c716331f74d644bf6bf25cd3392d1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga37b8f41cae703b5ff6947e271065558c"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___i_t_m___debug__gr.html#ga37b8f41cae703b5ff6947e271065558c">ITM_ReceiveChar</a> (void)</td></tr> +<tr class="memdesc:ga37b8f41cae703b5ff6947e271065558c"><td class="mdescLeft"> </td><td class="mdescRight">ITM Receive Character. <a href="#ga37b8f41cae703b5ff6947e271065558c"></a><br/></td></tr> +<tr class="separator:ga37b8f41cae703b5ff6947e271065558c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga7f9bbabd9756d1a7eafb2d9bf27e0535"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___i_t_m___debug__gr.html#ga7f9bbabd9756d1a7eafb2d9bf27e0535">ITM_CheckChar</a> (void)</td></tr> +<tr class="memdesc:ga7f9bbabd9756d1a7eafb2d9bf27e0535"><td class="mdescLeft"> </td><td class="mdescRight">ITM Check Character. <a href="#ga7f9bbabd9756d1a7eafb2d9bf27e0535"></a><br/></td></tr> +<tr class="separator:ga7f9bbabd9756d1a7eafb2d9bf27e0535"><td class="memSeparator" colspan="2"> </td></tr> +</table><table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a> +Variables</h2></td></tr> +<tr class="memitem:ga12e68e55a7badc271b948d6c7230b2a8"><td class="memItemLeft" align="right" valign="top">volatile int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a></td></tr> +<tr class="memdesc:ga12e68e55a7badc271b948d6c7230b2a8"><td class="mdescLeft"> </td><td class="mdescRight">external variable to receive characters <a href="#ga12e68e55a7badc271b948d6c7230b2a8"></a><br/></td></tr> +<tr class="separator:ga12e68e55a7badc271b948d6c7230b2a8"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>CMSIS provides additional debug functions to enlarge the Debug Access. Data can be transmitted via a certain global buffer variable towards the target system.</p> +<p>The Cortex-M3 / Cortex-M4 / Cortex-M7 incorporates the <b>Instrumented Trace Macrocell (ITM)</b> that provides together with the <b>Serial Viewer Output (SVO)</b> trace capabilities for the microcontroller system. The ITM has 32 communication channels; two ITM communication channels are used by CMSIS to output the following information:</p> +<ul> +<li><b>ITM Channel 0</b>: implements the <a class="el" href="group___i_t_m___debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a> function which can be used for printf-style output via the debug interface.</li> +</ul> +<ul> +<li><b>ITM Channel 31</b>: is reserved for the RTOS kernel and can be used for kernel awareness debugging.</li> +</ul> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>ITM channels have 4 groups with 8 channels each, whereby each group can be configured for access rights in the Unprivileged level.</li> +<li>The ITM channel 0 can be enabled for the user task.</li> +<li>ITM channel 31 can be accessed only in Privileged mode from the RTOS kernel itself. The ITM channel 31 has been selected for the RTOS kernel because some kernels may use the Privileged level for program execution.</li> +</ul> +</dd></dl> +<hr/> + <h1><a class="anchor" id="ITM_debug_uv"></a> +ITM Debugger Support</h1> +<p>A debugger may support a <b>Debug (printf) Viewer</b> window to display data.</p> +<p><b>Direction: Microcontroller –> Debugger:</b></p> +<ul> +<li>Characters received via ITM communication channel 0 are written in a printf-style to the <b>Debug (printf) Viewer</b> window.</li> +</ul> +<p><b>Direction: Debugger –> Microcontroller:</b></p> +<ul> +<li>Check if <a class="el" href="group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a> variable is available (only performed once).</li> +<li>Read the character from the <b>Debug (printf) Viewer</b> window.</li> +<li>If <a class="el" href="group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a> is empty, write character to <a class="el" href="group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a>.</li> +</ul> +<dl class="section note"><dt>Note</dt><dd>The current solution does not use a buffer mechanism for transmitting the characters.</dd></dl> +<hr/> + <h1><a class="anchor" id="itm_debug_ex"></a> +Example:</h1> +<p>Example for the usage of the ITM Channel 31 for RTOS Kernels:</p> +<div class="fragment"><div class="line"><span class="comment">// check if debugger connected and ITM channel enabled for tracing</span></div> +<div class="line"><span class="keywordflow">if</span> ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&</div> +<div class="line"> (ITM->TCR & ITM_TCR_ITMENA) &&</div> +<div class="line"> (ITM->TER & (1UL >> 31))) {</div> +<div class="line"> </div> +<div class="line"> <span class="comment">// transmit trace data</span></div> +<div class="line"> <span class="keywordflow">while</span> (ITM->PORT31_U32 == 0);</div> +<div class="line"> ITM->PORT[31].u8 = task_id; <span class="comment">// id of next task</span></div> +<div class="line"> <span class="keywordflow">while</span> (ITM->PORT[31].u32 == 0);</div> +<div class="line"> ITM->PORT[31].u32 = task_status; <span class="comment">// status information</span></div> +<div class="line">}</div> +</div><!-- fragment --> <h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="ga7f9bbabd9756d1a7eafb2d9bf27e0535"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">int32_t ITM_CheckChar </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function reads the external variable <a class="el" href="group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a> and checks whether a character is available or not.</p> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>=0 - No character available</li> +<li>=1 - Character available </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga37b8f41cae703b5ff6947e271065558c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">int32_t ITM_ReceiveChar </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function inputs a character via the external variable <a class="el" href="group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a>. It returns when no debugger is connected that has booked the output. It is blocking when a debugger is connected, but the previously sent character has not been transmitted.</p> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>Received character</li> +<li>=1 - No character received </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gaaa7c716331f74d644bf6bf25cd3392d1"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t ITM_SendChar </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>ch</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function transmits a character via the ITM channel 0. It returns when no debugger is connected that has booked the output. It is blocking when a debugger is connected, but the previously sent character has not been transmitted.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">ch</td><td>Character to transmit</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Character to transmit </dd></dl> + +</div> +</div> +<h2 class="groupheader">Variable Documentation</h2> +<a class="anchor" id="ga12e68e55a7badc271b948d6c7230b2a8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">volatile int32_t ITM_RxBuffer</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group___i_t_m___debug__gr.js b/Documentation/Core/html/group___i_t_m___debug__gr.js new file mode 100644 index 0000000..eb22977 --- /dev/null +++ b/Documentation/Core/html/group___i_t_m___debug__gr.js @@ -0,0 +1,7 @@ +var group___i_t_m___debug__gr = +[ + [ "ITM_CheckChar", "group___i_t_m___debug__gr.html#ga7f9bbabd9756d1a7eafb2d9bf27e0535", null ], + [ "ITM_ReceiveChar", "group___i_t_m___debug__gr.html#ga37b8f41cae703b5ff6947e271065558c", null ], + [ "ITM_SendChar", "group___i_t_m___debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1", null ], + [ "ITM_RxBuffer", "group___i_t_m___debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/group___icache__functions__m7.html b/Documentation/Core/html/group___icache__functions__m7.html new file mode 100644 index 0000000..1a1377c --- /dev/null +++ b/Documentation/Core/html/group___icache__functions__m7.html @@ -0,0 +1,203 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>I-Cache Functions</title> +<title>CMSIS-CORE: I-Cache Functions</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + 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onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a 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name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:gaf9e7c6c8e16ada1f95e5bf5a03505b68"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___icache__functions__m7.html#gaf9e7c6c8e16ada1f95e5bf5a03505b68">SCB_EnableICache</a> (void)</td></tr> +<tr class="memdesc:gaf9e7c6c8e16ada1f95e5bf5a03505b68"><td class="mdescLeft"> </td><td class="mdescRight">Enable I-Cache. <a href="#gaf9e7c6c8e16ada1f95e5bf5a03505b68"></a><br/></td></tr> +<tr class="separator:gaf9e7c6c8e16ada1f95e5bf5a03505b68"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaba757390852f95b3ac2d8638c717d8d8"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___icache__functions__m7.html#gaba757390852f95b3ac2d8638c717d8d8">SCB_DisableICache</a> (void)</td></tr> +<tr class="memdesc:gaba757390852f95b3ac2d8638c717d8d8"><td class="mdescLeft"> </td><td class="mdescRight">Disable I-Cache. <a href="#gaba757390852f95b3ac2d8638c717d8d8"></a><br/></td></tr> +<tr class="separator:gaba757390852f95b3ac2d8638c717d8d8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga50d373a785edd782c5de5a3b55e30ff3"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___icache__functions__m7.html#ga50d373a785edd782c5de5a3b55e30ff3">SCB_InvalidateICache</a> (void)</td></tr> +<tr class="memdesc:ga50d373a785edd782c5de5a3b55e30ff3"><td class="mdescLeft"> </td><td class="mdescRight">Invalidate I-Cache. <a href="#ga50d373a785edd782c5de5a3b55e30ff3"></a><br/></td></tr> +<tr class="separator:ga50d373a785edd782c5de5a3b55e30ff3"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="gaba757390852f95b3ac2d8638c717d8d8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_DisableICache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function turns off the instruction cache. </p> + +</div> +</div> +<a class="anchor" id="gaf9e7c6c8e16ada1f95e5bf5a03505b68"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_EnableICache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function turns on the instruction cache. </p> +<dl class="section note"><dt>Note</dt><dd>Before enabling the instruction cache, you must invalidate (<a class="el" href="group___icache__functions__m7.html#ga50d373a785edd782c5de5a3b55e30ff3">SCB_InvalidateICache</a>) the entire instruction cache if external memory might have changed since the cache was disabled. </dd> +<dd> +After reset, you must invalidate (<a class="el" href="group___icache__functions__m7.html#ga50d373a785edd782c5de5a3b55e30ff3">SCB_InvalidateICache</a>) each cache before enabling it. </dd></dl> + +</div> +</div> +<a class="anchor" id="ga50d373a785edd782c5de5a3b55e30ff3"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE void SCB_InvalidateICache </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function invalidates the instruction cache. The instruction cache is never dirty so cache RAM errors are always recoverable by invalidating the cache and retrying the instruction. </p> +<dl class="section note"><dt>Note</dt><dd>After reset, you must invalidate each cache before enabling (<a class="el" href="group___icache__functions__m7.html#gaf9e7c6c8e16ada1f95e5bf5a03505b68">SCB_EnableICache</a>) it. </dd></dl> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group___icache__functions__m7.js b/Documentation/Core/html/group___icache__functions__m7.js new file mode 100644 index 0000000..e9c58ef --- /dev/null +++ b/Documentation/Core/html/group___icache__functions__m7.js @@ -0,0 +1,6 @@ +var group___icache__functions__m7 = +[ + [ "SCB_DisableICache", "group___icache__functions__m7.html#gaba757390852f95b3ac2d8638c717d8d8", null ], + [ "SCB_EnableICache", "group___icache__functions__m7.html#gaf9e7c6c8e16ada1f95e5bf5a03505b68", null ], + [ "SCB_InvalidateICache", "group___icache__functions__m7.html#ga50d373a785edd782c5de5a3b55e30ff3", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/group___n_v_i_c__gr.html b/Documentation/Core/html/group___n_v_i_c__gr.html new file mode 100644 index 0000000..2a8031c --- /dev/null +++ b/Documentation/Core/html/group___n_v_i_c__gr.html @@ -0,0 +1,1061 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Interrupts and Exceptions (NVIC)</title> +<title>CMSIS-CORE: Interrupts and Exceptions (NVIC)</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + 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onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a 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class="groupheader"><a name="enum-members"></a> +Enumerations</h2></td></tr> +<tr class="memitem:ga7e1129cd8a196f4284d41db3e82ad5c8"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> { <br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30">NonMaskableInt_IRQn</a> = -14, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85">HardFault_IRQn</a> = -13, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa">MemoryManagement_IRQn</a> = -12, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af">BusFault_IRQn</a> = -11, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf">UsageFault_IRQn</a> = -10, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237">SVCall_IRQn</a> = -5, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c">DebugMonitor_IRQn</a> = -4, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2">PendSV_IRQn</a> = -2, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a> = -1, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2">WWDG_STM_IRQn</a> = 0, +<br/> +  <a class="el" href="group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86">PVD_STM_IRQn</a> = 1 +<br/> + }</td></tr> +<tr class="memdesc:ga7e1129cd8a196f4284d41db3e82ad5c8"><td class="mdescLeft"> </td><td class="mdescRight">Definition of IRQn numbers. <a href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">More...</a><br/></td></tr> +<tr class="separator:ga7e1129cd8a196f4284d41db3e82ad5c8"><td class="memSeparator" colspan="2"> </td></tr> +</table><table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:gad78f447e891789b4d8f2e5b21eeda354"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354">NVIC_SetPriorityGrouping</a> (uint32_t PriorityGroup)</td></tr> +<tr class="memdesc:gad78f447e891789b4d8f2e5b21eeda354"><td class="mdescLeft"> </td><td class="mdescRight">Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gad78f447e891789b4d8f2e5b21eeda354"></a><br/></td></tr> +<tr class="separator:gad78f447e891789b4d8f2e5b21eeda354"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaa81b19849367d3cdb95ac108c500fa78"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78">NVIC_GetPriorityGrouping</a> (void)</td></tr> +<tr class="memdesc:gaa81b19849367d3cdb95ac108c500fa78"><td class="mdescLeft"> </td><td class="mdescRight">Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gaa81b19849367d3cdb95ac108c500fa78"></a><br/></td></tr> +<tr class="separator:gaa81b19849367d3cdb95ac108c500fa78"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga530ad9fda2ed1c8b70e439ecfe80591f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr> +<tr class="memdesc:ga530ad9fda2ed1c8b70e439ecfe80591f"><td class="mdescLeft"> </td><td class="mdescRight">Enable an external interrupt. <a href="#ga530ad9fda2ed1c8b70e439ecfe80591f"></a><br/></td></tr> +<tr class="separator:ga530ad9fda2ed1c8b70e439ecfe80591f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga736ba13a76eb37ef6e2c253be8b0331c"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c">NVIC_DisableIRQ</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr> +<tr class="memdesc:ga736ba13a76eb37ef6e2c253be8b0331c"><td class="mdescLeft"> </td><td class="mdescRight">Disable an external interrupt. <a href="#ga736ba13a76eb37ef6e2c253be8b0331c"></a><br/></td></tr> +<tr class="separator:ga736ba13a76eb37ef6e2c253be8b0331c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga95a8329a680b051ecf3ee8f516acc662"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga95a8329a680b051ecf3ee8f516acc662">NVIC_GetPendingIRQ</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr> +<tr class="memdesc:ga95a8329a680b051ecf3ee8f516acc662"><td class="mdescLeft"> </td><td class="mdescRight">Get the pending interrupt. <a href="#ga95a8329a680b051ecf3ee8f516acc662"></a><br/></td></tr> +<tr class="separator:ga95a8329a680b051ecf3ee8f516acc662"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga3b885147ef9965ecede49614de8df9d2"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga3b885147ef9965ecede49614de8df9d2">NVIC_SetPendingIRQ</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr> +<tr class="memdesc:ga3b885147ef9965ecede49614de8df9d2"><td class="mdescLeft"> </td><td class="mdescRight">Set an interrupt to pending. <a href="#ga3b885147ef9965ecede49614de8df9d2"></a><br/></td></tr> +<tr class="separator:ga3b885147ef9965ecede49614de8df9d2"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga382ad6bedd6eecfdabd1b94dd128a01a"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a">NVIC_ClearPendingIRQ</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr> +<tr class="memdesc:ga382ad6bedd6eecfdabd1b94dd128a01a"><td class="mdescLeft"> </td><td class="mdescRight">Clear an interrupt from pending. <a href="#ga382ad6bedd6eecfdabd1b94dd128a01a"></a><br/></td></tr> +<tr class="separator:ga382ad6bedd6eecfdabd1b94dd128a01a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gadf4252e600661fd762cfc0d1a9f5b892"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#gadf4252e600661fd762cfc0d1a9f5b892">NVIC_GetActive</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr> +<tr class="memdesc:gadf4252e600661fd762cfc0d1a9f5b892"><td class="mdescLeft"> </td><td class="mdescRight">Get the interrupt active status [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gadf4252e600661fd762cfc0d1a9f5b892"></a><br/></td></tr> +<tr class="separator:gadf4252e600661fd762cfc0d1a9f5b892"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga5bb7f43ad92937c039dee3d36c3c2798"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798">NVIC_SetPriority</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t priority)</td></tr> +<tr class="memdesc:ga5bb7f43ad92937c039dee3d36c3c2798"><td class="mdescLeft"> </td><td class="mdescRight">Set the priority for an interrupt. <a href="#ga5bb7f43ad92937c039dee3d36c3c2798"></a><br/></td></tr> +<tr class="separator:ga5bb7f43ad92937c039dee3d36c3c2798"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gab18fb9f6c5f4c70fdd73047f0f7c8395"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a> (<a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr> +<tr class="memdesc:gab18fb9f6c5f4c70fdd73047f0f7c8395"><td class="mdescLeft"> </td><td class="mdescRight">Get the priority of an interrupt. <a href="#gab18fb9f6c5f4c70fdd73047f0f7c8395"></a><br/></td></tr> +<tr class="separator:gab18fb9f6c5f4c70fdd73047f0f7c8395"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga0688c59605b119c53c71b2505ab23eb5"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga0688c59605b119c53c71b2505ab23eb5">NVIC_EncodePriority</a> (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</td></tr> +<tr class="memdesc:ga0688c59605b119c53c71b2505ab23eb5"><td class="mdescLeft"> </td><td class="mdescRight">Encodes Priority [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga0688c59605b119c53c71b2505ab23eb5"></a><br/></td></tr> +<tr class="separator:ga0688c59605b119c53c71b2505ab23eb5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad3cbca1be7a4726afa9448a9acd89377"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#gad3cbca1be7a4726afa9448a9acd89377">NVIC_DecodePriority</a> (uint32_t Priority, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)</td></tr> +<tr class="memdesc:gad3cbca1be7a4726afa9448a9acd89377"><td class="mdescLeft"> </td><td class="mdescRight">Decode the interrupt priority [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gad3cbca1be7a4726afa9448a9acd89377"></a><br/></td></tr> +<tr class="separator:gad3cbca1be7a4726afa9448a9acd89377"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga1b47d17e90b6a03e7bd1ec6a0d549b46"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group___n_v_i_c__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46">NVIC_SystemReset</a> (void)</td></tr> +<tr class="memdesc:ga1b47d17e90b6a03e7bd1ec6a0d549b46"><td class="mdescLeft"> </td><td class="mdescRight">Reset the system. <a href="#ga1b47d17e90b6a03e7bd1ec6a0d549b46"></a><br/></td></tr> +<tr class="separator:ga1b47d17e90b6a03e7bd1ec6a0d549b46"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>ARM provides a template file <b>startup_<em>device</em></b> for each supported compiler. The file must be adapted by the silicon vendor to include interrupt vectors for all device-specific interrupt handlers. Each interrupt handler is defined as a <b><em>weak</em></b> function to an dummy handler. These interrupt handlers can be used directly in application software without being adapted by the programmer.</p> +<p>The table below describes the core exception names and their availability in various Cortex-M cores.</p> +<table class="cmtable" summary="Core Exception Name"> +<tr> +<th>Core Exception Name </th><th>IRQn Value </th><th>M0 </th><th>M0+ </th><th>M3 </th><th>M4 </th><th>M7 </th><th>SC000 </th><th>SC300 </th><th>Description </th></tr> +<tr> +<td><b>NonMaskableInt_IRQn</b> </td><td>-14 </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>Non Maskable Interrupt </td></tr> +<tr> +<td><b>HardFault_IRQn</b> </td><td>-13 </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>Hard Fault Interrupt </td></tr> +<tr> +<td><b>MemoryManagement_IRQn</b> </td><td>-12 </td><td>  </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>Memory Management Interrupt </td></tr> +<tr> +<td><b>BusFault_IRQn</b> </td><td>-11 </td><td>  </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>Bus Fault Interrupt </td></tr> +<tr> +<td><b>UsageFault_IRQn</b> </td><td>-10 </td><td>  </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>Usage Fault Interrupt </td></tr> +<tr> +<td><b>SVCall_IRQn</b> </td><td>-5 </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>SV Call Interrupt </td></tr> +<tr> +<td><b>DebugMonitor_IRQn</b> </td><td>-4 </td><td>  </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>  </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>Debug Monitor Interrupt </td></tr> +<tr> +<td><b>PendSV_IRQn</b> </td><td>-2 </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>Pend SV Interrupt </td></tr> +<tr> +<td><b>SysTick_IRQn</b> </td><td>-1 </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td><div class="image"> +<img src="check.png" alt="available"/> +</div> + </td><td>System Tick Interrupt </td></tr> +</table> +<h1><a class="anchor" id="cmsis_vectortable_M0_sec"></a> +For Cortex-M0, Cortex-M0+, or SC000</h1> +<p>The following exception names are fixed and define the start of the vector table for Cortex-M0, Cortex-M0+, or SC000:</p> +<div class="fragment"><div class="line">__Vectors DCD __initial_sp ; Top of Stack</div> +<div class="line"> DCD Reset_Handler ; Reset Handler</div> +<div class="line"> DCD NMI_Handler ; NMI Handler</div> +<div class="line"> DCD HardFault_Handler ; Hard Fault Handler</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD SVC_Handler ; SVCall Handler</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD PendSV_Handler ; PendSV Handler</div> +<div class="line"> DCD SysTick_Handler ; SysTick Handler</div> +</div><!-- fragment --><h1><a class="anchor" id="cmsis_vectortable_M3_sec"></a> +For Cortex-M3</h1> +<p>The following exception names are fixed and define the start of the vector table for a Cortex-M3:</p> +<div class="fragment"><div class="line">__Vectors DCD __initial_sp ; Top of Stack</div> +<div class="line"> DCD Reset_Handler ; Reset Handler</div> +<div class="line"> DCD NMI_Handler ; NMI Handler</div> +<div class="line"> DCD HardFault_Handler ; Hard Fault Handler</div> +<div class="line"> DCD MemManage_Handler ; MPU Fault Handler</div> +<div class="line"> DCD BusFault_Handler ; Bus Fault Handler</div> +<div class="line"> DCD UsageFault_Handler ; Usage Fault Handler</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD SVC_Handler ; SVCall Handler</div> +<div class="line"> DCD DebugMon_Handler ; Debug Monitor Handler</div> +<div class="line"> DCD 0 ; Reserved</div> +<div class="line"> DCD PendSV_Handler ; PendSV Handler</div> +<div class="line"> DCD SysTick_Handler ; SysTick Handler</div> +</div><!-- fragment --><h1><a class="anchor" id="cmsis_vectortable_ex_sec"></a> +Example</h1> +<p>The following is an examples for device-specific interrupts:</p> +<div class="fragment"><div class="line">; External Interrupts</div> +<div class="line"> DCD WWDG_IRQHandler ; Window Watchdog</div> +<div class="line"> DCD PVD_IRQHandler ; PVD through EXTI Line detect</div> +<div class="line"> DCD TAMPER_IRQHandler ; Tamper</div> +</div><!-- fragment --><p>Device-specific interrupts must have a dummy function that can be overwritten in user code. Below is an example for this dummy function.</p> +<div class="fragment"><div class="line">Default_Handler PROC</div> +<div class="line"> EXPORT WWDG_IRQHandler [WEAK]</div> +<div class="line"> EXPORT PVD_IRQHandler [WEAK]</div> +<div class="line"> EXPORT TAMPER_IRQHandler [WEAK]</div> +<div class="line"> :</div> +<div class="line"> :</div> +<div class="line"> WWDG_IRQHandler</div> +<div class="line"> PVD_IRQHandler</div> +<div class="line"> TAMPER_IRQHandler</div> +<div class="line"> :</div> +<div class="line"> :</div> +<div class="line"> B .</div> +<div class="line"> ENDP</div> +</div><!-- fragment --><p>The user application may simply define an interrupt handler function by using the handler name as shown below.</p> +<div class="fragment"><div class="line"><span class="keywordtype">void</span> WWDG_IRQHandler(<span class="keywordtype">void</span>)</div> +<div class="line">{</div> +<div class="line"> ...</div> +<div class="line">}</div> +</div><!-- fragment --><h1><a class="anchor" id="cmsis_vectortable_code_ex1_sec"></a> +Code Example 1</h1> +<p>The code below shows the usage of the CMSIS NVIC functions <a class="el" href="group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354" title="Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_SetPriorityGrouping()</a>, <a class="el" href="group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78" title="Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_GetPriorityGrouping()</a>, <a class="el" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798" title="Set the priority for an interrupt.">NVIC_SetPriority()</a>, <a class="el" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395" title="Get the priority of an interrupt.">NVIC_GetPriority()</a>, <a class="el" href="group___n_v_i_c__gr.html#ga0688c59605b119c53c71b2505ab23eb5" title="Encodes Priority [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_EncodePriority()</a>, and <a class="el" href="group___n_v_i_c__gr.html#gad3cbca1be7a4726afa9448a9acd89377" title="Decode the interrupt priority [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_DecodePriority()</a> with an LPC1700.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#include "LPC17xx.h"</span></div> +<div class="line"></div> +<div class="line">uint32_t priorityGroup; <span class="comment">/* Variables to store priority group and priority */</span></div> +<div class="line">uint32_t priority;</div> +<div class="line">uint32_t preemptPriority;</div> +<div class="line">uint32_t subPriority;</div> +<div class="line"></div> +<div class="line"></div> +<div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div> +<div class="line"></div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354" title="Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_SetPriorityGrouping</a>(5); <span class="comment">/* Set priority group to 5:</span></div> +<div class="line"><span class="comment"> Bit[7..6] preempt priority Bits, </span></div> +<div class="line"><span class="comment"> Bit[5..3] subpriority Bits </span></div> +<div class="line"><span class="comment"> (valid for five priority bits) */</span></div> +<div class="line"> </div> +<div class="line"> priorityGroup = <a class="code" href="group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78" title="Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_GetPriorityGrouping</a>(); <span class="comment">/* Get used priority grouping */</span></div> +<div class="line"></div> +<div class="line"> priority = <a class="code" href="group___n_v_i_c__gr.html#ga0688c59605b119c53c71b2505ab23eb5" title="Encodes Priority [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_EncodePriority</a>(priorityGroup, 1, 6); <span class="comment">/* Encode priority with 6 for subpriority and 1 for preempt priority</span></div> +<div class="line"><span class="comment"> Note: priority depends on the used priority grouping */</span></div> +<div class="line"> </div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798" title="Set the priority for an interrupt.">NVIC_SetPriority</a>(UART0_IRQn, priority); <span class="comment">/* Set new priority */</span></div> +<div class="line"></div> +<div class="line"> priority = <a class="code" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395" title="Get the priority of an interrupt.">NVIC_GetPriority</a>(UART0_IRQn); <span class="comment">/* Retrieve priority again */</span> </div> +<div class="line"></div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#gad3cbca1be7a4726afa9448a9acd89377" title="Decode the interrupt priority [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_DecodePriority</a>(priority, priorityGroup, &preemptPriority, &subPriority);</div> +<div class="line"></div> +<div class="line"> <span class="keywordflow">while</span>(1);</div> +<div class="line">}</div> +</div><!-- fragment --><h1><a class="anchor" id="cmsis_vectortable_code_ex2_sec"></a> +Code Example 2</h1> +<p>The code below shows the usage of the CMSIS NVIC functions <a class="el" href="group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f" title="Enable an external interrupt.">NVIC_EnableIRQ()</a>, <a class="el" href="group___n_v_i_c__gr.html#gadf4252e600661fd762cfc0d1a9f5b892" title="Get the interrupt active status [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_GetActive()</a> with an LPC1700.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#include "LPC17xx.h"</span></div> +<div class="line"></div> +<div class="line">uint32_t active; <span class="comment">/* Variable to store interrupt active state */</span></div> +<div class="line"></div> +<div class="line"></div> +<div class="line"><span class="keywordtype">void</span> TIMER0_IRQHandler(<span class="keywordtype">void</span>) { <span class="comment">/* Timer 0 interrupt handler */</span></div> +<div class="line"></div> +<div class="line"> <span class="keywordflow">if</span> (LPC_TIM0->IR & (1 << 0)) { <span class="comment">/* Check if interrupt for match channel 0 occured */</span> </div> +<div class="line"> LPC_TIM0->IR |= (1 << 0); <span class="comment">/* Acknowledge interrupt for match channel 0 occured */</span></div> +<div class="line"> }</div> +<div class="line"> active = <a class="code" href="group___n_v_i_c__gr.html#gadf4252e600661fd762cfc0d1a9f5b892" title="Get the interrupt active status [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_GetActive</a>(TIMER0_IRQn); <span class="comment">/* Get interrupt active state of timer 0 */</span></div> +<div class="line">}</div> +<div class="line"></div> +<div class="line"></div> +<div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div> +<div class="line"> <span class="comment">/* Set match channel register MR0 to 1 millisecond */</span></div> +<div class="line"> LPC_TIM0->MR0 = (((<a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6" title="Variable to hold the system core clock value.">SystemCoreClock</a> / 1000) / 4) - 1); <span class="comment">/* 1 ms? */</span></div> +<div class="line"> </div> +<div class="line"> LPC_TIM0->MCR = (3 << 0); <span class="comment">/* Enable interrupt and reset for match channel MR0 */</span></div> +<div class="line"></div> +<div class="line"> <a class="code" href="group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f" title="Enable an external interrupt.">NVIC_EnableIRQ</a>(TIMER0_IRQn); <span class="comment">/* Enable NVIC interrupt for timer 0 */</span></div> +<div class="line"> </div> +<div class="line"> LPC_TIM0->TCR = (1 << 0); <span class="comment">/* Enable timer 0 */</span></div> +<div class="line"></div> +<div class="line"> <span class="keywordflow">while</span>(1);</div> +<div class="line">}</div> +</div><!-- fragment --> <h2 class="groupheader">Enumeration Type Documentation</h2> +<a class="anchor" id="ga7e1129cd8a196f4284d41db3e82ad5c8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">enum <a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The core exception enumeration names for IRQn values are defined in the file <b>device.h</b>. </p> +<pre class="fragment">Negative IRQn values represent processor core exceptions (internal interrupts). +Positive IRQn values represent device-specific exceptions (external interrupts). +The first device-specific interrupt has the IRQn value 0. +</pre><p>The table below describes the core exception names and their availability in various Cortex-M cores. </p> +<dl><dt><b>Enumerator: </b></dt><dd><table border="0" cellspacing="2" cellpadding="0"> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30"></a>NonMaskableInt_IRQn</em> </td><td> +<p>Exception 2: Non Maskable Interrupt. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85"></a>HardFault_IRQn</em> </td><td> +<p>Exception 3: Hard Fault Interrupt. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa"></a>MemoryManagement_IRQn</em> </td><td> +<p>Exception 4: Memory Management Interrupt [not on Cortex-M0 variants]. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af"></a>BusFault_IRQn</em> </td><td> +<p>Exception 5: Bus Fault Interrupt [not on Cortex-M0 variants]. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf"></a>UsageFault_IRQn</em> </td><td> +<p>Exception 6: Usage Fault Interrupt [not on Cortex-M0 variants]. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237"></a>SVCall_IRQn</em> </td><td> +<p>Exception 11: SV Call Interrupt. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c"></a>DebugMonitor_IRQn</em> </td><td> +<p>Exception 12: Debug Monitor Interrupt [not on Cortex-M0 variants]. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2"></a>PendSV_IRQn</em> </td><td> +<p>Exception 14: Pend SV Interrupt [not on Cortex-M0 variants]. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7"></a>SysTick_IRQn</em> </td><td> +<p>Exception 15: System Tick Interrupt. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2"></a>WWDG_STM_IRQn</em> </td><td> +<p>Device Interrupt 0: Window WatchDog Interrupt. </p> +</td></tr> +<tr><td valign="top"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86"></a>PVD_STM_IRQn</em> </td><td> +<p>Device Interrupt 1: PVD through EXTI Line detection Interrupt. </p> +</td></tr> +</table> +</dd> +</dl> + +</div> +</div> +<h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="ga382ad6bedd6eecfdabd1b94dd128a01a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_ClearPendingIRQ </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function removes the pending state of the specified interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative number.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The registers that control the status of interrupts are called SETPEND and CLRPEND.</li> +<li>An interrupt can have the status pending though it is not active.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#ga3b885147ef9965ecede49614de8df9d2">NVIC_SetPendingIRQ</a>; <a class="el" href="group___n_v_i_c__gr.html#ga95a8329a680b051ecf3ee8f516acc662" title="Get the pending interrupt.">NVIC_GetPendingIRQ</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gad3cbca1be7a4726afa9448a9acd89377"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_DecodePriority </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>Priority</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>PriorityGroup</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t * </td> + <td class="paramname"><em>pPreemptPriority</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t * </td> + <td class="paramname"><em>pSubPriority</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function decodes an interrupt priority value with the priority group <em>PriorityGroup</em> to preemptive priority value <em>pPreemptPriority</em> and subpriority value <em>pSubPriority</em>. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">Priority</td><td>Priority </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">PriorityGroup</td><td>Priority group </td></tr> + <tr><td class="paramdir">[out]</td><td class="paramname">*pPreemptPriority</td><td>Preemptive priority value (starting from 0) </td></tr> + <tr><td class="paramdir">[out]</td><td class="paramname">*pSubPriority</td><td>Subpriority value (starting from 0)</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#ga0688c59605b119c53c71b2505ab23eb5">NVIC_EncodePriority</a>; <a class="el" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395" title="Get the priority of an interrupt.">NVIC_GetPriority</a>; <a class="el" href="group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78" title="Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_GetPriorityGrouping</a>;</li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga736ba13a76eb37ef6e2c253be8b0331c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_DisableIRQ </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function disables the specified device-specific interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative value.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Number of the external interrupt to disable</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The registers that control the enabling and disabling of interrupts are called SETENA and CLRENA.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga530ad9fda2ed1c8b70e439ecfe80591f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_EnableIRQ </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables the specified device-specific interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative value.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The registers that control the enabling and disabling of interrupts are called SETENA and CLRENA.</li> +<li>The number of supported interrupts depends on the implementation of the chip designer and can be read form the Interrupt Controller Type Register (ICTR) in granularities of 32: <br/> + ICTR[4:0]<ul> +<li>=0 - 32 interrupts supported</li> +<li>=1 - 64 interrupts supported</li> +<li>...</li> +</ul> +</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c">NVIC_DisableIRQ</a>; <a class="el" href="struct_s_cn_s_c_b___type.html" title="Structure type to access the System Control and ID Register not in the SCB.">SCnSCB_Type</a>;</li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga0688c59605b119c53c71b2505ab23eb5"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_EncodePriority </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>PriorityGroup</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>PreemptPriority</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>SubPriority</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function encodes the priority for an interrupt with the priority group <em>PriorityGroup</em>, preemptive priority value <em>PreemptPriority</em>, and subpriority value <em>SubPriority</em>. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">PriorityGroup</td><td>Priority group </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">PreemptPriority</td><td>Preemptive priority value (starting from 0) </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">SubPriority</td><td>Subpriority value (starting from 0)</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Encoded priority for the interrupt</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#gad3cbca1be7a4726afa9448a9acd89377">NVIC_DecodePriority</a>; <a class="el" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798" title="Set the priority for an interrupt.">NVIC_SetPriority</a>;</li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gadf4252e600661fd762cfc0d1a9f5b892"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_GetActive </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function reads the Interrupt Active Register (NVIC_IABR0-NVIC_IABR7) in NVIC and returns the active bit of the interrupt <em>IRQn</em>.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>=0 Interrupt is not active</li> +<li>=1 Interrupt is active, or active and pending</li> +</ul> +</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>Each external interrupt has an active status bit. When the processor starts the interrupt handler the bit is set to 1 and cleared when the interrupt return is executed.</li> +<li>When an ISR is preempted and the processor executes anohter interrupt handler, the previous interrupt is still defined as active.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga95a8329a680b051ecf3ee8f516acc662"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_GetPendingIRQ </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function returns the pending status of the specified interrupt <em>IRQn</em>.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>=0 Interrupt is not pending</li> +<li>=1 Interrupt is pending</li> +</ul> +</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The registers that control the status of interrupts are called SETPEND and CLRPEND.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#ga3b885147ef9965ecede49614de8df9d2">NVIC_SetPendingIRQ</a>; <a class="el" href="group___n_v_i_c__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a" title="Clear an interrupt from pending.">NVIC_ClearPendingIRQ</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gab18fb9f6c5f4c70fdd73047f0f7c8395"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_GetPriority </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function reads the priority for the specified interrupt <em>IRQn</em>. <em>IRQn</em> can can specify any device-specific (external) interrupt, or core (internal) interrupt.</p> +<p>The returned priority value is automatically aligned to the implemented priority bits of the microcontroller.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Interrupt priority</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>Each external interrupt has an associated priority-level register.</li> +<li>Unimplemented bits are read as zero.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798">NVIC_SetPriority</a>; <a class="el" href="group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78" title="Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_GetPriorityGrouping</a>; <a class="el" href="group___core___register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__get_BASEPRI</a>;</li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gaa81b19849367d3cdb95ac108c500fa78"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_GetPriorityGrouping </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This functuion returns the priority grouping (flag PRIGROUP in AIRCR[10:8]).</p> +<dl class="section return"><dt>Returns</dt><dd>Priority grouping field</dd></dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>By default, priority group setting is zero.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354">NVIC_SetPriorityGrouping</a>; <a class="el" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395" title="Get the priority of an interrupt.">NVIC_GetPriority</a>; <a class="el" href="struct_s_c_b___type.html" title="Structure type to access the System Control Block (SCB).">SCB_Type</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga3b885147ef9965ecede49614de8df9d2"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_SetPendingIRQ </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function sets the pending bit for the specified interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative value.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The registers that control the status of interrupts are called SETPEND and CLRPEND.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#ga95a8329a680b051ecf3ee8f516acc662">NVIC_GetPendingIRQ</a>; <a class="el" href="group___n_v_i_c__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a" title="Clear an interrupt from pending.">NVIC_ClearPendingIRQ</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga5bb7f43ad92937c039dee3d36c3c2798"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_SetPriority </td> + <td>(</td> + <td class="paramtype"><a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> </td> + <td class="paramname"><em>IRQn</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>priority</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Sets the priority for the interrupt specified by <em>IRQn</em>.<em>IRQn</em> can can specify any device-specific (external) interrupt, or core (internal) interrupt. The <em>priority</em> specifies the interrupt priority value, whereby lower values indicate a higher priority. The default priority is 0 for every interrupt. This is the highest possible priority.</p> +<p>The priority cannot be set for every core interrupt. HardFault and NMI have a fixed (negative) priority that is higher than any configurable exception or interrupt.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt Number </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">priority</td><td>Priority to set</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>The number of priority levels is configurable and depends on the implementation of the chip designer. To determine the number of bits implemented for interrupt priority-level registers, write <em>0xFF</em> to one of the priority-level register, then read back the value. For example, if the minimum number of 3 bits have been implemented, the read-back value is <em>0xE0</em>.</li> +<li>Writes to unimplemented bits are ignored.</li> +<li><b>For Cortex-M0</b>:<ul> +<li>Dynamic switching of interrupt priority levels is not supported. The priority level of an interrupt should not be changed after it has been enabled.</li> +<li>Supports 0 to 192 priority levels.</li> +<li>Priority-level registers are 2 bit wide, occupying the two MSBs. Each Interrupt Priority Level Register is 1-byte wide.</li> +</ul> +</li> +<li><b>For Cortex-M3, Cortex-M4, and Cortex-M7</b>:<ul> +<li>Dynamic switching of interrupt priority levels is supported.</li> +<li>Supports 0 to 255 priority levels.</li> +<li>Priority-level registers have a maximum width of 8 bits and a minumum of 3 bits. Each register can be further devided into preempt priority level and subpriority level.</li> +</ul> +</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a>; <a class="el" href="group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354" title="Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].">NVIC_SetPriorityGrouping</a>; <a class="el" href="group___core___register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].">__set_BASEPRI</a>;</li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="gad78f447e891789b4d8f2e5b21eeda354"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_SetPriorityGrouping </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>PriorityGroup</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>The function sets the priority grouping <em>PriorityGroup</em> using the required unlock sequence. <em>PriorityGroup</em> is assigned to the field PRIGROUP (register AIRCR[10:8]). This field determines the split of group priority from subpriority. Only values from 0..7 are used. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">PriorityGroup</td><td>Priority group</td></tr> + </table> + </dd> +</dl> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>not for Cortex-M0, Cortex-M0+, or SC000.</li> +<li>By default, priority group setting is zero.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78">NVIC_GetPriorityGrouping</a>; <a class="el" href="group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798" title="Set the priority for an interrupt.">NVIC_SetPriority</a>; <a class="el" href="struct_s_c_b___type.html" title="Structure type to access the System Control Block (SCB).">SCB_Type</a></li> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga1b47d17e90b6a03e7bd1ec6a0d549b46"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void NVIC_SystemReset </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function requests a system reset by setting the SYSRESETREQ flag in the AIRCR register.</p> +<dl class="section remark"><dt>Remarks</dt><dd><ul> +<li>In most microcontroller designs, setting the SYSRESETREQ flag resets the processor and most parts of the system, but should not affect the debug system.</li> +</ul> +</dd></dl> +<dl class="section see"><dt>See Also</dt><dd><ul> +<li><a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> </li> +</ul> +</dd></dl> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group___n_v_i_c__gr.js b/Documentation/Core/html/group___n_v_i_c__gr.js new file mode 100644 index 0000000..e7db41e --- /dev/null +++ b/Documentation/Core/html/group___n_v_i_c__gr.js @@ -0,0 +1,29 @@ +var group___n_v_i_c__gr = +[ + [ "IRQn_Type", "group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8", [ + [ "NonMaskableInt_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30", null ], + [ "HardFault_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85", null ], + [ "MemoryManagement_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa", null ], + [ "BusFault_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af", null ], + [ "UsageFault_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf", null ], + [ "SVCall_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237", null ], + [ "DebugMonitor_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c", null ], + [ "PendSV_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2", null ], + [ "SysTick_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7", null ], + [ "WWDG_STM_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2", null ], + [ "PVD_STM_IRQn", "group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86", null ] + ] ], + [ "NVIC_ClearPendingIRQ", "group___n_v_i_c__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a", null ], + [ "NVIC_DecodePriority", "group___n_v_i_c__gr.html#gad3cbca1be7a4726afa9448a9acd89377", null ], + [ "NVIC_DisableIRQ", "group___n_v_i_c__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c", null ], + [ "NVIC_EnableIRQ", "group___n_v_i_c__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f", null ], + [ "NVIC_EncodePriority", "group___n_v_i_c__gr.html#ga0688c59605b119c53c71b2505ab23eb5", null ], + [ "NVIC_GetActive", "group___n_v_i_c__gr.html#gadf4252e600661fd762cfc0d1a9f5b892", null ], + [ "NVIC_GetPendingIRQ", "group___n_v_i_c__gr.html#ga95a8329a680b051ecf3ee8f516acc662", null ], + [ "NVIC_GetPriority", "group___n_v_i_c__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395", null ], + [ "NVIC_GetPriorityGrouping", "group___n_v_i_c__gr.html#gaa81b19849367d3cdb95ac108c500fa78", null ], + [ "NVIC_SetPendingIRQ", "group___n_v_i_c__gr.html#ga3b885147ef9965ecede49614de8df9d2", null ], + [ "NVIC_SetPriority", "group___n_v_i_c__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798", null ], + [ "NVIC_SetPriorityGrouping", "group___n_v_i_c__gr.html#gad78f447e891789b4d8f2e5b21eeda354", null ], + [ "NVIC_SystemReset", "group___n_v_i_c__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/group___sys_tick__gr.html b/Documentation/Core/html/group___sys_tick__gr.html new file mode 100644 index 0000000..6966d61 --- /dev/null +++ b/Documentation/Core/html/group___sys_tick__gr.html @@ -0,0 +1,197 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Systick Timer (SYSTICK)</title> +<title>CMSIS-CORE: Systick Timer (SYSTICK)</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); 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+</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#func-members">Functions</a> </div> + <div class="headertitle"> +<div class="title">Systick Timer (SYSTICK)</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Initialize and start the SysTick timer. +<a href="#details">More...</a></p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:gabe47de40e9b0ad465b752297a9d9f427"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427">SysTick_Config</a> (uint32_t ticks)</td></tr> +<tr class="memdesc:gabe47de40e9b0ad465b752297a9d9f427"><td class="mdescLeft"> </td><td class="mdescRight">System Tick Timer Configuration. <a href="#gabe47de40e9b0ad465b752297a9d9f427"></a><br/></td></tr> +<tr class="separator:gabe47de40e9b0ad465b752297a9d9f427"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<pre class="fragment">The System Tick Time (SysTick) generates interrupt requests on a regular basis. +This allows an OS to carry out context switching to support multiple tasking. For applications +that do not require an OS, the SysTick can be used for time keeping, time measurement, or as an +interrupt source for tasks that need to be executed regularly. +</pre><h1><a class="anchor" id="SysTick_code_ex_sec"></a> +Code Example</h1> +<p>The code below shows the usage of the function <a class="el" href="group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427" title="System Tick Timer Configuration.">SysTick_Config()</a> with an LPC1700.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#include "LPC17xx.h"</span></div> +<div class="line"></div> +<div class="line">uint32_t msTicks = 0; <span class="comment">/* Variable to store millisecond ticks */</span></div> +<div class="line"></div> +<div class="line"> </div> +<div class="line"><span class="keywordtype">void</span> SysTick_Handler(<span class="keywordtype">void</span>) { <span class="comment">/* SysTick interrupt Handler.</span></div> +<div class="line"><span class="comment"> msTicks++; See startup file startup_LPC17xx.s for SysTick vector */</span> </div> +<div class="line">}</div> +<div class="line"></div> +<div class="line"></div> +<div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div> +<div class="line"> uint32_t returnCode;</div> +<div class="line"></div> +<div class="line"> returnCode = <a class="code" href="group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427" title="System Tick Timer Configuration.">SysTick_Config</a>(<a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6" title="Variable to hold the system core clock value.">SystemCoreClock</a> / 1000); <span class="comment">/* Configure SysTick to generate an interrupt every millisecond */</span></div> +<div class="line"></div> +<div class="line"> <span class="keywordflow">if</span> (returnCode != 0) { <span class="comment">/* Check return code for errors */</span></div> +<div class="line"> <span class="comment">// Error Handling </span></div> +<div class="line"> }</div> +<div class="line"></div> +<div class="line"> <span class="keywordflow">while</span>(1);</div> +<div class="line">}</div> +</div><!-- fragment --> <h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="gabe47de40e9b0ad465b752297a9d9f427"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t SysTick_Config </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>ticks</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Initialises and starts the System Tick Timer and its interrupt. After this call, the SysTick timer creates interrupts with the specified time interval. Counter is in free running mode to generate periodical interrupts.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">ticks</td><td>Number of ticks between two interrupts</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>0 - success </dd> +<dd> +1 - failure</dd></dl> +<dl class="section note"><dt>Note</dt><dd>When <b>#define __Vendor_SysTickConfig</b> is set to 1, the standard function <b>SysTick_Config</b> is excluded. In this case, the file <b><em>device</em>.h</b> must contain a vendor specific implementation of this function. </dd></dl> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group___sys_tick__gr.js b/Documentation/Core/html/group___sys_tick__gr.js new file mode 100644 index 0000000..99c5304 --- /dev/null +++ b/Documentation/Core/html/group___sys_tick__gr.js @@ -0,0 +1,4 @@ +var group___sys_tick__gr = +[ + [ "SysTick_Config", "group___sys_tick__gr.html#gabe47de40e9b0ad465b752297a9d9f427", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/group__cache__functions__m7.html b/Documentation/Core/html/group__cache__functions__m7.html new file mode 100644 index 0000000..7ba5f9a --- /dev/null +++ b/Documentation/Core/html/group__cache__functions__m7.html @@ -0,0 +1,152 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Cache Functions (only Cortex-M7)</title> +<title>CMSIS-CORE: Cache Functions (only Cortex-M7)</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); 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+</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#groups">Content</a> </div> + <div class="headertitle"> +<div class="title">Cache Functions (only Cortex-M7)</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Functions for Instruction and Data Cache. +<a href="#details">More...</a></p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a> +Content</h2></td></tr> +<tr class="memitem:group___icache__functions__m7"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___icache__functions__m7.html">I-Cache Functions</a></td></tr> +<tr class="memdesc:group___icache__functions__m7"><td class="mdescLeft"> </td><td class="mdescRight">Functions for the instruction cache. <br/></td></tr> +<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:group___dcache__functions__m7"><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="group___dcache__functions__m7.html">D-Cache Functions</a></td></tr> +<tr class="memdesc:group___dcache__functions__m7"><td class="mdescLeft"> </td><td class="mdescRight">Functions for the data cache. <br/></td></tr> +<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>Cortex-M7 processors include a memory system, which includes an optional MPU and Harvard data and instruction cache with ECC. The optional CPU cache has an instruction and data cache with sizes of <span class="XML-Token">[0;4;8;16;32;64]KB</span>. Both instruction and data cache RAM can be configured at implementation time to have Error Correcting Code (ECC) to protect the data stored in the memory from errors.</p> +<p>All cache maintenance operations are executed by writing to registers in the memory mapped System Control Space (SCS) region of the internal PPB memory space.</p> +<dl class="section note"><dt>Note</dt><dd>After reset, you must invalidate each cache before enabling it.</dd></dl> +<p>The functions are grouped for:</p> +<ul> +<li><a class="el" href="group___icache__functions__m7.html">I-Cache Functions</a></li> +<li><a class="el" href="group___dcache__functions__m7.html">D-Cache Functions</a> </li> +</ul> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group__cache__functions__m7.js b/Documentation/Core/html/group__cache__functions__m7.js new file mode 100644 index 0000000..4db2220 --- /dev/null +++ b/Documentation/Core/html/group__cache__functions__m7.js @@ -0,0 +1,5 @@ +var group__cache__functions__m7 = +[ + [ "I-Cache Functions", "group___icache__functions__m7.html", "group___icache__functions__m7" ], + [ "D-Cache Functions", "group___dcache__functions__m7.html", "group___dcache__functions__m7" ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/group__fpu__functions__m7.html b/Documentation/Core/html/group__fpu__functions__m7.html new file mode 100644 index 0000000..a30c139 --- /dev/null +++ b/Documentation/Core/html/group__fpu__functions__m7.html @@ -0,0 +1,166 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>FPU Functions (only Cortex-M7)</title> +<title>CMSIS-CORE: FPU Functions (only Cortex-M7)</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); 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+</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('group__fpu__functions__m7.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#func-members">Functions</a> </div> + <div class="headertitle"> +<div class="title">FPU Functions (only Cortex-M7)</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Functions that relate to the Floating-Point Arithmetic Unit. +<a href="#details">More...</a></p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:ga6bcad99ce80a0e7e4ddc6f2379081756"><td class="memItemLeft" align="right" valign="top">__STATIC_INLINE uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__fpu__functions__m7.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a> (void)</td></tr> +<tr class="memdesc:ga6bcad99ce80a0e7e4ddc6f2379081756"><td class="mdescLeft"> </td><td class="mdescRight">Get the FPU type. <a href="#ga6bcad99ce80a0e7e4ddc6f2379081756"></a><br/></td></tr> +<tr class="separator:ga6bcad99ce80a0e7e4ddc6f2379081756"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>The Cortex-M7 processor includes optional floating-point arithmetic functionality, with support for single and double-precision arithmetic. The Cortex-M7 processor with FPU is an implementation of the single-precision and double-precision variant of the ARMv7-M Architecture with Floating-Point Extension (FPv5). </p> +<h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="ga6bcad99ce80a0e7e4ddc6f2379081756"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__STATIC_INLINE uint32_t SCB_GetFPUType </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li><b>0</b>: No FPU</li> +<li><b>1</b>: Single precision FPU</li> +<li><b>2</b>: Double + Single precision FPU</li> +</ul> +</dd></dl> +<p>The function returns the implemented FPU type. </p> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group__fpu__functions__m7.js b/Documentation/Core/html/group__fpu__functions__m7.js new file mode 100644 index 0000000..d77dd8b --- /dev/null +++ b/Documentation/Core/html/group__fpu__functions__m7.js @@ -0,0 +1,4 @@ +var group__fpu__functions__m7 = +[ + [ "SCB_GetFPUType", "group__fpu__functions__m7.html#ga6bcad99ce80a0e7e4ddc6f2379081756", null ] +];
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id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" 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onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span 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+Functions</h2></td></tr> +<tr class="memitem:gac71fad9f0a91980fecafcb450ee0a63e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gac71fad9f0a91980fecafcb450ee0a63e">__NOP</a> (void)</td></tr> +<tr class="memdesc:gac71fad9f0a91980fecafcb450ee0a63e"><td class="mdescLeft"> </td><td class="mdescRight">No Operation. <a href="#gac71fad9f0a91980fecafcb450ee0a63e"></a><br/></td></tr> +<tr class="separator:gac71fad9f0a91980fecafcb450ee0a63e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaed91dfbf3d7d7b7fba8d912fcbeaad88"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gaed91dfbf3d7d7b7fba8d912fcbeaad88">__WFI</a> (void)</td></tr> +<tr class="memdesc:gaed91dfbf3d7d7b7fba8d912fcbeaad88"><td class="mdescLeft"> </td><td class="mdescRight">Wait For Interrupt. <a href="#gaed91dfbf3d7d7b7fba8d912fcbeaad88"></a><br/></td></tr> +<tr class="separator:gaed91dfbf3d7d7b7fba8d912fcbeaad88"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad3efec76c3bfa2b8528ded530386c563"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gad3efec76c3bfa2b8528ded530386c563">__WFE</a> (void)</td></tr> +<tr class="memdesc:gad3efec76c3bfa2b8528ded530386c563"><td class="mdescLeft"> </td><td class="mdescRight">Wait For Event. <a href="#gad3efec76c3bfa2b8528ded530386c563"></a><br/></td></tr> +<tr class="separator:gad3efec76c3bfa2b8528ded530386c563"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga3c34da7eb16496ae2668a5b95fa441e7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga3c34da7eb16496ae2668a5b95fa441e7">__SEV</a> (void)</td></tr> +<tr class="memdesc:ga3c34da7eb16496ae2668a5b95fa441e7"><td class="mdescLeft"> </td><td class="mdescRight">Send Event. <a href="#ga3c34da7eb16496ae2668a5b95fa441e7"></a><br/></td></tr> +<tr class="separator:ga3c34da7eb16496ae2668a5b95fa441e7"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga92f5621626711931da71eaa8bf301af7"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga92f5621626711931da71eaa8bf301af7">__BKPT</a> (uint8_t value)</td></tr> +<tr class="memdesc:ga92f5621626711931da71eaa8bf301af7"><td class="mdescLeft"> </td><td class="mdescRight">Set Breakpoint. <a href="#ga92f5621626711931da71eaa8bf301af7"></a><br/></td></tr> +<tr class="separator:ga92f5621626711931da71eaa8bf301af7"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga93c09b4709394d81977300d5f84950e5"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga93c09b4709394d81977300d5f84950e5">__ISB</a> (void)</td></tr> +<tr class="memdesc:ga93c09b4709394d81977300d5f84950e5"><td class="mdescLeft"> </td><td class="mdescRight">Instruction Synchronization Barrier. <a href="#ga93c09b4709394d81977300d5f84950e5"></a><br/></td></tr> +<tr class="separator:ga93c09b4709394d81977300d5f84950e5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gacb2a8ca6eae1ba4b31161578b720c199"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gacb2a8ca6eae1ba4b31161578b720c199">__DSB</a> (void)</td></tr> +<tr class="memdesc:gacb2a8ca6eae1ba4b31161578b720c199"><td class="mdescLeft"> </td><td class="mdescRight">Data Synchronization Barrier. <a href="#gacb2a8ca6eae1ba4b31161578b720c199"></a><br/></td></tr> +<tr class="separator:gacb2a8ca6eae1ba4b31161578b720c199"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gab1c9b393641dc2d397b3408fdbe72b96"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gab1c9b393641dc2d397b3408fdbe72b96">__DMB</a> (void)</td></tr> +<tr class="memdesc:gab1c9b393641dc2d397b3408fdbe72b96"><td class="mdescLeft"> </td><td class="mdescRight">Data Memory Barrier. <a href="#gab1c9b393641dc2d397b3408fdbe72b96"></a><br/></td></tr> +<tr class="separator:gab1c9b393641dc2d397b3408fdbe72b96"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga4717abc17af5ba29b1e4c055e0a0d9b8">__REV</a> (uint32_t value)</td></tr> +<tr class="memdesc:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="mdescLeft"> </td><td class="mdescRight">Reverse byte order (32 bit) <a href="#ga4717abc17af5ba29b1e4c055e0a0d9b8"></a><br/></td></tr> +<tr class="separator:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26">__REV16</a> (uint32_t value)</td></tr> +<tr class="memdesc:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="mdescLeft"> </td><td class="mdescRight">Reverse byte order (16 bit) <a href="#gaeef6f853b6df3a365c838ee5b49a7a26"></a><br/></td></tr> +<tr class="separator:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="memItemLeft" align="right" valign="top">int32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga1ec006e6d79063363cb0c2a2e0b3adbe">__REVSH</a> (int32_t value)</td></tr> +<tr class="memdesc:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="mdescLeft"> </td><td class="mdescRight">Reverse byte order in signed short value. <a href="#ga1ec006e6d79063363cb0c2a2e0b3adbe"></a><br/></td></tr> +<tr class="separator:ga1ec006e6d79063363cb0c2a2e0b3adbe"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad6f9f297f6b91a995ee199fbc796b863"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gad6f9f297f6b91a995ee199fbc796b863">__RBIT</a> (uint32_t value)</td></tr> +<tr class="memdesc:gad6f9f297f6b91a995ee199fbc796b863"><td class="mdescLeft"> </td><td class="mdescRight">Reverse bit order of value [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gad6f9f297f6b91a995ee199fbc796b863"></a><br/></td></tr> +<tr class="separator:gad6f9f297f6b91a995ee199fbc796b863"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaf66beb577bb9d90424c3d1d7f684c024"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gaf66beb577bb9d90424c3d1d7f684c024">__ROR</a> (uint32_t value, uint32_t shift)</td></tr> +<tr class="memdesc:gaf66beb577bb9d90424c3d1d7f684c024"><td class="mdescLeft"> </td><td class="mdescRight">Rotate a value right by a number of bits. <a href="#gaf66beb577bb9d90424c3d1d7f684c024"></a><br/></td></tr> +<tr class="separator:gaf66beb577bb9d90424c3d1d7f684c024"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9e3ac13d8dcf4331176b624cf6234a7e"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga9e3ac13d8dcf4331176b624cf6234a7e">__LDREXB</a> (volatile uint8_t *addr)</td></tr> +<tr class="memdesc:ga9e3ac13d8dcf4331176b624cf6234a7e"><td class="mdescLeft"> </td><td class="mdescRight">LDR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga9e3ac13d8dcf4331176b624cf6234a7e"></a><br/></td></tr> +<tr class="separator:ga9e3ac13d8dcf4331176b624cf6234a7e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9feffc093d6f68b120d592a7a0d45a15"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga9feffc093d6f68b120d592a7a0d45a15">__LDREXH</a> (volatile uint16_t *addr)</td></tr> +<tr class="memdesc:ga9feffc093d6f68b120d592a7a0d45a15"><td class="mdescLeft"> </td><td class="mdescRight">LDR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga9feffc093d6f68b120d592a7a0d45a15"></a><br/></td></tr> +<tr class="separator:ga9feffc093d6f68b120d592a7a0d45a15"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gabd78840a0f2464905b7cec791ebc6a4c"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gabd78840a0f2464905b7cec791ebc6a4c">__LDREXW</a> (volatile uint32_t *addr)</td></tr> +<tr class="memdesc:gabd78840a0f2464905b7cec791ebc6a4c"><td class="mdescLeft"> </td><td class="mdescRight">LDR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gabd78840a0f2464905b7cec791ebc6a4c"></a><br/></td></tr> +<tr class="separator:gabd78840a0f2464905b7cec791ebc6a4c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gaab6482d1f59f59e2b6b7efc1af391c99">__STREXB</a> (uint8_t value, volatile uint8_t *addr)</td></tr> +<tr class="memdesc:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="mdescLeft"> </td><td class="mdescRight">STR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#gaab6482d1f59f59e2b6b7efc1af391c99"></a><br/></td></tr> +<tr class="separator:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga0a354bdf71caa52f081a4a54e84c8d2a">__STREXH</a> (uint16_t value, volatile uint16_t *addr)</td></tr> +<tr class="memdesc:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="mdescLeft"> </td><td class="mdescRight">STR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga0a354bdf71caa52f081a4a54e84c8d2a"></a><br/></td></tr> +<tr class="separator:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga335deaaa7991490e1450cb7d1e4c5197"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga335deaaa7991490e1450cb7d1e4c5197">__STREXW</a> (uint32_t value, volatile uint32_t *addr)</td></tr> +<tr class="memdesc:ga335deaaa7991490e1450cb7d1e4c5197"><td class="mdescLeft"> </td><td class="mdescRight">STR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga335deaaa7991490e1450cb7d1e4c5197"></a><br/></td></tr> +<tr class="separator:ga335deaaa7991490e1450cb7d1e4c5197"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga354c5ac8870cc3dfb823367af9c4b412"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga354c5ac8870cc3dfb823367af9c4b412">__CLREX</a> (void)</td></tr> +<tr class="memdesc:ga354c5ac8870cc3dfb823367af9c4b412"><td class="mdescLeft"> </td><td class="mdescRight">Remove the exclusive lock [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga354c5ac8870cc3dfb823367af9c4b412"></a><br/></td></tr> +<tr class="separator:ga354c5ac8870cc3dfb823367af9c4b412"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga7d9dddda18805abbf51ac21c639845e1"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga7d9dddda18805abbf51ac21c639845e1">__SSAT</a> (unint32_t value, uint32_t sat)</td></tr> +<tr class="memdesc:ga7d9dddda18805abbf51ac21c639845e1"><td class="mdescLeft"> </td><td class="mdescRight">Signed Saturate [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga7d9dddda18805abbf51ac21c639845e1"></a><br/></td></tr> +<tr class="separator:ga7d9dddda18805abbf51ac21c639845e1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga76bbe4374a5912362866cdc1ded4064a"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga76bbe4374a5912362866cdc1ded4064a">__USAT</a> (uint32_t value, uint32_t sat)</td></tr> +<tr class="memdesc:ga76bbe4374a5912362866cdc1ded4064a"><td class="mdescLeft"> </td><td class="mdescRight">Unsigned Saturate [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga76bbe4374a5912362866cdc1ded4064a"></a><br/></td></tr> +<tr class="separator:ga76bbe4374a5912362866cdc1ded4064a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga90884c591ac5d73d6069334eba9d6c02"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga90884c591ac5d73d6069334eba9d6c02">__CLZ</a> (uint32_t value)</td></tr> +<tr class="memdesc:ga90884c591ac5d73d6069334eba9d6c02"><td class="mdescLeft"> </td><td class="mdescRight">Count leading zeros [not for Cortex-M0, Cortex-M0+, or SC000]. <a href="#ga90884c591ac5d73d6069334eba9d6c02"></a><br/></td></tr> +<tr class="separator:ga90884c591ac5d73d6069334eba9d6c02"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gac09134f1bf9c49db07282001afcc9380"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a> (uint32_t value)</td></tr> +<tr class="memdesc:gac09134f1bf9c49db07282001afcc9380"><td class="mdescLeft"> </td><td class="mdescRight">Rotate Right with Extend (32 bit) <a href="#gac09134f1bf9c49db07282001afcc9380"></a><br/></td></tr> +<tr class="separator:gac09134f1bf9c49db07282001afcc9380"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9464d75db32846aa8295c3c3adfacb41"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga9464d75db32846aa8295c3c3adfacb41">__LDRBT</a> (uint8_t ptr)</td></tr> +<tr class="memdesc:ga9464d75db32846aa8295c3c3adfacb41"><td class="mdescLeft"> </td><td class="mdescRight">LDRT Unprivileged (8 bit) <a href="#ga9464d75db32846aa8295c3c3adfacb41"></a><br/></td></tr> +<tr class="separator:ga9464d75db32846aa8295c3c3adfacb41"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="memItemLeft" align="right" valign="top">uint16_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gaa762b8bc5634ce38cb14d62a6b2aee32">__LDRHT</a> (uint16_t ptr)</td></tr> +<tr class="memdesc:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="mdescLeft"> </td><td class="mdescRight">LDRT Unprivileged (16 bit) <a href="#gaa762b8bc5634ce38cb14d62a6b2aee32"></a><br/></td></tr> +<tr class="separator:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga616504f5da979ba8a073d428d6e8d5c7"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga616504f5da979ba8a073d428d6e8d5c7">__LDRT</a> (uint32_t ptr)</td></tr> +<tr class="memdesc:ga616504f5da979ba8a073d428d6e8d5c7"><td class="mdescLeft"> </td><td class="mdescRight">LDRT Unprivileged (32 bit) <a href="#ga616504f5da979ba8a073d428d6e8d5c7"></a><br/></td></tr> +<tr class="separator:ga616504f5da979ba8a073d428d6e8d5c7"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad41aa59c92c0a165b7f98428d3320cd5"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#gad41aa59c92c0a165b7f98428d3320cd5">__STRBT</a> (uint8_t value, uint8_t ptr)</td></tr> +<tr class="memdesc:gad41aa59c92c0a165b7f98428d3320cd5"><td class="mdescLeft"> </td><td class="mdescRight">STRT Unprivileged (8 bit) <a href="#gad41aa59c92c0a165b7f98428d3320cd5"></a><br/></td></tr> +<tr class="separator:gad41aa59c92c0a165b7f98428d3320cd5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga2b5d93b8e461755b1072a03df3f1722e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga2b5d93b8e461755b1072a03df3f1722e">__STRHT</a> (uint16_t value, uint16_t ptr)</td></tr> +<tr class="memdesc:ga2b5d93b8e461755b1072a03df3f1722e"><td class="mdescLeft"> </td><td class="mdescRight">STRT Unprivileged (16 bit) <a href="#ga2b5d93b8e461755b1072a03df3f1722e"></a><br/></td></tr> +<tr class="separator:ga2b5d93b8e461755b1072a03df3f1722e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___c_p_u__gr.html#ga625bc4ac0b1d50de9bcd13d9f050030e">__STRT</a> (uint32_t value, uint32_t ptr)</td></tr> +<tr class="memdesc:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="mdescLeft"> </td><td class="mdescRight">STRT Unprivileged (32 bit) <a href="#ga625bc4ac0b1d50de9bcd13d9f050030e"></a><br/></td></tr> +<tr class="separator:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>The following functions generate specific Cortex-M instructions that cannot be directly accessed by the C/C++ Compiler. Refer to the <a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> for detailed information about these Cortex-M instructions.</p> +<dl class="section note"><dt>Note</dt><dd>When using the ARM Compiler Toolchain the following <a class="el" href="group__intrinsic___c_p_u__gr.html">Intrinsic Functions for CPU Instructions</a> are implemented using the Embedded Assembler: <a class="el" href="group__intrinsic___c_p_u__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a>, <Bruno: add more...>. The usage of the Embedded Assembler can be disabled by with <b><em>define __NO_EMBEDDED_ASM</em></b>. This avoids potential side effects of the Embedded Assembler. Refer to <b>Compiler User Guide - Using the Inline and Embedded Assemblers of the ARM Compiler</b> for more information. </dd></dl> +<h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="ga92f5621626711931da71eaa8bf301af7"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __BKPT </td> + <td>(</td> + <td class="paramtype">uint8_t </td> + <td class="paramname"><em>value</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>is ignored by the processor. If required, a debugger can use it to obtain additional information about the breakpoint. </td></tr> + </table> + </dd> +</dl> + +</div> +</div> +<a class="anchor" id="ga354c5ac8870cc3dfb823367af9c4b412"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __CLREX </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function removes the exclusive lock which is created by LDREX [not for Cortex-M0, Cortex-M0+, or SC000]. </p> + +</div> +</div> +<a class="anchor" id="ga90884c591ac5d73d6069334eba9d6c02"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint8_t __CLZ </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function counts the number of leading zeros of a data value [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to count the leading zeros </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>number of leading zeros in value </dd></dl> + +</div> +</div> +<a class="anchor" id="gab1c9b393641dc2d397b3408fdbe72b96"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __DMB </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion. </p> + +</div> +</div> +<a class="anchor" id="gacb2a8ca6eae1ba4b31161578b720c199"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __DSB </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. </p> + +</div> +</div> +<a class="anchor" id="ga93c09b4709394d81977300d5f84950e5"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __ISB </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed. </p> + +</div> +</div> +<a class="anchor" id="ga9464d75db32846aa8295c3c3adfacb41"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint8_t __LDRBT </td> + <td>(</td> + <td class="paramtype">uint8_t </td> + <td class="paramname"><em>ptr</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an Unprivileged LDRT command for 8 bit value.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl> + +</div> +</div> +<a class="anchor" id="ga9e3ac13d8dcf4331176b624cf6234a7e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint8_t __LDREXB </td> + <td>(</td> + <td class="paramtype">volatile uint8_t * </td> + <td class="paramname"><em>addr</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an exclusive LDR command for 8 bit value [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*addr) </dd></dl> + +</div> +</div> +<a class="anchor" id="ga9feffc093d6f68b120d592a7a0d45a15"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint16_t __LDREXH </td> + <td>(</td> + <td class="paramtype">volatile uint16_t * </td> + <td class="paramname"><em>addr</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an exclusive LDR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*addr) </dd></dl> + +</div> +</div> +<a class="anchor" id="gabd78840a0f2464905b7cec791ebc6a4c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __LDREXW </td> + <td>(</td> + <td class="paramtype">volatile uint32_t * </td> + <td class="paramname"><em>addr</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an exclusive LDR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*addr) </dd></dl> + +</div> +</div> +<a class="anchor" id="gaa762b8bc5634ce38cb14d62a6b2aee32"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint16_t __LDRHT </td> + <td>(</td> + <td class="paramtype">uint16_t </td> + <td class="paramname"><em>ptr</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an Unprivileged LDRT command for 16 bit values.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl> + +</div> +</div> +<a class="anchor" id="ga616504f5da979ba8a073d428d6e8d5c7"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __LDRT </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>ptr</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an Unprivileged LDRT command for 32 bit values.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl> + +</div> +</div> +<a class="anchor" id="gac71fad9f0a91980fecafcb450ee0a63e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __NOP </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function does nothing. This instruction can be used for code alignment purposes. </p> + +</div> +</div> +<a class="anchor" id="gad6f9f297f6b91a995ee199fbc796b863"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __RBIT </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function reverses the bit order of the given value [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> + +</div> +</div> +<a class="anchor" id="ga4717abc17af5ba29b1e4c055e0a0d9b8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __REV </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function reverses the byte order in integer value.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> + +</div> +</div> +<a class="anchor" id="gaeef6f853b6df3a365c838ee5b49a7a26"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __REV16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function reverses the byte order in two unsigned short values.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> + +</div> +</div> +<a class="anchor" id="ga1ec006e6d79063363cb0c2a2e0b3adbe"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">int32_t __REVSH </td> + <td>(</td> + <td class="paramtype">int32_t </td> + <td class="paramname"><em>value</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function reverses the byte order in a signed short value with sign extension to integer.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl> + +</div> +</div> +<a class="anchor" id="gaf66beb577bb9d90424c3d1d7f684c024"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __ROR </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>shift</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function rotates a value right by a specified number of bits.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be shifted right </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>Number of bits in the range [1..31] </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Rotated value </dd></dl> + +</div> +</div> +<a class="anchor" id="gac09134f1bf9c49db07282001afcc9380"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __RRX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to rotate </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Rotated value </dd></dl> + +</div> +</div> +<a class="anchor" id="ga3c34da7eb16496ae2668a5b95fa441e7"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __SEV </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Send Event is a hint instruction. It causes an event to be signaled to the CPU. </p> + +</div> +</div> +<a class="anchor" id="ga7d9dddda18805abbf51ac21c639845e1"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SSAT </td> + <td>(</td> + <td class="paramtype">unint32_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>sat</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function saturates a signed value [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be saturated </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">sat</td><td>Bit position to saturate to [1..32] </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Saturated value </dd></dl> + +</div> +</div> +<a class="anchor" id="gad41aa59c92c0a165b7f98428d3320cd5"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __STRBT </td> + <td>(</td> + <td class="paramtype">uint8_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint8_t </td> + <td class="paramname"><em>ptr</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an Unprivileged STRT command for 8 bit values.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr> + </table> + </dd> +</dl> + +</div> +</div> +<a class="anchor" id="gaab6482d1f59f59e2b6b7efc1af391c99"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __STREXB </td> + <td>(</td> + <td class="paramtype">uint8_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">volatile uint8_t * </td> + <td class="paramname"><em>addr</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an exclusive STR command for 8 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd> +<dd> +1 Function failed </dd></dl> + +</div> +</div> +<a class="anchor" id="ga0a354bdf71caa52f081a4a54e84c8d2a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __STREXH </td> + <td>(</td> + <td class="paramtype">uint16_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">volatile uint16_t * </td> + <td class="paramname"><em>addr</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an exclusive STR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd> +<dd> +1 Function failed </dd></dl> + +</div> +</div> +<a class="anchor" id="ga335deaaa7991490e1450cb7d1e4c5197"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __STREXW </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">volatile uint32_t * </td> + <td class="paramname"><em>addr</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an exclusive STR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd> +<dd> +1 Function failed </dd></dl> + +</div> +</div> +<a class="anchor" id="ga2b5d93b8e461755b1072a03df3f1722e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __STRHT </td> + <td>(</td> + <td class="paramtype">uint16_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint16_t </td> + <td class="paramname"><em>ptr</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an Unprivileged STRT command for 16 bit values.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr> + </table> + </dd> +</dl> + +</div> +</div> +<a class="anchor" id="ga625bc4ac0b1d50de9bcd13d9f050030e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __STRT </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>ptr</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function executed an Unprivileged STRT command for 32 bit values.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr> + </table> + </dd> +</dl> + +</div> +</div> +<a class="anchor" id="ga76bbe4374a5912362866cdc1ded4064a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __USAT </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>value</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>sat</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function saturates an unsigned value [not for Cortex-M0, Cortex-M0+, or SC000].</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be saturated </td></tr> + <tr><td class="paramdir">[in]</td><td class="paramname">sat</td><td>Bit position to saturate to [0..31] </td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>Saturated value </dd></dl> + +</div> +</div> +<a class="anchor" id="gad3efec76c3bfa2b8528ded530386c563"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __WFE </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Wait For Event is a hint instruction that permits the processor to enter a low-power state until an events occurs: </p> +<ul> +<li>If the <b>event register is 0</b>, then WFE suspends execution until one of the following events occurs:<ul> +<li>An exception, unless masked by the exception mask registers or the current priority level.</li> +<li>An exception enters the Pending state, if SEVONPEND in the System Control Register is set.</li> +<li>A Debug Entry request, if Debug is enabled.</li> +<li>An event signaled by a peripheral or another processor in a multiprocessor system using the SEV instruction.</li> +</ul> +</li> +</ul> +<ul> +<li>If the <b>event register is 1</b>, then WFE clears it to 0 and returns immediately. </li> +</ul> + +</div> +</div> +<a class="anchor" id="gaed91dfbf3d7d7b7fba8d912fcbeaad88"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void __WFI </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>WFI is a hint instruction that suspends execution until one of the following events occurs:</p> +<ul> +<li>A non-masked interrupt occurs and is taken.</li> +<li>An interrupt masked by PRIMASK becomes pending.</li> +<li>A Debug Entry request. </li> +</ul> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" 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class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:gac20aa0f741d0a1494d58c531e38d5785"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gac20aa0f741d0a1494d58c531e38d5785">__SADD8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gac20aa0f741d0a1494d58c531e38d5785"><td class="mdescLeft"> </td><td class="mdescRight">GE setting quad 8-bit signed addition. <a href="#gac20aa0f741d0a1494d58c531e38d5785"></a><br/></td></tr> +<tr class="separator:gac20aa0f741d0a1494d58c531e38d5785"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaf2f5a9132dcfc6d01d34cd971c425713"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaf2f5a9132dcfc6d01d34cd971c425713">__QADD8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gaf2f5a9132dcfc6d01d34cd971c425713"><td class="mdescLeft"> </td><td class="mdescRight">Q setting quad 8-bit saturating addition. <a href="#gaf2f5a9132dcfc6d01d34cd971c425713"></a><br/></td></tr> +<tr class="separator:gaf2f5a9132dcfc6d01d34cd971c425713"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga524575b442ea01aec10c762bf4d85fea"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga524575b442ea01aec10c762bf4d85fea">__SHADD8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga524575b442ea01aec10c762bf4d85fea"><td class="mdescLeft"> </td><td class="mdescRight">Quad 8-bit signed addition with halved results. <a href="#ga524575b442ea01aec10c762bf4d85fea"></a><br/></td></tr> +<tr class="separator:ga524575b442ea01aec10c762bf4d85fea"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gab3d7fd00d113b20fb3741a17394da762"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gab3d7fd00d113b20fb3741a17394da762">__UADD8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gab3d7fd00d113b20fb3741a17394da762"><td class="mdescLeft"> </td><td class="mdescRight">GE setting quad 8-bit unsigned addition. <a href="#gab3d7fd00d113b20fb3741a17394da762"></a><br/></td></tr> +<tr class="separator:gab3d7fd00d113b20fb3741a17394da762"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gafa9af218db3934a692fb06fa728d8031"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gafa9af218db3934a692fb06fa728d8031">__UQADD8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gafa9af218db3934a692fb06fa728d8031"><td class="mdescLeft"> </td><td class="mdescRight">Quad 8-bit unsigned saturating addition. <a href="#gafa9af218db3934a692fb06fa728d8031"></a><br/></td></tr> +<tr class="separator:gafa9af218db3934a692fb06fa728d8031"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga3a14e5485e59bf0f23595b7c2a94eb0b"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga3a14e5485e59bf0f23595b7c2a94eb0b">__UHADD8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga3a14e5485e59bf0f23595b7c2a94eb0b"><td class="mdescLeft"> </td><td class="mdescRight">Quad 8-bit unsigned addition with halved results. <a href="#ga3a14e5485e59bf0f23595b7c2a94eb0b"></a><br/></td></tr> +<tr class="separator:ga3a14e5485e59bf0f23595b7c2a94eb0b"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaba63bb52e1e93fb527e26f3d474da12e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaba63bb52e1e93fb527e26f3d474da12e">__SSUB8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gaba63bb52e1e93fb527e26f3d474da12e"><td class="mdescLeft"> </td><td class="mdescRight">GE setting quad 8-bit signed subtraction. <a href="#gaba63bb52e1e93fb527e26f3d474da12e"></a><br/></td></tr> +<tr class="separator:gaba63bb52e1e93fb527e26f3d474da12e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga753493a65493880c28baa82c151a0d61"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga753493a65493880c28baa82c151a0d61">__QSUB8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga753493a65493880c28baa82c151a0d61"><td class="mdescLeft"> </td><td class="mdescRight">Q setting quad 8-bit saturating subtract. <a href="#ga753493a65493880c28baa82c151a0d61"></a><br/></td></tr> +<tr class="separator:ga753493a65493880c28baa82c151a0d61"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gac3ec7215b354d925a239f3b31df2b77b"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gac3ec7215b354d925a239f3b31df2b77b">__SHSUB8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gac3ec7215b354d925a239f3b31df2b77b"><td class="mdescLeft"> </td><td class="mdescRight">Quad 8-bit signed subtraction with halved results. <a href="#gac3ec7215b354d925a239f3b31df2b77b"></a><br/></td></tr> +<tr class="separator:gac3ec7215b354d925a239f3b31df2b77b"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gacb7257dc3b8e9acbd0ef0e31ff87d4b8"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gacb7257dc3b8e9acbd0ef0e31ff87d4b8">__USUB8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gacb7257dc3b8e9acbd0ef0e31ff87d4b8"><td class="mdescLeft"> </td><td class="mdescRight">GE setting quad 8-bit unsigned subtract. <a href="#gacb7257dc3b8e9acbd0ef0e31ff87d4b8"></a><br/></td></tr> +<tr class="separator:gacb7257dc3b8e9acbd0ef0e31ff87d4b8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9736fe816aec74fe886e7fb949734eab"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga9736fe816aec74fe886e7fb949734eab">__UQSUB8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga9736fe816aec74fe886e7fb949734eab"><td class="mdescLeft"> </td><td class="mdescRight">Quad 8-bit unsigned saturating subtraction. <a href="#ga9736fe816aec74fe886e7fb949734eab"></a><br/></td></tr> +<tr class="separator:ga9736fe816aec74fe886e7fb949734eab"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga48a55df1c3e73923b73819d7c19b392d"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga48a55df1c3e73923b73819d7c19b392d">__UHSUB8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga48a55df1c3e73923b73819d7c19b392d"><td class="mdescLeft"> </td><td class="mdescRight">Quad 8-bit unsigned subtraction with halved results. <a href="#ga48a55df1c3e73923b73819d7c19b392d"></a><br/></td></tr> +<tr class="separator:ga48a55df1c3e73923b73819d7c19b392d"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad0bf46373a1c05aabf64517e84be5984"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad0bf46373a1c05aabf64517e84be5984">__SADD16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gad0bf46373a1c05aabf64517e84be5984"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit signed addition. <a href="#gad0bf46373a1c05aabf64517e84be5984"></a><br/></td></tr> +<tr class="separator:gad0bf46373a1c05aabf64517e84be5984"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gae83a53ec04b496304bed6d9fe8f7461b"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gae83a53ec04b496304bed6d9fe8f7461b">__QADD16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gae83a53ec04b496304bed6d9fe8f7461b"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit saturating addition. <a href="#gae83a53ec04b496304bed6d9fe8f7461b"></a><br/></td></tr> +<tr class="separator:gae83a53ec04b496304bed6d9fe8f7461b"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga15d8899a173effb8ad8c7268da32b60e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga15d8899a173effb8ad8c7268da32b60e">__SHADD16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga15d8899a173effb8ad8c7268da32b60e"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed addition with halved results. <a href="#ga15d8899a173effb8ad8c7268da32b60e"></a><br/></td></tr> +<tr class="separator:ga15d8899a173effb8ad8c7268da32b60e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaa1160f0cf76d6aa292fbad54a1aa6b74"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaa1160f0cf76d6aa292fbad54a1aa6b74">__UADD16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gaa1160f0cf76d6aa292fbad54a1aa6b74"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit unsigned addition. <a href="#gaa1160f0cf76d6aa292fbad54a1aa6b74"></a><br/></td></tr> +<tr class="separator:gaa1160f0cf76d6aa292fbad54a1aa6b74"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9e2cc5117e79578a08b25f1e89022966"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga9e2cc5117e79578a08b25f1e89022966">__UQADD16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga9e2cc5117e79578a08b25f1e89022966"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned saturating addition. <a href="#ga9e2cc5117e79578a08b25f1e89022966"></a><br/></td></tr> +<tr class="separator:ga9e2cc5117e79578a08b25f1e89022966"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gabd0b0e2da2e6364e176d051687702b86"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gabd0b0e2da2e6364e176d051687702b86">__UHADD16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gabd0b0e2da2e6364e176d051687702b86"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned addition with halved results. <a href="#gabd0b0e2da2e6364e176d051687702b86"></a><br/></td></tr> +<tr class="separator:gabd0b0e2da2e6364e176d051687702b86"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga4262f73be75efbac6b46ab7c71aa6cbc"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga4262f73be75efbac6b46ab7c71aa6cbc">__SSUB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga4262f73be75efbac6b46ab7c71aa6cbc"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit signed subtraction. <a href="#ga4262f73be75efbac6b46ab7c71aa6cbc"></a><br/></td></tr> +<tr class="separator:ga4262f73be75efbac6b46ab7c71aa6cbc"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad089605c16df9823a2c8aaa37777aae5"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad089605c16df9823a2c8aaa37777aae5">__QSUB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gad089605c16df9823a2c8aaa37777aae5"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit saturating subtract. <a href="#gad089605c16df9823a2c8aaa37777aae5"></a><br/></td></tr> +<tr class="separator:gad089605c16df9823a2c8aaa37777aae5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga31328467f0f91b8ff9ae9a01682ad3bf"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga31328467f0f91b8ff9ae9a01682ad3bf">__SHSUB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga31328467f0f91b8ff9ae9a01682ad3bf"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed subtraction with halved results. <a href="#ga31328467f0f91b8ff9ae9a01682ad3bf"></a><br/></td></tr> +<tr class="separator:ga31328467f0f91b8ff9ae9a01682ad3bf"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9f2b77e11fc4a77b26c36c423ed45b4e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga9f2b77e11fc4a77b26c36c423ed45b4e">__USUB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga9f2b77e11fc4a77b26c36c423ed45b4e"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit unsigned subtract. <a href="#ga9f2b77e11fc4a77b26c36c423ed45b4e"></a><br/></td></tr> +<tr class="separator:ga9f2b77e11fc4a77b26c36c423ed45b4e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga5ec4e2e231d15e5c692233feb3806187"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga5ec4e2e231d15e5c692233feb3806187">__UQSUB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga5ec4e2e231d15e5c692233feb3806187"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned saturating subtraction. <a href="#ga5ec4e2e231d15e5c692233feb3806187"></a><br/></td></tr> +<tr class="separator:ga5ec4e2e231d15e5c692233feb3806187"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga1f7545b8dc33bb97982731cb9d427a69"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga1f7545b8dc33bb97982731cb9d427a69">__UHSUB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga1f7545b8dc33bb97982731cb9d427a69"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned subtraction with halved results. <a href="#ga1f7545b8dc33bb97982731cb9d427a69"></a><br/></td></tr> +<tr class="separator:ga1f7545b8dc33bb97982731cb9d427a69"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga5845084fd99c872e98cf5553d554de2a"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga5845084fd99c872e98cf5553d554de2a">__SASX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga5845084fd99c872e98cf5553d554de2a"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit addition and subtraction with exchange. <a href="#ga5845084fd99c872e98cf5553d554de2a"></a><br/></td></tr> +<tr class="separator:ga5845084fd99c872e98cf5553d554de2a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga87618799672e1511e33964bc71467eb3"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga87618799672e1511e33964bc71467eb3">__QASX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga87618799672e1511e33964bc71467eb3"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit add and subtract with exchange. <a href="#ga87618799672e1511e33964bc71467eb3"></a><br/></td></tr> +<tr class="separator:ga87618799672e1511e33964bc71467eb3"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gae0a649035f67627464fd80e7218c89d5"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gae0a649035f67627464fd80e7218c89d5">__SHASX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gae0a649035f67627464fd80e7218c89d5"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed addition and subtraction with halved results. <a href="#gae0a649035f67627464fd80e7218c89d5"></a><br/></td></tr> +<tr class="separator:gae0a649035f67627464fd80e7218c89d5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga980353d2c72ebb879282e49f592fddc0"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga980353d2c72ebb879282e49f592fddc0">__UASX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga980353d2c72ebb879282e49f592fddc0"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit unsigned addition and subtraction with exchange. <a href="#ga980353d2c72ebb879282e49f592fddc0"></a><br/></td></tr> +<tr class="separator:ga980353d2c72ebb879282e49f592fddc0"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga5eff3ae5eabcd73f3049996ca391becb"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga5eff3ae5eabcd73f3049996ca391becb">__UQASX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga5eff3ae5eabcd73f3049996ca391becb"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned saturating addition and subtraction with exchange. <a href="#ga5eff3ae5eabcd73f3049996ca391becb"></a><br/></td></tr> +<tr class="separator:ga5eff3ae5eabcd73f3049996ca391becb"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga028f0732b961fb6e5209326fb3855261"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga028f0732b961fb6e5209326fb3855261">__UHASX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga028f0732b961fb6e5209326fb3855261"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned addition and subtraction with halved results and exchange. <a href="#ga028f0732b961fb6e5209326fb3855261"></a><br/></td></tr> +<tr class="separator:ga028f0732b961fb6e5209326fb3855261"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9d3bc5c539f9bd50f7d59ffa37ac6a65"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga9d3bc5c539f9bd50f7d59ffa37ac6a65">__SSAX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga9d3bc5c539f9bd50f7d59ffa37ac6a65"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit signed subtraction and addition with exchange. <a href="#ga9d3bc5c539f9bd50f7d59ffa37ac6a65"></a><br/></td></tr> +<tr class="separator:ga9d3bc5c539f9bd50f7d59ffa37ac6a65"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gab41eb2b17512ab01d476fc9d5bd19520"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gab41eb2b17512ab01d476fc9d5bd19520">__QSAX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gab41eb2b17512ab01d476fc9d5bd19520"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit subtract and add with exchange. <a href="#gab41eb2b17512ab01d476fc9d5bd19520"></a><br/></td></tr> +<tr class="separator:gab41eb2b17512ab01d476fc9d5bd19520"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gafadbd89c36b5addcf1ca10dd392db3e9"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gafadbd89c36b5addcf1ca10dd392db3e9">__SHSAX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gafadbd89c36b5addcf1ca10dd392db3e9"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed subtraction and addition with halved results. <a href="#gafadbd89c36b5addcf1ca10dd392db3e9"></a><br/></td></tr> +<tr class="separator:gafadbd89c36b5addcf1ca10dd392db3e9"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga578a082747436772c482c96d7a58e45e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga578a082747436772c482c96d7a58e45e">__USAX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga578a082747436772c482c96d7a58e45e"><td class="mdescLeft"> </td><td class="mdescRight">GE setting dual 16-bit unsigned subtract and add with exchange. <a href="#ga578a082747436772c482c96d7a58e45e"></a><br/></td></tr> +<tr class="separator:ga578a082747436772c482c96d7a58e45e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gadecfdfabc328d8939d49d996f2fd4482"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gadecfdfabc328d8939d49d996f2fd4482">__UQSAX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gadecfdfabc328d8939d49d996f2fd4482"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned saturating subtraction and addition with exchange. <a href="#gadecfdfabc328d8939d49d996f2fd4482"></a><br/></td></tr> +<tr class="separator:gadecfdfabc328d8939d49d996f2fd4482"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga09e129e6613329aab87c89f1108b7ed7"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga09e129e6613329aab87c89f1108b7ed7">__UHSAX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga09e129e6613329aab87c89f1108b7ed7"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit unsigned subtraction and addition with halved results and exchange. <a href="#ga09e129e6613329aab87c89f1108b7ed7"></a><br/></td></tr> +<tr class="separator:ga09e129e6613329aab87c89f1108b7ed7"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gac8855c07044239ea775c8128013204f0"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gac8855c07044239ea775c8128013204f0">__USAD8</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gac8855c07044239ea775c8128013204f0"><td class="mdescLeft"> </td><td class="mdescRight">Unsigned sum of quad 8-bit unsigned absolute difference. <a href="#gac8855c07044239ea775c8128013204f0"></a><br/></td></tr> +<tr class="separator:gac8855c07044239ea775c8128013204f0"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad032bd21f013c5d29f5fcb6b0f02bc3f"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad032bd21f013c5d29f5fcb6b0f02bc3f">__USADA8</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr> +<tr class="memdesc:gad032bd21f013c5d29f5fcb6b0f02bc3f"><td class="mdescLeft"> </td><td class="mdescRight">Unsigned sum of quad 8-bit unsigned absolute difference with 32-bit accumulate. <a href="#gad032bd21f013c5d29f5fcb6b0f02bc3f"></a><br/></td></tr> +<tr class="separator:gad032bd21f013c5d29f5fcb6b0f02bc3f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga95e666b82216066bf6064d1244e6883c"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga95e666b82216066bf6064d1244e6883c">__SSAT16</a> (uint32_t val1, const uint32_t val2)</td></tr> +<tr class="memdesc:ga95e666b82216066bf6064d1244e6883c"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit saturate. <a href="#ga95e666b82216066bf6064d1244e6883c"></a><br/></td></tr> +<tr class="separator:ga95e666b82216066bf6064d1244e6883c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga967f516afff5900cf30f1a81907cdd89"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga967f516afff5900cf30f1a81907cdd89">__USAT16</a> (uint32_t val1, const uint32_t val2)</td></tr> +<tr class="memdesc:ga967f516afff5900cf30f1a81907cdd89"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit unsigned saturate. <a href="#ga967f516afff5900cf30f1a81907cdd89"></a><br/></td></tr> +<tr class="separator:ga967f516afff5900cf30f1a81907cdd89"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gab41d713653b16f8d9fef44d14e397228"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gab41d713653b16f8d9fef44d14e397228">__UXTB16</a> (uint32_t val)</td></tr> +<tr class="memdesc:gab41d713653b16f8d9fef44d14e397228"><td class="mdescLeft"> </td><td class="mdescRight">Dual extract 8-bits and zero-extend to 16-bits. <a href="#gab41d713653b16f8d9fef44d14e397228"></a><br/></td></tr> +<tr class="separator:gab41d713653b16f8d9fef44d14e397228"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad25ce96db0f17096bbd815f4817faf09"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad25ce96db0f17096bbd815f4817faf09">__UXTAB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gad25ce96db0f17096bbd815f4817faf09"><td class="mdescLeft"> </td><td class="mdescRight">Extracted 16-bit to 32-bit unsigned addition. <a href="#gad25ce96db0f17096bbd815f4817faf09"></a><br/></td></tr> +<tr class="separator:gad25ce96db0f17096bbd815f4817faf09"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga38dce3dd13ba212e80ec3cff4abeb11a"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga38dce3dd13ba212e80ec3cff4abeb11a">__SXTB16</a> (uint32_t val)</td></tr> +<tr class="memdesc:ga38dce3dd13ba212e80ec3cff4abeb11a"><td class="mdescLeft"> </td><td class="mdescRight">Dual extract 8-bits and sign extend each to 16-bits. <a href="#ga38dce3dd13ba212e80ec3cff4abeb11a"></a><br/></td></tr> +<tr class="separator:ga38dce3dd13ba212e80ec3cff4abeb11a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gac540b4fc41d30778ba102d2a65db5589"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gac540b4fc41d30778ba102d2a65db5589">__SXTAB16</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gac540b4fc41d30778ba102d2a65db5589"><td class="mdescLeft"> </td><td class="mdescRight">Dual extracted 8-bit to 16-bit signed addition. <a href="#gac540b4fc41d30778ba102d2a65db5589"></a><br/></td></tr> +<tr class="separator:gac540b4fc41d30778ba102d2a65db5589"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gae326e368a1624d2dfb4b97c626939257"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gae326e368a1624d2dfb4b97c626939257">__SMUAD</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gae326e368a1624d2dfb4b97c626939257"><td class="mdescLeft"> </td><td class="mdescRight">Q setting sum of dual 16-bit signed multiply. <a href="#gae326e368a1624d2dfb4b97c626939257"></a><br/></td></tr> +<tr class="separator:gae326e368a1624d2dfb4b97c626939257"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaee6390f86965cb662500f690b0012092"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaee6390f86965cb662500f690b0012092">__SMUADX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gaee6390f86965cb662500f690b0012092"><td class="mdescLeft"> </td><td class="mdescRight">Q setting sum of dual 16-bit signed multiply with exchange. <a href="#gaee6390f86965cb662500f690b0012092"></a><br/></td></tr> +<tr class="separator:gaee6390f86965cb662500f690b0012092"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaea60757232f740ec6b09980eebb614ff"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaea60757232f740ec6b09980eebb614ff">__SMMLA</a> (int32_t val1, int32_t val2, int32_t val3)</td></tr> +<tr class="memdesc:gaea60757232f740ec6b09980eebb614ff"><td class="mdescLeft"> </td><td class="mdescRight">32-bit signed multiply with 32-bit truncated accumulator. <a href="#gaea60757232f740ec6b09980eebb614ff"></a><br/></td></tr> +<tr class="separator:gaea60757232f740ec6b09980eebb614ff"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gae0c86f3298532183f3a29f5bb454d354"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gae0c86f3298532183f3a29f5bb454d354">__SMLAD</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr> +<tr class="memdesc:gae0c86f3298532183f3a29f5bb454d354"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit signed multiply with single 32-bit accumulator. <a href="#gae0c86f3298532183f3a29f5bb454d354"></a><br/></td></tr> +<tr class="separator:gae0c86f3298532183f3a29f5bb454d354"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga9c286d330f4fb29b256335add91eec9f"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga9c286d330f4fb29b256335add91eec9f">__SMLADX</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr> +<tr class="memdesc:ga9c286d330f4fb29b256335add91eec9f"><td class="mdescLeft"> </td><td class="mdescRight">Q setting pre-exchanged dual 16-bit signed multiply with single 32-bit accumulator. <a href="#ga9c286d330f4fb29b256335add91eec9f"></a><br/></td></tr> +<tr class="separator:ga9c286d330f4fb29b256335add91eec9f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad80e9b20c1736fd798f897362273a146"><td class="memItemLeft" align="right" valign="top">uint64_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad80e9b20c1736fd798f897362273a146">__SMLALD</a> (uint32_t val1, uint32_t val2, uint64_t val3)</td></tr> +<tr class="memdesc:gad80e9b20c1736fd798f897362273a146"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed multiply with single 64-bit accumulator. <a href="#gad80e9b20c1736fd798f897362273a146"></a><br/></td></tr> +<tr class="separator:gad80e9b20c1736fd798f897362273a146"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gad1adad1b3f2667328cc0db6c6b4f41cf"><td class="memItemLeft" align="right" valign="top">unsigned long long </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gad1adad1b3f2667328cc0db6c6b4f41cf">__SMLALDX</a> (uint32_t val1, uint32_t val2, unsigned long long val3)</td></tr> +<tr class="memdesc:gad1adad1b3f2667328cc0db6c6b4f41cf"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed multiply with exchange with single 64-bit accumulator. <a href="#gad1adad1b3f2667328cc0db6c6b4f41cf"></a><br/></td></tr> +<tr class="separator:gad1adad1b3f2667328cc0db6c6b4f41cf"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga039142a5368840683cf329cb55b73f84"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga039142a5368840683cf329cb55b73f84">__SMUSD</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga039142a5368840683cf329cb55b73f84"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed multiply returning difference. <a href="#ga039142a5368840683cf329cb55b73f84"></a><br/></td></tr> +<tr class="separator:ga039142a5368840683cf329cb55b73f84"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gabb5bcba694bf17b141c32e6a8474f60e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gabb5bcba694bf17b141c32e6a8474f60e">__SMUSDX</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gabb5bcba694bf17b141c32e6a8474f60e"><td class="mdescLeft"> </td><td class="mdescRight">Dual 16-bit signed multiply with exchange returning difference. <a href="#gabb5bcba694bf17b141c32e6a8474f60e"></a><br/></td></tr> +<tr class="separator:gabb5bcba694bf17b141c32e6a8474f60e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaf4350af7f2030c36f43b2c104a9d16cd"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaf4350af7f2030c36f43b2c104a9d16cd">__SMLSD</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr> +<tr class="memdesc:gaf4350af7f2030c36f43b2c104a9d16cd"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit signed multiply subtract with 32-bit accumulate. <a href="#gaf4350af7f2030c36f43b2c104a9d16cd"></a><br/></td></tr> +<tr class="separator:gaf4350af7f2030c36f43b2c104a9d16cd"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga5290ce5564770ad124910d2583dc0a9e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga5290ce5564770ad124910d2583dc0a9e">__SMLSDX</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr> +<tr class="memdesc:ga5290ce5564770ad124910d2583dc0a9e"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit signed multiply with exchange subtract with 32-bit accumulate. <a href="#ga5290ce5564770ad124910d2583dc0a9e"></a><br/></td></tr> +<tr class="separator:ga5290ce5564770ad124910d2583dc0a9e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga5611f7314e0c8f53da377918dfbf42ee"><td class="memItemLeft" align="right" valign="top">uint64_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga5611f7314e0c8f53da377918dfbf42ee">__SMLSLD</a> (uint32_t val1, uint32_t val2, uint64_t val3)</td></tr> +<tr class="memdesc:ga5611f7314e0c8f53da377918dfbf42ee"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit signed multiply subtract with 64-bit accumulate. <a href="#ga5611f7314e0c8f53da377918dfbf42ee"></a><br/></td></tr> +<tr class="separator:ga5611f7314e0c8f53da377918dfbf42ee"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga83e69ef81057d3cbd06863d729385187"><td class="memItemLeft" align="right" valign="top">unsigned long long </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga83e69ef81057d3cbd06863d729385187">__SMLSLDX</a> (uint32_t val1, uint32_t val2, unsigned long long val3)</td></tr> +<tr class="memdesc:ga83e69ef81057d3cbd06863d729385187"><td class="mdescLeft"> </td><td class="mdescRight">Q setting dual 16-bit signed multiply with exchange subtract with 64-bit accumulate. <a href="#ga83e69ef81057d3cbd06863d729385187"></a><br/></td></tr> +<tr class="separator:ga83e69ef81057d3cbd06863d729385187"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaf5448e591fe49161b6759b48aecb08fe"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaf5448e591fe49161b6759b48aecb08fe">__SEL</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:gaf5448e591fe49161b6759b48aecb08fe"><td class="mdescLeft"> </td><td class="mdescRight">Select bytes based on GE bits. <a href="#gaf5448e591fe49161b6759b48aecb08fe"></a><br/></td></tr> +<tr class="separator:gaf5448e591fe49161b6759b48aecb08fe"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga17b873f246c9f5e9355760ffef3dad4a"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga17b873f246c9f5e9355760ffef3dad4a">__QADD</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga17b873f246c9f5e9355760ffef3dad4a"><td class="mdescLeft"> </td><td class="mdescRight">Q setting saturating add. <a href="#ga17b873f246c9f5e9355760ffef3dad4a"></a><br/></td></tr> +<tr class="separator:ga17b873f246c9f5e9355760ffef3dad4a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ga3ba259f8f05a36f7b88b469a71ffc096"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#ga3ba259f8f05a36f7b88b469a71ffc096">__QSUB</a> (uint32_t val1, uint32_t val2)</td></tr> +<tr class="memdesc:ga3ba259f8f05a36f7b88b469a71ffc096"><td class="mdescLeft"> </td><td class="mdescRight">Q setting saturating subtract. <a href="#ga3ba259f8f05a36f7b88b469a71ffc096"></a><br/></td></tr> +<tr class="separator:ga3ba259f8f05a36f7b88b469a71ffc096"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gaefb8ebf3a54e197464da1ff69a44f4b5"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gaefb8ebf3a54e197464da1ff69a44f4b5">__PKHBT</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr> +<tr class="memdesc:gaefb8ebf3a54e197464da1ff69a44f4b5"><td class="mdescLeft"> </td><td class="mdescRight">Halfword packing instruction. Combines bits[15:0] of <em>val1</em> with bits[31:16] of <em>val2</em> levitated with the <em>val3</em>. <a href="#gaefb8ebf3a54e197464da1ff69a44f4b5"></a><br/></td></tr> +<tr class="separator:gaefb8ebf3a54e197464da1ff69a44f4b5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gafd8fe4a6d87e947caa81a69ec36c1666"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic___s_i_m_d__gr.html#gafd8fe4a6d87e947caa81a69ec36c1666">__PKHTB</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr> +<tr class="memdesc:gafd8fe4a6d87e947caa81a69ec36c1666"><td class="mdescLeft"> </td><td class="mdescRight">Halfword packing instruction. Combines bits[31:16] of <em>val1</em> with bits[15:0] of <em>val2</em> right-shifted with the <em>val3</em>. <a href="#gafd8fe4a6d87e947caa81a69ec36c1666"></a><br/></td></tr> +<tr class="separator:gafd8fe4a6d87e947caa81a69ec36c1666"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p><b>Single Instruction Multiple Data (SIMD)</b> extensions are provided <b>only for Cortex-M4 and Cortex-M7 cores</b> to simplify development of application software. SIMD extensions increase the processing capability without materially increasing the power consumption. The SIMD extensions are completely transparent to the operating system (OS), allowing existing OS ports to be used.</p> +<p><b>SIMD Features:</b></p> +<ul> +<li>Simultaneous computation of 2x16-bit or 4x8-bit operands</li> +<li>Fractional arithmetic</li> +<li>User definable saturation modes (arbitrary word-width)</li> +<li>Dual 16x16 multiply-add/subtract 32x32 fractional MAC</li> +<li>Simultaneous 8/16-bit select operations</li> +<li>Performance up to 3.2 GOPS at 800MHz</li> +<li>Performance is achieved with a "near zero" increase in power consumption on a typical implementation</li> +</ul> +<p><b>Examples:</b> </p> +<p><b>Addition:</b> Add two values using SIMD function</p> +<div class="fragment"><div class="line">uint32_t add_halfwords(uint32_t val1, uint32_t val2)</div> +<div class="line">{</div> +<div class="line"> <span class="keywordflow">return</span> <a class="code" href="group__intrinsic___s_i_m_d__gr.html#gad0bf46373a1c05aabf64517e84be5984" title="GE setting dual 16-bit signed addition.">__SADD16</a>(val1, val2);</div> +<div class="line">}</div> +</div><!-- fragment --><p><b>Subtraction:</b> Subtract two values using SIMD function</p> +<div class="fragment"><div class="line">uint32_t sub_halfwords(uint32_t val1, uint32_t val2)</div> +<div class="line">{</div> +<div class="line"> <span class="keywordflow">return</span> <a class="code" href="group__intrinsic___s_i_m_d__gr.html#ga4262f73be75efbac6b46ab7c71aa6cbc" title="GE setting dual 16-bit signed subtraction.">__SSUB16</a>(val1, val2);</div> +<div class="line">}</div> +</div><!-- fragment --><p><b>Multiplication:</b> Performing a multiplication using SIMD function</p> +<div class="fragment"><div class="line">uint32_t dual_mul_add_products(uint32_t val1, uint32_t val2)</div> +<div class="line">{</div> +<div class="line"> <span class="keywordflow">return</span> <a class="code" href="group__intrinsic___s_i_m_d__gr.html#gae326e368a1624d2dfb4b97c626939257" title="Q setting sum of dual 16-bit signed multiply.">__SMUAD</a>(val1, val2);</div> +<div class="line">}</div> +</div><!-- fragment --> <h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="gaefb8ebf3a54e197464da1ff69a44f4b5"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __PKHBT </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Combine a halfword from one register with a halfword from another register. The second argument can be left-shifted before extraction of the halfword. The registers PC and SP are not allowed as arguments. This instruction does not change the flags.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands </td></tr> + <tr><td class="paramname">val3</td><td>value for left-shifting <em>val2</em>. Value range [0..31].</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the combination of halfwords.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0]</div> +<div class="line">res[31:16] = val2[31:16]<<val3 </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gafd8fe4a6d87e947caa81a69ec36c1666"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __PKHTB </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Combines a halfword from one register with a halfword from another register. The second argument can be right-shifted before extraction of the halfword. The registers PC and SP are not allowed as arguments. This instruction does not change the flags.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>second 16-bit operands </td></tr> + <tr><td class="paramname">val2</td><td>first 16-bit operands </td></tr> + <tr><td class="paramname">val3</td><td>value for right-shifting <em>val2</em>. Value range [1..32].</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the combination of halfwords.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val2[15:0]>>val3</div> +<div class="line">res[31:16] = val1[31:16] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga17b873f246c9f5e9355760ffef3dad4a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QADD </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to obtain the saturating add of two integers.<br/> + The Q bit is set if the operation saturates.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first summand of the saturating add operation. </td></tr> + <tr><td class="paramname">val2</td><td>second summand of the saturating add operation.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the saturating addition of val1 and val2.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[31:0] = SAT(val1 + SAT(val2))</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gae83a53ec04b496304bed6d9fe8f7461b"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QADD16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit integer arithmetic additions in parallel, saturating the results to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the saturated addition of the low halfwords, in the low halfword of the return value. </li> +<li>the saturated addition of the high halfwords, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[15:0]</div> +<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gaf2f5a9132dcfc6d01d34cd971c425713"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QADD8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four 8-bit integer additions, saturating the results to the 8-bit signed integer range -2<sup>7</sup> <= x <= 2<sup>7</sup> - 1. </p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the saturated addition of the first byte of each operand in the first byte of the return value. </li> +<li>the saturated addition of the second byte of each operand in the second byte of the return value. </li> +<li>the saturated addition of the third byte of each operand in the third byte of the return value. </li> +<li>the saturated addition of the fourth byte of each operand in the fourth byte of the return value. </li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>7</sup> <= x <= 2<sup>7</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] + val2[7:0] </div> +<div class="line">res[15:8] = val1[15:8] + val2[15:8] </div> +<div class="line">res[23:16] = val1[23:16] + val2[23:16] </div> +<div class="line">res[31:24] = val1[31:24] + val2[31:24] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga87618799672e1511e33964bc71467eb3"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QASX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the one operand, then add the high halfwords and subtract the low halfwords, saturating the results to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the saturated subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the saturated addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[31:16] </div> +<div class="line">res[31:16] = val1[31:16] + val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gab41eb2b17512ab01d476fc9d5bd19520"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QSAX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of one operand, then subtract the high halfwords and add the low halfwords, saturating the results to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the saturated addition of the low halfword of the first operand and the high halfword of the second operand, in the low halfword of the return value. </li> +<li>the saturated subtraction of the low halfword of the second operand from the high halfword of the first operand, in the high halfword of the return value. </li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[31:16]</div> +<div class="line">res[31:16] = val1[31:16] - val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga3ba259f8f05a36f7b88b469a71ffc096"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QSUB </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to obtain the saturating subtraction of two integers.<br/> + The Q bit is set if the operation saturates.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>minuend of the saturating subtraction operation. </td></tr> + <tr><td class="paramname">val2</td><td>subtrahend of the saturating subtraction operation.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the saturating subtraction of val1 and val2.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[31:0] = SAT(val1 - SAT(val2))</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gad089605c16df9823a2c8aaa37777aae5"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QSUB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit integer subtractions, saturating the results to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the saturated subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the returned result. </li> +<li>the saturated subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the returned result.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> <= x <= 2<sup>15</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[15:0]</div> +<div class="line">res[31:16] = val1[31:16] - val2[31:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga753493a65493880c28baa82c151a0d61"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __QSUB8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four 8-bit integer subtractions, saturating the results to the 8-bit signed integer range -2<sup>7</sup> <= x <= 2<sup>7</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li> +<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li> +<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li> +<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The returned results are saturated to the 8-bit signed integer range -2<sup>7</sup> <= x <= 2<sup>7</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] - val2[7:0] </div> +<div class="line">res[15:8] = val1[15:8] - val2[15:8]</div> +<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div> +<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gad0bf46373a1c05aabf64517e84be5984"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SADD16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit signed integer additions.<br/> + The GE bits in the APSR are set according to the results of the additions.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the addition of the low halfwords in the low halfword of the return value. </li> +<li>the addition of the high halfwords in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00 </li> +<li>if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[15:0]</div> +<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gac20aa0f741d0a1494d58c531e38d5785"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SADD8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function performs four 8-bit signed integer additions. The GE bits of the APSR are set according to the results of the additions. </p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the addition of the first bytes from each operand, in the first byte of the return value. </li> +<li>the addition of the second bytes of each operand, in the second byte of the return value. </li> +<li>the addition of the third bytes of each operand, in the third byte of the return value. </li> +<li>the addition of the fourth bytes of each operand, in the fourth byte of the return value. </li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[7:0] >= 0 then APSR.GE[0] = 1 else 0 </li> +<li>if res[15:8] >= 0 then APSR.GE[1] = 1 else 0 </li> +<li>if res[23:16] >= 0 then APSR.GE[2] = 1 else 0 </li> +<li>if res[31:24] >= 0 then APSR.GE[3] = 1 else 0</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] + val2[7:0] </div> +<div class="line">res[15:8] = val1[15:8] + val2[15:8] </div> +<div class="line">res[23:16] = val1[23:16] + val2[23:16] </div> +<div class="line">res[31:24] = val1[31:24] + val2[31:24] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga5845084fd99c872e98cf5553d554de2a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SASX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function inserts an SASX instruction into the instruction stream generated by the compiler. It enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords.<br/> + The GE bits in the APRS are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00 </li> +<li>if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[31:16] </div> +<div class="line">res[31:16] = val1[31:16] + val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gaf5448e591fe49161b6759b48aecb08fe"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SEL </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function inserts a SEL instruction into the instruction stream generated by the compiler. It enables you to select bytes from the input parameters, whereby the bytes that are selected depend upon the results of previous SIMD instruction function. The results of previous SIMD instruction function are represented by the Greater than or Equal flags in the Application Program Status Register (APSR). The __SEL function works equally well on both halfword and byte operand function results. This is because halfword operand operations set two (duplicate) GE bits per value.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>four selectable 8-bit values. </td></tr> + <tr><td class="paramname">val2</td><td>four selectable 8-bit values.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>The function selects bytes from the input parameters and returns them in the return value, res, according to the following criteria: <ul> +<li>if APSR.GE[0] == 1 then res[7:0] = val1[7:0] else res[7:0] = val2[7:0] </li> +<li>if APSR.GE[1] == 1 then res[15:8] = val1[15:8] else res[15:8] = val2[15:8] </li> +<li>if APSR.GE[2] == 1 then res[23:16] = val1[23:16] else res[23:16] = val2[23:16] </li> +<li>if APSR.GE[3] == 1 then res[31;24] = val1[31:24] else res = val2[31:24] </li> +</ul> +</dd></dl> + +</div> +</div> +<a class="anchor" id="ga15d8899a173effb8ad8c7268da32b60e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SHADD16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two signed 16-bit integer additions, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the low halfwords, in the low halfword of the return value. </li> +<li>the halved addition of the high halfwords, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[15:0] >> 1</div> +<div class="line">res[31:16] = val1[31:16] + val2[31:16] >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga524575b442ea01aec10c762bf4d85fea"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SHADD8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four signed 8-bit integer additions, halving the results. </p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the first bytes from each operand, in the first byte of the return value. </li> +<li>the halved addition of the second bytes from each operand, in the second byte of the return value. </li> +<li>the halved addition of the third bytes from each operand, in the third byte of the return value. </li> +<li>the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] + val2[7:0] >> 1</div> +<div class="line">res[15:8] = val1[15:8] + val2[15:8] >> 1</div> +<div class="line">res[23:16] = val1[23:16] + val2[23:16] >> 1</div> +<div class="line">res[31:24] = val1[31:24] + val2[31:24] >> 1 </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gae0a649035f67627464fd80e7218c89d5"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SHASX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer addition and one signed 16-bit subtraction, and halve the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = (val1[15:0] - val2[31:16]) >> 1 </div> +<div class="line">res[31:16] = (val1[31:16] - val2[15:0] ) >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gafadbd89c36b5addcf1ca10dd392db3e9"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SHSAX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer subtraction and one signed 16-bit addition, and halve the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li> +<li>the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = (val1[15:0] + val2[31:16]) >> 1</div> +<div class="line">res[31:16] = (val1[31:16] - val2[15:0] ) >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga31328467f0f91b8ff9ae9a01682ad3bf"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SHSUB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two signed 16-bit integer subtractions, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the returned result. </li> +<li>the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the returned result.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[15:0] >> 1</div> +<div class="line">res[31:16] = val1[31:16] - val2[31:16] >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gac3ec7215b354d925a239f3b31df2b77b"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SHSUB8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four signed 8-bit integer subtractions, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li> +<li>the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li> +<li>the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li> +<li>the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] - val2[7:0] >> 1</div> +<div class="line">res[15:8] = val1[15:8] - val2[15:8] >> 1</div> +<div class="line">res[23:16] = val1[23:16] - val2[23:16] >> 1</div> +<div class="line">res[31:24] = val1[31:24] - val2[31:24] >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gae0c86f3298532183f3a29f5bb454d354"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMLAD </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two signed 16-bit multiplications, adding both results to a 32-bit accumulate operand.<br/> + The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication added to the accumulate value, as a 32-bit integer.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[15:0]</div> +<div class="line">p2 = val1[31:16] * val2[31:16]</div> +<div class="line">res[31:0] = p1 + p2 + val3[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga9c286d330f4fb29b256335add91eec9f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMLADX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two signed 16-bit multiplications with exchanged halfwords of the second operand, adding both results to a 32-bit accumulate operand.<br/> + The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication with exchanged halfwords of the second operand added to the accumulate value, as a 32-bit integer.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[31:16]</div> +<div class="line">p2 = val1[31:16] * val2[15:0]</div> +<div class="line">res[31:0] = p1 + p2 + val3[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gad80e9b20c1736fd798f897362273a146"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint64_t __SMLALD </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint64_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo2<sup>64</sup>.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication added to the accumulate value.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[15:0]</div> +<div class="line">p2 = val1[31:16] * val2[31:16]</div> +<div class="line">sum = p1 + p2 + val3[63:32][31:0]</div> +<div class="line">res[63:32] = sum[63:32]</div> +<div class="line">res[31:0] = sum[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gad1adad1b3f2667328cc0db6c6b4f41cf"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">unsigned long long __SMLALDX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">unsigned long long </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the second operand, and perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo2<sup>64</sup>.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication added to the accumulate value.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[31:16]</div> +<div class="line">p2 = val1[31:16] * val2[15:0]</div> +<div class="line">sum = p1 + p2 + val3[63:32][31:0]</div> +<div class="line">res[63:32] = sum[63:32]</div> +<div class="line">res[31:0] = sum[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gaf4350af7f2030c36f43b2c104a9d16cd"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMLSD </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 32-bit accumulate operand.<br/> + The Q bit is set if the accumulation overflows. Overflow cannot occur during the multiplications or the subtraction.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[15:0]</div> +<div class="line">p2 = val1[31:16] * val2[31:16]</div> +<div class="line">res[31:0] = p1 - p2 + val3[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga5290ce5564770ad124910d2583dc0a9e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMLSDX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords in the second operand, then perform two 16-bit signed multiplications. The difference of the products is added to a 32-bit accumulate operand.<br/> + The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications or the subtraction.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[31:16]</div> +<div class="line">p2 = val1[31:16] * val2[15:0]</div> +<div class="line">res[31:0] = p1 - p2 + val3[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga5611f7314e0c8f53da377918dfbf42ee"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint64_t __SMLSLD </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint64_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function It enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo2<sup>64</sup>.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[15:0]</div> +<div class="line">p2 = val1[31:16] * val2[31:16]</div> +<div class="line">res[63:0] = p1 - p2 + val3[63:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga83e69ef81057d3cbd06863d729385187"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">unsigned long long __SMLSLDX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">unsigned long long </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the second operand, perform two 16-bit multiplications, adding the difference of the products to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo2<sup>64</sup>.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[31:16]</div> +<div class="line">p2 = val1[31:16] * val2[15:0]</div> +<div class="line">res[63:0] = p1 - p2 + val3[63:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gaea60757232f740ec6b09980eebb614ff"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMMLA </td> + <td>(</td> + <td class="paramtype">int32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">int32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">int32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform a signed 32-bit multiplications, adding the most significant 32 bits of the 64-bit result to a 32-bit accumulate operand.<br/> +</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for multiplication. </td></tr> + <tr><td class="paramname">val3</td><td>accumulate value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the product of multiplication (most significant 32 bits) is added to the accumulate value, as a 32-bit integer.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p = val1 * val2</div> +<div class="line">res[31:0] = p[61:32] + val3[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gae326e368a1624d2dfb4b97c626939257"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMUAD </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit signed multiplications, adding the products together.<br/> + The Q bit is set if the addition overflows.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the sum of the products of the two 16-bit signed multiplications.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[15:0]</div> +<div class="line">p2 = val1[31:16] * val2[31:16]</div> +<div class="line">res[31:0] = p1 + p2</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gaee6390f86965cb662500f690b0012092"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMUADX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit signed multiplications with exchanged halfwords of the second operand, adding the products together.<br/> + The Q bit is set if the addition overflows.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the sum of the products of the two 16-bit signed multiplications with exchanged halfwords of the second operand.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[31:16]</div> +<div class="line">p2 = val1[31:16] * val2[15:0]</div> +<div class="line">res[31:0] = p1 + p2</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga039142a5368840683cf329cb55b73f84"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMUSD </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit signed multiplications, taking the difference of the products by subtracting the high halfword product from the low halfword product.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the difference of the products of the two 16-bit signed multiplications.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[15:0]</div> +<div class="line">p2 = val1[31:16] * val2[31:16]</div> +<div class="line">res[31:0] = p1 - p2</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gabb5bcba694bf17b141c32e6a8474f60e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SMUSDX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit signed multiplications, subtracting one of the products from the other. The halfwords of the second operand are exchanged before performing the arithmetic. This produces top * bottom and bottom * top multiplication.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the difference of the products of the two 16-bit signed multiplications.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0] * val2[31:16]</div> +<div class="line">p2 = val1[31:16] * val2[15:0]</div> +<div class="line">res[31:0] = p1 - p2</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga95e666b82216066bf6064d1244e6883c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SSAT16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">const uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to saturate two signed 16-bit values to a selected signed range.<br/> + The Q bit is set if either operation saturates.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>two signed 16-bit values to be saturated. </td></tr> + <tr><td class="paramname">val2</td><td>bit position for saturation, an integral constant expression in the range 1 to 16.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the sum of the absolute differences of the following bytes, added to the accumulation value: <ul> +<li>the signed saturation of the low halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the low halfword of the return value. </li> +<li>the signed saturation of the high halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">Saturate halfwords in val1 to the <span class="keywordtype">signed</span> range specified by the bit position in val2</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga9d3bc5c539f9bd50f7d59ffa37ac6a65"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SSAX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the two halfwords of one operand and perform one 16-bit integer subtraction and one 16-bit addition.<br/> + The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li> +<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value. </li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00 </li> +<li>if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[31:16]</div> +<div class="line">res[31:16] = val1[31:16] - val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga4262f73be75efbac6b46ab7c71aa6cbc"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SSUB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit signed integer subtractions.<br/> + The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit operands of each subtraction. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit operands of each subtraction.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl> +<dl class="section user"><dt></dt><dd>If <ul> +<li>res is the return value, then: </li> +<li>if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00 </li> +<li>if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[15:0]</div> +<div class="line">res[31:16] = val1[31:16] - val2[31:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gaba63bb52e1e93fb527e26f3d474da12e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SSUB8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four 8-bit signed integer subtractions.<br/> + The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands of each subtraction. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands of each subtraction.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li> +<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li> +<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li> +<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on </dt><dd>the results of the operation.</dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[8:0] >= 0 then APSR.GE[0] = 1 else 0 </li> +<li>if res[15:8] >= 0 then APSR.GE[1] = 1 else 0 </li> +<li>if res[23:16] >= 0 then APSR.GE[2] = 1 else 0 </li> +<li>if res[31:24] >= 0 then APSR.GE[3] = 1 else 0</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] - val2[7:0] </div> +<div class="line">res[15:8] = val1[15:8] - val2[15:8]</div> +<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div> +<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gac540b4fc41d30778ba102d2a65db5589"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SXTAB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to extract two 8-bit values from the second operand (at bit positions [7:0] and [23:16]), sign-extend them to 16-bits each, and add the results to the first operand.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>values added to the zero-extended to 16-bit values. </td></tr> + <tr><td class="paramname">val2</td><td>two 8-bit values to be extracted and zero-extended.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the addition of <em>val1</em> and <em>val2</em>, where the 8-bit values in val2[7:0] and val2[23:16] have been extracted and sign-extended prior to the addition.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + SignExtended(val2[7:0])</div> +<div class="line">res[31:16] = val1[31:16] + SignExtended(val2[23:16])</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga38dce3dd13ba212e80ec3cff4abeb11a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __SXTB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to extract two 8-bit values from an operand and sign-extend them to 16 bits each.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val</td><td>two 8-bit values in val[7:0] and val[23:16] to be sign-extended.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the 8-bit values sign-extended to 16-bit values. <ul> +<li>sign-extended value of val[7:0] in the low halfword of the return value. </li> +<li>sign-extended value of val[23:16] in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = SignExtended(val[7:0]</div> +<div class="line">res[31:16] = SignExtended(val[23:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gaa1160f0cf76d6aa292fbad54a1aa6b74"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UADD16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit unsigned integer additions.<br/> + The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit summands for each addition. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit summands for each addition.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the addition of the low halfwords in each operand, in the low halfword of the return value. </li> +<li>the addition of the high halfwords in each operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[15:0] >= 0x10000 then APSR.GE[0] = 11 else 00 </li> +<li>if res[31:16] >= 0x10000 then APSR.GE[1] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[15:0] </div> +<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gab3d7fd00d113b20fb3741a17394da762"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UADD8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four unsigned 8-bit integer additions. The GE bits of the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit summands for each addition. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit summands for each addition.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the first bytes from each operand, in the first byte of the return value. </li> +<li>the halved addition of the second bytes from each operand, in the second byte of the return value. </li> +<li>the halved addition of the third bytes from each operand, in the third byte of the return value. </li> +<li>the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[7:0] >= 0x100 then APSR.GE[0] = 1 else 0 </li> +<li>if res[15:8] >= 0x100 then APSR.GE[1] = 1 else 0 </li> +<li>if res[23:16] >= 0x100 then APSR.GE[2] = 1 else 0 </li> +<li>if res[31:24] >= 0x100 then APSR.GE[3] = 1 else 0</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] + val2[7:0] </div> +<div class="line">res[15:8] = val1[15:8] + val2[15:8]</div> +<div class="line">res[23:16] = val1[23:16] + val2[23:16]</div> +<div class="line">res[31:24] = val1[31:24] + val2[31:24]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga980353d2c72ebb879282e49f592fddc0"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UASX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the two halfwords of the second operand, add the high halfwords and subtract the low halfwords.<br/> + The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword and the second operand for the addition in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl> +<dl class="section user"><dt>If <em>res</em> is the return value, then:</dt><dd><ul> +<li>if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00 </li> +<li>if res[31:16] >= 0x10000 then APSR.GE[3:2] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[31:16]</div> +<div class="line">res[31:16] = val1[31:16] + val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gabd0b0e2da2e6364e176d051687702b86"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UHADD16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two unsigned 16-bit integer additions, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the low halfwords in each operand, in the low halfword of the return value. </li> +<li>the halved addition of the high halfwords in each operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[15:0] >> 1</div> +<div class="line">res[31:16] = val1[31:16] + val2[31:16] >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga3a14e5485e59bf0f23595b7c2a94eb0b"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UHADD8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four unsigned 8-bit integer additions, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the first bytes in each operand, in the first byte of the return value. </li> +<li>the halved addition of the second bytes in each operand, in the second byte of the return value. </li> +<li>the halved addition of the third bytes in each operand, in the third byte of the return value. </li> +<li>the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] + val2[7:0] >> 1</div> +<div class="line">res[15:8] = val1[15:8] + val2[15:8] >> 1</div> +<div class="line">res[23:16] = val1[23:16] + val2[23:16] >> 1</div> +<div class="line">res[31:24] = val1[31:24] + val2[31:24] >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga028f0732b961fb6e5209326fb3855261"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UHASX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved subtraction of the high halfword in the second operand from the low halfword in the first operand. </li> +<li>the halved addition of the high halfword in the first operand and the low halfword in the second operand.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = (val1[15:0] - val2[31:16]) >> 1</div> +<div class="line">res[31:16] = (val1[31:16] + val2[15:0] ) >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga09e129e6613329aab87c89f1108b7ed7"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UHSAX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the high halfword in the second operand and the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = (val1[15:0] + val2[31:16]) >> 1</div> +<div class="line">res[31:16] = (val1[31:16] - val2[15:0] ) >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga1f7545b8dc33bb97982731cb9d427a69"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UHSUB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two unsigned 16-bit integer subtractions, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[15:0] >> 1</div> +<div class="line">res[31:16] = val1[31:16] - val2[31:16] >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga48a55df1c3e73923b73819d7c19b392d"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UHSUB8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four unsigned 8-bit integer subtractions, halving the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li> +<li>the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li> +<li>the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li> +<li>the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] - val2[7:0] >> 1</div> +<div class="line">res[15:8] = val1[15:8] - val2[15:8] >> 1</div> +<div class="line">res[23:16] = val1[23:16] - val2[23:16] >> 1</div> +<div class="line">res[31:24] = val1[31:24] - val2[31:24] >> 1</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga9e2cc5117e79578a08b25f1e89022966"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UQADD16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two unsigned 16-bit integer additions, saturating the results to the 16-bit unsigned integer range 0 < x < 2<sup>16</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the addition of the low halfword in the first operand and the low halfword in the second operand, in the low halfword of the return value. </li> +<li>the addition of the high halfword in the first operand and the high halfword in the second operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 < x < 2<sup>16</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[15:0] </div> +<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gafa9af218db3934a692fb06fa728d8031"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UQADD8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four unsigned 8-bit integer additions, saturating the results to the 8-bit unsigned integer range 0 < x < 2<sup>8</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the halved addition of the first bytes in each operand, in the first byte of the return value. </li> +<li>the halved addition of the second bytes in each operand, in the second byte of the return value. </li> +<li>the halved addition of the third bytes in each operand, in the third byte of the return value. </li> +<li>the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The results are saturated to the 8-bit unsigned integer range 0 < x < 2<sup>8</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] + val2[7:0] </div> +<div class="line">res[15:8] = val1[15:8] + val2[15:8]</div> +<div class="line">res[23:16] = val1[23:16] + val2[23:16]</div> +<div class="line">res[31:24] = val1[31:24] + val2[31:24]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga5eff3ae5eabcd73f3049996ca391becb"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UQASX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer addition and one unsigned 16-bit subtraction, saturating the results to the 16-bit unsigned integer range 0 <= x <= 2<sup>16</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 <= x <= 2<sup>16</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[31:16]</div> +<div class="line">res[31:16] = val1[31:16] + val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gadecfdfabc328d8939d49d996f2fd4482"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UQSAX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer subtraction and one unsigned 16-bit addition, saturating the results to the 16-bit unsigned integer range 0 <= x <= 2<sup>16</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first 16-bit operand for the addition in the low halfword, and the first 16-bit operand for the subtraction in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second 16-bit halfword for the addition in the high halfword, and the second 16-bit halfword for the subtraction in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li> +<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value. </li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 <= x <= 2<sup>16</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[31:16]</div> +<div class="line">res[31:16] = val1[31:16] - val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga5ec4e2e231d15e5c692233feb3806187"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UQSUB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two unsigned 16-bit integer subtractions, saturating the results to the 16-bit unsigned integer range 0 < x < 2<sup>16</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit operands for each subtraction. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit operands for each subtraction.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 < x < 2<sup>16</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[15:0] </div> +<div class="line">res[31:16] = val1[31:16] - val2[31:16] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga9736fe816aec74fe886e7fb949734eab"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UQSUB8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four unsigned 8-bit integer subtractions, saturating the results to the 8-bit unsigned integer range 0 < x < 2<sup>8</sup> - 1.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li> +<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li> +<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li> +<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The results are saturated to the 8-bit unsigned integer range 0 < x < 2<sup>8</sup> - 1.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] - val2[7:0]</div> +<div class="line">res[15:8] = val1[15:8] - val2[15:8]</div> +<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div> +<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gac8855c07044239ea775c8128013204f0"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __USAD8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences together, returning the result as a single unsigned integer.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands for the subtractions. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands for the subtractions.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the first byte in the second operand from the first byte in the first operand. </li> +<li>the subtraction of the second byte in the second operand from the second byte in the first operand. </li> +<li>the subtraction of the third byte in the second operand from the third byte in the first operand. </li> +<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand. </li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>The sum is returned as a single unsigned integer.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">absdiff1 = val1[7:0] - val2[7:0]</div> +<div class="line">absdiff2 = val1[15:8] - val2[15:8]</div> +<div class="line">absdiff3 = val1[23:16] - val2[23:16]</div> +<div class="line">absdiff4 = val1[31:24] - val2[31:24]</div> +<div class="line">res[31:0] = absdiff1 + absdiff2 + absdiff3 + absdiff4</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gad032bd21f013c5d29f5fcb6b0f02bc3f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __USADA8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val3</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences to a 32-bit accumulate operand.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands for the subtractions. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands for the subtractions. </td></tr> + <tr><td class="paramname">val3</td><td>accumulation value.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the sum of the absolute differences of the following bytes, added to the accumulation value: <ul> +<li>the subtraction of the first byte in the second operand from the first byte in the first operand. </li> +<li>the subtraction of the second byte in the second operand from the second byte in the first operand. </li> +<li>the subtraction of the third byte in the second operand from the third byte in the first operand. </li> +<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">absdiff1 = val1[7:0] - val2[7:0]</div> +<div class="line">absdiff2 = val1[15:8] - val2[15:8]</div> +<div class="line">absdiff3 = val1[23:16] - val2[23:16]</div> +<div class="line">absdiff4 = val1[31:24] - val2[31:24]</div> +<div class="line">sum = absdiff1 + absdiff2 + absdiff3 + absdiff4</div> +<div class="line">res[31:0] = sum[31:0] + val3[31:0]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga967f516afff5900cf30f1a81907cdd89"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __USAT16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">const uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to saturate two signed 16-bit values to a selected unsigned range.<br/> + The Q bit is set if either operation saturates.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>two 16-bit values that are to be saturated. </td></tr> + <tr><td class="paramname">val2</td><td>bit position for saturation, and must be an integral constant expression in the range 0 to 15.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the saturation of the two signed 16-bit values, as non-negative values. <ul> +<li>the saturation of the low halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the low halfword of the return value. </li> +<li>the saturation of the high halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">Saturate halfwords in val1 to the <span class="keywordtype">unsigned</span> range specified by the bit position in val2</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga578a082747436772c482c96d7a58e45e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __USAX </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords.<br/> + The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr> + <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li> +<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value. </li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[15:0] >= 0x10000 then APSR.GE[1:0] = 11 else 00 </li> +<li>if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] + val2[31:16]</div> +<div class="line">res[31:16] = val1[31:16] - val2[15:0] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="ga9f2b77e11fc4a77b26c36c423ed45b4e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __USUB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform two 16-bit unsigned integer subtractions.<br/> + The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li> +<li>the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[15:0] >= 0 then APSR.GE[1:0] = 11 else 00 </li> +<li>if res[31:16] >= 0 then APSR.GE[3:2] = 11 else 00</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = val1[15:0] - val2[15:0] </div> +<div class="line">res[31:16] = val1[31:16] - val2[31:16] </div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gacb7257dc3b8e9acbd0ef0e31ff87d4b8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __USUB8 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to perform four 8-bit unsigned integer subtractions. The GE bits in the APSR are set according to the results.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr> + <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd><ul> +<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li> +<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li> +<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li> +<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl> +<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul> +<li>if res[8:0] >= 0 then APSR.GE[0] = 1 else 0 </li> +<li>if res[15:8] >= 0 then APSR.GE[1] = 1 else 0 </li> +<li>if res[23:16] >= 0 then APSR.GE[2] = 1 else 0 </li> +<li>if res[31:24] >= 0 then APSR.GE[3] = 1 else 0</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0] = val1[7:0] - val2[7:0]</div> +<div class="line">res[15:8] = val1[15:8] - val2[15:8]</div> +<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div> +<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gad25ce96db0f17096bbd815f4817faf09"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UXTAB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val1</em>, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val2</em> </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to extract two 8-bit values from one operand, zero-extend them to 16 bits each, and add the results to two 16-bit values from another operand.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val1</td><td>value added to the zero-extended to 16-bit values. </td></tr> + <tr><td class="paramname">val2</td><td>two 8-bit values to be extracted and zero-extended.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the 8-bit values in <em>val2</em>, zero-extended to 16-bit values and added to <em>val1</em>.</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = ZeroExt(val2[7:0] to 16 bits) + val1[15:0]</div> +<div class="line">res[31:16] = ZeroExt(val2[31:16] to 16 bits) + val1[31:16]</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +<a class="anchor" id="gab41d713653b16f8d9fef44d14e397228"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t __UXTB16 </td> + <td>(</td> + <td class="paramtype">uint32_t </td> + <td class="paramname"><em>val</em></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>This function enables you to extract two 8-bit values from an operand and zero-extend them to 16 bits each.</p> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">val</td><td>two 8-bit values in val[7:0] and val[23:16] to be sign-extended.</td></tr> + </table> + </dd> +</dl> +<dl class="section return"><dt>Returns</dt><dd>the 8-bit values zero-extended to 16-bit values. <ul> +<li>zero-extended value of val[7:0] in the low halfword of the return value. </li> +<li>zero-extended value of val[23:16] in the high halfword of the return value.</li> +</ul> +</dd></dl> +<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0] = ZeroExtended(val[7:0] )</div> +<div class="line">res[31:16] = ZeroExtended(val[23:16])</div> +</div><!-- fragment --> </dd></dl> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group__intrinsic___s_i_m_d__gr.js b/Documentation/Core/html/group__intrinsic___s_i_m_d__gr.js new file mode 100644 index 0000000..ef0bb50 --- /dev/null +++ b/Documentation/Core/html/group__intrinsic___s_i_m_d__gr.js @@ -0,0 +1,65 @@ +var group__intrinsic___s_i_m_d__gr = +[ + [ "__PKHBT", "group__intrinsic___s_i_m_d__gr.html#gaefb8ebf3a54e197464da1ff69a44f4b5", null ], + [ "__PKHTB", "group__intrinsic___s_i_m_d__gr.html#gafd8fe4a6d87e947caa81a69ec36c1666", null ], + [ "__QADD", "group__intrinsic___s_i_m_d__gr.html#ga17b873f246c9f5e9355760ffef3dad4a", null ], + [ "__QADD16", "group__intrinsic___s_i_m_d__gr.html#gae83a53ec04b496304bed6d9fe8f7461b", null ], + [ "__QADD8", "group__intrinsic___s_i_m_d__gr.html#gaf2f5a9132dcfc6d01d34cd971c425713", null ], + [ "__QASX", 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\ No newline at end of file diff --git a/Documentation/Core/html/group__peripheral__gr.html b/Documentation/Core/html/group__peripheral__gr.html new file mode 100644 index 0000000..fdd97e4 --- /dev/null +++ b/Documentation/Core/html/group__peripheral__gr.html @@ -0,0 +1,351 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Peripheral Access</title> +<title>CMSIS-CORE: Peripheral Access</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); 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Most of the rules also apply to the core peripherals. The <a class="el" href="device_h_pg.html">Device Header File <device.h></a> contains typically these definition and also includes the core specific header files.</p> +<p>Most of the definitions can be generated using the <a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a> System View Description for Peripherals. Refer to <a href="../../SVD/html/svd__s_v_d_conv_pg.html"><b>SVDConv.exe</b></a> for more information.</p> +<p>Each peripheral provides a data type definition with a name that is composed of:</p> +<ul> +<li>prefix <b><<em>device abbreviation></em>_</b></li> +<li><b><<em>peripheral name</em>></b></li> +<li>postfix <b>_Type</b> or <b>_TypeDef</b> to identify a type definition.</li> +</ul> +<p>Example: <b>LPC_UART_TypeDef</b> for the device <b>LPC</b> and the peripheral <b>UART</b>.</p> +<p>The data type definition uses standard C data types defined by the ANSI C header file <stdint.h>.</p> +<ul> +<li>IO Type Qualifiers are used to specify the access to peripheral variables. <table class="doxtable"> +<tr> +<th align="left">IO Type Qualifier </th><th align="left">Type </th><th align="left">Description</th></tr> +<tr> +<td align="left"><b>__IM</b> </td><td align="left">Struct member </td><td align="left">Defines 'read only' permissions </td></tr> +<tr> +<td align="left"><b>__OM</b> </td><td align="left">Struct member </td><td align="left">Defines 'write only' permissions </td></tr> +<tr> +<td align="left"><b>__IOM</b> </td><td align="left">Struct member </td><td align="left">Defines 'read / write' permissions </td></tr> +<tr> +<td align="left"><b>__I</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'read only' permissions </td></tr> +<tr> +<td align="left"><b>__O</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'write only' permissions </td></tr> +<tr> +<td align="left"><b>__IO</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'read / write' permissions </td></tr> +</table> +</li> +</ul> +<dl class="section note"><dt>Note</dt><dd><b>__IM</b>, <b>__OM</b>, <b>__IOM</b> are added in CMSIS-Core V4.20 to enhance support for C++. Prior version used <b>__I</b>, <b>__O</b>, <b>__IO</b> also for struct member definitions.</dd></dl> +<p>The typedef <b><<em>device abbreviation</em>>_UART_TypeDef</b> shown below defines the generic register layout for all UART channels in a device.</p> +<div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">struct</span></div> +<div class="line">{</div> +<div class="line"> <span class="keyword">union </span>{</div> +<div class="line"> __IM uint8_t RBR; <span class="comment">/* Offset: 0x000 (R/ ) Receiver Buffer Register */</span></div> +<div class="line"> __OM uint8_t THR; <span class="comment">/* Offset: 0x000 ( /W) Transmit Holding Register */</span></div> +<div class="line"> __IOM uint8_t DLL; <span class="comment">/* Offset: 0x000 (R/W) Divisor Latch LSB */</span></div> +<div class="line"> uint32_t RESERVED0;</div> +<div class="line"> };</div> +<div class="line"> <span class="keyword">union </span>{</div> +<div class="line"> __IOM uint8_t DLM; <span class="comment">/* Offset: 0x004 (R/W) Divisor Latch MSB */</span></div> +<div class="line"> __IOM uint32_t IER; <span class="comment">/* Offset: 0x004 (R/W) Interrupt Enable Register */</span></div> +<div class="line"> };</div> +<div class="line"> <span class="keyword">union </span>{</div> +<div class="line"> __IM uint32_t IIR; <span class="comment">/* Offset: 0x008 (R/ ) Interrupt ID Register */</span></div> +<div class="line"> __OM uint8_t FCR; <span class="comment">/* Offset: 0x008 ( /W) FIFO Control Register */</span></div> +<div class="line"> };</div> +<div class="line"> __IOM uint8_t LCR; <span class="comment">/* Offset: 0x00C (R/W) Line Control Register */</span></div> +<div class="line"> uint8_t RESERVED1[7];</div> +<div class="line"> __IM uint8_t LSR; <span class="comment">/* Offset: 0x014 (R/ ) Line Status Register */</span></div> +<div class="line"> uint8_t RESERVED2[7];</div> +<div class="line"> __IOM uint8_t SCR; <span class="comment">/* Offset: 0x01C (R/W) Scratch Pad Register */</span></div> +<div class="line"> uint8_t RESERVED3[3];</div> +<div class="line"> __IOM uint32_t ACR; <span class="comment">/* Offset: 0x020 (R/W) Autobaud Control Register */</span></div> +<div class="line"> __IOM uint8_t ICR; <span class="comment">/* Offset: 0x024 (R/W) IrDA Control Register */</span></div> +<div class="line"> uint8_t RESERVED4[3];</div> +<div class="line"> __IOM uint8_t FDR; <span class="comment">/* Offset: 0x028 (R/W) Fractional Divider Register */</span></div> +<div class="line"> uint8_t RESERVED5[7];</div> +<div class="line"> __IOM uint8_t TER; <span class="comment">/* Offset: 0x030 (R/W) Transmit Enable Register */</span></div> +<div class="line"> uint8_t RESERVED6[39];</div> +<div class="line"> __IM uint8_t FIFOLVL; <span class="comment">/* Offset: 0x058 (R/ ) FIFO Level Register */</span></div> +<div class="line">} LPC_UART_TypeDef;</div> +</div><!-- fragment --><p>To access the registers of the UART defined above, pointers to this register structure are defined. If more instances of a peripheral exist, the variables have a postfix (digit or letter) that identifies the peripheral.</p> +<p><b>Example:</b> In this example <b>LPC_UART2</b> and <b>LPC_UART3</b> are two pointers to UARTs defined with above register structure. <br/> + </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )</span></div> +<div class="line"><span class="preprocessor">#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )</span></div> +</div><!-- fragment --><p>The registers in the various UARTs can now be referred in the user code as shown below:<br/> + </p> +<div class="fragment"><div class="line">val = LPC_UART2->DR <span class="comment">// is the data register of UART1.</span></div> +</div><!-- fragment --><hr/> +<h1><a class="anchor" id="core_cmsis_pal_min_reqs"></a> +Minimal Requirements</h1> +<p>To access the peripheral registers and related function in a device, the files <b><em>device.h</em></b> and <b>core_cm<em>#</em>.h</b> define as a minimum: <br/> +<br/> +</p> +<ul> +<li>The <b>Register Layout Typedef</b> for each peripheral that defines all register names. RESERVED is used to introduce space into the structure for adjusting the addresses of the peripheral registers. <br/> +<br/> + <b>Example:</b> <div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">struct</span></div> +<div class="line">{</div> +<div class="line"> __IOM uint32_t CTRL; <span class="comment">/* Offset: 0x000 (R/W) SysTick Control and Status Register */</span></div> +<div class="line"> __IOM uint32_t LOAD; <span class="comment">/* Offset: 0x004 (R/W) SysTick Reload Value Register */</span></div> +<div class="line"> __IOM uint32_t VAL; <span class="comment">/* Offset: 0x008 (R/W) SysTick Current Value Register */</span></div> +<div class="line"> __IM uint32_t CALIB; <span class="comment">/* Offset: 0x00C (R/ ) SysTick Calibration Register */</span></div> +<div class="line">} <a class="code" href="struct_sys_tick___type.html" title="Structure type to access the System Timer (SysTick).">SysTick_Type</a>;</div> +</div><!-- fragment --></li> +</ul> +<ul> +<li><b>Base Address</b> for each peripheral (in case of multiple peripherals that use the same <b>register layout typedef</b> multiple base addresses are defined). <br/> +<br/> + <b>Example:</b> <div class="fragment"><div class="line"><span class="preprocessor">#define SysTick_BASE (SCS_BASE + 0x0010) </span><span class="comment">/* SysTick Base Address */</span><span class="preprocessor"></span></div> +</div><!-- fragment --></li> +</ul> +<ul> +<li><b>Access Definitions</b> for each peripheral. In case of multiple peripherals that are using the same <b>register layout typdef</b>, multiple access definitions exist (LPC_UART0, LPC_UART2). <br/> +<br/> + <b>Example:</b> <div class="fragment"><div class="line"><span class="preprocessor">#define SysTick ((SysTick_Type *) Systick_BASE) </span><span class="comment">/* SysTick access definition */</span><span class="preprocessor"></span></div> +</div><!-- fragment --></li> +</ul> +<p>These definitions allow accessing peripheral registers with simple assignments.</p> +<ul> +<li><b>Example:</b> <br/> + <div class="fragment"><div class="line">SysTick->CTRL = 0;</div> +</div><!-- fragment --></li> +</ul> +<hr/> +<h1><a class="anchor" id="core_cmsis_pal_opts"></a> +Optional Features</h1> +<p>Optionally, the file <b><em>device</em>.h</b> may define:</p> +<ul> +<li><a class="el" href="group__peripheral__gr.html#core_cmsis_pal_bitfields">Register Bit Fields</a> and #define constants that simplify access to peripheral registers. These constants may define bit-positions or other specific patterns that are required for programming peripheral registers. The identifiers should start with <b><<em>device abbreviation</em>>_</b> and <b><<em>peripheral name</em>>_</b>. It is recommended to use CAPITAL letters for #define constants.</li> +</ul> +<ul> +<li>More complex functions (i.e. status query before a sending register is accessed). Again, these functions start with <b><<em>device abbreviation</em>>_</b> and <b><<em>peripheral name</em>>_</b>.</li> +</ul> +<hr/> +<h1><a class="anchor" id="core_cmsis_pal_bitfields"></a> +Register Bit Fields</h1> +<p>For Core Register, macros define the position and the mask value for a bit field. It is recommended to create such definitions also for other peripheral registers.</p> +<p><b>Example:</b></p> +<p>Bit field definitions for register CPUID in SCB (System Control Block).</p> +<div class="fragment"><div class="line"><span class="comment">/* SCB CPUID Register Definitions */</span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Pos 24U </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_VARIANT_Pos 20U </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Pos 16U </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_PARTNO_Pos 4U </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_REVISION_Pos 0U </span></div> +<div class="line"><span class="preprocessor">#define SCB_CPUID_REVISION_Msk (0xFUL </span><span class="comment">/*<< SCB_CPUID_REVISION_Pos*/</span><span class="preprocessor">) </span></div> +</div><!-- fragment --><p>The macros <b><a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e" title="Mask and shift a bit field value for assigning to result to a peripheral register.">_VAL2FLD(field, value)</a></b> and <b><a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444" title="Extract from a peripheral register value the a bit field value.">_FLD2VAL(field, value)</a></b> enable access to bit fields. </p> +<h2 class="groupheader">Macro Definition Documentation</h2> +<a class="anchor" id="ga139b6e261c981f014f386927ca4a8444"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">#define _FLD2VAL</td> + <td>(</td> + <td class="paramtype"> </td> + <td class="paramname">field, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype"> </td> + <td class="paramname">value </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">field</td><td>name of bit field. </td></tr> + <tr><td class="paramname">value</td><td>value of the register</td></tr> + </table> + </dd> +</dl> +<p>The macro <a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">_FLD2VAL</a> uses the #define's <em>_Pos</em> and <em>_Msk</em> of the related bit field to extract the value of a bit field from a register.</p> +<p><b>Example:</b> </p> +<div class="fragment"><div class="line"><span class="keywordtype">id</span> = = <a class="code" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444" title="Extract from a peripheral register value the a bit field value.">_FLD2VAL</a>(SCB_CPUID_REVISION, SCB->CPUID);</div> +</div><!-- fragment --> +</div> +</div> +<a class="anchor" id="ga286e3b913dbd236c7f48ea70c8821f4e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">#define _VAL2FLD</td> + <td>(</td> + <td class="paramtype"> </td> + <td class="paramname">field, </td> + </tr> + <tr> + <td class="paramkey"></td> + <td></td> + <td class="paramtype"> </td> + <td class="paramname">value </td> + </tr> + <tr> + <td></td> + <td>)</td> + <td></td><td></td> + </tr> + </table> +</div><div class="memdoc"> +<dl class="params"><dt>Parameters</dt><dd> + <table class="params"> + <tr><td class="paramname">field</td><td>name of bit field. </td></tr> + <tr><td class="paramname">value</td><td>value for the bit field.</td></tr> + </table> + </dd> +</dl> +<p>The macro <a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a> uses the #define's <em>_Pos</em> and <em>_Msk</em> of the related bit field to shift bit-field values for assigning to a register.</p> +<p><b>Example:</b> </p> +<div class="fragment"><div class="line">SCB->CPUID = <a class="code" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e" title="Mask and shift a bit field value for assigning to result to a peripheral register.">_VAL2FLD</a>(SCB_CPUID_REVISION, 0x3) | <a class="code" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e" title="Mask and shift a bit field value for assigning to result to a peripheral register.">_VAL2FLD</a>(SCB_CPUID_VARIANT, 0x3);</div> +</div><!-- fragment --> +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> 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+</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#func-members">Functions</a> | +<a href="#var-members">Variables</a> </div> + <div class="headertitle"> +<div class="title">System and Clock Configuration</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Describes system_<em>device</em>.c file that contains functions for system and clock setup. +<a href="#details">More...</a></p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a> +Functions</h2></td></tr> +<tr class="memitem:ga93f514700ccf00d08dbdcff7f1224eb2"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> (void)</td></tr> +<tr class="memdesc:ga93f514700ccf00d08dbdcff7f1224eb2"><td class="mdescLeft"> </td><td class="mdescRight">Function to Initialize the system. <a href="#ga93f514700ccf00d08dbdcff7f1224eb2"></a><br/></td></tr> +<tr class="separator:ga93f514700ccf00d08dbdcff7f1224eb2"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:gae0c36a9591fe6e9c45ecb21a794f0f0f"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a> (void)</td></tr> +<tr class="memdesc:gae0c36a9591fe6e9c45ecb21a794f0f0f"><td class="mdescLeft"> </td><td class="mdescRight">Function to update the variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>. <a href="#gae0c36a9591fe6e9c45ecb21a794f0f0f"></a><br/></td></tr> +<tr class="separator:gae0c36a9591fe6e9c45ecb21a794f0f0f"><td class="memSeparator" colspan="2"> </td></tr> +</table><table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a> +Variables</h2></td></tr> +<tr class="memitem:gaa3cd3e43291e81e795d642b79b6088e6"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a></td></tr> +<tr class="memdesc:gaa3cd3e43291e81e795d642b79b6088e6"><td class="mdescLeft"> </td><td class="mdescRight">Variable to hold the system core clock value. <a href="#gaa3cd3e43291e81e795d642b79b6088e6"></a><br/></td></tr> +<tr class="separator:gaa3cd3e43291e81e795d642b79b6088e6"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<a name="details" id="details"></a><h2 class="groupheader">Description</h2> +<p>ARM provides a template file <b>system_<em>device</em>.c</b> that must be adapted by the silicon vendor to match their actual device. As a <b>minimum requirement</b>, this file must provide:</p> +<ul> +<li>A device-specific system configuration function, <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit()</a>.</li> +<li>A global variable that contains the system frequency, <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>.</li> +</ul> +<p>The file configures the device and, typically, initializes the oscillator (PLL) that is part of the microcontroller device. This file might export other functions or variables that provide a more flexible configuration of the microcontroller system.</p> +<h1><a class="anchor" id="system_init_code_ex_sec"></a> +Code Example</h1> +<p>The code below shows the usage of the variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> and the functions <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system.">SystemInit()</a> and <a class="el" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f" title="Function to update the variable SystemCoreClock.">SystemCoreClockUpdate()</a> with an LPC1700.</p> +<div class="fragment"><div class="line"><span class="preprocessor">#include "LPC17xx.h"</span></div> +<div class="line"></div> +<div class="line">uint32_t coreClock_1 = 0; <span class="comment">/* Variables to store core clock values */</span></div> +<div class="line">uint32_t coreClock_2 = 0;</div> +<div class="line"></div> +<div class="line"></div> +<div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div> +<div class="line"></div> +<div class="line"> coreClock_1 = <a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6" title="Variable to hold the system core clock value.">SystemCoreClock</a>; <span class="comment">/* Store value of predefined SystemCoreClock */</span></div> +<div class="line"></div> +<div class="line"> <a class="code" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f" title="Function to update the variable SystemCoreClock.">SystemCoreClockUpdate</a>(); <span class="comment">/* Update SystemCoreClock according to register settings */</span></div> +<div class="line"></div> +<div class="line"> coreClock_2 = <a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6" title="Variable to hold the system core clock value.">SystemCoreClock</a>; <span class="comment">/* Store value of calculated SystemCoreClock */</span></div> +<div class="line"></div> +<div class="line"> <span class="keywordflow">if</span> (coreClock_2 != coreClock_1) { <span class="comment">/* Without changing the clock setting both core clock values should be the same */</span> </div> +<div class="line"> <span class="comment">// Error Handling</span></div> +<div class="line"> }</div> +<div class="line"></div> +<div class="line"> <span class="keywordflow">while</span>(1);</div> +<div class="line">}</div> +</div><!-- fragment --> <h2 class="groupheader">Function Documentation</h2> +<a class="anchor" id="gae0c36a9591fe6e9c45ecb21a794f0f0f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void SystemCoreClockUpdate </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Updates the variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> and must be called whenever the core clock is changed during program execution. The function evaluates the clock register settings and calculates the current core clock. </p> + +</div> +</div> +<a class="anchor" id="ga93f514700ccf00d08dbdcff7f1224eb2"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">void SystemInit </td> + <td>(</td> + <td class="paramtype">void </td> + <td class="paramname"></td><td>)</td> + <td></td> + </tr> + </table> +</div><div class="memdoc"> +<p>Initializes the microcontroller system. Typically, this function configures the oscillator (PLL) that is part of the microcontroller device. For systems with a variable clock speed, it updates the variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>. SystemInit is called from the file <b>startup<em>_device</em></b>. </p> + +</div> +</div> +<h2 class="groupheader">Variable Documentation</h2> +<a class="anchor" id="gaa3cd3e43291e81e795d642b79b6088e6"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t SystemCoreClock</td> + </tr> + </table> +</div><div class="memdoc"> +<p>Holds the system core clock, which is the system clock frequency supplied to the SysTick timer and the processor core clock. This variable can be used by debuggers to query the frequency of the debug timer or to configure the trace clock speed.</p> +<dl class="section attention"><dt>Attention</dt><dd>Compilers must be configured to avoid removing this variable in case the application program is not using it. Debugging systems require the variable to be physically present in memory so that it can be examined to configure the debugger. </dd></dl> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/group__system__init__gr.js b/Documentation/Core/html/group__system__init__gr.js new file mode 100644 index 0000000..1ed21ea --- /dev/null +++ b/Documentation/Core/html/group__system__init__gr.js @@ -0,0 +1,6 @@ +var group__system__init__gr = +[ + [ "SystemCoreClockUpdate", "group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f", null ], + [ "SystemInit", "group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2", null ], + [ "SystemCoreClock", "group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6", null ] +];
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In detail it defines:</p> +<ul> +<li><b>Hardware Abstraction Layer (HAL)</b> for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.</li> +<li><b>System exception names</b> to interface to system exceptions without having compatibility issues.</li> +<li><b>Methods to organize header files</b> that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.</li> +<li><b>Methods for system initialization</b> to be used by each MCU vendor. For example, the standardized <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system.">SystemInit()</a> function is essential for configuring the clock system of the device.</li> +<li><b>Intrinsic functions</b> used to generate CPU instructions that are not supported by standard C functions.</li> +<li>A variable to determine the <b>system clock frequency</b> which simplifies the setup the SysTick timer.</li> +</ul> +<p>The following sections provide details about the CMSIS-CORE:</p> +<ul> +<li><a class="el" href="_using_pg.html">Using CMSIS in Embedded Applications</a> describes the project setup and shows a simple program example.</li> +<li><a class="el" href="_templates_pg.html">Template Files</a> describes the files of the CMSIS-CORE in detail and explains how to adapt template files provided by ARM to silicon vendor devices.</li> +<li><a class="el" href="_c_o_r_e__m_i_s_r_a__exceptions_pg.html">MISRA-C:2004 Compliance Exceptions</a> describes the violations to the MISRA standard.</li> +<li><a href="Modules.html"><b>Reference</b> </a> describe the features and functions of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> in detail.</li> +<li><a href="Annotated.html"><b>Data</b> <b>Structures</b> </a> describe the data structures of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> in detail.</li> +</ul> +<hr/> +<h2>CMSIS-CORE in ARM::CMSIS Pack</h2> +<p>Files relevant to CMSIS-CORE are present in the following <b>ARM::CMSIS</b> directories: </p> +<table class="doxtable"> +<tr> +<th>File/Folder </th><th>Content </th></tr> +<tr> +<td><b>CMSIS\Documentation\Core</b> </td><td>This documentation </td></tr> +<tr> +<td><b>CMSIS\Include</b> </td><td>CMSIS-CORE header files (for example core_cm3.h, core_cmInstr.h, etc.) </td></tr> +<tr> +<td><b>Device</b> </td><td><a class="el" href="_using__a_r_m_pg.html">ARM reference implementations</a> of Cortex-M devices </td></tr> +<tr> +<td><b>Device\_Template_Vendor</b> </td><td><a class="el" href="_templates_pg.html">Template Files</a> for extension by silicon vendors </td></tr> +</table> +<hr/> +<h1><a class="anchor" id="ref_man_sec"></a> +Cortex-M Reference Manuals</h1> +<p>The Cortex-M Reference Manuals are generic user guides for devices that implement the various ARM Cortex-M processors. These manuals contain the programmers model and detailed information about the core peripherals.</p> +<ul> +<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/DUI0497A_cortex_m0_r0p0_generic_ug.pdf" target="_blank"><b>Cortex-M0 Devices Generic User Guide</b></a></li> +<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/DUI0662B_cortex_m0p_r0p1_dgug.pdf" target="_blank"><b>Cortex-M0+ Devices Generic User Guide</b></a></li> +<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/DUI0552A_cortex_m3_dgug.pdf" target="_blank"><b>Cortex-M3 Devices Generic User Guide</b></a></li> +<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf" target="_blank"><b>Cortex-M4 Devices Generic User Guide</b></a></li> +<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646a/DUI0646A_cortex_m7_dgug.pdf" target="_blank"><b>Cortex-M7 Devices Generic User Guide</b></a></li> +</ul> +<hr/> +<h1><a class="anchor" id="tested_tools_sec"></a> +Tested and Verified Toolchains</h1> +<p>The CMSIS-CORE <a class="el" href="_templates_pg.html">Template Files</a> supplied by ARM have been tested and verified with the following toolchains:</p> +<ul> +<li>ARM: MDK-ARM Version 5.16</li> +<li>GNU: GNU Tools ARM Embedded 4.9 2015.q2</li> +<li>IAR: IAR Embedded Workbench Kickstart Edition V6.10</li> +</ul> +<hr/> + </div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. 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a(j){j=j||location.href;return"#"+j.replace(/^[^#]*#?(.*)$/,"$1")}$.fn[c]=function(j){return j?this.bind(c,j):this.trigger(c)};$.fn[c].delay=50;g[c]=$.extend(g[c],{setup:function(){if(d){return false}$(f.start)},teardown:function(){if(d){return false}$(f.stop)}});f=(function(){var j={},p,m=a(),k=function(q){return q},l=k,o=k;j.start=function(){p||n()};j.stop=function(){p&&clearTimeout(p);p=b};function n(){var r=a(),q=o(m);if(r!==m){l(m=r,q);$(e).trigger(c)}else{if(q!==m){location.href=location.href.replace(/#.*/,"")+q}}p=setTimeout(n,$.fn[c].delay)}$.browser.msie&&!d&&(function(){var q,r;j.start=function(){if(!q){r=$.fn[c].src;r=r&&r+a();q=$('<iframe tabindex="-1" title="empty"/>').hide().one("load",function(){r||l(a());n()}).attr("src",r||"javascript:0").insertAfter("body")[0].contentWindow;h.onpropertychange=function(){try{if(event.propertyName==="title"){q.document.title=h.title}}catch(s){}}}};j.stop=k;o=function(){return a(q.location.href)};l=function(v,s){var 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d.browser.safari||e.compatMode=='BackCompat'?e.body:e.documentElement})};d.fn.scrollTo=function(n,j,b){if(typeof j=='object'){b=j;j=0}if(typeof b=='function')b={onAfter:b};if(n=='max')n=9e9;b=d.extend({},k.defaults,b);j=j||b.speed||b.duration;b.queue=b.queue&&b.axis.length>1;if(b.queue)j/=2;b.offset=p(b.offset);b.over=p(b.over);return this._scrollable().each(function(){var q=this,r=d(q),f=n,s,g={},u=r.is('html,body');switch(typeof f){case'number':case'string':if(/^([+-]=)?\d+(\.\d+)?(px|%)?$/.test(f)){f=p(f);break}f=d(f,this);case'object':if(f.is||f.style)s=(f=d(f)).offset()}d.each(b.axis.split(''),function(a,i){var e=i=='x'?'Left':'Top',h=e.toLowerCase(),c='scroll'+e,l=q[c],m=k.max(q,i);if(s){g[c]=s[h]+(u?0:l-r.offset()[h]);if(b.margin){g[c]-=parseInt(f.css('margin'+e))||0;g[c]-=parseInt(f.css('border'+e+'Width'))||0}g[c]+=b.offset[h]||0;if(b.over[h])g[c]+=f[i=='x'?'width':'height']()*b.over[h]}else{var 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content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>Reference</title> +<title>CMSIS-CORE: Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +<link href="stylsheetf" rel="stylesheet" type="text/css" /> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-CORE +  <span id="projectnumber">Version 4.30</span> + </div> + <div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li class="current"><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('modules.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Reference</div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock">Here is a list of all modules:</div><div class="directory"> +<div class="levels">[detail level <span onclick="javascript:toggleLevel(1);">1</span><span onclick="javascript:toggleLevel(2);">2</span>]</div><table class="directory"> +<tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__peripheral__gr.html" target="_self">Peripheral Access</a></td><td class="desc">Describes naming conventions, requirements, and optional features for accessing peripherals</td></tr> +<tr id="row_1_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__system__init__gr.html" target="_self">System and Clock Configuration</a></td><td class="desc">Describes system_<em>device</em>.c file that contains functions for system and clock setup</td></tr> +<tr id="row_2_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group___n_v_i_c__gr.html" target="_self">Interrupts and Exceptions (NVIC)</a></td><td class="desc">Explains how to use interrupts and exceptions and access functions for the Nested Vector Interrupt Controller (NVIC)</td></tr> +<tr id="row_3_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group___core___register__gr.html" target="_self">Core Register Access</a></td><td class="desc">Functions to access the Cortex-M core registers</td></tr> +<tr id="row_4_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__intrinsic___c_p_u__gr.html" target="_self">Intrinsic Functions for CPU Instructions</a></td><td class="desc">Functions that generate specific Cortex-M CPU Instructions</td></tr> +<tr id="row_5_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__intrinsic___s_i_m_d__gr.html" target="_self">Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]</a></td><td class="desc">Access to dedicated SIMD instructions</td></tr> +<tr id="row_6_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group___sys_tick__gr.html" target="_self">Systick Timer (SYSTICK)</a></td><td class="desc">Initialize and start the SysTick timer</td></tr> +<tr id="row_7_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group___i_t_m___debug__gr.html" target="_self">Debug Access</a></td><td class="desc">Debug Access to the Instrumented Trace Macrocell (ITM)</td></tr> +<tr id="row_8_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__fpu__functions__m7.html" target="_self">FPU Functions (only Cortex-M7)</a></td><td class="desc">Functions that relate to the Floating-Point Arithmetic Unit</td></tr> +<tr id="row_9_"><td class="entry"><img id="arr_9_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('9_')"/><a class="el" href="group__cache__functions__m7.html" target="_self">Cache Functions (only Cortex-M7)</a></td><td class="desc">Functions for Instruction and Data Cache</td></tr> +<tr id="row_9_0_" class="even"><td class="entry"><img src="ftv2blank.png" alt=" " width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group___icache__functions__m7.html" target="_self">I-Cache Functions</a></td><td class="desc">Functions for the instruction cache</td></tr> +<tr id="row_9_1_"><td class="entry"><img src="ftv2blank.png" alt=" " width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group___dcache__functions__m7.html" target="_self">D-Cache Functions</a></td><td class="desc">Functions for the data cache</td></tr> +</table> +</div><!-- directory --> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/modules.js b/Documentation/Core/html/modules.js new file mode 100644 index 0000000..16d8338 --- /dev/null +++ b/Documentation/Core/html/modules.js @@ -0,0 +1,13 @@ +var modules = +[ + [ "Peripheral Access", "group__peripheral__gr.html", "group__peripheral__gr" ], + [ "System and Clock Configuration", "group__system__init__gr.html", "group__system__init__gr" ], + [ "Interrupts and Exceptions (NVIC)", "group___n_v_i_c__gr.html", "group___n_v_i_c__gr" ], + [ "Core Register Access", "group___core___register__gr.html", "group___core___register__gr" ], + [ "Intrinsic Functions for CPU Instructions", "group__intrinsic___c_p_u__gr.html", "group__intrinsic___c_p_u__gr" ], + [ "Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]", "group__intrinsic___s_i_m_d__gr.html", "group__intrinsic___s_i_m_d__gr" ], + [ "Systick Timer (SYSTICK)", "group___sys_tick__gr.html", "group___sys_tick__gr" ], + [ "Debug Access", "group___i_t_m___debug__gr.html", "group___i_t_m___debug__gr" ], + [ "FPU Functions (only Cortex-M7)", "group__fpu__functions__m7.html", "group__fpu__functions__m7" ], + [ "Cache Functions (only Cortex-M7)", "group__cache__functions__m7.html", "group__cache__functions__m7" ] +];
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headerHeight - footerHeight; + (function (){ // retry until we can scroll to the selected item + try { + var navtree=$('#nav-tree'); + navtree.scrollTo('#selected',0,{offset:-windowHeight/2}); + } catch (err) { + setTimeout(arguments.callee, 0); + } + })(); +} + +function expandNode(o, node, imm, showRoot) +{ + if (node.childrenData && !node.expanded) { + if (typeof(node.childrenData)==='string') { + var varName = node.childrenData; + getScript(node.relpath+varName,function(){ + node.childrenData = getData(varName); + expandNode(o, node, imm, showRoot); + }, showRoot); + } else { + if (!node.childrenVisited) { + getNode(o, node); + } if (imm || ($.browser.msie && $.browser.version>8)) { + // somehow slideDown jumps to the start of tree for IE9 :-( + $(node.getChildrenUL()).show(); + } else { + $(node.getChildrenUL()).slideDown("fast"); + } + if (node.isLast) { + node.plus_img.src = node.relpath+"ftv2mlastnode.png"; + } else { + node.plus_img.src = node.relpath+"ftv2mnode.png"; + } + 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link=stripPath($(location).attr('pathname'))+':'+hash.substring(1); + a=$('.item a[class$="'+link+'"]'); + } + if (a && a.length) { + a.parent().parent().addClass('selected'); + a.parent().parent().attr('id','selected'); + highlightAnchor(); + } else if (n) { + $(n.itemDiv).addClass('selected'); + $(n.itemDiv).attr('id','selected'); + } + showRoot(); +} + +function showNode(o, node, index, hash) +{ + if (node && node.childrenData) { + if (typeof(node.childrenData)==='string') { + var varName = node.childrenData; + getScript(node.relpath+varName,function(){ + node.childrenData = getData(varName); + showNode(o,node,index,hash); + },true); + } else { + if (!node.childrenVisited) { + getNode(o, node); + } + $(node.getChildrenUL()).show(); + if (node.isLast) { + node.plus_img.src = node.relpath+"ftv2mlastnode.png"; + } else { + node.plus_img.src = node.relpath+"ftv2mnode.png"; + } + node.expanded = true; + var n = node.children[o.breadcrumbs[index]]; + if (index+1<o.breadcrumbs.length) { + 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content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="classes_66.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/classes_66.js b/Documentation/Core/html/search/classes_66.js new file mode 100644 index 0000000..f77ca13 --- /dev/null +++ b/Documentation/Core/html/search/classes_66.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['fpu_5ftype',['FPU_Type',['../struct_f_p_u___type.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/classes_69.html b/Documentation/Core/html/search/classes_69.html new file mode 100644 index 0000000..961dbea --- /dev/null +++ b/Documentation/Core/html/search/classes_69.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="classes_69.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/classes_69.js b/Documentation/Core/html/search/classes_69.js new file mode 100644 index 0000000..a639ed9 --- /dev/null +++ b/Documentation/Core/html/search/classes_69.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['ipsr_5ftype',['IPSR_Type',['../union_i_p_s_r___type.html',1,'']]], + ['itm_5ftype',['ITM_Type',['../struct_i_t_m___type.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/classes_6d.html b/Documentation/Core/html/search/classes_6d.html new file mode 100644 index 0000000..abe6f0d --- /dev/null +++ b/Documentation/Core/html/search/classes_6d.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="classes_6d.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> 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+<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/classes_6e.js b/Documentation/Core/html/search/classes_6e.js new file mode 100644 index 0000000..295c3af --- /dev/null +++ b/Documentation/Core/html/search/classes_6e.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['nvic_5ftype',['NVIC_Type',['../struct_n_v_i_c___type.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/classes_73.html b/Documentation/Core/html/search/classes_73.html new file mode 100644 index 0000000..a1bf0b9 --- /dev/null +++ b/Documentation/Core/html/search/classes_73.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="classes_73.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/classes_73.js b/Documentation/Core/html/search/classes_73.js new file mode 100644 index 0000000..24ac519 --- /dev/null +++ b/Documentation/Core/html/search/classes_73.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['scb_5ftype',['SCB_Type',['../struct_s_c_b___type.html',1,'']]], + ['scnscb_5ftype',['SCnSCB_Type',['../struct_s_cn_s_c_b___type.html',1,'']]], + ['systick_5ftype',['SysTick_Type',['../struct_sys_tick___type.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/classes_74.html b/Documentation/Core/html/search/classes_74.html new file mode 100644 index 0000000..f7f27ce --- /dev/null +++ b/Documentation/Core/html/search/classes_74.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="classes_74.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/classes_74.js b/Documentation/Core/html/search/classes_74.js new file mode 100644 index 0000000..1e04b5d --- /dev/null +++ b/Documentation/Core/html/search/classes_74.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['tpi_5ftype',['TPI_Type',['../struct_t_p_i___type.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/classes_78.html b/Documentation/Core/html/search/classes_78.html new file mode 100644 index 0000000..dfce8ec --- /dev/null +++ b/Documentation/Core/html/search/classes_78.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="classes_78.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/classes_78.js b/Documentation/Core/html/search/classes_78.js new file mode 100644 index 0000000..0167f51 --- /dev/null +++ b/Documentation/Core/html/search/classes_78.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['xpsr_5ftype',['xPSR_Type',['../unionx_p_s_r___type.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/close.png b/Documentation/Core/html/search/close.png Binary files differnew file mode 100644 index 0000000..9342d3d --- /dev/null +++ b/Documentation/Core/html/search/close.png diff --git a/Documentation/Core/html/search/enums_69.html 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content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="enumvalues_62.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/enumvalues_62.js b/Documentation/Core/html/search/enumvalues_62.js new file mode 100644 index 0000000..eb1ab56 --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_62.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['busfault_5firqn',['BusFault_IRQn',['../group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af',1,'Ref_NVIC.txt']]] +]; diff --git a/Documentation/Core/html/search/enumvalues_64.html b/Documentation/Core/html/search/enumvalues_64.html new file mode 100644 index 0000000..2cae30b --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_64.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="enumvalues_64.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/enumvalues_64.js b/Documentation/Core/html/search/enumvalues_64.js new file mode 100644 index 0000000..a18acaa --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_64.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['debugmonitor_5firqn',['DebugMonitor_IRQn',['../group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c',1,'Ref_NVIC.txt']]] +]; diff --git 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"http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="enumvalues_6d.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/enumvalues_6d.js b/Documentation/Core/html/search/enumvalues_6d.js new file mode 100644 index 0000000..cd9f6ba --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_6d.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['memorymanagement_5firqn',['MemoryManagement_IRQn',['../group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa',1,'Ref_NVIC.txt']]] +]; diff --git a/Documentation/Core/html/search/enumvalues_6e.html b/Documentation/Core/html/search/enumvalues_6e.html new file mode 100644 index 0000000..3c41b09 --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_6e.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="enumvalues_6e.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/enumvalues_6e.js b/Documentation/Core/html/search/enumvalues_6e.js new file mode 100644 index 0000000..05bc07e --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_6e.js @@ -0,0 +1,4 @@ +var searchData= +[ + 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+createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/enumvalues_70.js b/Documentation/Core/html/search/enumvalues_70.js new file mode 100644 index 0000000..f20d630 --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_70.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['pendsv_5firqn',['PendSV_IRQn',['../group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2',1,'Ref_NVIC.txt']]], + ['pvd_5fstm_5firqn',['PVD_STM_IRQn',['../group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86',1,'Ref_NVIC.txt']]] +]; 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type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/enumvalues_73.js b/Documentation/Core/html/search/enumvalues_73.js new file mode 100644 index 0000000..f1c4dd0 --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_73.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['svcall_5firqn',['SVCall_IRQn',['../group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237',1,'Ref_NVIC.txt']]], + ['systick_5firqn',['SysTick_IRQn',['../group___n_v_i_c__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7',1,'Ref_NVIC.txt']]] +]; diff --git a/Documentation/Core/html/search/enumvalues_75.html b/Documentation/Core/html/search/enumvalues_75.html new file mode 100644 index 0000000..c0a1504 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rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="enumvalues_77.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/enumvalues_77.js b/Documentation/Core/html/search/enumvalues_77.js new file mode 100644 index 0000000..4b97a00 --- /dev/null +++ b/Documentation/Core/html/search/enumvalues_77.js @@ -0,0 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--- /dev/null +++ b/Documentation/Core/html/search/files_72.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="files_72.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new 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id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/groups_73.js b/Documentation/Core/html/search/groups_73.js new file mode 100644 index 0000000..e5758ab --- /dev/null +++ b/Documentation/Core/html/search/groups_73.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['system_20and_20clock_20configuration',['System and Clock Configuration',['../group__system__init__gr.html',1,'']]], + ['systick_20timer_20_28systick_29',['Systick Timer (SYSTICK)',['../group___sys_tick__gr.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/mag_sel.png b/Documentation/Core/html/search/mag_sel.png Binary files differnew file mode 100644 index 0000000..81f6040 --- /dev/null +++ b/Documentation/Core/html/search/mag_sel.png diff --git a/Documentation/Core/html/search/nomatches.html b/Documentation/Core/html/search/nomatches.html new file mode 100644 index 0000000..b1ded27 --- /dev/null +++ b/Documentation/Core/html/search/nomatches.html @@ -0,0 +1,12 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="NoMatches">No Matches</div> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_62.html b/Documentation/Core/html/search/pages_62.html new file mode 100644 index 0000000..d777475 --- /dev/null +++ b/Documentation/Core/html/search/pages_62.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_62.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_62.js b/Documentation/Core/html/search/pages_62.js new file mode 100644 index 0000000..c696ece --- /dev/null +++ b/Documentation/Core/html/search/pages_62.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['basic_20cmsis_20example',['Basic CMSIS Example',['../_using__c_m_s_i_s.html',1,'Using_pg']]] +]; diff --git a/Documentation/Core/html/search/pages_64.html b/Documentation/Core/html/search/pages_64.html new file mode 100644 index 0000000..f416a91 --- /dev/null +++ b/Documentation/Core/html/search/pages_64.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_64.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_64.js b/Documentation/Core/html/search/pages_64.js new file mode 100644 index 0000000..538e9d3 --- /dev/null +++ b/Documentation/Core/html/search/pages_64.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['device_20header_20file_20_3cdevice_2eh_3e',['Device Header File <device.h>',['../device_h_pg.html',1,'Templates_pg']]] +]; diff --git a/Documentation/Core/html/search/pages_6d.html b/Documentation/Core/html/search/pages_6d.html new file mode 100644 index 0000000..958ccc6 --- /dev/null +++ b/Documentation/Core/html/search/pages_6d.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_6d.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_6d.js b/Documentation/Core/html/search/pages_6d.js new file mode 100644 index 0000000..84ebce3 --- /dev/null +++ b/Documentation/Core/html/search/pages_6d.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['misra_2dc_3a2004_20compliance_20exceptions',['MISRA-C:2004 Compliance Exceptions',['../_c_o_r_e__m_i_s_r_a__exceptions_pg.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/pages_6f.html b/Documentation/Core/html/search/pages_6f.html new file mode 100644 index 0000000..9c79c3f --- /dev/null +++ b/Documentation/Core/html/search/pages_6f.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_6f.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_6f.js b/Documentation/Core/html/search/pages_6f.js new file mode 100644 index 0000000..277cca0 --- /dev/null +++ b/Documentation/Core/html/search/pages_6f.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['overview',['Overview',['../index.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/pages_72.html b/Documentation/Core/html/search/pages_72.html new file mode 100644 index 0000000..ee0d002 --- /dev/null +++ b/Documentation/Core/html/search/pages_72.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_72.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_72.js b/Documentation/Core/html/search/pages_72.js new file mode 100644 index 0000000..2abc5dc --- /dev/null +++ b/Documentation/Core/html/search/pages_72.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['revision_20history_20of_20cmsis_2dcore',['Revision History of CMSIS-CORE',['../core_revision_history.html',1,'']]], + ['register_20mapping',['Register Mapping',['../_reg_map_pg.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/pages_73.html b/Documentation/Core/html/search/pages_73.html new file mode 100644 index 0000000..ba42c50 --- /dev/null +++ b/Documentation/Core/html/search/pages_73.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_73.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_73.js b/Documentation/Core/html/search/pages_73.js new file mode 100644 index 0000000..85147d5 --- /dev/null +++ b/Documentation/Core/html/search/pages_73.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['startup_20file_20startup_5f_3cdevice_3e_2es',['Startup File startup_<device>.s',['../startup_s_pg.html',1,'Templates_pg']]], + ['system_20configuration_20files_20system_5f_3cdevice_3e_2ec_20and_20system_5f_3cdevice_3e_2eh',['System Configuration Files system_<device>.c and system_<device>.h',['../system_c_pg.html',1,'Templates_pg']]] +]; diff --git a/Documentation/Core/html/search/pages_74.html b/Documentation/Core/html/search/pages_74.html new file mode 100644 index 0000000..bbff83e --- /dev/null +++ b/Documentation/Core/html/search/pages_74.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_74.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_74.js b/Documentation/Core/html/search/pages_74.js new file mode 100644 index 0000000..abdc31d --- /dev/null +++ b/Documentation/Core/html/search/pages_74.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['template_20files',['Template Files',['../_templates_pg.html',1,'']]] +]; diff --git a/Documentation/Core/html/search/pages_75.html b/Documentation/Core/html/search/pages_75.html new file mode 100644 index 0000000..25bde52 --- /dev/null +++ b/Documentation/Core/html/search/pages_75.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="pages_75.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/pages_75.js b/Documentation/Core/html/search/pages_75.js new file mode 100644 index 0000000..6a7b878 --- /dev/null +++ b/Documentation/Core/html/search/pages_75.js @@ -0,0 +1,6 @@ +var searchData= +[ + ['using_20cmsis_20with_20generic_20arm_20processors',['Using CMSIS with generic ARM Processors',['../_using__a_r_m_pg.html',1,'Using_pg']]], + ['using_20cmsis_20in_20embedded_20applications',['Using CMSIS in Embedded Applications',['../_using_pg.html',1,'']]], + ['using_20interrupt_20vector_20remap',['Using Interrupt Vector Remap',['../_using__v_t_o_r_pg.html',1,'Using_pg']]] +]; diff --git a/Documentation/Core/html/search/search.css b/Documentation/Core/html/search/search.css new file mode 100644 index 0000000..1746d13 --- /dev/null +++ b/Documentation/Core/html/search/search.css @@ -0,0 +1,240 @@ +/*---------------- Search Box */ + +#FSearchBox { + float: left; +} + +#searchli { + float: right; + display: block; + width: 170px; + height: 24px; +} + +#MSearchBox { + white-space : nowrap; + position: absolute; + float: none; + display: inline; + margin-top: 3px; + right: 0px; + width: 170px; + z-index: 102; +} + +#MSearchBox .left +{ + display:block; + position:absolute; + left:10px; + width:20px; + height:19px; + background:url('search_l.png') no-repeat; + background-position:right; +} + +#MSearchSelect { + display:block; + position:absolute; + width:20px; + height:19px; +} + +.left #MSearchSelect { + left:4px; +} + +.right #MSearchSelect { + right:5px; +} + +#MSearchField { + display:block; + position:absolute; + height:19px; + background:url('search_m.png') repeat-x; + border:none; + width:116px; + margin-left:20px; + padding-left:4px; + color: #909090; + outline: none; + font: 9pt Arial, Verdana, sans-serif; +} + +#FSearchBox #MSearchField { + margin-left:15px; +} + +#MSearchBox .right { + display:block; + position:absolute; + right:10px; + top:0px; + width:20px; + height:19px; + background:url('search_r.png') no-repeat; + background-position:left; +} + +#MSearchClose { + display: none; + position: absolute; + top: 4px; + background : none; + border: none; + margin: 0px 4px 0px 0px; + padding: 0px 0px; + outline: none; +} + +.left #MSearchClose { + left: 6px; +} + +.right #MSearchClose { + right: 2px; +} + +.MSearchBoxActive #MSearchField { + color: #000000; +} + +/*---------------- Search filter selection */ + +#MSearchSelectWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #90A5CE; + background-color: #F9FAFC; + z-index: 1; + padding-top: 4px; + padding-bottom: 4px; + -moz-border-radius: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRSymbol:focus, a.SRSymbol:active, +a.SRScope:focus, a.SRScope:active { + text-decoration: underline; +} + +.SRPage .SRStatus { + padding: 2px 5px; + font-size: 8pt; + font-style: italic; +} + +.SRResult { + display: none; +} + +DIV.searchresults { + margin-left: 10px; + margin-right: 10px; +} diff --git a/Documentation/Core/html/search/search.js b/Documentation/Core/html/search/search.js new file mode 100644 index 0000000..6fb8704 --- /dev/null +++ b/Documentation/Core/html/search/search.js @@ -0,0 +1,811 @@ +// Search script generated by doxygen +// Copyright (C) 2009 by Dimitri van Heesch. + +// The code in this file is loosly based on main.js, part of Natural Docs, +// which is Copyright (C) 2003-2008 Greg Valure +// Natural Docs is licensed under the GPL. + +var indexSectionsWithContent = +{ + 0: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010111111011001111111111111010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 1: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101101001000110000110001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 2: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000101001011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 3: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000001000010000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 4: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010111111011001110111111110010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 5: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 6: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100010000110100101010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 7: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001101001000000100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 8: "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000101001111000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" +}; + +var indexSectionNames = +{ + 0: "all", + 1: "classes", + 2: "files", + 3: "functions", + 4: "variables", + 5: "enums", + 6: "enumvalues", + 7: "groups", + 8: "pages" +}; + +function convertToId(search) +{ + var result = ''; + for (i=0;i<search.length;i++) + { + var c = search.charAt(i); + var cn = c.charCodeAt(0); + if (c.match(/[a-z0-9]/)) + { + result+=c; + } + else if (cn<16) + { + result+="_0"+cn.toString(16); + } + else + { + result+="_"+cn.toString(16); + } + } + return result; +} + +function getXPos(item) +{ + var x = 0; + if (item.offsetWidth) + { + while (item && item!=document.body) + { + x += item.offsetLeft; + item = item.offsetParent; + } + } + return x; +} + +function getYPos(item) +{ + var y = 0; + if (item.offsetWidth) + { + while (item && item!=document.body) + { + y += item.offsetTop; + item = item.offsetParent; + } + } + return y; +} + +/* A class handling everything associated with the search panel. + + Parameters: + name - The name of the global variable that will be + storing this instance. Is needed to be able to set timeouts. + resultPath - path to use for external files +*/ +function SearchBox(name, resultsPath, inFrame, label) +{ + if (!name || !resultsPath) { alert("Missing parameters to SearchBox."); } + + // ---------- Instance variables + this.name = name; + this.resultsPath = resultsPath; + this.keyTimeout = 0; + this.keyTimeoutLength = 500; + this.closeSelectionTimeout = 300; + this.lastSearchValue = ""; + this.lastResultsPage = ""; + this.hideTimeout = 0; + this.searchIndex = 0; + this.searchActive = false; + this.insideFrame = inFrame; + this.searchLabel = label; + + // ----------- DOM Elements + + this.DOMSearchField = function() + { return document.getElementById("MSearchField"); } + + this.DOMSearchSelect = function() + { return document.getElementById("MSearchSelect"); } + + this.DOMSearchSelectWindow = function() + { return document.getElementById("MSearchSelectWindow"); } + + this.DOMPopupSearchResults = function() + { return document.getElementById("MSearchResults"); } + + this.DOMPopupSearchResultsWindow = function() + { return document.getElementById("MSearchResultsWindow"); } + + this.DOMSearchClose = function() + { return document.getElementById("MSearchClose"); } + + this.DOMSearchBox = function() + { return document.getElementById("MSearchBox"); } + + // ------------ Event Handlers + + // Called when focus is added or removed from the search field. + this.OnSearchFieldFocus = function(isActive) + { + this.Activate(isActive); + } + + this.OnSearchSelectShow = function() + { + var searchSelectWindow = this.DOMSearchSelectWindow(); + var searchField = this.DOMSearchSelect(); + + if (this.insideFrame) + { + var left = getXPos(searchField); + var top = getYPos(searchField); + left += searchField.offsetWidth + 6; + top += searchField.offsetHeight; + + // show search selection popup + searchSelectWindow.style.display='block'; + left -= searchSelectWindow.offsetWidth; + searchSelectWindow.style.left = left + 'px'; + searchSelectWindow.style.top = top + 'px'; + } + else + { + var left = getXPos(searchField); + var top = getYPos(searchField); + top += searchField.offsetHeight; + + // show search selection popup + searchSelectWindow.style.display='block'; + searchSelectWindow.style.left = left + 'px'; + searchSelectWindow.style.top = top + 'px'; + } + + // stop selection hide timer + if (this.hideTimeout) + { + clearTimeout(this.hideTimeout); + this.hideTimeout=0; + } + return false; // to avoid "image drag" default event + } + + this.OnSearchSelectHide = function() + { + this.hideTimeout = setTimeout(this.name +".CloseSelectionWindow()", + this.closeSelectionTimeout); + } + + // Called when the content of the search field is changed. + this.OnSearchFieldChange = function(evt) + { + if (this.keyTimeout) // kill running timer + { + clearTimeout(this.keyTimeout); + this.keyTimeout = 0; + } + + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 || e.keyCode==13) + { + if (e.shiftKey==1) + { + this.OnSearchSelectShow(); + var win=this.DOMSearchSelectWindow(); + for (i=0;i<win.childNodes.length;i++) + { + var child = win.childNodes[i]; // get span within a + if (child.className=='SelectItem') + { + child.focus(); + return; + } + } + return; + } + else if (window.frames.MSearchResults.searchResults) + { + var elem = window.frames.MSearchResults.searchResults.NavNext(0); + if (elem) elem.focus(); + } + } + else if (e.keyCode==27) // Escape out of the search field + { + this.DOMSearchField().blur(); + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.lastSearchValue = ''; + this.Activate(false); + return; + } + + // strip whitespaces + var searchValue = this.DOMSearchField().value.replace(/ +/g, ""); + + if (searchValue != this.lastSearchValue) // search value has changed + { + if (searchValue != "") // non-empty search + { + // set timer for search update + this.keyTimeout = setTimeout(this.name + '.Search()', + this.keyTimeoutLength); + } + else // empty search field + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.lastSearchValue = ''; + } + } + } + + this.SelectItemCount = function(id) + { + var count=0; + var win=this.DOMSearchSelectWindow(); + for (i=0;i<win.childNodes.length;i++) + { + var child = win.childNodes[i]; // get span within a + if (child.className=='SelectItem') + { + count++; + } + } + return count; + } + + this.SelectItemSet = function(id) + { + var i,j=0; + var win=this.DOMSearchSelectWindow(); + for (i=0;i<win.childNodes.length;i++) + { + var child = win.childNodes[i]; // get span within a + if (child.className=='SelectItem') + { + var node = child.firstChild; + if (j==id) + { + node.innerHTML='•'; + } + else + { + node.innerHTML=' '; + } + j++; + } + } + } + + // Called when an search filter selection is made. + // set item with index id as the active item + this.OnSelectItem = function(id) + { + this.searchIndex = id; + this.SelectItemSet(id); + var searchValue = this.DOMSearchField().value.replace(/ +/g, ""); + if (searchValue!="" && this.searchActive) // something was found -> do a search + { + this.Search(); + } + } + + this.OnSearchSelectKey = function(evt) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 && this.searchIndex<this.SelectItemCount()) // Down + { + this.searchIndex++; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==38 && this.searchIndex>0) // Up + { + this.searchIndex--; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var hexCode; + if (code<16) + { + hexCode="0"+code.toString(16); + } + else + { + hexCode=code.toString(16); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + if (indexSectionsWithContent[this.searchIndex].charAt(code) == '1') + { + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of <Search()>. + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; + } + } + } + + // Searches for the passed string. If there is no parameter, + // it takes it from the URL query. + // + // Always returns true, since other documents may try to call it + // and that may or may not be possible. + this.Search = function(search) + { + if (!search) // get search word from URL + { + search = window.location.search; + search = search.substring(1); // Remove the leading '?' + search = unescape(search); + } + + search = search.replace(/^ +/, ""); // strip leading spaces + search = search.replace(/ +$/, ""); // strip trailing spaces + search = search.toLowerCase(); + search = convertToId(search); + + var resultRows = document.getElementsByTagName("div"); + var matches = 0; + + var i = 0; + while (i < resultRows.length) + { + var row = resultRows.item(i); + if (row.className == "SRResult") + { + var rowMatchName = row.id.toLowerCase(); + rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_' + + if (search.length<=rowMatchName.length && + rowMatchName.substr(0, search.length)==search) + { + row.style.display = 'block'; + matches++; + } + else + { + row.style.display = 'none'; + } + } + i++; + } + document.getElementById("Searching").style.display='none'; + if (matches == 0) // no results + { + document.getElementById("NoMatches").style.display='block'; + } + else // at least one result + { + document.getElementById("NoMatches").style.display='none'; + } + this.lastMatchCount = matches; + return true; + } + + // return the first item with index index or higher that is visible + this.NavNext = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index++; + } + return focusItem; + } + + this.NavPrev = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index--; + } + return focusItem; + } + + this.ProcessKeys = function(e) + { + if (e.type == "keydown") + { + this.repeatOn = false; + this.lastKey = e.keyCode; + } + else if (e.type == "keypress") + { + if (!this.repeatOn) + { + if (this.lastKey) this.repeatOn = true; + return false; // ignore first keypress after keydown + } + } + else if (e.type == "keyup") + { + this.lastKey = 0; + this.repeatOn = false; + } + return this.lastKey!=0; + } + + this.Nav = function(evt,itemIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e<searchData.length; e++) + { + var id = searchData[e][0]; + var srResult = document.createElement('div'); + srResult.setAttribute('id','SR_'+id); + setClassAttr(srResult,'SRResult'); + var srEntry = document.createElement('div'); + setClassAttr(srEntry,'SREntry'); + var srLink = document.createElement('a'); + srLink.setAttribute('id','Item'+e); + setKeyActions(srLink,'return searchResults.Nav(event,'+e+')'); + setClassAttr(srLink,'SRSymbol'); + srLink.innerHTML = searchData[e][1][0]; + srEntry.appendChild(srLink); + if (searchData[e][1].length==2) // single result + { + srLink.setAttribute('href',searchData[e][1][1][0]); + if (searchData[e][1][1][1]) + { + srLink.setAttribute('target','_parent'); + } + var srScope = document.createElement('span'); + setClassAttr(srScope,'SRScope'); + srScope.innerHTML = searchData[e][1][1][2]; + srEntry.appendChild(srScope); + } + else // multiple results + { + srLink.setAttribute('href','javascript:searchResults.Toggle("SR_'+id+'")'); + var srChildren = document.createElement('div'); + setClassAttr(srChildren,'SRChildren'); + for (var c=0; c<searchData[e][1].length-1; c++) + { + var srChild = document.createElement('a'); + srChild.setAttribute('id','Item'+e+'_c'+c); + setKeyActions(srChild,'return searchResults.NavChild(event,'+e+','+c+')'); + setClassAttr(srChild,'SRScope'); + srChild.setAttribute('href',searchData[e][1][c+1][0]); + if (searchData[e][1][c+1][1]) + { + srChild.setAttribute('target','_parent'); + } + srChild.innerHTML = searchData[e][1][c+1][2]; + srChildren.appendChild(srChild); + } + srEntry.appendChild(srChildren); + } + srResult.appendChild(srEntry); + results.appendChild(srResult); + } +} + diff --git a/Documentation/Core/html/search/search_l.png b/Documentation/Core/html/search/search_l.png Binary files differnew file mode 100644 index 0000000..c872f4d --- /dev/null +++ b/Documentation/Core/html/search/search_l.png diff --git a/Documentation/Core/html/search/search_m.png b/Documentation/Core/html/search/search_m.png Binary files differnew file mode 100644 index 0000000..b429a16 --- /dev/null +++ b/Documentation/Core/html/search/search_m.png diff --git a/Documentation/Core/html/search/search_r.png b/Documentation/Core/html/search/search_r.png Binary files differnew file mode 100644 index 0000000..97ee8b4 --- /dev/null +++ b/Documentation/Core/html/search/search_r.png diff --git a/Documentation/Core/html/search/variables_5f.html b/Documentation/Core/html/search/variables_5f.html new file mode 100644 index 0000000..375abd9 --- /dev/null +++ b/Documentation/Core/html/search/variables_5f.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="variables_5f.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/variables_5f.js b/Documentation/Core/html/search/variables_5f.js new file mode 100644 index 0000000..208e0d9 --- /dev/null +++ b/Documentation/Core/html/search/variables_5f.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['_5freserved0',['_reserved0',['../union_a_p_s_r___type.html#afbce95646fd514c10aa85ec0a33db728',1,'APSR_Type::_reserved0()'],['../union_i_p_s_r___type.html#ad2eb0a06de4f03f58874a727716aa9aa',1,'IPSR_Type::_reserved0()'],['../unionx_p_s_r___type.html#af438e0f407357e914a70b5bd4d6a97c5',1,'xPSR_Type::_reserved0()'],['../union_c_o_n_t_r_o_l___type.html#af8c314273a1e4970a5671bd7f8184f50',1,'CONTROL_Type::_reserved0()']]] +]; diff --git a/Documentation/Core/html/search/variables_61.html b/Documentation/Core/html/search/variables_61.html new file mode 100644 index 0000000..ff1f937 --- /dev/null +++ b/Documentation/Core/html/search/variables_61.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="variables_61.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/variables_61.js b/Documentation/Core/html/search/variables_61.js new file mode 100644 index 0000000..1a8097a --- /dev/null +++ b/Documentation/Core/html/search/variables_61.js @@ -0,0 +1,8 @@ +var searchData= +[ + ['acpr',['ACPR',['../struct_t_p_i___type.html#a9e5e4421ef9c3d5b7ff8b24abd4e99b3',1,'TPI_Type']]], + ['actlr',['ACTLR',['../struct_s_cn_s_c_b___type.html#a13af9b718dde7481f1c0344f00593c23',1,'SCnSCB_Type']]], + ['adr',['ADR',['../struct_s_c_b___type.html#af084e1b2dad004a88668efea1dfe7fa1',1,'SCB_Type']]], + ['afsr',['AFSR',['../struct_s_c_b___type.html#ab65372404ce64b0f0b35e2709429404e',1,'SCB_Type']]], + ['aircr',['AIRCR',['../struct_s_c_b___type.html#ad3e5b8934c647eb1b7383c1894f01380',1,'SCB_Type']]] +]; diff --git a/Documentation/Core/html/search/variables_62.html b/Documentation/Core/html/search/variables_62.html new file mode 100644 index 0000000..c55a15e --- /dev/null +++ b/Documentation/Core/html/search/variables_62.html @@ -0,0 +1,25 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html><head><title></title> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<link rel="stylesheet" type="text/css" href="search.css"/> +<script type="text/javascript" src="variables_62.js"></script> +<script type="text/javascript" src="search.js"></script> +</head> +<body class="SRPage"> +<div id="SRIndex"> +<div class="SRStatus" id="Loading">Loading...</div> +<div id="SRResults"></div> +<script type="text/javascript"><!-- +createResults(); +--></script> +<div class="SRStatus" id="Searching">Searching...</div> +<div class="SRStatus" id="NoMatches">No Matches</div> +<script type="text/javascript"><!-- +document.getElementById("Loading").style.display="none"; +document.getElementById("NoMatches").style.display="none"; +var searchResults = new SearchResults("searchResults"); +searchResults.Search(); +--></script> +</div> +</body> +</html> diff --git a/Documentation/Core/html/search/variables_62.js b/Documentation/Core/html/search/variables_62.js new file mode 100644 index 0000000..f7fe206 --- /dev/null +++ b/Documentation/Core/html/search/variables_62.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['b',['b',['../union_a_p_s_r___type.html#a7dbc79a057ded4b11ca5323fc2d5ab14',1,'APSR_Type::b()'],['../union_i_p_s_r___type.html#add0d6497bd50c25569ea22b48a03ec50',1,'IPSR_Type::b()'],['../unionx_p_s_r___type.html#a3b1063bb5cdad67e037cba993b693b70',1,'xPSR_Type::b()'],['../union_c_o_n_t_r_o_l___type.html#adc6a38ab2980d0e9577b5a871da14eb9',1,'CONTROL_Type::b()']]], + ['bfar',['BFAR',['../struct_s_c_b___type.html#a3f8e7e58be4e41c88dfa78f54589271c',1,'SCB_Type']]] +]; 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+</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('startup_s_pg.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">Startup File startup_<device>.s </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>The <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a> contains:</p> +<ul> +<li>The reset handler which is executed after CPU reset and typically calls the <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> function.</li> +<li>The setup values for the Main Stack Pointer (MSP).</li> +<li>Exception vectors of the Cortex-M Processor with weak functions that implement default routines.</li> +<li>Interrupt vectors that are device specific with weak functions that implement default routines.</li> +</ul> +<p>The file exists for each supported toolchain and is the only tool-chain specific CMSIS file.</p> +<p>To adapt the file to a new device only the interrupt vector table needs to be extended with the device-specific interrupt handlers. The naming convention for the interrupt handler names are <interrupt_name>_IRQHandler. This table needs to be consistent with <a class="el" href="group___n_v_i_c__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all the IRQ numbers for each interrupt.</p> +<p><b>Example:</b> </p> +<p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p> +<div class="fragment"><div class="line"> ; External Interrupts</div> +<div class="line"> DCD WAKEUP0_IRQHandler ; 16+ 0: Wakeup PIO0.0</div> +<div class="line"> DCD WAKEUP1_IRQHandler ; 16+ 1: Wakeup PIO0.1</div> +<div class="line"> DCD WAKEUP2_IRQHandler ; 16+ 2: Wakeup PIO0.2</div> +<div class="line"> : :</div> +<div class="line"> : :</div> +<div class="line"> DCD EINT1_IRQHandler ; 16+30: PIO INT1</div> +<div class="line"> DCD EINT0_IRQHandler ; 16+31: PIO INT0</div> +<div class="line"> : </div> +<div class="line"> :</div> +<div class="line"> EXPORT WAKEUP0_IRQHandler [WEAK]</div> +<div class="line"> EXPORT WAKEUP1_IRQHandler [WEAK]</div> +<div class="line"> EXPORT WAKEUP2_IRQHandler [WEAK]</div> +<div class="line"> : :</div> +<div class="line"> : : </div> +<div class="line"> EXPORT EINT1_IRQHandler [WEAK]</div> +<div class="line"> EXPORT EINT0_IRQHandler [WEAK]</div> +<div class="line"></div> +<div class="line">WAKEUP0_IRQHandler</div> +<div class="line">WAKEUP1_IRQHandler</div> +<div class="line">WAKEUP1_IRQHandler</div> +<div class="line"> :</div> +<div class="line"> :</div> +<div class="line">EINT1_IRQHandler</div> +<div class="line">EINT0_IRQHandler</div> +<div class="line"> B .</div> +</div><!-- fragment --><h1><a class="anchor" id="startup_s_sec"></a> +startup_Device.s Template File</h1> +<p>The <a class="el" href="startup_s_pg.html#startup_s_sec">startup_Device.s Template File</a> for the Cortex-M3 and the ARMCC compiler is shown below. The files for other compiler vendors differ slightly in the syntax, but not in the overall structure.</p> +<pre class="fragment">;/**************************************************************************//** +; * @file startup_<Device>.s +; * @brief CMSIS Cortex-M# Core Device Startup File for +; * Device <Device> +; * @version V3.10 +; * @date 23. November 2012 +; * +; * @note +; * +; ******************************************************************************/ +;/* Copyright (c) 2012 ARM LIMITED +; +; All rights reserved. +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; - Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; - Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in the +; documentation and/or other materials provided with the distribution. +; - Neither the name of ARM nor the names of its contributors may be used +; to endorse or promote products derived from this software without +; specific prior written permission. +; * +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE +; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; ---------------------------------------------------------------------------*/ +;/* +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +;*/ + + +; <h> Stack Configuration +; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; </h> + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; <h> Heap Configuration +; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; </h> + +Heap_Size EQU 0x00000100 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts +; ToDo: Add here the vectors for the device specific external interrupts handler + DCD <DeviceInterrupt>_IRQHandler ; 0: Default +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler\ + PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler\ + PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC +; ToDo: Add here the export definition for the device specific external interrupts handler + EXPORT <DeviceInterrupt>_IRQHandler [WEAK] + +; ToDo: Add here the names for the device specific external interrupts handler +<DeviceInterrupt>_IRQHandler + B . + ENDP + + + ALIGN + + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap PROC + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + ENDP + + ALIGN + + ENDIF + + + END +</pre> </div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="_templates_pg.html">Template Files</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. 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class="headertitle"> +<div class="title">CoreDebug_Type Struct Reference</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Structure type to access the Core Debug Register (CoreDebug). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:ad63554e4650da91a8e79929cbb63db66"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_core_debug___type.html#ad63554e4650da91a8e79929cbb63db66">DHCSR</a></td></tr> +<tr class="memdesc:ad63554e4650da91a8e79929cbb63db66"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/W) Debug Halting Control and Status Register. <a href="#ad63554e4650da91a8e79929cbb63db66"></a><br/></td></tr> +<tr class="separator:ad63554e4650da91a8e79929cbb63db66"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:af907cf64577eaf927dac6787df6dd98b"><td class="memItemLeft" align="right" valign="top">__OM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_core_debug___type.html#af907cf64577eaf927dac6787df6dd98b">DCRSR</a></td></tr> +<tr class="memdesc:af907cf64577eaf927dac6787df6dd98b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 ( /W) Debug Core Register Selector Register. <a href="#af907cf64577eaf927dac6787df6dd98b"></a><br/></td></tr> +<tr class="separator:af907cf64577eaf927dac6787df6dd98b"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aab3cc92ef07bc1f04b3a3aa6db2c2d55"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_core_debug___type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55">DCRDR</a></td></tr> +<tr class="memdesc:aab3cc92ef07bc1f04b3a3aa6db2c2d55"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) Debug Core Register Data Register. <a href="#aab3cc92ef07bc1f04b3a3aa6db2c2d55"></a><br/></td></tr> +<tr class="separator:aab3cc92ef07bc1f04b3a3aa6db2c2d55"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aeb3126abc4c258a858f21f356c0df6ee"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_core_debug___type.html#aeb3126abc4c258a858f21f356c0df6ee">DEMCR</a></td></tr> +<tr class="memdesc:aeb3126abc4c258a858f21f356c0df6ee"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/W) Debug Exception and Monitor Control Register. <a href="#aeb3126abc4c258a858f21f356c0df6ee"></a><br/></td></tr> +<tr class="separator:aeb3126abc4c258a858f21f356c0df6ee"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="aab3cc92ef07bc1f04b3a3aa6db2c2d55"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t CoreDebug_Type::DCRDR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="af907cf64577eaf927dac6787df6dd98b"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__OM uint32_t CoreDebug_Type::DCRSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="aeb3126abc4c258a858f21f356c0df6ee"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t CoreDebug_Type::DEMCR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ad63554e4650da91a8e79929cbb63db66"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t CoreDebug_Type::DHCSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_core_debug___type.html">CoreDebug_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_core_debug___type.js b/Documentation/Core/html/struct_core_debug___type.js new file mode 100644 index 0000000..812a293 --- /dev/null +++ b/Documentation/Core/html/struct_core_debug___type.js @@ -0,0 +1,7 @@ +var struct_core_debug___type = +[ + [ "DCRDR", "struct_core_debug___type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55", null ], + [ "DCRSR", "struct_core_debug___type.html#af907cf64577eaf927dac6787df6dd98b", null ], + [ "DEMCR", "struct_core_debug___type.html#aeb3126abc4c258a858f21f356c0df6ee", null ], + [ "DHCSR", "struct_core_debug___type.html#ad63554e4650da91a8e79929cbb63db66", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_d_w_t___type.html b/Documentation/Core/html/struct_d_w_t___type.html new file mode 100644 index 0000000..2e85193 --- /dev/null +++ b/Documentation/Core/html/struct_d_w_t___type.html @@ -0,0 +1,490 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>DWT_Type Struct Reference</title> +<title>CMSIS-CORE: DWT_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" 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(DWT). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:add790c53410023b3b581919bb681fe2a"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#add790c53410023b3b581919bb681fe2a">CTRL</a></td></tr> +<tr class="memdesc:add790c53410023b3b581919bb681fe2a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/W) Control Register. <a href="#add790c53410023b3b581919bb681fe2a"></a><br/></td></tr> +<tr class="separator:add790c53410023b3b581919bb681fe2a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a102eaa529d9098242851cb57c52b42d9"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a102eaa529d9098242851cb57c52b42d9">CYCCNT</a></td></tr> +<tr class="memdesc:a102eaa529d9098242851cb57c52b42d9"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W) Cycle Count Register. <a href="#a102eaa529d9098242851cb57c52b42d9"></a><br/></td></tr> +<tr class="separator:a102eaa529d9098242851cb57c52b42d9"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a2c08096c82abe245c0fa97badc458154"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a2c08096c82abe245c0fa97badc458154">CPICNT</a></td></tr> +<tr class="memdesc:a2c08096c82abe245c0fa97badc458154"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) CPI Count Register. <a href="#a2c08096c82abe245c0fa97badc458154"></a><br/></td></tr> +<tr class="separator:a2c08096c82abe245c0fa97badc458154"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a9fe20c16c5167ca61486caf6832686d1"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a9fe20c16c5167ca61486caf6832686d1">EXCCNT</a></td></tr> +<tr class="memdesc:a9fe20c16c5167ca61486caf6832686d1"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/W) Exception Overhead Count Register. <a href="#a9fe20c16c5167ca61486caf6832686d1"></a><br/></td></tr> +<tr class="separator:a9fe20c16c5167ca61486caf6832686d1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a416a54e2084ce66e5ca74f152a5ecc70"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a416a54e2084ce66e5ca74f152a5ecc70">SLEEPCNT</a></td></tr> +<tr class="memdesc:a416a54e2084ce66e5ca74f152a5ecc70"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x010 (R/W) Sleep Count Register. <a href="#a416a54e2084ce66e5ca74f152a5ecc70"></a><br/></td></tr> +<tr class="separator:a416a54e2084ce66e5ca74f152a5ecc70"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:acc05d89bdb1b4fe2fa499920ec02d0b1"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">LSUCNT</a></td></tr> +<tr class="memdesc:acc05d89bdb1b4fe2fa499920ec02d0b1"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x014 (R/W) LSU Count Register. <a href="#acc05d89bdb1b4fe2fa499920ec02d0b1"></a><br/></td></tr> +<tr class="separator:acc05d89bdb1b4fe2fa499920ec02d0b1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a1cfc48384ebd8fd8fb7e5d955aae6c97"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97">FOLDCNT</a></td></tr> +<tr class="memdesc:a1cfc48384ebd8fd8fb7e5d955aae6c97"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x018 (R/W) Folded-instruction Count Register. <a href="#a1cfc48384ebd8fd8fb7e5d955aae6c97"></a><br/></td></tr> +<tr class="separator:a1cfc48384ebd8fd8fb7e5d955aae6c97"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a6353ca1d1ad9bc1be05d3b5632960113"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a6353ca1d1ad9bc1be05d3b5632960113">PCSR</a></td></tr> +<tr class="memdesc:a6353ca1d1ad9bc1be05d3b5632960113"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x01C (R/ ) Program Counter Sample Register. <a href="#a6353ca1d1ad9bc1be05d3b5632960113"></a><br/></td></tr> +<tr class="separator:a6353ca1d1ad9bc1be05d3b5632960113"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a61c2965af5bc0643f9af65620b0e67c9"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a61c2965af5bc0643f9af65620b0e67c9">COMP0</a></td></tr> +<tr class="memdesc:a61c2965af5bc0643f9af65620b0e67c9"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x020 (R/W) Comparator Register 0. <a href="#a61c2965af5bc0643f9af65620b0e67c9"></a><br/></td></tr> +<tr class="separator:a61c2965af5bc0643f9af65620b0e67c9"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a821eb5e71f340ec077efc064cfc567db"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a821eb5e71f340ec077efc064cfc567db">MASK0</a></td></tr> +<tr class="memdesc:a821eb5e71f340ec077efc064cfc567db"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x024 (R/W) Mask Register 0. <a href="#a821eb5e71f340ec077efc064cfc567db"></a><br/></td></tr> +<tr class="separator:a821eb5e71f340ec077efc064cfc567db"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a579ae082f58a0317b7ef029b20f52889"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a579ae082f58a0317b7ef029b20f52889">FUNCTION0</a></td></tr> +<tr class="memdesc:a579ae082f58a0317b7ef029b20f52889"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x028 (R/W) Function Register 0. <a href="#a579ae082f58a0317b7ef029b20f52889"></a><br/></td></tr> +<tr class="separator:a579ae082f58a0317b7ef029b20f52889"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:addd893d655ed90d40705b20170daac59"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#addd893d655ed90d40705b20170daac59">RESERVED0</a> [1]</td></tr> +<tr class="memdesc:addd893d655ed90d40705b20170daac59"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#addd893d655ed90d40705b20170daac59"></a><br/></td></tr> +<tr class="separator:addd893d655ed90d40705b20170daac59"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a38714af6b7fa7c64d68f5e1efbe7a931"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a38714af6b7fa7c64d68f5e1efbe7a931">COMP1</a></td></tr> +<tr class="memdesc:a38714af6b7fa7c64d68f5e1efbe7a931"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x030 (R/W) Comparator Register 1. <a href="#a38714af6b7fa7c64d68f5e1efbe7a931"></a><br/></td></tr> +<tr class="separator:a38714af6b7fa7c64d68f5e1efbe7a931"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aabf94936c9340e62fed836dcfb152405"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#aabf94936c9340e62fed836dcfb152405">MASK1</a></td></tr> +<tr class="memdesc:aabf94936c9340e62fed836dcfb152405"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x034 (R/W) Mask Register 1. <a href="#aabf94936c9340e62fed836dcfb152405"></a><br/></td></tr> +<tr class="separator:aabf94936c9340e62fed836dcfb152405"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a8dfcf25675f9606aa305c46e85182e4e"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a8dfcf25675f9606aa305c46e85182e4e">FUNCTION1</a></td></tr> +<tr class="memdesc:a8dfcf25675f9606aa305c46e85182e4e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x038 (R/W) Function Register 1. <a href="#a8dfcf25675f9606aa305c46e85182e4e"></a><br/></td></tr> +<tr class="separator:a8dfcf25675f9606aa305c46e85182e4e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a069871233a8c1df03521e6d7094f1de4"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a069871233a8c1df03521e6d7094f1de4">RESERVED1</a> [1]</td></tr> +<tr class="memdesc:a069871233a8c1df03521e6d7094f1de4"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a069871233a8c1df03521e6d7094f1de4"></a><br/></td></tr> +<tr class="separator:a069871233a8c1df03521e6d7094f1de4"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a5ae6dde39989f27bae90afc2347deb46"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a5ae6dde39989f27bae90afc2347deb46">COMP2</a></td></tr> +<tr class="memdesc:a5ae6dde39989f27bae90afc2347deb46"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x040 (R/W) Comparator Register 2. <a href="#a5ae6dde39989f27bae90afc2347deb46"></a><br/></td></tr> +<tr class="separator:a5ae6dde39989f27bae90afc2347deb46"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a00ac4d830dfe0070a656cda9baed170f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a00ac4d830dfe0070a656cda9baed170f">MASK2</a></td></tr> +<tr class="memdesc:a00ac4d830dfe0070a656cda9baed170f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x044 (R/W) Mask Register 2. <a href="#a00ac4d830dfe0070a656cda9baed170f"></a><br/></td></tr> +<tr class="separator:a00ac4d830dfe0070a656cda9baed170f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ab1b60d6600c38abae515bab8e86a188f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#ab1b60d6600c38abae515bab8e86a188f">FUNCTION2</a></td></tr> +<tr class="memdesc:ab1b60d6600c38abae515bab8e86a188f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x048 (R/W) Function Register 2. <a href="#ab1b60d6600c38abae515bab8e86a188f"></a><br/></td></tr> +<tr class="separator:ab1b60d6600c38abae515bab8e86a188f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a8556ca1c32590517602d92fe0cd55738"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a8556ca1c32590517602d92fe0cd55738">RESERVED2</a> [1]</td></tr> +<tr class="memdesc:a8556ca1c32590517602d92fe0cd55738"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a8556ca1c32590517602d92fe0cd55738"></a><br/></td></tr> +<tr class="separator:a8556ca1c32590517602d92fe0cd55738"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a85eb73d1848ac3f82d39d6c3e8910847"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a85eb73d1848ac3f82d39d6c3e8910847">COMP3</a></td></tr> +<tr class="memdesc:a85eb73d1848ac3f82d39d6c3e8910847"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x050 (R/W) Comparator Register 3. <a href="#a85eb73d1848ac3f82d39d6c3e8910847"></a><br/></td></tr> +<tr class="separator:a85eb73d1848ac3f82d39d6c3e8910847"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a2a509d8505c37a3b64f6b24993df5f3f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a2a509d8505c37a3b64f6b24993df5f3f">MASK3</a></td></tr> +<tr class="memdesc:a2a509d8505c37a3b64f6b24993df5f3f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x054 (R/W) Mask Register 3. <a href="#a2a509d8505c37a3b64f6b24993df5f3f"></a><br/></td></tr> +<tr class="separator:a2a509d8505c37a3b64f6b24993df5f3f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a52d4ff278fae6f9216c63b74ce328841"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_d_w_t___type.html#a52d4ff278fae6f9216c63b74ce328841">FUNCTION3</a></td></tr> +<tr class="memdesc:a52d4ff278fae6f9216c63b74ce328841"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x058 (R/W) Function Register 3. <a href="#a52d4ff278fae6f9216c63b74ce328841"></a><br/></td></tr> +<tr class="separator:a52d4ff278fae6f9216c63b74ce328841"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="a61c2965af5bc0643f9af65620b0e67c9"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::COMP0</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a38714af6b7fa7c64d68f5e1efbe7a931"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::COMP1</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a5ae6dde39989f27bae90afc2347deb46"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::COMP2</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a85eb73d1848ac3f82d39d6c3e8910847"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::COMP3</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a2c08096c82abe245c0fa97badc458154"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::CPICNT</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="add790c53410023b3b581919bb681fe2a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::CTRL</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a102eaa529d9098242851cb57c52b42d9"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::CYCCNT</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a9fe20c16c5167ca61486caf6832686d1"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::EXCCNT</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a1cfc48384ebd8fd8fb7e5d955aae6c97"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::FOLDCNT</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a579ae082f58a0317b7ef029b20f52889"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::FUNCTION0</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a8dfcf25675f9606aa305c46e85182e4e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::FUNCTION1</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ab1b60d6600c38abae515bab8e86a188f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::FUNCTION2</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a52d4ff278fae6f9216c63b74ce328841"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::FUNCTION3</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="acc05d89bdb1b4fe2fa499920ec02d0b1"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::LSUCNT</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a821eb5e71f340ec077efc064cfc567db"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::MASK0</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="aabf94936c9340e62fed836dcfb152405"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::MASK1</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a00ac4d830dfe0070a656cda9baed170f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::MASK2</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a2a509d8505c37a3b64f6b24993df5f3f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::MASK3</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a6353ca1d1ad9bc1be05d3b5632960113"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t DWT_Type::PCSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="addd893d655ed90d40705b20170daac59"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t DWT_Type::RESERVED0[1]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a069871233a8c1df03521e6d7094f1de4"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t DWT_Type::RESERVED1[1]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a8556ca1c32590517602d92fe0cd55738"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t DWT_Type::RESERVED2[1]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a416a54e2084ce66e5ca74f152a5ecc70"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t DWT_Type::SLEEPCNT</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_d_w_t___type.html">DWT_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_d_w_t___type.js b/Documentation/Core/html/struct_d_w_t___type.js new file mode 100644 index 0000000..8551743 --- /dev/null +++ b/Documentation/Core/html/struct_d_w_t___type.js @@ -0,0 +1,26 @@ +var struct_d_w_t___type = +[ + [ "COMP0", "struct_d_w_t___type.html#a61c2965af5bc0643f9af65620b0e67c9", null ], + [ "COMP1", "struct_d_w_t___type.html#a38714af6b7fa7c64d68f5e1efbe7a931", null ], + [ "COMP2", "struct_d_w_t___type.html#a5ae6dde39989f27bae90afc2347deb46", null ], + [ "COMP3", "struct_d_w_t___type.html#a85eb73d1848ac3f82d39d6c3e8910847", null ], + [ "CPICNT", "struct_d_w_t___type.html#a2c08096c82abe245c0fa97badc458154", null ], + [ "CTRL", "struct_d_w_t___type.html#add790c53410023b3b581919bb681fe2a", null ], + [ "CYCCNT", "struct_d_w_t___type.html#a102eaa529d9098242851cb57c52b42d9", null ], + [ "EXCCNT", "struct_d_w_t___type.html#a9fe20c16c5167ca61486caf6832686d1", null ], + [ "FOLDCNT", "struct_d_w_t___type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97", null ], + [ "FUNCTION0", "struct_d_w_t___type.html#a579ae082f58a0317b7ef029b20f52889", null ], + [ "FUNCTION1", "struct_d_w_t___type.html#a8dfcf25675f9606aa305c46e85182e4e", null ], + [ "FUNCTION2", "struct_d_w_t___type.html#ab1b60d6600c38abae515bab8e86a188f", null ], + [ "FUNCTION3", "struct_d_w_t___type.html#a52d4ff278fae6f9216c63b74ce328841", null ], + [ "LSUCNT", "struct_d_w_t___type.html#acc05d89bdb1b4fe2fa499920ec02d0b1", null ], + [ "MASK0", "struct_d_w_t___type.html#a821eb5e71f340ec077efc064cfc567db", null ], + [ "MASK1", "struct_d_w_t___type.html#aabf94936c9340e62fed836dcfb152405", null ], + [ "MASK2", "struct_d_w_t___type.html#a00ac4d830dfe0070a656cda9baed170f", null ], + [ "MASK3", "struct_d_w_t___type.html#a2a509d8505c37a3b64f6b24993df5f3f", null ], + [ "PCSR", "struct_d_w_t___type.html#a6353ca1d1ad9bc1be05d3b5632960113", null ], + [ "RESERVED0", "struct_d_w_t___type.html#addd893d655ed90d40705b20170daac59", null ], + [ "RESERVED1", "struct_d_w_t___type.html#a069871233a8c1df03521e6d7094f1de4", null ], + [ "RESERVED2", "struct_d_w_t___type.html#a8556ca1c32590517602d92fe0cd55738", null ], + [ "SLEEPCNT", "struct_d_w_t___type.html#a416a54e2084ce66e5ca74f152a5ecc70", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_f_p_u___type.html b/Documentation/Core/html/struct_f_p_u___type.html new file mode 100644 index 0000000..b84f3c3 --- /dev/null +++ b/Documentation/Core/html/struct_f_p_u___type.html @@ -0,0 +1,235 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>FPU_Type Struct Reference</title> +<title>CMSIS-CORE: FPU_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" 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+<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a7b2967b069046c8544adbbc1db143a36"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_p_u___type.html#a7b2967b069046c8544adbbc1db143a36">RESERVED0</a> [1]</td></tr> +<tr class="memdesc:a7b2967b069046c8544adbbc1db143a36"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a7b2967b069046c8544adbbc1db143a36"></a><br/></td></tr> +<tr class="separator:a7b2967b069046c8544adbbc1db143a36"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:af1b708c5e413739150df3d16ca3b7061"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_p_u___type.html#af1b708c5e413739150df3d16ca3b7061">FPCCR</a></td></tr> +<tr class="memdesc:af1b708c5e413739150df3d16ca3b7061"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W) Floating-Point Context Control Register. <a href="#af1b708c5e413739150df3d16ca3b7061"></a><br/></td></tr> +<tr class="separator:af1b708c5e413739150df3d16ca3b7061"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a55263b468d0f8e11ac77aec9ff87c820"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_p_u___type.html#a55263b468d0f8e11ac77aec9ff87c820">FPCAR</a></td></tr> +<tr class="memdesc:a55263b468d0f8e11ac77aec9ff87c820"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) Floating-Point Context Address Register. <a href="#a55263b468d0f8e11ac77aec9ff87c820"></a><br/></td></tr> +<tr class="separator:a55263b468d0f8e11ac77aec9ff87c820"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a58d1989664a06db6ec2e122eefa9f04a"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_p_u___type.html#a58d1989664a06db6ec2e122eefa9f04a">FPDSCR</a></td></tr> +<tr class="memdesc:a58d1989664a06db6ec2e122eefa9f04a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/W) Floating-Point Default Status Control Register. <a href="#a58d1989664a06db6ec2e122eefa9f04a"></a><br/></td></tr> +<tr class="separator:a58d1989664a06db6ec2e122eefa9f04a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a4f19014defe6033d070b80af19ef627c"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_p_u___type.html#a4f19014defe6033d070b80af19ef627c">MVFR0</a></td></tr> +<tr class="memdesc:a4f19014defe6033d070b80af19ef627c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x010 (R/ ) Media and FP Feature Register 0. <a href="#a4f19014defe6033d070b80af19ef627c"></a><br/></td></tr> +<tr class="separator:a4f19014defe6033d070b80af19ef627c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a66f8cfa49a423b480001a4e101bf842d"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_f_p_u___type.html#a66f8cfa49a423b480001a4e101bf842d">MVFR1</a></td></tr> +<tr class="memdesc:a66f8cfa49a423b480001a4e101bf842d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x014 (R/ ) Media and FP Feature Register 1. <a href="#a66f8cfa49a423b480001a4e101bf842d"></a><br/></td></tr> +<tr class="separator:a66f8cfa49a423b480001a4e101bf842d"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="a55263b468d0f8e11ac77aec9ff87c820"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM 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class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t FPU_Type::MVFR1</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a7b2967b069046c8544adbbc1db143a36"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t FPU_Type::RESERVED0[1]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_f_p_u___type.html">FPU_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_f_p_u___type.js b/Documentation/Core/html/struct_f_p_u___type.js new file mode 100644 index 0000000..8af3cda --- /dev/null +++ b/Documentation/Core/html/struct_f_p_u___type.js @@ -0,0 +1,9 @@ +var struct_f_p_u___type = +[ + [ "FPCAR", "struct_f_p_u___type.html#a55263b468d0f8e11ac77aec9ff87c820", null ], + [ "FPCCR", "struct_f_p_u___type.html#af1b708c5e413739150df3d16ca3b7061", null ], + [ "FPDSCR", "struct_f_p_u___type.html#a58d1989664a06db6ec2e122eefa9f04a", null ], + [ "MVFR0", "struct_f_p_u___type.html#a4f19014defe6033d070b80af19ef627c", null ], + [ "MVFR1", "struct_f_p_u___type.html#a66f8cfa49a423b480001a4e101bf842d", null ], + [ "RESERVED0", "struct_f_p_u___type.html#a7b2967b069046c8544adbbc1db143a36", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_i_t_m___type.html b/Documentation/Core/html/struct_i_t_m___type.html new file mode 100644 index 0000000..ba162b2 --- /dev/null +++ b/Documentation/Core/html/struct_i_t_m___type.html @@ -0,0 +1,296 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>ITM_Type Struct Reference</title> +<title>CMSIS-CORE: ITM_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" 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Register (ITM). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:af4c205be465780a20098387120bdb482"><td class="memItemLeft" >union {</td></tr> +<tr class="memitem:a19715ce0fd48d4015c27db6d0a41d49a"><td class="memItemLeft" >   __OM uint8_t   <a class="el" href="struct_i_t_m___type.html#ae773bf9f9dac64e6c28b14aa39f74275">u8</a></td></tr> +<tr class="memdesc:a19715ce0fd48d4015c27db6d0a41d49a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port 8-bit. <a href="#a19715ce0fd48d4015c27db6d0a41d49a"></a><br/></td></tr> +<tr class="separator:a19715ce0fd48d4015c27db6d0a41d49a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:add6779a5b967324d2700661c93283103"><td class="memItemLeft" >   __OM uint16_t   <a class="el" href="struct_i_t_m___type.html#a962a970dfd286cad7f8a8577e87d4ad3">u16</a></td></tr> +<tr class="memdesc:add6779a5b967324d2700661c93283103"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port 16-bit. <a href="#add6779a5b967324d2700661c93283103"></a><br/></td></tr> +<tr class="separator:add6779a5b967324d2700661c93283103"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a74a1dd7cc6bced8cb3b1da2ce6ea7eed"><td class="memItemLeft" >   __OM uint32_t   <a class="el" href="struct_i_t_m___type.html#a5834885903a557674f078f3b71fa8bc8">u32</a></td></tr> +<tr class="memdesc:a74a1dd7cc6bced8cb3b1da2ce6ea7eed"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port 32-bit. <a href="#a74a1dd7cc6bced8cb3b1da2ce6ea7eed"></a><br/></td></tr> +<tr class="separator:a74a1dd7cc6bced8cb3b1da2ce6ea7eed"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:af4c205be465780a20098387120bdb482"><td class="memItemLeft" valign="top">} </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_t_m___type.html#af4c205be465780a20098387120bdb482">PORT</a> [32]</td></tr> +<tr class="memdesc:af4c205be465780a20098387120bdb482"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port Registers. <a href="#af4c205be465780a20098387120bdb482"></a><br/></td></tr> +<tr class="separator:af4c205be465780a20098387120bdb482"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a2c5ae30385b5f370d023468ea9914c0e"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_t_m___type.html#a2c5ae30385b5f370d023468ea9914c0e">RESERVED0</a> [864]</td></tr> +<tr class="memdesc:a2c5ae30385b5f370d023468ea9914c0e"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a2c5ae30385b5f370d023468ea9914c0e"></a><br/></td></tr> +<tr class="separator:a2c5ae30385b5f370d023468ea9914c0e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:acd03c6858f7b678dab6a6121462e7807"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_t_m___type.html#acd03c6858f7b678dab6a6121462e7807">TER</a></td></tr> +<tr class="memdesc:acd03c6858f7b678dab6a6121462e7807"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xE00 (R/W) ITM Trace Enable Register. <a href="#acd03c6858f7b678dab6a6121462e7807"></a><br/></td></tr> +<tr class="separator:acd03c6858f7b678dab6a6121462e7807"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:afffce5b93bbfedbaee85357d0b07ebce"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_t_m___type.html#afffce5b93bbfedbaee85357d0b07ebce">RESERVED1</a> [15]</td></tr> +<tr class="memdesc:afffce5b93bbfedbaee85357d0b07ebce"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#afffce5b93bbfedbaee85357d0b07ebce"></a><br/></td></tr> +<tr class="separator:afffce5b93bbfedbaee85357d0b07ebce"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ae907229ba50538bf370fbdfd54c099a2"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_t_m___type.html#ae907229ba50538bf370fbdfd54c099a2">TPR</a></td></tr> +<tr class="memdesc:ae907229ba50538bf370fbdfd54c099a2"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xE40 (R/W) ITM Trace Privilege Register. <a href="#ae907229ba50538bf370fbdfd54c099a2"></a><br/></td></tr> +<tr class="separator:ae907229ba50538bf370fbdfd54c099a2"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:af56b2f07bc6b42cd3e4d17e1b27cff7b"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_t_m___type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b">RESERVED2</a> [15]</td></tr> +<tr class="memdesc:af56b2f07bc6b42cd3e4d17e1b27cff7b"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#af56b2f07bc6b42cd3e4d17e1b27cff7b"></a><br/></td></tr> +<tr class="separator:af56b2f07bc6b42cd3e4d17e1b27cff7b"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a04b9fbc83759cb818dfa161d39628426"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_i_t_m___type.html#a04b9fbc83759cb818dfa161d39628426">TCR</a></td></tr> +<tr class="memdesc:a04b9fbc83759cb818dfa161d39628426"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xE80 (R/W) ITM Trace Control Register. <a href="#a04b9fbc83759cb818dfa161d39628426"></a><br/></td></tr> +<tr class="separator:a04b9fbc83759cb818dfa161d39628426"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="af4c205be465780a20098387120bdb482"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__OM { ... } ITM_Type::PORT[32]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a2c5ae30385b5f370d023468ea9914c0e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t ITM_Type::RESERVED0[864]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="afffce5b93bbfedbaee85357d0b07ebce"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t ITM_Type::RESERVED1[15]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="af56b2f07bc6b42cd3e4d17e1b27cff7b"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td 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+<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__OM uint16_t ITM_Type::u16</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a5834885903a557674f078f3b71fa8bc8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__OM uint32_t ITM_Type::u32</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ae773bf9f9dac64e6c28b14aa39f74275"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__OM uint8_t ITM_Type::u8</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_i_t_m___type.html">ITM_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_i_t_m___type.js b/Documentation/Core/html/struct_i_t_m___type.js new file mode 100644 index 0000000..4c165a2 --- /dev/null +++ b/Documentation/Core/html/struct_i_t_m___type.js @@ -0,0 +1,13 @@ +var struct_i_t_m___type = +[ + [ "PORT", "struct_i_t_m___type.html#af4c205be465780a20098387120bdb482", null ], + [ "RESERVED0", "struct_i_t_m___type.html#a2c5ae30385b5f370d023468ea9914c0e", null ], + [ "RESERVED1", "struct_i_t_m___type.html#afffce5b93bbfedbaee85357d0b07ebce", null ], + [ "RESERVED2", "struct_i_t_m___type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b", null ], + [ "TCR", "struct_i_t_m___type.html#a04b9fbc83759cb818dfa161d39628426", null ], + [ "TER", "struct_i_t_m___type.html#acd03c6858f7b678dab6a6121462e7807", null ], + [ "TPR", "struct_i_t_m___type.html#ae907229ba50538bf370fbdfd54c099a2", null ], + [ "u16", "struct_i_t_m___type.html#a962a970dfd286cad7f8a8577e87d4ad3", null ], + [ "u32", "struct_i_t_m___type.html#a5834885903a557674f078f3b71fa8bc8", null ], + [ "u8", "struct_i_t_m___type.html#ae773bf9f9dac64e6c28b14aa39f74275", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_m_p_u___type.html b/Documentation/Core/html/struct_m_p_u___type.html new file mode 100644 index 0000000..ee63cbe --- /dev/null +++ b/Documentation/Core/html/struct_m_p_u___type.html @@ -0,0 +1,310 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>MPU_Type Struct Reference</title> +<title>CMSIS-CORE: MPU_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#pub-attribs">Data Fields</a> </div> + <div class="headertitle"> +<div class="title">MPU_Type Struct Reference</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Structure type to access the Memory Protection Unit (MPU). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a0433efc1383674bc8e86cc0e830b462d"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#a0433efc1383674bc8e86cc0e830b462d">TYPE</a></td></tr> +<tr class="memdesc:a0433efc1383674bc8e86cc0e830b462d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/ ) MPU Type Register. <a href="#a0433efc1383674bc8e86cc0e830b462d"></a><br/></td></tr> +<tr class="separator:a0433efc1383674bc8e86cc0e830b462d"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a4d81d6aa73a9287bafba2bcc5ffc6d18"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#a4d81d6aa73a9287bafba2bcc5ffc6d18">CTRL</a></td></tr> +<tr class="memdesc:a4d81d6aa73a9287bafba2bcc5ffc6d18"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W) MPU Control Register. <a href="#a4d81d6aa73a9287bafba2bcc5ffc6d18"></a><br/></td></tr> +<tr class="separator:a4d81d6aa73a9287bafba2bcc5ffc6d18"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aa800d44f4d3520cc891d7b8d711320c1"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#aa800d44f4d3520cc891d7b8d711320c1">RNR</a></td></tr> +<tr class="memdesc:aa800d44f4d3520cc891d7b8d711320c1"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) MPU Region RNRber Register. <a href="#aa800d44f4d3520cc891d7b8d711320c1"></a><br/></td></tr> +<tr class="separator:aa800d44f4d3520cc891d7b8d711320c1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ac953770d38a7d322b971d93eb8a5b062"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#ac953770d38a7d322b971d93eb8a5b062">RBAR</a></td></tr> +<tr class="memdesc:ac953770d38a7d322b971d93eb8a5b062"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/W) MPU Region Base Address Register. <a href="#ac953770d38a7d322b971d93eb8a5b062"></a><br/></td></tr> +<tr class="separator:ac953770d38a7d322b971d93eb8a5b062"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a9236c629b7cf86f8bd2459c610fdf715"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#a9236c629b7cf86f8bd2459c610fdf715">RASR</a></td></tr> +<tr class="memdesc:a9236c629b7cf86f8bd2459c610fdf715"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x010 (R/W) MPU Region Attribute and Size Register. <a href="#a9236c629b7cf86f8bd2459c610fdf715"></a><br/></td></tr> +<tr class="separator:a9236c629b7cf86f8bd2459c610fdf715"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a13d69b9bea12861383f3a62764b02f63"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#a13d69b9bea12861383f3a62764b02f63">RBAR_A1</a></td></tr> +<tr class="memdesc:a13d69b9bea12861383f3a62764b02f63"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register. <a href="#a13d69b9bea12861383f3a62764b02f63"></a><br/></td></tr> +<tr class="separator:a13d69b9bea12861383f3a62764b02f63"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ab5a224ccd12ac55ddfe11d9eca42de48"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#ab5a224ccd12ac55ddfe11d9eca42de48">RASR_A1</a></td></tr> +<tr class="memdesc:ab5a224ccd12ac55ddfe11d9eca42de48"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register. <a href="#ab5a224ccd12ac55ddfe11d9eca42de48"></a><br/></td></tr> +<tr class="separator:ab5a224ccd12ac55ddfe11d9eca42de48"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a57dc551614932150e684fcc60590c2c4"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#a57dc551614932150e684fcc60590c2c4">RBAR_A2</a></td></tr> +<tr class="memdesc:a57dc551614932150e684fcc60590c2c4"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register. <a href="#a57dc551614932150e684fcc60590c2c4"></a><br/></td></tr> +<tr class="separator:a57dc551614932150e684fcc60590c2c4"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ac60e0919871b66446a039838bcaaec3b"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#ac60e0919871b66446a039838bcaaec3b">RASR_A2</a></td></tr> +<tr class="memdesc:ac60e0919871b66446a039838bcaaec3b"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register. <a href="#ac60e0919871b66446a039838bcaaec3b"></a><br/></td></tr> +<tr class="separator:ac60e0919871b66446a039838bcaaec3b"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a345911aabecd1f7d93a1bff7738b0d86"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#a345911aabecd1f7d93a1bff7738b0d86">RBAR_A3</a></td></tr> +<tr class="memdesc:a345911aabecd1f7d93a1bff7738b0d86"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register. <a href="#a345911aabecd1f7d93a1bff7738b0d86"></a><br/></td></tr> +<tr class="separator:a345911aabecd1f7d93a1bff7738b0d86"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a9c0b2d3e3e16bb4e7dfa069652d5a155"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_m_p_u___type.html#a9c0b2d3e3e16bb4e7dfa069652d5a155">RASR_A3</a></td></tr> +<tr class="memdesc:a9c0b2d3e3e16bb4e7dfa069652d5a155"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register. <a href="#a9c0b2d3e3e16bb4e7dfa069652d5a155"></a><br/></td></tr> +<tr class="separator:a9c0b2d3e3e16bb4e7dfa069652d5a155"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="a4d81d6aa73a9287bafba2bcc5ffc6d18"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t MPU_Type::CTRL</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a9236c629b7cf86f8bd2459c610fdf715"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t MPU_Type::RASR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ab5a224ccd12ac55ddfe11d9eca42de48"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t MPU_Type::RASR_A1</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ac60e0919871b66446a039838bcaaec3b"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t MPU_Type::RASR_A2</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" 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</table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a345911aabecd1f7d93a1bff7738b0d86"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t MPU_Type::RBAR_A3</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="aa800d44f4d3520cc891d7b8d711320c1"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t MPU_Type::RNR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a0433efc1383674bc8e86cc0e830b462d"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t MPU_Type::TYPE</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_m_p_u___type.html">MPU_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_m_p_u___type.js b/Documentation/Core/html/struct_m_p_u___type.js new file mode 100644 index 0000000..26696b1 --- /dev/null +++ b/Documentation/Core/html/struct_m_p_u___type.js @@ -0,0 +1,14 @@ +var struct_m_p_u___type = +[ + [ "CTRL", "struct_m_p_u___type.html#a4d81d6aa73a9287bafba2bcc5ffc6d18", null ], + [ "RASR", "struct_m_p_u___type.html#a9236c629b7cf86f8bd2459c610fdf715", null ], + [ "RASR_A1", "struct_m_p_u___type.html#ab5a224ccd12ac55ddfe11d9eca42de48", null ], + [ "RASR_A2", "struct_m_p_u___type.html#ac60e0919871b66446a039838bcaaec3b", null ], + [ "RASR_A3", "struct_m_p_u___type.html#a9c0b2d3e3e16bb4e7dfa069652d5a155", null ], + [ "RBAR", "struct_m_p_u___type.html#ac953770d38a7d322b971d93eb8a5b062", null ], + [ "RBAR_A1", "struct_m_p_u___type.html#a13d69b9bea12861383f3a62764b02f63", null ], + [ "RBAR_A2", "struct_m_p_u___type.html#a57dc551614932150e684fcc60590c2c4", null ], + [ "RBAR_A3", "struct_m_p_u___type.html#a345911aabecd1f7d93a1bff7738b0d86", null ], + [ "RNR", "struct_m_p_u___type.html#aa800d44f4d3520cc891d7b8d711320c1", null ], + [ "TYPE", "struct_m_p_u___type.html#a0433efc1383674bc8e86cc0e830b462d", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_n_v_i_c___type.html b/Documentation/Core/html/struct_n_v_i_c___type.html new file mode 100644 index 0000000..a6b9a0a --- /dev/null +++ b/Documentation/Core/html/struct_n_v_i_c___type.html @@ -0,0 +1,340 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>NVIC_Type Struct Reference</title> +<title>CMSIS-CORE: NVIC_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" 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(NVIC). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a9fccef5a60a0d5e81fcd7869a6274f47"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a9fccef5a60a0d5e81fcd7869a6274f47">ISER</a> [8]</td></tr> +<tr class="memdesc:a9fccef5a60a0d5e81fcd7869a6274f47"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/W) Interrupt Set Enable Register. <a href="#a9fccef5a60a0d5e81fcd7869a6274f47"></a><br/></td></tr> +<tr class="separator:a9fccef5a60a0d5e81fcd7869a6274f47"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a2de17698945ea49abd58a2d45bdc9c80"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a2de17698945ea49abd58a2d45bdc9c80">RESERVED0</a> [24]</td></tr> +<tr class="memdesc:a2de17698945ea49abd58a2d45bdc9c80"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a2de17698945ea49abd58a2d45bdc9c80"></a><br/></td></tr> +<tr class="separator:a2de17698945ea49abd58a2d45bdc9c80"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a245df8bac1da05c39eadabede9323203"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a245df8bac1da05c39eadabede9323203">ICER</a> [8]</td></tr> +<tr class="memdesc:a245df8bac1da05c39eadabede9323203"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x080 (R/W) Interrupt Clear Enable Register. <a href="#a245df8bac1da05c39eadabede9323203"></a><br/></td></tr> +<tr class="separator:a245df8bac1da05c39eadabede9323203"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a6d1daf7ab6f2ba83f57ff67ae6f571fe"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a6d1daf7ab6f2ba83f57ff67ae6f571fe">RSERVED1</a> [24]</td></tr> +<tr class="memdesc:a6d1daf7ab6f2ba83f57ff67ae6f571fe"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a6d1daf7ab6f2ba83f57ff67ae6f571fe"></a><br/></td></tr> +<tr class="separator:a6d1daf7ab6f2ba83f57ff67ae6f571fe"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a8f731a9f428efc86e8d311b52ce823d0"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a8f731a9f428efc86e8d311b52ce823d0">ISPR</a> [8]</td></tr> +<tr class="memdesc:a8f731a9f428efc86e8d311b52ce823d0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x100 (R/W) Interrupt Set Pending Register. <a href="#a8f731a9f428efc86e8d311b52ce823d0"></a><br/></td></tr> +<tr class="separator:a8f731a9f428efc86e8d311b52ce823d0"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a0953af43af8ec7fd5869a1d826ce5b72"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a0953af43af8ec7fd5869a1d826ce5b72">RESERVED2</a> [24]</td></tr> +<tr class="memdesc:a0953af43af8ec7fd5869a1d826ce5b72"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a0953af43af8ec7fd5869a1d826ce5b72"></a><br/></td></tr> +<tr class="separator:a0953af43af8ec7fd5869a1d826ce5b72"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a8d8f45d9c5c67bba3c153c55574bac95"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a8d8f45d9c5c67bba3c153c55574bac95">ICPR</a> [8]</td></tr> +<tr class="memdesc:a8d8f45d9c5c67bba3c153c55574bac95"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x180 (R/W) Interrupt Clear Pending Register. <a href="#a8d8f45d9c5c67bba3c153c55574bac95"></a><br/></td></tr> +<tr class="separator:a8d8f45d9c5c67bba3c153c55574bac95"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a9dd330835dbf21471e7b5be8692d77ab"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a9dd330835dbf21471e7b5be8692d77ab">RESERVED3</a> [24]</td></tr> +<tr class="memdesc:a9dd330835dbf21471e7b5be8692d77ab"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a9dd330835dbf21471e7b5be8692d77ab"></a><br/></td></tr> +<tr class="separator:a9dd330835dbf21471e7b5be8692d77ab"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a4bca5452748ba84d64536fb6a5d795af"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a4bca5452748ba84d64536fb6a5d795af">IABR</a> [8]</td></tr> +<tr class="memdesc:a4bca5452748ba84d64536fb6a5d795af"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x200 (R/W) Interrupt Active bit Register. <a href="#a4bca5452748ba84d64536fb6a5d795af"></a><br/></td></tr> +<tr class="separator:a4bca5452748ba84d64536fb6a5d795af"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a5c0e5d507ac3c1bd5cdaaf9bbd177790"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790">RESERVED4</a> [56]</td></tr> +<tr class="memdesc:a5c0e5d507ac3c1bd5cdaaf9bbd177790"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a5c0e5d507ac3c1bd5cdaaf9bbd177790"></a><br/></td></tr> +<tr class="separator:a5c0e5d507ac3c1bd5cdaaf9bbd177790"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a7ff7364a4260df67a2784811e8da4efd"><td class="memItemLeft" align="right" valign="top">__IOM uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a7ff7364a4260df67a2784811e8da4efd">IP</a> [240]</td></tr> +<tr class="memdesc:a7ff7364a4260df67a2784811e8da4efd"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) <a href="#a7ff7364a4260df67a2784811e8da4efd"></a><br/></td></tr> +<tr class="separator:a7ff7364a4260df67a2784811e8da4efd"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a4f753b4f824270175af045ac99bc12e8"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a4f753b4f824270175af045ac99bc12e8">RESERVED5</a> [644]</td></tr> +<tr class="memdesc:a4f753b4f824270175af045ac99bc12e8"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a4f753b4f824270175af045ac99bc12e8"></a><br/></td></tr> +<tr class="separator:a4f753b4f824270175af045ac99bc12e8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a37de89637466e007171c6b135299bc75"><td class="memItemLeft" align="right" valign="top">__OM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_n_v_i_c___type.html#a37de89637466e007171c6b135299bc75">STIR</a></td></tr> +<tr class="memdesc:a37de89637466e007171c6b135299bc75"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xE00 ( /W) Software Trigger Interrupt Register. <a href="#a37de89637466e007171c6b135299bc75"></a><br/></td></tr> +<tr class="separator:a37de89637466e007171c6b135299bc75"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="a4bca5452748ba84d64536fb6a5d795af"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t NVIC_Type::IABR[8]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a245df8bac1da05c39eadabede9323203"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t NVIC_Type::ICER[8]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a8d8f45d9c5c67bba3c153c55574bac95"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t NVIC_Type::ICPR[8]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a7ff7364a4260df67a2784811e8da4efd"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint8_t NVIC_Type::IP[240]</td> + </tr> + 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<tr> + <td class="memname">uint32_t NVIC_Type::RESERVED2[24]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a9dd330835dbf21471e7b5be8692d77ab"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_Type::RESERVED3[24]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a5c0e5d507ac3c1bd5cdaaf9bbd177790"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_Type::RESERVED4[56]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a4f753b4f824270175af045ac99bc12e8"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_Type::RESERVED5[644]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a6d1daf7ab6f2ba83f57ff67ae6f571fe"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t NVIC_Type::RSERVED1[24]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a37de89637466e007171c6b135299bc75"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__OM uint32_t NVIC_Type::STIR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_n_v_i_c___type.html">NVIC_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_n_v_i_c___type.js b/Documentation/Core/html/struct_n_v_i_c___type.js new file mode 100644 index 0000000..ca47fe6 --- /dev/null +++ b/Documentation/Core/html/struct_n_v_i_c___type.js @@ -0,0 +1,16 @@ +var struct_n_v_i_c___type = +[ + [ "IABR", "struct_n_v_i_c___type.html#a4bca5452748ba84d64536fb6a5d795af", null ], + [ "ICER", "struct_n_v_i_c___type.html#a245df8bac1da05c39eadabede9323203", null ], + [ "ICPR", "struct_n_v_i_c___type.html#a8d8f45d9c5c67bba3c153c55574bac95", null ], + [ "IP", "struct_n_v_i_c___type.html#a7ff7364a4260df67a2784811e8da4efd", null ], + [ "ISER", "struct_n_v_i_c___type.html#a9fccef5a60a0d5e81fcd7869a6274f47", null ], + [ "ISPR", "struct_n_v_i_c___type.html#a8f731a9f428efc86e8d311b52ce823d0", null ], + [ "RESERVED0", "struct_n_v_i_c___type.html#a2de17698945ea49abd58a2d45bdc9c80", null ], + [ "RESERVED2", "struct_n_v_i_c___type.html#a0953af43af8ec7fd5869a1d826ce5b72", null ], + [ "RESERVED3", "struct_n_v_i_c___type.html#a9dd330835dbf21471e7b5be8692d77ab", null ], + [ "RESERVED4", "struct_n_v_i_c___type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790", null ], + [ "RESERVED5", "struct_n_v_i_c___type.html#a4f753b4f824270175af045ac99bc12e8", null ], + [ "RSERVED1", "struct_n_v_i_c___type.html#a6d1daf7ab6f2ba83f57ff67ae6f571fe", null ], + [ "STIR", "struct_n_v_i_c___type.html#a37de89637466e007171c6b135299bc75", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_s_c_b___type.html b/Documentation/Core/html/struct_s_c_b___type.html new file mode 100644 index 0000000..2bc4a47 --- /dev/null +++ b/Documentation/Core/html/struct_s_c_b___type.html @@ -0,0 +1,460 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>SCB_Type Struct Reference</title> +<title>CMSIS-CORE: SCB_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#pub-attribs">Data Fields</a> </div> + <div class="headertitle"> +<div class="title">SCB_Type Struct Reference</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Structure type to access the System Control Block (SCB). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a21e08d546d8b641bee298a459ea73e46"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a21e08d546d8b641bee298a459ea73e46">CPUID</a></td></tr> +<tr class="memdesc:a21e08d546d8b641bee298a459ea73e46"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/ ) CPUID Base Register. <a href="#a21e08d546d8b641bee298a459ea73e46"></a><br/></td></tr> +<tr class="separator:a21e08d546d8b641bee298a459ea73e46"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a0ca18ef984d132c6bf4d9b61cd00f05a"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a0ca18ef984d132c6bf4d9b61cd00f05a">ICSR</a></td></tr> +<tr class="memdesc:a0ca18ef984d132c6bf4d9b61cd00f05a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W) Interrupt Control and State Register. <a href="#a0ca18ef984d132c6bf4d9b61cd00f05a"></a><br/></td></tr> +<tr class="separator:a0ca18ef984d132c6bf4d9b61cd00f05a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a187a4578e920544ed967f98020fb8170"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a187a4578e920544ed967f98020fb8170">VTOR</a></td></tr> +<tr class="memdesc:a187a4578e920544ed967f98020fb8170"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) Vector Table Offset Register. <a href="#a187a4578e920544ed967f98020fb8170"></a><br/></td></tr> +<tr class="separator:a187a4578e920544ed967f98020fb8170"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ad3e5b8934c647eb1b7383c1894f01380"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#ad3e5b8934c647eb1b7383c1894f01380">AIRCR</a></td></tr> +<tr class="memdesc:ad3e5b8934c647eb1b7383c1894f01380"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/W) Application Interrupt and Reset Control Register. <a href="#ad3e5b8934c647eb1b7383c1894f01380"></a><br/></td></tr> +<tr class="separator:ad3e5b8934c647eb1b7383c1894f01380"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a3a4840c6fa4d1ee75544f4032c88ec34"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a3a4840c6fa4d1ee75544f4032c88ec34">SCR</a></td></tr> +<tr class="memdesc:a3a4840c6fa4d1ee75544f4032c88ec34"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x010 (R/W) System Control Register. <a href="#a3a4840c6fa4d1ee75544f4032c88ec34"></a><br/></td></tr> +<tr class="separator:a3a4840c6fa4d1ee75544f4032c88ec34"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a2d6653b0b70faac936046a02809b577f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a2d6653b0b70faac936046a02809b577f">CCR</a></td></tr> +<tr class="memdesc:a2d6653b0b70faac936046a02809b577f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x014 (R/W) Configuration Control Register. <a href="#a2d6653b0b70faac936046a02809b577f"></a><br/></td></tr> +<tr class="separator:a2d6653b0b70faac936046a02809b577f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a85768f4b3dbbc41fd760041ee1202162"><td class="memItemLeft" align="right" valign="top">__IOM uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a85768f4b3dbbc41fd760041ee1202162">SHP</a> [12]</td></tr> +<tr class="memdesc:a85768f4b3dbbc41fd760041ee1202162"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) <a href="#a85768f4b3dbbc41fd760041ee1202162"></a><br/></td></tr> +<tr class="separator:a85768f4b3dbbc41fd760041ee1202162"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a7b5ae9741a99808043394c4743b635c4"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a7b5ae9741a99808043394c4743b635c4">SHCSR</a></td></tr> +<tr class="memdesc:a7b5ae9741a99808043394c4743b635c4"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x024 (R/W) System Handler Control and State Register. <a href="#a7b5ae9741a99808043394c4743b635c4"></a><br/></td></tr> +<tr class="separator:a7b5ae9741a99808043394c4743b635c4"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a0cda9e061b42373383418663092ad19a"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a0cda9e061b42373383418663092ad19a">CFSR</a></td></tr> +<tr class="memdesc:a0cda9e061b42373383418663092ad19a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x028 (R/W) Configurable Fault Status Register. <a href="#a0cda9e061b42373383418663092ad19a"></a><br/></td></tr> +<tr class="separator:a0cda9e061b42373383418663092ad19a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a14ad254659362b9752c69afe3fd80934"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a14ad254659362b9752c69afe3fd80934">HFSR</a></td></tr> +<tr class="memdesc:a14ad254659362b9752c69afe3fd80934"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x02C (R/W) HardFault Status Register. <a href="#a14ad254659362b9752c69afe3fd80934"></a><br/></td></tr> +<tr class="separator:a14ad254659362b9752c69afe3fd80934"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a191579bde0d21ff51d30a714fd887033"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a191579bde0d21ff51d30a714fd887033">DFSR</a></td></tr> +<tr class="memdesc:a191579bde0d21ff51d30a714fd887033"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x030 (R/W) Debug Fault Status Register. <a href="#a191579bde0d21ff51d30a714fd887033"></a><br/></td></tr> +<tr class="separator:a191579bde0d21ff51d30a714fd887033"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a2d03d0b7cec2254f39eb1c46c7445e80"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a2d03d0b7cec2254f39eb1c46c7445e80">MMFAR</a></td></tr> +<tr class="memdesc:a2d03d0b7cec2254f39eb1c46c7445e80"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x034 (R/W) MemManage Fault Address Register. <a href="#a2d03d0b7cec2254f39eb1c46c7445e80"></a><br/></td></tr> +<tr class="separator:a2d03d0b7cec2254f39eb1c46c7445e80"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a3f8e7e58be4e41c88dfa78f54589271c"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a3f8e7e58be4e41c88dfa78f54589271c">BFAR</a></td></tr> +<tr class="memdesc:a3f8e7e58be4e41c88dfa78f54589271c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x038 (R/W) BusFault Address Register. <a href="#a3f8e7e58be4e41c88dfa78f54589271c"></a><br/></td></tr> +<tr class="separator:a3f8e7e58be4e41c88dfa78f54589271c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ab65372404ce64b0f0b35e2709429404e"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#ab65372404ce64b0f0b35e2709429404e">AFSR</a></td></tr> +<tr class="memdesc:ab65372404ce64b0f0b35e2709429404e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x03C (R/W) Auxiliary Fault Status Register. <a href="#ab65372404ce64b0f0b35e2709429404e"></a><br/></td></tr> +<tr class="separator:ab65372404ce64b0f0b35e2709429404e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a681c9d9e518b217976bef38c2423d83d"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a681c9d9e518b217976bef38c2423d83d">PFR</a> [2]</td></tr> +<tr class="memdesc:a681c9d9e518b217976bef38c2423d83d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x040 (R/ ) Processor Feature Register. <a href="#a681c9d9e518b217976bef38c2423d83d"></a><br/></td></tr> +<tr class="separator:a681c9d9e518b217976bef38c2423d83d"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a85dd6fe77aab17e7ea89a52c59da6004"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#a85dd6fe77aab17e7ea89a52c59da6004">DFR</a></td></tr> +<tr class="memdesc:a85dd6fe77aab17e7ea89a52c59da6004"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x048 (R/ ) Debug Feature Register. <a href="#a85dd6fe77aab17e7ea89a52c59da6004"></a><br/></td></tr> +<tr class="separator:a85dd6fe77aab17e7ea89a52c59da6004"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:af084e1b2dad004a88668efea1dfe7fa1"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#af084e1b2dad004a88668efea1dfe7fa1">ADR</a></td></tr> +<tr class="memdesc:af084e1b2dad004a88668efea1dfe7fa1"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x04C (R/ ) Auxiliary Feature Register. <a href="#af084e1b2dad004a88668efea1dfe7fa1"></a><br/></td></tr> +<tr class="separator:af084e1b2dad004a88668efea1dfe7fa1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aa11887804412bda283cc85a83fdafa7c"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#aa11887804412bda283cc85a83fdafa7c">MMFR</a> [4]</td></tr> +<tr class="memdesc:aa11887804412bda283cc85a83fdafa7c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x050 (R/ ) Memory Model Feature Register. <a href="#aa11887804412bda283cc85a83fdafa7c"></a><br/></td></tr> +<tr class="separator:aa11887804412bda283cc85a83fdafa7c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ae0136a2d2d3c45f016b2c449e92b2066"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#ae0136a2d2d3c45f016b2c449e92b2066">ISAR</a> [5]</td></tr> +<tr class="memdesc:ae0136a2d2d3c45f016b2c449e92b2066"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x060 (R/ ) Instruction Set Attributes Register. <a href="#ae0136a2d2d3c45f016b2c449e92b2066"></a><br/></td></tr> +<tr class="separator:ae0136a2d2d3c45f016b2c449e92b2066"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ac89a5d9901e3748d22a7090bfca2bee6"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#ac89a5d9901e3748d22a7090bfca2bee6">RESERVED0</a> [5]</td></tr> +<tr class="memdesc:ac89a5d9901e3748d22a7090bfca2bee6"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#ac89a5d9901e3748d22a7090bfca2bee6"></a><br/></td></tr> +<tr class="separator:ac89a5d9901e3748d22a7090bfca2bee6"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ac6a860c1b8d8154a1f00d99d23b67764"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_c_b___type.html#ac6a860c1b8d8154a1f00d99d23b67764">CPACR</a></td></tr> +<tr class="memdesc:ac6a860c1b8d8154a1f00d99d23b67764"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x088 (R/W) Coprocessor Access Control Register. <a href="#ac6a860c1b8d8154a1f00d99d23b67764"></a><br/></td></tr> +<tr class="separator:ac6a860c1b8d8154a1f00d99d23b67764"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="af084e1b2dad004a88668efea1dfe7fa1"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t SCB_Type::ADR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ab65372404ce64b0f0b35e2709429404e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::AFSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ad3e5b8934c647eb1b7383c1894f01380"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::AIRCR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a3f8e7e58be4e41c88dfa78f54589271c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::BFAR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a2d6653b0b70faac936046a02809b577f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::CCR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a0cda9e061b42373383418663092ad19a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::CFSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ac6a860c1b8d8154a1f00d99d23b67764"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::CPACR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a21e08d546d8b641bee298a459ea73e46"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t SCB_Type::CPUID</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a85dd6fe77aab17e7ea89a52c59da6004"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t SCB_Type::DFR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a191579bde0d21ff51d30a714fd887033"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::DFSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a14ad254659362b9752c69afe3fd80934"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::HFSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a0ca18ef984d132c6bf4d9b61cd00f05a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::ICSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ae0136a2d2d3c45f016b2c449e92b2066"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t SCB_Type::ISAR[5]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a2d03d0b7cec2254f39eb1c46c7445e80"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::MMFAR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="aa11887804412bda283cc85a83fdafa7c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t SCB_Type::MMFR[4]</td> + </tr> + </table> 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class="memname">__IOM uint32_t SCB_Type::SHCSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a85768f4b3dbbc41fd760041ee1202162"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint8_t SCB_Type::SHP[12]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a187a4578e920544ed967f98020fb8170"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCB_Type::VTOR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_s_c_b___type.html">SCB_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_s_c_b___type.js b/Documentation/Core/html/struct_s_c_b___type.js new file mode 100644 index 0000000..d82ca54 --- /dev/null +++ b/Documentation/Core/html/struct_s_c_b___type.js @@ -0,0 +1,24 @@ +var struct_s_c_b___type = +[ + [ "ADR", "struct_s_c_b___type.html#af084e1b2dad004a88668efea1dfe7fa1", null ], + [ "AFSR", "struct_s_c_b___type.html#ab65372404ce64b0f0b35e2709429404e", null ], + [ "AIRCR", "struct_s_c_b___type.html#ad3e5b8934c647eb1b7383c1894f01380", null ], + [ "BFAR", "struct_s_c_b___type.html#a3f8e7e58be4e41c88dfa78f54589271c", null ], + [ "CCR", "struct_s_c_b___type.html#a2d6653b0b70faac936046a02809b577f", null ], + [ "CFSR", "struct_s_c_b___type.html#a0cda9e061b42373383418663092ad19a", null ], + [ "CPACR", "struct_s_c_b___type.html#ac6a860c1b8d8154a1f00d99d23b67764", null ], + [ "CPUID", "struct_s_c_b___type.html#a21e08d546d8b641bee298a459ea73e46", null ], + [ "DFR", "struct_s_c_b___type.html#a85dd6fe77aab17e7ea89a52c59da6004", null ], + [ "DFSR", "struct_s_c_b___type.html#a191579bde0d21ff51d30a714fd887033", null ], + [ "HFSR", "struct_s_c_b___type.html#a14ad254659362b9752c69afe3fd80934", null ], + [ "ICSR", "struct_s_c_b___type.html#a0ca18ef984d132c6bf4d9b61cd00f05a", null ], + [ "ISAR", "struct_s_c_b___type.html#ae0136a2d2d3c45f016b2c449e92b2066", null ], + [ "MMFAR", "struct_s_c_b___type.html#a2d03d0b7cec2254f39eb1c46c7445e80", null ], + [ "MMFR", "struct_s_c_b___type.html#aa11887804412bda283cc85a83fdafa7c", null ], + [ "PFR", "struct_s_c_b___type.html#a681c9d9e518b217976bef38c2423d83d", null ], + [ "RESERVED0", "struct_s_c_b___type.html#ac89a5d9901e3748d22a7090bfca2bee6", null ], + [ "SCR", "struct_s_c_b___type.html#a3a4840c6fa4d1ee75544f4032c88ec34", null ], + [ "SHCSR", "struct_s_c_b___type.html#a7b5ae9741a99808043394c4743b635c4", null ], + [ "SHP", "struct_s_c_b___type.html#a85768f4b3dbbc41fd760041ee1202162", null ], + [ "VTOR", "struct_s_c_b___type.html#a187a4578e920544ed967f98020fb8170", null ] +];
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Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" 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in the SCB. +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:afe1d5fd2966d5062716613b05c8d0ae1"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_cn_s_c_b___type.html#afe1d5fd2966d5062716613b05c8d0ae1">RESERVED0</a> [1]</td></tr> +<tr class="memdesc:afe1d5fd2966d5062716613b05c8d0ae1"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#afe1d5fd2966d5062716613b05c8d0ae1"></a><br/></td></tr> +<tr class="separator:afe1d5fd2966d5062716613b05c8d0ae1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a34ec1d771245eb9bd0e3ec9336949762"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_cn_s_c_b___type.html#a34ec1d771245eb9bd0e3ec9336949762">ICTR</a></td></tr> +<tr class="memdesc:a34ec1d771245eb9bd0e3ec9336949762"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/ ) Interrupt Controller Type Register. <a href="#a34ec1d771245eb9bd0e3ec9336949762"></a><br/></td></tr> +<tr class="separator:a34ec1d771245eb9bd0e3ec9336949762"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a13af9b718dde7481f1c0344f00593c23"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_s_cn_s_c_b___type.html#a13af9b718dde7481f1c0344f00593c23">ACTLR</a></td></tr> +<tr class="memdesc:a13af9b718dde7481f1c0344f00593c23"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) Auxiliary Control Register. <a href="#a13af9b718dde7481f1c0344f00593c23"></a><br/></td></tr> +<tr class="separator:a13af9b718dde7481f1c0344f00593c23"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="a13af9b718dde7481f1c0344f00593c23"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SCnSCB_Type::ACTLR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a34ec1d771245eb9bd0e3ec9336949762"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t SCnSCB_Type::ICTR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="afe1d5fd2966d5062716613b05c8d0ae1"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t SCnSCB_Type::RESERVED0[1]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_s_cn_s_c_b___type.html">SCnSCB_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_s_cn_s_c_b___type.js b/Documentation/Core/html/struct_s_cn_s_c_b___type.js new file mode 100644 index 0000000..f0d6f06 --- /dev/null +++ b/Documentation/Core/html/struct_s_cn_s_c_b___type.js @@ -0,0 +1,6 @@ +var struct_s_cn_s_c_b___type = +[ + [ "ACTLR", "struct_s_cn_s_c_b___type.html#a13af9b718dde7481f1c0344f00593c23", null ], + [ "ICTR", "struct_s_cn_s_c_b___type.html#a34ec1d771245eb9bd0e3ec9336949762", null ], + [ "RESERVED0", "struct_s_cn_s_c_b___type.html#afe1d5fd2966d5062716613b05c8d0ae1", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_sys_tick___type.html b/Documentation/Core/html/struct_sys_tick___type.html new file mode 100644 index 0000000..7cea3e3 --- /dev/null +++ b/Documentation/Core/html/struct_sys_tick___type.html @@ -0,0 +1,205 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>SysTick_Type Struct Reference</title> +<title>CMSIS-CORE: SysTick_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#pub-attribs">Data Fields</a> </div> + <div class="headertitle"> +<div class="title">SysTick_Type Struct Reference</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Structure type to access the System Timer (SysTick). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a875e7afa5c4fd43997fb544a4ac6e37e"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_sys_tick___type.html#a875e7afa5c4fd43997fb544a4ac6e37e">CTRL</a></td></tr> +<tr class="memdesc:a875e7afa5c4fd43997fb544a4ac6e37e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/W) SysTick Control and Status Register. <a href="#a875e7afa5c4fd43997fb544a4ac6e37e"></a><br/></td></tr> +<tr class="separator:a875e7afa5c4fd43997fb544a4ac6e37e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a4780a489256bb9f54d0ba8ed4de191cd"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_sys_tick___type.html#a4780a489256bb9f54d0ba8ed4de191cd">LOAD</a></td></tr> +<tr class="memdesc:a4780a489256bb9f54d0ba8ed4de191cd"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W) SysTick Reload Value Register. <a href="#a4780a489256bb9f54d0ba8ed4de191cd"></a><br/></td></tr> +<tr class="separator:a4780a489256bb9f54d0ba8ed4de191cd"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a9b5420d17e8e43104ddd4ae5a610af93"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_sys_tick___type.html#a9b5420d17e8e43104ddd4ae5a610af93">VAL</a></td></tr> +<tr class="memdesc:a9b5420d17e8e43104ddd4ae5a610af93"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x008 (R/W) SysTick Current Value Register. <a href="#a9b5420d17e8e43104ddd4ae5a610af93"></a><br/></td></tr> +<tr class="separator:a9b5420d17e8e43104ddd4ae5a610af93"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:afcadb0c6d35b21cdc0018658a13942de"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_sys_tick___type.html#afcadb0c6d35b21cdc0018658a13942de">CALIB</a></td></tr> +<tr class="memdesc:afcadb0c6d35b21cdc0018658a13942de"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00C (R/ ) SysTick Calibration Register. <a href="#afcadb0c6d35b21cdc0018658a13942de"></a><br/></td></tr> +<tr class="separator:afcadb0c6d35b21cdc0018658a13942de"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="afcadb0c6d35b21cdc0018658a13942de"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t SysTick_Type::CALIB</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a875e7afa5c4fd43997fb544a4ac6e37e"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SysTick_Type::CTRL</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a4780a489256bb9f54d0ba8ed4de191cd"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SysTick_Type::LOAD</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a9b5420d17e8e43104ddd4ae5a610af93"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t SysTick_Type::VAL</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_sys_tick___type.html">SysTick_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/struct_sys_tick___type.js b/Documentation/Core/html/struct_sys_tick___type.js new file mode 100644 index 0000000..8833522 --- /dev/null +++ b/Documentation/Core/html/struct_sys_tick___type.js @@ -0,0 +1,7 @@ +var struct_sys_tick___type = +[ + [ "CALIB", "struct_sys_tick___type.html#afcadb0c6d35b21cdc0018658a13942de", null ], + [ "CTRL", "struct_sys_tick___type.html#a875e7afa5c4fd43997fb544a4ac6e37e", null ], + [ "LOAD", "struct_sys_tick___type.html#a4780a489256bb9f54d0ba8ed4de191cd", null ], + [ "VAL", "struct_sys_tick___type.html#a9b5420d17e8e43104ddd4ae5a610af93", null ] +];
\ No newline at end of file diff --git a/Documentation/Core/html/struct_t_p_i___type.html b/Documentation/Core/html/struct_t_p_i___type.html new file mode 100644 index 0000000..5b68d26 --- /dev/null +++ b/Documentation/Core/html/struct_t_p_i___type.html @@ -0,0 +1,505 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>TPI_Type Struct Reference</title> +<title>CMSIS-CORE: TPI_Type Struct Reference</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link 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Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark"> </span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark"> </span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark"> </span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#pub-attribs">Data Fields</a> </div> + <div class="headertitle"> +<div class="title">TPI_Type Struct Reference</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Structure type to access the Trace Port Interface Register (TPI). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a7b72598e20066133e505bb781690dc22"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a7b72598e20066133e505bb781690dc22">SSPSR</a></td></tr> +<tr class="memdesc:a7b72598e20066133e505bb781690dc22"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x000 (R/ ) Supported Parallel Port Size Register. <a href="#a7b72598e20066133e505bb781690dc22"></a><br/></td></tr> +<tr class="separator:a7b72598e20066133e505bb781690dc22"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a8826aa84e5806053395a742d38d59d0f"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a8826aa84e5806053395a742d38d59d0f">CSPSR</a></td></tr> +<tr class="memdesc:a8826aa84e5806053395a742d38d59d0f"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x004 (R/W) Current Parallel Port Size Register. <a href="#a8826aa84e5806053395a742d38d59d0f"></a><br/></td></tr> +<tr class="separator:a8826aa84e5806053395a742d38d59d0f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:af143c5e8fc9a3b2be2878e9c1f331aa9"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#af143c5e8fc9a3b2be2878e9c1f331aa9">RESERVED0</a> [2]</td></tr> +<tr class="memdesc:af143c5e8fc9a3b2be2878e9c1f331aa9"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#af143c5e8fc9a3b2be2878e9c1f331aa9"></a><br/></td></tr> +<tr class="separator:af143c5e8fc9a3b2be2878e9c1f331aa9"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a9e5e4421ef9c3d5b7ff8b24abd4e99b3"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a9e5e4421ef9c3d5b7ff8b24abd4e99b3">ACPR</a></td></tr> +<tr class="memdesc:a9e5e4421ef9c3d5b7ff8b24abd4e99b3"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register. <a href="#a9e5e4421ef9c3d5b7ff8b24abd4e99b3"></a><br/></td></tr> +<tr class="separator:a9e5e4421ef9c3d5b7ff8b24abd4e99b3"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ac3956fe93987b725d89d3be32738da12"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#ac3956fe93987b725d89d3be32738da12">RESERVED1</a> [55]</td></tr> +<tr class="memdesc:ac3956fe93987b725d89d3be32738da12"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#ac3956fe93987b725d89d3be32738da12"></a><br/></td></tr> +<tr class="separator:ac3956fe93987b725d89d3be32738da12"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a12f79d4e3ddc69893ba8bff890d04cc5"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a12f79d4e3ddc69893ba8bff890d04cc5">SPPR</a></td></tr> +<tr class="memdesc:a12f79d4e3ddc69893ba8bff890d04cc5"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0F0 (R/W) Selected Pin Protocol Register. <a href="#a12f79d4e3ddc69893ba8bff890d04cc5"></a><br/></td></tr> +<tr class="separator:a12f79d4e3ddc69893ba8bff890d04cc5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ac7bbb92e6231b9b38ac483f7d161a096"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#ac7bbb92e6231b9b38ac483f7d161a096">RESERVED2</a> [131]</td></tr> +<tr class="memdesc:ac7bbb92e6231b9b38ac483f7d161a096"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#ac7bbb92e6231b9b38ac483f7d161a096"></a><br/></td></tr> +<tr class="separator:ac7bbb92e6231b9b38ac483f7d161a096"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a6c47a0b4c7ffc66093ef993d36bb441c"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a6c47a0b4c7ffc66093ef993d36bb441c">FFSR</a></td></tr> +<tr class="memdesc:a6c47a0b4c7ffc66093ef993d36bb441c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x300 (R/ ) Formatter and Flush Status Register. <a href="#a6c47a0b4c7ffc66093ef993d36bb441c"></a><br/></td></tr> +<tr class="separator:a6c47a0b4c7ffc66093ef993d36bb441c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a3f68b6e73561b4849ebf953a894df8d2"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a3f68b6e73561b4849ebf953a894df8d2">FFCR</a></td></tr> +<tr class="memdesc:a3f68b6e73561b4849ebf953a894df8d2"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x304 (R/W) Formatter and Flush Control Register. <a href="#a3f68b6e73561b4849ebf953a894df8d2"></a><br/></td></tr> +<tr class="separator:a3f68b6e73561b4849ebf953a894df8d2"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ad6901bfd8a0089ca7e8a20475cf494a8"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#ad6901bfd8a0089ca7e8a20475cf494a8">FSCR</a></td></tr> +<tr class="memdesc:ad6901bfd8a0089ca7e8a20475cf494a8"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x308 (R/ ) Formatter Synchronization Counter Register. <a href="#ad6901bfd8a0089ca7e8a20475cf494a8"></a><br/></td></tr> +<tr class="separator:ad6901bfd8a0089ca7e8a20475cf494a8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a31700c8cdd26e4c094db72af33d9f24c"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a31700c8cdd26e4c094db72af33d9f24c">RESERVED3</a> [759]</td></tr> +<tr class="memdesc:a31700c8cdd26e4c094db72af33d9f24c"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a31700c8cdd26e4c094db72af33d9f24c"></a><br/></td></tr> +<tr class="separator:a31700c8cdd26e4c094db72af33d9f24c"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a4d4cd2357f72333a82a1313228287bbd"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a4d4cd2357f72333a82a1313228287bbd">TRIGGER</a></td></tr> +<tr class="memdesc:a4d4cd2357f72333a82a1313228287bbd"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xEE8 (R/ ) TRIGGER. <a href="#a4d4cd2357f72333a82a1313228287bbd"></a><br/></td></tr> +<tr class="separator:a4d4cd2357f72333a82a1313228287bbd"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aa4d7b5cf39dff9f53bf7f69bc287a814"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#aa4d7b5cf39dff9f53bf7f69bc287a814">FIFO0</a></td></tr> +<tr class="memdesc:aa4d7b5cf39dff9f53bf7f69bc287a814"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xEEC (R/ ) Integration ETM Data. <a href="#aa4d7b5cf39dff9f53bf7f69bc287a814"></a><br/></td></tr> +<tr class="separator:aa4d7b5cf39dff9f53bf7f69bc287a814"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ab358319b969d3fed0f89bbe33e9f1652"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#ab358319b969d3fed0f89bbe33e9f1652">ITATBCTR2</a></td></tr> +<tr class="memdesc:ab358319b969d3fed0f89bbe33e9f1652"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xEF0 (R/ ) ITATBCTR2. <a href="#ab358319b969d3fed0f89bbe33e9f1652"></a><br/></td></tr> +<tr class="separator:ab358319b969d3fed0f89bbe33e9f1652"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a684071216fafee4e80be6aaa932cec46"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a684071216fafee4e80be6aaa932cec46">RESERVED4</a> [1]</td></tr> +<tr class="memdesc:a684071216fafee4e80be6aaa932cec46"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a684071216fafee4e80be6aaa932cec46"></a><br/></td></tr> +<tr class="separator:a684071216fafee4e80be6aaa932cec46"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aaa573b2e073e76e93c51ecec79c616d0"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#aaa573b2e073e76e93c51ecec79c616d0">ITATBCTR0</a></td></tr> +<tr class="memdesc:aaa573b2e073e76e93c51ecec79c616d0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xEF8 (R/ ) ITATBCTR0. <a href="#aaa573b2e073e76e93c51ecec79c616d0"></a><br/></td></tr> +<tr class="separator:aaa573b2e073e76e93c51ecec79c616d0"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a061372fcd72f1eea871e2d9c1be849bc"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a061372fcd72f1eea871e2d9c1be849bc">FIFO1</a></td></tr> +<tr class="memdesc:a061372fcd72f1eea871e2d9c1be849bc"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xEFC (R/ ) Integration ITM Data. <a href="#a061372fcd72f1eea871e2d9c1be849bc"></a><br/></td></tr> +<tr class="separator:a061372fcd72f1eea871e2d9c1be849bc"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aaa4c823c10f115f7517c82ef86a5a68d"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#aaa4c823c10f115f7517c82ef86a5a68d">ITCTRL</a></td></tr> +<tr class="memdesc:aaa4c823c10f115f7517c82ef86a5a68d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xF00 (R/W) Integration Mode Control. <a href="#aaa4c823c10f115f7517c82ef86a5a68d"></a><br/></td></tr> +<tr class="separator:aaa4c823c10f115f7517c82ef86a5a68d"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a3f80dd93f6bab6524603a7aa58de9a30"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a3f80dd93f6bab6524603a7aa58de9a30">RESERVED5</a> [39]</td></tr> +<tr class="memdesc:a3f80dd93f6bab6524603a7aa58de9a30"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a3f80dd93f6bab6524603a7aa58de9a30"></a><br/></td></tr> +<tr class="separator:a3f80dd93f6bab6524603a7aa58de9a30"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:af8b7d15fa5252b733dd4b11fa1b5730a"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#af8b7d15fa5252b733dd4b11fa1b5730a">CLAIMSET</a></td></tr> +<tr class="memdesc:af8b7d15fa5252b733dd4b11fa1b5730a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xFA0 (R/W) Claim tag set. <a href="#af8b7d15fa5252b733dd4b11fa1b5730a"></a><br/></td></tr> +<tr class="separator:af8b7d15fa5252b733dd4b11fa1b5730a"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a0e10e292cb019a832b03ddd055b2f6ac"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a0e10e292cb019a832b03ddd055b2f6ac">CLAIMCLR</a></td></tr> +<tr class="memdesc:a0e10e292cb019a832b03ddd055b2f6ac"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xFA4 (R/W) Claim tag clear. <a href="#a0e10e292cb019a832b03ddd055b2f6ac"></a><br/></td></tr> +<tr class="separator:a0e10e292cb019a832b03ddd055b2f6ac"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a476ca23fbc9480f1697fbec871130550"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#a476ca23fbc9480f1697fbec871130550">RESERVED7</a> [8]</td></tr> +<tr class="memdesc:a476ca23fbc9480f1697fbec871130550"><td class="mdescLeft"> </td><td class="mdescRight">Reserved. <a href="#a476ca23fbc9480f1697fbec871130550"></a><br/></td></tr> +<tr class="separator:a476ca23fbc9480f1697fbec871130550"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:abc0ecda8a5446bc754080276bad77514"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#abc0ecda8a5446bc754080276bad77514">DEVID</a></td></tr> +<tr class="memdesc:abc0ecda8a5446bc754080276bad77514"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xFC8 (R/ ) TPIU_DEVID. <a href="#abc0ecda8a5446bc754080276bad77514"></a><br/></td></tr> +<tr class="separator:abc0ecda8a5446bc754080276bad77514"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ad98855854a719bbea33061e71529a472"><td class="memItemLeft" align="right" valign="top">__IM uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_t_p_i___type.html#ad98855854a719bbea33061e71529a472">DEVTYPE</a></td></tr> +<tr class="memdesc:ad98855854a719bbea33061e71529a472"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xFCC (R/ ) TPIU_DEVTYPE. <a href="#ad98855854a719bbea33061e71529a472"></a><br/></td></tr> +<tr class="separator:ad98855854a719bbea33061e71529a472"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="a9e5e4421ef9c3d5b7ff8b24abd4e99b3"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t TPI_Type::ACPR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a0e10e292cb019a832b03ddd055b2f6ac"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t TPI_Type::CLAIMCLR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="af8b7d15fa5252b733dd4b11fa1b5730a"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t TPI_Type::CLAIMSET</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a8826aa84e5806053395a742d38d59d0f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t TPI_Type::CSPSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="abc0ecda8a5446bc754080276bad77514"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t TPI_Type::DEVID</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ad98855854a719bbea33061e71529a472"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t TPI_Type::DEVTYPE</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a3f68b6e73561b4849ebf953a894df8d2"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t TPI_Type::FFCR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a6c47a0b4c7ffc66093ef993d36bb441c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t TPI_Type::FFSR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="aa4d7b5cf39dff9f53bf7f69bc287a814"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IM uint32_t TPI_Type::FIFO0</td> + </tr> + </table> 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class="memname">__IM uint32_t TPI_Type::ITATBCTR2</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="aaa4c823c10f115f7517c82ef86a5a68d"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">__IOM uint32_t TPI_Type::ITCTRL</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="af143c5e8fc9a3b2be2878e9c1f331aa9"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t TPI_Type::RESERVED0[2]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ac3956fe93987b725d89d3be32738da12"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t TPI_Type::RESERVED1[55]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ac7bbb92e6231b9b38ac483f7d161a096"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t TPI_Type::RESERVED2[131]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a31700c8cdd26e4c094db72af33d9f24c"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t TPI_Type::RESERVED3[759]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a684071216fafee4e80be6aaa932cec46"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t TPI_Type::RESERVED4[1]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a3f80dd93f6bab6524603a7aa58de9a30"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t TPI_Type::RESERVED5[39]</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> 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TPI_Type::TRIGGER</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="struct_t_p_i___type.html">TPI_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. 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These functions are device specific and need adaptations. In addition, the file might have configuration settings for the device such as XTAL frequency or PLL prescaler settings.</p> +<p>For devices with external memory BUS the system_<device>.c also configures the BUS system.</p> +<p>The silicon vendor might expose other functions (i.e. for power configuration) in the system_<device>.c file. In case of additional features the function prototypes need to be added to the system_<device>.h header file.</p> +<h1><a class="anchor" id="system_Device_sec"></a> +system_Device.c Template File</h1> +<p>The <a class="el" href="system_c_pg.html#system_Device_sec">system_Device.c Template File</a> for the Cortex-M3 is shown below.</p> +<pre class="fragment">/**************************************************************************//** + * @file system_<Device>.c + * @brief CMSIS Cortex-M# Device Peripheral Access Layer Source File for + * Device <Device> + * @version V3.10 + * @date 23. November 2012 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#include <stdint.h> +#include "<Device>.h" + + +/*---------------------------------------------------------------------------- + DEFINES + *----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +/* ToDo: add here your necessary defines for device initialization + following is an example for different system frequencies */ +#define __HSI ( 6000000UL) +#define __XTAL (12000000UL) /* Oscillator frequency */ +#define __SYS_OSC_CLK ( ___HSI) /* Main oscillator frequency */ + +#define __SYSTEM_CLOCK (4*__XTAL) + + +/*---------------------------------------------------------------------------- + Clock Variable definitions + *----------------------------------------------------------------------------*/ +/* ToDo: initialize SystemCoreClock with the system core clock frequency value + achieved after system intitialization. + This means system core clock frequency after call to SystemInit() */ +uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/ + + +/*---------------------------------------------------------------------------- + Clock functions + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ +{ +/* ToDo: add code to calculate the system frequency based upon the current + register settings. + This function can be used to retrieve the system core clock frequeny + after user changed register sittings. */ + SystemCoreClock = __SYSTEM_CLOCK; +} + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit (void) +{ +/* ToDo: add code to initialize the system + do not use global variables because this function is called before + reaching pre-main. RW section maybe overwritten afterwards. */ + SystemCoreClock = __SYSTEM_CLOCK; +} +</pre><h1><a class="anchor" id="system_Device_h_sec"></a> +system_Device.h Template File</h1> +<p>The system_<device>.h header file contains prototypes to access the public functions in the system_<device>.c file. The <a class="el" href="system_c_pg.html#system_Device_h_sec">system_Device.h Template File</a> is shown below.</p> +<pre class="fragment">/**************************************************************************//** + * @file system_<Device>.h + * @brief CMSIS Cortex-M# Device Peripheral Access Layer Header File for + * Device <Device> + * @version V3.10 + * @date 23. November 2012 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef SYSTEM_<Device>_H /* ToDo: replace '<Device>' with your device name */ +#define SYSTEM_<Device>_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + +/** + * Update SystemCoreClock variable + * + * @param none + * @return none + * + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM_<Device>_H */ +</pre> </div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="_templates_pg.html">Template Files</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. 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href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="summary"> +<a href="#pub-attribs">Data Fields</a> </div> + <div class="headertitle"> +<div class="title">APSR_Type Union Reference</div> </div> +</div><!--header--> +<div class="contents"> + +<p>Union type to access the Application Program Status Register (APSR). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a7dbc79a057ded4b11ca5323fc2d5ab14"><td class="memItemLeft" >struct {</td></tr> +<tr class="memitem:a40a16164602a889d31a6bd92e9ccde92"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_a_p_s_r___type.html#afbce95646fd514c10aa85ec0a33db728">_reserved0</a>:27</td></tr> +<tr class="memdesc:a40a16164602a889d31a6bd92e9ccde92"><td class="mdescLeft"> </td><td class="mdescRight">bit: 0..26 Reserved <a href="#a40a16164602a889d31a6bd92e9ccde92"></a><br/></td></tr> +<tr class="separator:a40a16164602a889d31a6bd92e9ccde92"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aebf336ed17f711353ef40d16b9fcc305"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_a_p_s_r___type.html#a22d10913489d24ab08bd83457daa88de">Q</a>:1</td></tr> +<tr class="memdesc:aebf336ed17f711353ef40d16b9fcc305"><td class="mdescLeft"> </td><td class="mdescRight">bit: 27 Saturation condition flag <a href="#aebf336ed17f711353ef40d16b9fcc305"></a><br/></td></tr> +<tr class="separator:aebf336ed17f711353ef40d16b9fcc305"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a8003e190933fcfbff0b0878f48aa32b6"><td class="memItemLeft" >   uint32_t   <a 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>   uint32_t   <a class="el" href="union_a_p_s_r___type.html#a3b04d58738b66a28ff13f23d8b0ba7e5">Z</a>:1</td></tr> +<tr class="memdesc:a8030e626bbdfa4d8f50cf01ea2d1c0ea"><td class="mdescLeft"> </td><td class="mdescRight">bit: 30 Zero condition code flag <a href="#a8030e626bbdfa4d8f50cf01ea2d1c0ea"></a><br/></td></tr> +<tr class="separator:a8030e626bbdfa4d8f50cf01ea2d1c0ea"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a77dede9507ca1f554043f49035299f2e"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_a_p_s_r___type.html#a7e7bbba9b00b0bb3283dc07f1abe37e0">N</a>:1</td></tr> +<tr class="memdesc:a77dede9507ca1f554043f49035299f2e"><td class="mdescLeft"> </td><td class="mdescRight">bit: 31 Negative condition code flag <a href="#a77dede9507ca1f554043f49035299f2e"></a><br/></td></tr> +<tr class="separator:a77dede9507ca1f554043f49035299f2e"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a7dbc79a057ded4b11ca5323fc2d5ab14"><td class="memItemLeft" valign="top">} </td><td class="memItemRight" valign="bottom"><a class="el" href="union_a_p_s_r___type.html#a7dbc79a057ded4b11ca5323fc2d5ab14">b</a></td></tr> +<tr class="memdesc:a7dbc79a057ded4b11ca5323fc2d5ab14"><td class="mdescLeft"> </td><td class="mdescRight">Structure used for bit access. <a href="#a7dbc79a057ded4b11ca5323fc2d5ab14"></a><br/></td></tr> +<tr class="separator:a7dbc79a057ded4b11ca5323fc2d5ab14"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ae4c2ef8c9430d7b7bef5cbfbbaed3a94"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="union_a_p_s_r___type.html#ae4c2ef8c9430d7b7bef5cbfbbaed3a94">w</a></td></tr> +<tr class="memdesc:ae4c2ef8c9430d7b7bef5cbfbbaed3a94"><td class="mdescLeft"> </td><td class="mdescRight">Type used for word access. <a href="#ae4c2ef8c9430d7b7bef5cbfbbaed3a94"></a><br/></td></tr> +<tr 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id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.2 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li><a href="pages.html"><span>Usage and Description</span></a></li> + <li><a href="modules.html"><span>Reference</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" 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+$(document).ready(function(){initNavTree('union_c_o_n_t_r_o_l___type.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span 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+<div class="contents"> + +<p>Union type to access the Control Registers (CONTROL). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:adc6a38ab2980d0e9577b5a871da14eb9"><td class="memItemLeft" >struct {</td></tr> +<tr class="memitem:a666f4d16841194dd2ffb38cd9c1ff021"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_c_o_n_t_r_o_l___type.html#a35c1732cf153b7b5c4bd321cf1de9605">nPRIV</a>:1</td></tr> +<tr class="memdesc:a666f4d16841194dd2ffb38cd9c1ff021"><td class="mdescLeft"> </td><td class="mdescRight">bit: 0 Execution privilege in Thread mode <a href="#a666f4d16841194dd2ffb38cd9c1ff021"></a><br/></td></tr> +<tr class="separator:a666f4d16841194dd2ffb38cd9c1ff021"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ae452742bb12b77c4cae20418495334f1"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_c_o_n_t_r_o_l___type.html#a8cc085fea1c50a8bd9adea63931ee8e2">SPSEL</a>:1</td></tr> +<tr class="memdesc:ae452742bb12b77c4cae20418495334f1"><td class="mdescLeft"> </td><td class="mdescRight">bit: 1 Stack to be used <a href="#ae452742bb12b77c4cae20418495334f1"></a><br/></td></tr> +<tr class="separator:ae452742bb12b77c4cae20418495334f1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a63fd27005fb7c3828f9f145a4fccf9a8"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_c_o_n_t_r_o_l___type.html#ac62cfff08e6f055e0101785bad7094cd">FPCA</a>:1</td></tr> +<tr class="memdesc:a63fd27005fb7c3828f9f145a4fccf9a8"><td class="mdescLeft"> </td><td class="mdescRight">bit: 2 FP extension active flag <a href="#a63fd27005fb7c3828f9f145a4fccf9a8"></a><br/></td></tr> +<tr class="separator:a63fd27005fb7c3828f9f145a4fccf9a8"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ada408fafd29cbe29e0c71ef479bd7564"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_c_o_n_t_r_o_l___type.html#af8c314273a1e4970a5671bd7f8184f50">_reserved0</a>:29</td></tr> +<tr class="memdesc:ada408fafd29cbe29e0c71ef479bd7564"><td class="mdescLeft"> </td><td class="mdescRight">bit: 3..31 Reserved <a href="#ada408fafd29cbe29e0c71ef479bd7564"></a><br/></td></tr> +<tr class="separator:ada408fafd29cbe29e0c71ef479bd7564"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:adc6a38ab2980d0e9577b5a871da14eb9"><td class="memItemLeft" valign="top">} </td><td class="memItemRight" valign="bottom"><a class="el" href="union_c_o_n_t_r_o_l___type.html#adc6a38ab2980d0e9577b5a871da14eb9">b</a></td></tr> +<tr class="memdesc:adc6a38ab2980d0e9577b5a871da14eb9"><td class="mdescLeft"> </td><td class="mdescRight">Structure used for bit access. <a href="#adc6a38ab2980d0e9577b5a871da14eb9"></a><br/></td></tr> +<tr class="separator:adc6a38ab2980d0e9577b5a871da14eb9"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a6b642cca3d96da660b1198c133ca2a1f"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="union_c_o_n_t_r_o_l___type.html#a6b642cca3d96da660b1198c133ca2a1f">w</a></td></tr> +<tr class="memdesc:a6b642cca3d96da660b1198c133ca2a1f"><td class="mdescLeft"> </td><td class="mdescRight">Type used for word access. <a href="#a6b642cca3d96da660b1198c133ca2a1f"></a><br/></td></tr> +<tr class="separator:a6b642cca3d96da660b1198c133ca2a1f"><td class="memSeparator" colspan="2"> </td></tr> +</table> +<h2 class="groupheader">Field Documentation</h2> +<a class="anchor" id="af8c314273a1e4970a5671bd7f8184f50"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t CONTROL_Type::_reserved0</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="adc6a38ab2980d0e9577b5a871da14eb9"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">struct { ... } CONTROL_Type::b</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="ac62cfff08e6f055e0101785bad7094cd"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t CONTROL_Type::FPCA</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a35c1732cf153b7b5c4bd321cf1de9605"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t CONTROL_Type::nPRIV</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a8cc085fea1c50a8bd9adea63931ee8e2"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t CONTROL_Type::SPSEL</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a6b642cca3d96da660b1198c133ca2a1f"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t CONTROL_Type::w</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="union_c_o_n_t_r_o_l___type.html">CONTROL_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.2 + --> + </li> + </ul> +</div> +</body> +</html> diff --git a/Documentation/Core/html/union_c_o_n_t_r_o_l___type.js b/Documentation/Core/html/union_c_o_n_t_r_o_l___type.js new file mode 100644 index 0000000..eb2c173 --- /dev/null +++ b/Documentation/Core/html/union_c_o_n_t_r_o_l___type.js @@ -0,0 +1,9 @@ +var union_c_o_n_t_r_o_l___type = +[ + [ "_reserved0", "union_c_o_n_t_r_o_l___type.html#af8c314273a1e4970a5671bd7f8184f50", null ], + [ "b", "union_c_o_n_t_r_o_l___type.html#adc6a38ab2980d0e9577b5a871da14eb9", null ], + [ "FPCA", "union_c_o_n_t_r_o_l___type.html#ac62cfff08e6f055e0101785bad7094cd", null ], + [ "nPRIV", "union_c_o_n_t_r_o_l___type.html#a35c1732cf153b7b5c4bd321cf1de9605", null ], + [ "SPSEL", "union_c_o_n_t_r_o_l___type.html#a8cc085fea1c50a8bd9adea63931ee8e2", null ], + [ "w", "union_c_o_n_t_r_o_l___type.html#a6b642cca3d96da660b1198c133ca2a1f", null ] +];
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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" 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+</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:add0d6497bd50c25569ea22b48a03ec50"><td class="memItemLeft" >struct {</td></tr> +<tr class="memitem:afaf0827367274b557f0d28e0a2398229"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_i_p_s_r___type.html#ab46e5f1b2f4d17cfb9aca4fffcbb2fa5">ISR</a>:9</td></tr> +<tr class="memdesc:afaf0827367274b557f0d28e0a2398229"><td class="mdescLeft"> </td><td class="mdescRight">bit: 0.. 8 Exception number <a href="#afaf0827367274b557f0d28e0a2398229"></a><br/></td></tr> +<tr class="separator:afaf0827367274b557f0d28e0a2398229"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:aa0449af1acf460572a66b57e2d07a931"><td class="memItemLeft" >   uint32_t   <a class="el" href="union_i_p_s_r___type.html#ad2eb0a06de4f03f58874a727716aa9aa">_reserved0</a>:23</td></tr> +<tr class="memdesc:aa0449af1acf460572a66b57e2d07a931"><td class="mdescLeft"> </td><td class="mdescRight">bit: 9..31 Reserved <a href="#aa0449af1acf460572a66b57e2d07a931"></a><br/></td></tr> +<tr class="separator:aa0449af1acf460572a66b57e2d07a931"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:add0d6497bd50c25569ea22b48a03ec50"><td class="memItemLeft" valign="top">} </td><td class="memItemRight" valign="bottom"><a class="el" href="union_i_p_s_r___type.html#add0d6497bd50c25569ea22b48a03ec50">b</a></td></tr> +<tr class="memdesc:add0d6497bd50c25569ea22b48a03ec50"><td class="mdescLeft"> </td><td class="mdescRight">Structure used for bit access. <a href="#add0d6497bd50c25569ea22b48a03ec50"></a><br/></td></tr> +<tr class="separator:add0d6497bd50c25569ea22b48a03ec50"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a4adca999d3a0bc1ae682d73ea7cfa879"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a 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class="anchor" id="ab46e5f1b2f4d17cfb9aca4fffcbb2fa5"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t IPSR_Type::ISR</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +<a class="anchor" id="a4adca999d3a0bc1ae682d73ea7cfa879"></a> +<div class="memitem"> +<div class="memproto"> + <table class="memname"> + <tr> + <td class="memname">uint32_t IPSR_Type::w</td> + </tr> + </table> +</div><div class="memdoc"> + +</div> +</div> +</div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="union_i_p_s_r___type.html">IPSR_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. 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id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark"> </span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark"> </span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark"> </span>Variables</a><a class="SelectItem" href="javascript:void(0)" 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(xPSR). +</p> +<table class="memberdecls"> +<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> +Data Fields</h2></td></tr> +<tr class="memitem:a3b1063bb5cdad67e037cba993b693b70"><td class="memItemLeft" >struct {</td></tr> +<tr class="memitem:a14aa41f658bf70c2d44435d24761a760"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#a3e9120dcf1a829fc8d2302b4d0673970">ISR</a>:9</td></tr> +<tr class="memdesc:a14aa41f658bf70c2d44435d24761a760"><td class="mdescLeft"> </td><td class="mdescRight">bit: 0.. 8 Exception number <a href="#a14aa41f658bf70c2d44435d24761a760"></a><br/></td></tr> +<tr class="separator:a14aa41f658bf70c2d44435d24761a760"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a7af0067da9805e481890c297bf4ed70f"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#af438e0f407357e914a70b5bd4d6a97c5">_reserved0</a>:15</td></tr> +<tr class="memdesc:a7af0067da9805e481890c297bf4ed70f"><td class="mdescLeft"> </td><td class="mdescRight">bit: 9..23 Reserved <a href="#a7af0067da9805e481890c297bf4ed70f"></a><br/></td></tr> +<tr class="separator:a7af0067da9805e481890c297bf4ed70f"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a5224815d0f90fb7d26c7007bfb8e38d5"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#a7eed9fe24ae8d354cd76ae1c1110a658">T</a>:1</td></tr> +<tr class="memdesc:a5224815d0f90fb7d26c7007bfb8e38d5"><td class="mdescLeft"> </td><td class="mdescRight">bit: 24 Thumb bit (read 0) <a href="#a5224815d0f90fb7d26c7007bfb8e38d5"></a><br/></td></tr> +<tr class="separator:a5224815d0f90fb7d26c7007bfb8e38d5"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a0c9d4cef85e4cc7d6dc701d7d3377af0"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#a3200966922a194d84425e2807a7f1328">IT</a>:2</td></tr> +<tr class="memdesc:a0c9d4cef85e4cc7d6dc701d7d3377af0"><td class="mdescLeft"> </td><td class="mdescRight">bit: 25..26 saved IT state (read 0) <a href="#a0c9d4cef85e4cc7d6dc701d7d3377af0"></a><br/></td></tr> +<tr class="separator:a0c9d4cef85e4cc7d6dc701d7d3377af0"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a0713a6888c5b556e9050aa82d2c1b0e1"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#add7cbd2b0abd8954d62cd7831796ac7c">Q</a>:1</td></tr> +<tr class="memdesc:a0713a6888c5b556e9050aa82d2c1b0e1"><td class="mdescLeft"> </td><td class="mdescRight">bit: 27 Saturation condition flag <a href="#a0713a6888c5b556e9050aa82d2c1b0e1"></a><br/></td></tr> +<tr class="separator:a0713a6888c5b556e9050aa82d2c1b0e1"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a6dd30396c78f8bc53d30ca13b058cbb2"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#af14df16ea0690070c45b95f2116b7a0a">V</a>:1</td></tr> +<tr class="memdesc:a6dd30396c78f8bc53d30ca13b058cbb2"><td class="mdescLeft"> </td><td class="mdescRight">bit: 28 Overflow condition code flag <a href="#a6dd30396c78f8bc53d30ca13b058cbb2"></a><br/></td></tr> +<tr class="separator:a6dd30396c78f8bc53d30ca13b058cbb2"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ae33d83822b56cd849b9fa9affddd59b2"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#a40213a6b5620410cac83b0d89564609d">C</a>:1</td></tr> +<tr class="memdesc:ae33d83822b56cd849b9fa9affddd59b2"><td class="mdescLeft"> </td><td class="mdescRight">bit: 29 Carry condition code flag <a href="#ae33d83822b56cd849b9fa9affddd59b2"></a><br/></td></tr> +<tr class="separator:ae33d83822b56cd849b9fa9affddd59b2"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:ac1f7475b01a46aef06d9f53d3a2a69ef"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#a1e5d9801013d5146f2e02d9b7b3da562">Z</a>:1</td></tr> +<tr class="memdesc:ac1f7475b01a46aef06d9f53d3a2a69ef"><td class="mdescLeft"> </td><td class="mdescRight">bit: 30 Zero condition code flag <a href="#ac1f7475b01a46aef06d9f53d3a2a69ef"></a><br/></td></tr> +<tr class="separator:ac1f7475b01a46aef06d9f53d3a2a69ef"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a38ba57343e56c653939fd792c19af047"><td class="memItemLeft" >   uint32_t   <a class="el" href="unionx_p_s_r___type.html#a2db9a52f6d42809627d1a7a607c5dbc5">N</a>:1</td></tr> +<tr class="memdesc:a38ba57343e56c653939fd792c19af047"><td class="mdescLeft"> </td><td class="mdescRight">bit: 31 Negative condition code flag <a href="#a38ba57343e56c653939fd792c19af047"></a><br/></td></tr> +<tr class="separator:a38ba57343e56c653939fd792c19af047"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a3b1063bb5cdad67e037cba993b693b70"><td class="memItemLeft" valign="top">} </td><td class="memItemRight" valign="bottom"><a class="el" href="unionx_p_s_r___type.html#a3b1063bb5cdad67e037cba993b693b70">b</a></td></tr> +<tr class="memdesc:a3b1063bb5cdad67e037cba993b693b70"><td class="mdescLeft"> </td><td class="mdescRight">Structure used for bit access. <a href="#a3b1063bb5cdad67e037cba993b693b70"></a><br/></td></tr> +<tr class="separator:a3b1063bb5cdad67e037cba993b693b70"><td class="memSeparator" colspan="2"> </td></tr> +<tr class="memitem:a1a47176768f45f79076c4f5b1b534bc2"><td class="memItemLeft" align="right" valign="top">uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="unionx_p_s_r___type.html#a1a47176768f45f79076c4f5b1b534bc2">w</a></td></tr> +<tr class="memdesc:a1a47176768f45f79076c4f5b1b534bc2"><td class="mdescLeft"> </td><td class="mdescRight">Type used for word access. <a href="#a1a47176768f45f79076c4f5b1b534bc2"></a><br/></td></tr> +<tr class="separator:a1a47176768f45f79076c4f5b1b534bc2"><td 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doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="unionx_p_s_r___type.html">xPSR_Type</a></li> + <li class="footer">Generated on Tue Oct 27 2015 14:35:21 for CMSIS-CORE by ARM Ltd. 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