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| author | Ali Labbene <ali.labbene@st.com> | 2019-12-11 08:59:21 +0100 |
|---|---|---|
| committer | Ali Labbene <ali.labbene@st.com> | 2019-12-16 16:35:24 +0100 |
| commit | 9f95ff5b6ba01db09552b84a0ab79607060a2666 (patch) | |
| tree | 8a6e0dda832555c692307869aed49d07ee7facfe /docs/SVD/html/elem_cpu.html | |
| parent | 76177aa280494bb36d7a0bcbda1078d4db717020 (diff) | |
| download | st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.gz st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.bz2 st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.zip | |
Official ARM version: v5.4.0
Add CMSIS V5.4.0, please refer to index.html available under \docs folder.
Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure
used in existing projects, and thus avoid projects mass update
Note: the following components have been removed from ARM original delivery (as not used in ST packages)
- CMSIS_EW2018.pdf
- .gitattributes
- .gitignore
- \Device
- \CMSIS
- \CoreValidation
- \DAP
- \Documentation
- \DoxyGen
- \Driver
- \Pack
- \RTOS\CMSIS_RTOS_Tutorial.pdf
- \RTOS\RTX
- \RTOS\Template
- \RTOS2\RTX
- \Utilities
- All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2
Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3
Diffstat (limited to 'docs/SVD/html/elem_cpu.html')
| -rw-r--r-- | docs/SVD/html/elem_cpu.html | 301 |
1 files changed, 301 insertions, 0 deletions
diff --git a/docs/SVD/html/elem_cpu.html b/docs/SVD/html/elem_cpu.html new file mode 100644 index 0000000..af2a026 --- /dev/null +++ b/docs/SVD/html/elem_cpu.html @@ -0,0 +1,301 @@ +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml"> +<head> +<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> +<meta http-equiv="X-UA-Compatible" content="IE=9"/> +<title>/device/cpu element</title> +<title>CMSIS-SVD: /device/cpu element</title> +<link href="tabs.css" rel="stylesheet" type="text/css"/> +<link href="cmsis.css" rel="stylesheet" type="text/css" /> +<script type="text/javascript" src="jquery.js"></script> +<script type="text/javascript" src="dynsections.js"></script> +<script type="text/javascript" src="printComponentTabs.js"></script> +<link href="navtree.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="resize.js"></script> +<script type="text/javascript" src="navtree.js"></script> +<script type="text/javascript"> + $(document).ready(initResizable); + $(window).load(resizeHeight); +</script> +<link href="search/search.css" rel="stylesheet" type="text/css"/> +<script type="text/javascript" src="search/search.js"></script> +<script type="text/javascript"> + $(document).ready(function() { searchBox.OnSelectItem(0); }); +</script> +</head> +<body> +<div id="top"><!-- do not remove this div, it is closed by doxygen! --> +<div id="titlearea"> +<table cellspacing="0" cellpadding="0"> + <tbody> + <tr style="height: 46px;"> + <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> + <td style="padding-left: 0.5em;"> + <div id="projectname">CMSIS-SVD +  <span id="projectnumber">Version 1.3.3</span> + </div> + <div id="projectbrief">CMSIS System View Description</div> + </td> + </tr> + </tbody> +</table> +</div> +<!-- end header part --> +<div id="CMSISnav" class="tabs1"> + <ul class="tablist"> + <script type="text/javascript"> + <!-- + writeComponentTabs.call(this); + //--> + </script> + </ul> +</div> +<!-- Generated by Doxygen 1.8.6 --> +<script type="text/javascript"> +var searchBox = new SearchBox("searchBox", "search",false,'Search'); +</script> + <div id="navrow1" class="tabs"> + <ul class="tablist"> + <li><a href="index.html"><span>Main Page</span></a></li> + <li class="current"><a href="pages.html"><span>Usage and Description</span></a></li> + <li> + <div id="MSearchBox" class="MSearchBoxInactive"> + <span class="left"> + <img id="MSearchSelect" src="search/mag_sel.png" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + alt=""/> + <input type="text" id="MSearchField" value="Search" accesskey="S" + onfocus="searchBox.OnSearchFieldFocus(true)" + onblur="searchBox.OnSearchFieldFocus(false)" + onkeyup="searchBox.OnSearchFieldChange(event)"/> + </span><span class="right"> + <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a> + </span> + </div> + </li> + </ul> + </div> +</div><!-- top --> +<div id="side-nav" class="ui-resizable side-nav-resizable"> + <div id="nav-tree"> + <div id="nav-tree-contents"> + <div id="nav-sync" class="sync"></div> + </div> + </div> + <div id="splitbar" style="-moz-user-select:none;" + class="ui-resizable-handle"> + </div> +</div> +<script type="text/javascript"> +$(document).ready(function(){initNavTree('elem_cpu.html','');}); +</script> +<div id="doc-content"> +<!-- window showing the filter options --> +<div id="MSearchSelectWindow" + onmouseover="return searchBox.OnSearchSelectShow()" + onmouseout="return searchBox.OnSearchSelectHide()" + onkeydown="return searchBox.OnSearchSelectKey(event)"> +<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark"> </span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark"> </span>Pages</a></div> + +<!-- iframe showing the search results (closed by default) --> +<div id="MSearchResultsWindow"> +<iframe src="javascript:void(0)" frameborder="0" + name="MSearchResults" id="MSearchResults"> +</iframe> +</div> + +<div class="header"> + <div class="headertitle"> +<div class="title">/device/cpu element </div> </div> +</div><!--header--> +<div class="contents"> +<div class="textblock"><p>The CPU section describes the processor included in the microcontroller device. This section is mandatory if the SVD file is used to generate the device header file.</p> +<p><b>Example</b> </p> +<div class="fragment"><div class="line"><device></div> +<div class="line"> ...</div> +<div class="line"> <cpu></div> +<div class="line"> <name>CM7</name> </div> +<div class="line"> <revision>r0p0</revision></div> +<div class="line"> <endian>little</endian></div> +<div class="line"> <mpuPresent><span class="keyword">true</span></mpuPresent></div> +<div class="line"> <!-- has <span class="keywordtype">double</span> precision FPU --></div> +<div class="line"> <fpuPresent><span class="keyword">true</span></fpuPresent></div> +<div class="line"> <fpuDP><span class="keyword">true</span></fpuDP></div> +<div class="line"> <!-- has instruction and data cache --></div> +<div class="line"> <icachePresent><span class="keyword">true</span></icachePresent></div> +<div class="line"> <dcachePresent><span class="keyword">true</span></dcachePresent></div> +<div class="line"> <!-- has no instruction nor data tighly coupled memory --></div> +<div class="line"> <itcmPresent><span class="keyword">false</span></itcmPresent></div> +<div class="line"> <dtcmPresent><span class="keyword">false</span></dtcmPresent></div> +<div class="line"> <nvicPrioBits>4</nvicPrioBits></div> +<div class="line"> <vendorSystickConfig><span class="keyword">false</span></vendorSystickConfig> </div> +<div class="line"> </cpu></div> +<div class="line"> ...</div> +<div class="line"><device></div> +</div><!-- fragment --><p>This example describes a device based on a <span class="XML-Token">Cortex-M7</span> core of HW revision <span class="XML-Token">r0p0</span>, with fixed <span class="XML-Token">little</span> endian memory scheme, including <span class="XML-Token">Memory Protection Unit</span> and <span class="XML-Token">double precision hardware Floating Point Unit</span>. It has a <span class="XML-Token">data cache</span> and no <span class="XML-Token">instruction</span> nor a tightly coupled memory. The Nested Vectored Interrupt Controller uses <span class="XML-Token">4</span> bits to configure the priority of an interrupt. It is equipped with the standard System Tick Timer as defined by Arm.</p> +<p><a class="anchor" id="elem_cpu_sc"></a><b>/device/cpu</b> </p> +<table class="cmtable" summary="CPU Section Elements"> +<tr> +<th style="white-space:nowrap">Parent Element </th><th colspan="3">Element Chain </th></tr> +<tr> +<td><a class="el" href="elem_device.html">device</a> </td><td colspan="3"><a class="el" href="elem_device.html">/device</a> </td></tr> +<tr> +<th style="white-space:nowrap">Child Elements </th><th>Description </th><th>Type </th><th>Occurrence </th></tr> +<tr> +<td>name </td><td>The predefined tokens are:<ul> +<li><span class="XML-Token">CM0</span>: Arm Cortex-M0</li> +<li><span class="XML-Token">CM0PLUS</span>: Arm Cortex-M0+</li> +<li><span class="XML-Token">CM0+</span>: Arm Cortex-M0+</li> +<li><span class="XML-Token">CM1</span>: Arm Cortex-M1</li> +<li><span class="XML-Token">SC000</span>: Arm Secure Core SC000</li> +<li><span class="XML-Token">CM23</span>: Arm Cortex-M23</li> +<li><span class="XML-Token">CM3</span>: Arm Cortex-M3</li> +<li><span class="XML-Token">CM33</span>: Arm Cortex-M33</li> +<li><span class="XML-Token">SC300</span>: Arm Secure Core SC300</li> +<li><span class="XML-Token">CM4</span>: Arm Cortex-M4</li> +<li><span class="XML-Token">CM7</span>: Arm Cortex-M7</li> +<li><span class="XML-Token">CA5</span>: Arm Cortex-A5</li> +<li><span class="XML-Token">CA7</span>: Arm Cortex-A7</li> +<li><span class="XML-Token">CA8</span>: Arm Cortex-A8</li> +<li><span class="XML-Token">CA9</span>: Arm Cortex-A9</li> +<li><span class="XML-Token">CA15</span>: Arm Cortex-A15</li> +<li><span class="XML-Token">CA17</span>: Arm Cortex-A17</li> +<li><span class="XML-Token">CA53</span>: Arm Cortex-A53</li> +<li><span class="XML-Token">CA57</span>: Arm Cortex-A57</li> +<li><span class="XML-Token">CA72</span>: Arm Cortex-A72</li> +<li><span class="XML-Token">other</span>: other processor architectures </li> +</ul> +</td><td>cpuNameType </td><td>1..1 </td></tr> +<tr> +<td>revision </td><td>Define the HW revision of the processor. The version format is <span class="XML-Token">r<em>N</em>p<em>M</em></span> (N,M = [0 - 99]). </td><td>revisionType </td><td>1..1 </td></tr> +<tr> +<td>endian </td><td>Define the endianness of the processor being one of:<ul> +<li><span class="XML-Token">little</span>: little endian memory (least significant byte gets allocated at the lowest address).</li> +<li><span class="XML-Token">big</span>: byte invariant big endian data organization (most significant byte gets allocated at the lowest address).</li> +<li><span class="XML-Token">selectable</span>: little and big endian are configurable for the device and become active after the next reset.</li> +<li><span class="XML-Token">other</span>: the endianness is neither little nor big endian. </li> +</ul> +</td><td>endianType </td><td>1..1 </td></tr> +<tr> +<td>mpuPresent </td><td>Indicate whether the processor is equipped with a memory protection unit (MPU). This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>. </td><td>boolean </td><td>1..1 </td></tr> +<tr> +<td>fpuPresent </td><td>Indicate whether the processor is equipped with a hardware floating point unit (FPU). Cortex-M4, Cortex-M7 and Cortex-M33 are the only available Cortex-M processor with an optional FPU. This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>. </td><td>boolean </td><td>1..1 </td></tr> +<tr> +<td>fpuDP </td><td>Indicate whether the processor is equipped with a double precision floating point unit. This element is valid only when <em><fpuPresent></em> is set to <span class="XML-Token">true</span>. Currently, only Cortex-M7 processors can have a double precision floating point unit. </td><td>boolean </td><td>0..1 </td></tr> +<tr> +<td>icachePresent </td><td>Indicate whether the processor has an instruction cache. Note: only for Cortex-M7-based devices. </td><td>boolean </td><td>0..1 </td></tr> +<tr> +<td>dcachePresent </td><td>Indicate whether the processor has a data cache. Note: only for Cortex-M7-based devices. </td><td>boolean </td><td>0..1 </td></tr> +<tr> +<td>itcmPresent </td><td>Indicate whether the processor has an instruction tightly coupled memory. Note: only an option for Cortex-M7-based devices. </td><td>boolean </td><td>0..1 </td></tr> +<tr> +<td>dtcmPresent </td><td>Indicate whether the processor has a data tightly coupled memory. Note: only for Cortex-M7-based devices. </td><td>boolean </td><td>0..1 </td></tr> +<tr> +<td>vtorPresent </td><td>Indicate whether the Vector Table Offset Register (VTOR) is implemented in Cortex-M0+ based devices. This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>. If not specified, then VTOR is assumed to be present. </td><td>boolean </td><td>0..1 </td></tr> +<tr> +<td>nvicPrioBits </td><td>Define the number of bits available in the Nested Vectored Interrupt Controller (NVIC) for configuring priority. </td><td>scaledNonNegativeInteger </td><td>1..1 </td></tr> +<tr> +<td>vendorSystickConfig </td><td>Indicate whether the processor implements a vendor-specific System Tick Timer. If <span class="XML-Token">false</span>, then the Arm-defined System Tick Timer is available. If <span class="XML-Token">true</span>, then a vendor-specific System Tick Timer must be implemented. This tag is either set to <span class="XML-Token">true</span> or <span class="XML-Token">false</span>, <span class="XML-Token">1</span> or <span class="XML-Token">0</span>. </td><td>boolean </td><td>1..1 </td></tr> +<tr> +<td>deviceNumInterrupts </td><td>Add <span class="XML-Token">1</span> to the highest interrupt number and specify this number in here. You can start to enumerate interrupts from <span class="XML-Token">0</span>. Gaps might exist between interrupts. For example, you have defined interrupts with the numbers <span class="XML-Token">1</span>, <span class="XML-Token">2</span>, and <span class="XML-Token">8</span>. Add <span class="XML-Token">9 :(8+1)</span> into this field. </td><td>scaledNonNegativeInteger </td><td>0..1 </td></tr> +<tr> +<td>sauNumRegions </td><td>Indicate the amount of regions in the Security Attribution Unit (SAU). If the value is greater than zero, then the device has a SAU and the number indicates the maximum amount of available address regions. </td><td>scaledNonNegativeInteger </td><td>0..1 </td></tr> +<tr> +<td><a class="el" href="elem_cpu.html#elem_sauRegionsConfig">sauRegionsConfig</a> </td><td>If the Secure Attribution Unit is preconfigured by HW or Firmware, then the settings are described here. </td><td>SauRegionsConfigType </td><td>0..1 </td></tr> +</table> +<p> </p> +<hr/> +<h1><a class="anchor" id="elem_sauRegionsConfig"></a> +/device/cpu/sauRegionsConfig element</h1> +<p>Set the configuration for the Secure Attribution Unit (SAU) when they are preconfigured by HW or Firmware.</p> +<p><b>Example</b> </p> +<div class="fragment"><div class="line"><device></div> +<div class="line"> ...</div> +<div class="line"> <sauRegionsConfig protectionWhenDisabled=<span class="stringliteral">"n"</span>></div> +<div class="line"> <region></div> +<div class="line"> ...</div> +<div class="line"> </region></div> +<div class="line"> ...</div> +<div class="line"> <region></div> +<div class="line"> ...</div> +<div class="line"> </region></div> +<div class="line"> </sauRegionsConfig></div> +<div class="line"> ...</div> +<div class="line"></device></div> +</div><!-- fragment --><p>The example defines two Secure Attribution Units, which are enabled by default. When the SAU regions are disabled, the protection level is non-secure (<span class="XML-Token">n</span>).</p> +<p><a class="anchor" id="elem_sauRegionsConfig_sc"></a><b>/device/cpu/sauRegionsConfig</b> </p> +<table class="cmtable" summary="sauRegionsConfig tab elements"> +<tr> +<th style="white-space:nowrap">Parent Element </th><th colspan="3">Element Chain </th></tr> +<tr> +<td><a class="el" href="elem_cpu.html">cpu</a> </td><td colspan="3"><a class="el" href="elem_cpu.html">/device/cpu element</a> </td></tr> +<tr> +<th style="white-space:nowrap">Attributes </th><th>Description </th><th>Type </th><th>Use </th></tr> +<tr> +<td>enabled </td><td>Specify whether the Secure Attribution Units are enabled. The following values can be used: <span class="XML-Token">true</span>,<span class="XML-Token">false</span>,<span class="XML-Token">1</span>, and <span class="XML-Token">0</span>. </td><td>xs:boolean </td><td>optional </td></tr> +<tr> +<td><a class="el" href="elem_special.html#elem_protection">protectionWhenDisabled</a> </td><td>Set the protection mode for disabled regions. When the complete SAU is disabled, the whole memory is treated either <span class="XML-Token">"s"</span>=secure or <span class="XML-Token">"n"</span>=non-secure. This value is inherited by the <em><region></em> element. Refer to element <a class="el" href="elem_special.html#elem_protection">protection</a> for details and predefined values. </td><td>xs:string </td><td>optional </td></tr> +<tr> +<th style="white-space:nowrap">Child Elements </th><th>Description </th><th>Type </th><th>Occurrence </th></tr> +<tr> +<td><a class="el" href="elem_cpu.html#elem_region">region</a> </td><td>Group to configure SAU regions. </td><td>xs:string </td><td>0..* </td></tr> +</table> +<p> </p> +<hr/> +<h1><a class="anchor" id="elem_region"></a> +/device/cpu/sauRegionsConfig/region element</h1> +<p>Define the regions of the Secure Attribution Unit (SAU). The protection level is inherited from the attribute <em><protectionWhenDisabled></em> of the enclosing element <a class="el" href="elem_cpu.html#elem_sauRegionsConfig">sauRegionsConfig</a>.</p> +<p><b>Example:</b> </p> +<div class="fragment"><div class="line"><sauRegionsConfig></div> +<div class="line"> <region name=<span class="stringliteral">"SAU1"</span>></div> +<div class="line"> <base>0x10001000</base></div> +<div class="line"> <limit>0x10005000</limit></div> +<div class="line"> <access>n</access></div> +<div class="line"> </region></div> +<div class="line"> <region enabled=<span class="stringliteral">"false"</span> name=<span class="stringliteral">"SAU2"</span>></div> +<div class="line"> <base>0x10006000</base></div> +<div class="line"> <limit>0x10008000</limit></div> +<div class="line"> <access>c</access></div> +<div class="line"> </region></div> +<div class="line"></sauRegionsConfig></div> +</div><!-- fragment --><p>The example defines two secure regions with the names <em>SAU1</em> and <em>SAU2</em>. SAU1 has the address boundries <span class="XML-Token">0x10001000</span> and <span class="XML-Token">0x10005000</span>. The region has non-secure access rights. SAU2 has the address boundries <span class="XML-Token">0x10006000</span> and <span class="XML-Token">0x10008000</span>. The region has secure callable access rights.</p> +<p><a class="anchor" id="elem_region_sc"></a> <b>/device/cpu/sauRegionsConfig/region</b> </p> +<table class="cmtable" summary="region tab elements"> +<tr> +<th style="white-space:nowrap">Parent Element </th><th colspan="3">Element Chain </th></tr> +<tr> +<td><a class="el" href="elem_cpu.html#elem_sauRegionsConfig">sauRegionsConfig</a> </td><td colspan="3"><a class="el" href="elem_cpu.html#elem_sauRegionsConfig">/device/cpu/sauRegionsConfig element</a> </td></tr> +<tr> +<th style="white-space:nowrap">Attributes </th><th>Description </th><th>Type </th><th>Use </th></tr> +<tr> +<td>enabled </td><td>Specify whether the Secure Attribution Units are enabled. The following values can be used: <span class="XML-Token">true</span> and <span class="XML-Token">false</span>, or <span class="XML-Token">1</span> and <span class="XML-Token">0</span>. Default value is <span class="XML-Token">true</span>. </td><td>xs:boolean </td><td>optional </td></tr> +<tr> +<td>name </td><td>Identifiy the region with a name. </td><td>xs:string </td><td>optional </td></tr> +<tr> +<th style="white-space:nowrap">Child Elements </th><th>Description </th><th>Type </th><th>Occurrence </th></tr> +<tr> +<td>base </td><td>Base address of the region. </td><td>scaledNonNegativeInteger </td><td>1..1 </td></tr> +<tr> +<td>limit </td><td>Limit address of the region. </td><td>scaledNonNegativeInteger </td><td>1..1 </td></tr> +<tr> +<td>access </td><td>Use one of the following predefined values to define the acces type of a region: <br/> + - <span class="XML-Token">n</span> : non-secure <br/> + - <span class="XML-Token">c</span> : secure callable </td><td>xs:string </td><td>1..1 </td></tr> +</table> +</div></div><!-- contents --> +</div><!-- doc-content --> +<!-- start footer part --> +<div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> + <ul> + <li class="navelem"><a class="el" href="svd_Format_pg.html">SVD Description (*.svd) Format</a></li> + <li class="footer">Generated on Wed Aug 1 2018 17:12:47 for CMSIS-SVD by Arm Ltd. All rights reserved. + <!-- + <a href="http://www.doxygen.org/index.html"> + <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 + --> + </li> + </ul> +</div> +</body> +</html> |