diff options
author | Ali Labbene <ali.labbene@st.com> | 2019-12-11 08:59:21 +0100 |
---|---|---|
committer | Ali Labbene <ali.labbene@st.com> | 2019-12-16 16:35:24 +0100 |
commit | 9f95ff5b6ba01db09552b84a0ab79607060a2666 (patch) | |
tree | 8a6e0dda832555c692307869aed49d07ee7facfe /docs/Driver/html/group__spi__slave__select__mode__ctrls.js | |
parent | 76177aa280494bb36d7a0bcbda1078d4db717020 (diff) | |
download | st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.gz st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.bz2 st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.zip |
Official ARM version: v5.4.0
Add CMSIS V5.4.0, please refer to index.html available under \docs folder.
Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure
used in existing projects, and thus avoid projects mass update
Note: the following components have been removed from ARM original delivery (as not used in ST packages)
- CMSIS_EW2018.pdf
- .gitattributes
- .gitignore
- \Device
- \CMSIS
- \CoreValidation
- \DAP
- \Documentation
- \DoxyGen
- \Driver
- \Pack
- \RTOS\CMSIS_RTOS_Tutorial.pdf
- \RTOS\RTX
- \RTOS\Template
- \RTOS2\RTX
- \Utilities
- All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2
Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3
Diffstat (limited to 'docs/Driver/html/group__spi__slave__select__mode__ctrls.js')
-rw-r--r-- | docs/Driver/html/group__spi__slave__select__mode__ctrls.js | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/docs/Driver/html/group__spi__slave__select__mode__ctrls.js b/docs/Driver/html/group__spi__slave__select__mode__ctrls.js new file mode 100644 index 0000000..0dd045c --- /dev/null +++ b/docs/Driver/html/group__spi__slave__select__mode__ctrls.js @@ -0,0 +1,9 @@ +var group__spi__slave__select__mode__ctrls = +[ + [ "ARM_SPI_SS_MASTER_UNUSED", "group__spi__slave__select__mode__ctrls.html#gae19343adc7bd71408b51733171f99dc7", null ], + [ "ARM_SPI_SS_MASTER_SW", "group__spi__slave__select__mode__ctrls.html#gab5e319aa3f9d4d8c9ed92f0fe865f624", null ], + [ "ARM_SPI_SS_MASTER_HW_OUTPUT", "group__spi__slave__select__mode__ctrls.html#ga07762709a40dc90aca85553f500c8761", null ], + [ "ARM_SPI_SS_MASTER_HW_INPUT", "group__spi__slave__select__mode__ctrls.html#ga8561bd0cc25ab2bb02b138c1c6a586cd", null ], + [ "ARM_SPI_SS_SLAVE_HW", "group__spi__slave__select__mode__ctrls.html#ga2bd0d1f3ade2dc0cc48cc0593336ad70", null ], + [ "ARM_SPI_SS_SLAVE_SW", "group__spi__slave__select__mode__ctrls.html#gad371f6ba0d12a57bdcc3217c351abfb0", null ] +];
\ No newline at end of file |