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author | Ali Labbene <ali.labbene@st.com> | 2019-12-11 08:59:21 +0100 |
---|---|---|
committer | Ali Labbene <ali.labbene@st.com> | 2019-12-16 16:35:24 +0100 |
commit | 9f95ff5b6ba01db09552b84a0ab79607060a2666 (patch) | |
tree | 8a6e0dda832555c692307869aed49d07ee7facfe /docs/Driver/html/annotated.js | |
parent | 76177aa280494bb36d7a0bcbda1078d4db717020 (diff) | |
download | st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.gz st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.bz2 st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.zip |
Official ARM version: v5.4.0
Add CMSIS V5.4.0, please refer to index.html available under \docs folder.
Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure
used in existing projects, and thus avoid projects mass update
Note: the following components have been removed from ARM original delivery (as not used in ST packages)
- CMSIS_EW2018.pdf
- .gitattributes
- .gitignore
- \Device
- \CMSIS
- \CoreValidation
- \DAP
- \Documentation
- \DoxyGen
- \Driver
- \Pack
- \RTOS\CMSIS_RTOS_Tutorial.pdf
- \RTOS\RTX
- \RTOS\Template
- \RTOS2\RTX
- \Utilities
- All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2
Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3
Diffstat (limited to 'docs/Driver/html/annotated.js')
-rw-r--r-- | docs/Driver/html/annotated.js | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/docs/Driver/html/annotated.js b/docs/Driver/html/annotated.js new file mode 100644 index 0000000..24544ae --- /dev/null +++ b/docs/Driver/html/annotated.js @@ -0,0 +1,55 @@ +var annotated = +[ + [ "ARM_CAN_CAPABILITIES", "group__can__interface__gr.html#structARM__CAN__CAPABILITIES", "group__can__interface__gr_structARM__CAN__CAPABILITIES" ], + [ "ARM_CAN_MSG_INFO", "group__can__interface__gr.html#structARM__CAN__MSG__INFO", "group__can__interface__gr_structARM__CAN__MSG__INFO" ], + [ "ARM_CAN_OBJ_CAPABILITIES", "group__can__interface__gr.html#structARM__CAN__OBJ__CAPABILITIES", "group__can__interface__gr_structARM__CAN__OBJ__CAPABILITIES" ], + [ "ARM_CAN_STATUS", "group__can__interface__gr.html#structARM__CAN__STATUS", "group__can__interface__gr_structARM__CAN__STATUS" ], + [ "ARM_DRIVER_CAN", "group__can__interface__gr.html#structARM__DRIVER__CAN", "group__can__interface__gr_structARM__DRIVER__CAN" ], + [ "ARM_DRIVER_ETH_MAC", "group__eth__mac__interface__gr.html#structARM__DRIVER__ETH__MAC", "group__eth__mac__interface__gr_structARM__DRIVER__ETH__MAC" ], + [ "ARM_DRIVER_ETH_PHY", "group__eth__phy__interface__gr.html#structARM__DRIVER__ETH__PHY", "group__eth__phy__interface__gr_structARM__DRIVER__ETH__PHY" ], + [ "ARM_DRIVER_FLASH", "group__flash__interface__gr.html#structARM__DRIVER__FLASH", "group__flash__interface__gr_structARM__DRIVER__FLASH" ], + [ "ARM_DRIVER_I2C", "group__i2c__interface__gr.html#structARM__DRIVER__I2C", "group__i2c__interface__gr_structARM__DRIVER__I2C" ], + [ "ARM_DRIVER_MCI", "group__mci__interface__gr.html#structARM__DRIVER__MCI", "group__mci__interface__gr_structARM__DRIVER__MCI" ], + [ "ARM_DRIVER_NAND", "group__nand__interface__gr.html#structARM__DRIVER__NAND", "group__nand__interface__gr_structARM__DRIVER__NAND" ], + [ "ARM_DRIVER_SAI", "group__sai__interface__gr.html#structARM__DRIVER__SAI", "group__sai__interface__gr_structARM__DRIVER__SAI" ], + [ "ARM_DRIVER_SPI", "group__spi__interface__gr.html#structARM__DRIVER__SPI", "group__spi__interface__gr_structARM__DRIVER__SPI" ], + [ "ARM_DRIVER_STORAGE", "group__storage__interface__gr.html#structARM__DRIVER__STORAGE", "group__storage__interface__gr_structARM__DRIVER__STORAGE" ], + [ "ARM_DRIVER_USART", "group__usart__interface__gr.html#structARM__DRIVER__USART", "group__usart__interface__gr_structARM__DRIVER__USART" ], + [ "ARM_DRIVER_USBD", "group__usbd__interface__gr.html#structARM__DRIVER__USBD", "group__usbd__interface__gr_structARM__DRIVER__USBD" ], + [ "ARM_DRIVER_USBH", "group__usbh__host__gr.html#structARM__DRIVER__USBH", "group__usbh__host__gr_structARM__DRIVER__USBH" ], + [ "ARM_DRIVER_USBH_HCI", "group__usbh__hci__gr.html#structARM__DRIVER__USBH__HCI", "group__usbh__hci__gr_structARM__DRIVER__USBH__HCI" ], + [ "ARM_DRIVER_VERSION", "group__common__drv__gr.html#structARM__DRIVER__VERSION", "group__common__drv__gr_structARM__DRIVER__VERSION" ], + [ "ARM_ETH_LINK_INFO", "group__eth__interface__gr.html#structARM__ETH__LINK__INFO", "group__eth__interface__gr_structARM__ETH__LINK__INFO" ], + [ "ARM_ETH_MAC_ADDR", "group__eth__interface__gr.html#structARM__ETH__MAC__ADDR", "group__eth__interface__gr_structARM__ETH__MAC__ADDR" ], + [ "ARM_ETH_MAC_CAPABILITIES", "group__eth__mac__interface__gr.html#structARM__ETH__MAC__CAPABILITIES", "group__eth__mac__interface__gr_structARM__ETH__MAC__CAPABILITIES" ], + [ "ARM_ETH_MAC_TIME", "group__eth__mac__interface__gr.html#structARM__ETH__MAC__TIME", "group__eth__mac__interface__gr_structARM__ETH__MAC__TIME" ], + [ "ARM_FLASH_CAPABILITIES", "group__flash__interface__gr.html#structARM__FLASH__CAPABILITIES", "group__flash__interface__gr_structARM__FLASH__CAPABILITIES" ], + [ "ARM_FLASH_INFO", "group__flash__interface__gr.html#structARM__FLASH__INFO", "group__flash__interface__gr_structARM__FLASH__INFO" ], + [ "ARM_FLASH_SECTOR", "group__flash__interface__gr.html#structARM__FLASH__SECTOR", "group__flash__interface__gr_structARM__FLASH__SECTOR" ], + [ "ARM_FLASH_STATUS", "group__flash__interface__gr.html#structARM__FLASH__STATUS", "group__flash__interface__gr_structARM__FLASH__STATUS" ], + [ "ARM_I2C_CAPABILITIES", "group__i2c__interface__gr.html#structARM__I2C__CAPABILITIES", "group__i2c__interface__gr_structARM__I2C__CAPABILITIES" ], + [ "ARM_I2C_STATUS", "group__i2c__interface__gr.html#structARM__I2C__STATUS", "group__i2c__interface__gr_structARM__I2C__STATUS" ], + [ "ARM_MCI_CAPABILITIES", "group__mci__interface__gr.html#structARM__MCI__CAPABILITIES", "group__mci__interface__gr_structARM__MCI__CAPABILITIES" ], + [ "ARM_MCI_STATUS", "group__mci__interface__gr.html#structARM__MCI__STATUS", "group__mci__interface__gr_structARM__MCI__STATUS" ], + [ "ARM_NAND_CAPABILITIES", "group__nand__interface__gr.html#structARM__NAND__CAPABILITIES", "group__nand__interface__gr_structARM__NAND__CAPABILITIES" ], + [ "ARM_NAND_ECC_INFO", "group__nand__interface__gr.html#structARM__NAND__ECC__INFO", "group__nand__interface__gr_structARM__NAND__ECC__INFO" ], + [ "ARM_NAND_STATUS", "group__nand__interface__gr.html#structARM__NAND__STATUS", "group__nand__interface__gr_structARM__NAND__STATUS" ], + [ "ARM_SAI_CAPABILITIES", "group__sai__interface__gr.html#structARM__SAI__CAPABILITIES", "group__sai__interface__gr_structARM__SAI__CAPABILITIES" ], + [ "ARM_SAI_STATUS", "group__sai__interface__gr.html#structARM__SAI__STATUS", "group__sai__interface__gr_structARM__SAI__STATUS" ], + [ "ARM_SPI_CAPABILITIES", "group__spi__interface__gr.html#structARM__SPI__CAPABILITIES", "group__spi__interface__gr_structARM__SPI__CAPABILITIES" ], + [ "ARM_SPI_STATUS", "group__spi__interface__gr.html#structARM__SPI__STATUS", "group__spi__interface__gr_structARM__SPI__STATUS" ], + [ "ARM_STORAGE_BLOCK", "group__storage__interface__gr.html#structARM__STORAGE__BLOCK", "group__storage__interface__gr_structARM__STORAGE__BLOCK" ], + [ "ARM_STORAGE_BLOCK_ATTRIBUTES", "group__storage__interface__gr.html#structARM__STORAGE__BLOCK__ATTRIBUTES", "group__storage__interface__gr_structARM__STORAGE__BLOCK__ATTRIBUTES" ], + [ "ARM_STORAGE_CAPABILITIES", "group__storage__interface__gr.html#structARM__STORAGE__CAPABILITIES", "group__storage__interface__gr_structARM__STORAGE__CAPABILITIES" ], + [ "ARM_STORAGE_INFO", "group__storage__interface__gr.html#structARM__STORAGE__INFO", "group__storage__interface__gr_structARM__STORAGE__INFO" ], + [ "ARM_STORAGE_SECURITY_FEATURES", "Driver__Storage_8h.html#structARM__STORAGE__SECURITY__FEATURES", "Driver__Storage_8h_structARM__STORAGE__SECURITY__FEATURES" ], + [ "ARM_STORAGE_STATUS", "group__storage__interface__gr.html#structARM__STORAGE__STATUS", "group__storage__interface__gr_structARM__STORAGE__STATUS" ], + [ "ARM_USART_CAPABILITIES", "group__usart__interface__gr.html#structARM__USART__CAPABILITIES", "group__usart__interface__gr_structARM__USART__CAPABILITIES" ], + [ "ARM_USART_MODEM_STATUS", "group__usart__interface__gr.html#structARM__USART__MODEM__STATUS", "group__usart__interface__gr_structARM__USART__MODEM__STATUS" ], + [ "ARM_USART_STATUS", "group__usart__interface__gr.html#structARM__USART__STATUS", "group__usart__interface__gr_structARM__USART__STATUS" ], + [ "ARM_USBD_CAPABILITIES", "group__usbd__interface__gr.html#structARM__USBD__CAPABILITIES", "group__usbd__interface__gr_structARM__USBD__CAPABILITIES" ], + [ "ARM_USBD_STATE", "group__usbd__interface__gr.html#structARM__USBD__STATE", "group__usbd__interface__gr_structARM__USBD__STATE" ], + [ "ARM_USBH_CAPABILITIES", "group__usbh__host__gr.html#structARM__USBH__CAPABILITIES", "group__usbh__host__gr_structARM__USBH__CAPABILITIES" ], + [ "ARM_USBH_HCI_CAPABILITIES", "group__usbh__hci__gr.html#structARM__USBH__HCI__CAPABILITIES", "group__usbh__hci__gr_structARM__USBH__HCI__CAPABILITIES" ], + [ "ARM_USBH_PORT_STATE", "group__usbh__host__gr.html#structARM__USBH__PORT__STATE", "group__usbh__host__gr_structARM__USBH__PORT__STATE" ] +];
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