/* Megumin LED display firmware
 * Copyright (C) 2018 Sebastian Götte <code@jaseg.net>
 * 
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "global.h"

#define RTC_INITIALIZED_REGISTER BKP->DR1
#define RTC_INITIALIZED_FLAG 1

uint32_t pcg32_random_r() {
    // *Really* minimal PCG32 code / (c) 2014 M.E. O'Neill / pcg-random.org
    // Licensed under Apache License 2.0 (NO WARRANTY, etc. see website)
    static uint64_t state = 0xbc422715d3aef60f;
    static uint64_t inc = 0x6605e3bc6d1a869b; 
    uint64_t oldstate = state;
    // Advance internal state
    state = oldstate * 6364136223846793005ULL + (inc|1);
    // Calculate output function (XSH RR), uses old state for max ILP
    uint32_t xorshifted = ((oldstate >> 18u) ^ oldstate) >> 27u;
    uint32_t rot = oldstate >> 59u;
    return (xorshifted >> rot) | (xorshifted << ((-rot) & 31));
}

unsigned char dumb_random() {
    static unsigned char x=0x66, a=0x05, b=0xe3, c=0xbc;
    x++; //x is incremented every round and is not affected by any other variable
    a = (a ^ c ^ x); //note the mix of addition and XOR
    b = (b + a); //And the use of very few instructions
    c = (((c + (b >> 1)) ^ a)); // the AES S-Box Operation ensures an even distributon of entropy
    return (c);
}

void rtc_write(volatile uint32_t *reg, uint32_t val) {
    while (!(RTC->CRL & RTC_CRL_RTOFF)) ;
    RTC->CRL |= RTC_CRL_CNF;

    reg[0] = val>>16;
    reg[1] = val&0xffff;

    RTC->CRL &= ~RTC_CRL_CNF;
    while (!(RTC->CRL & RTC_CRL_RTOFF)) ;
}

void rtc_bus_sync(void) {
    RTC->CRL &= ~RTC_CRL_RSF;
    while (!(RTC->CRL & RTC_CRL_RSF)) ;
}

void rtc_alarm_reset(void) {
    RTC->CRL &= ~RTC_CRL_ALRF;
}

void rtc_init(void) {
    rtc_bus_sync();
    RTC->CRH = 0;
    if (!(RTC_INITIALIZED_REGISTER & RTC_INITIALIZED_FLAG)) {
        rtc_write(&RTC->PRLH, 32768-1);
        rtc_write(&RTC->CNTH, 0);
        RTC_INITIALIZED_REGISTER = RTC_INITIALIZED_FLAG;
    }
}

void rtc_set_alarm_sec(uint32_t value) {
    rtc_write(&RTC->ALRH, value);
}

void rtc_set_alarm_rel_sec(uint32_t value) {
    uint32_t now = RTC->CNTH<<16 | RTC->CNTL;
    rtc_set_alarm_sec(now + value);
}

int main(void){
    /* We're starting out from HSI@8MHz */
    SystemCoreClockUpdate();
    SCB->SCR &= (~SCB_SCR_SLEEPONEXIT_Msk) & SCB_SCR_SLEEPDEEP_Msk; /* Disable for now */
    for (int i=0; i<1000000; i++) /* about 5s */
        asm volatile ("nop");

    /* Turn on lots of neat things */
    RCC->APB2ENR |= RCC_APB2ENR_IOPCEN;
    RCC->APB1ENR |= RCC_APB1ENR_BKPEN | RCC_APB1ENR_PWREN;

    PWR->CR = PWR_CR_PDDS | PWR_CR_DBP;

    RCC->BDCR = RCC_BDCR_RTCEN | (1<<RCC_BDCR_RTCSEL_Pos) | RCC_BDCR_LSEON;
    while (!(RCC->BDCR & RCC_BDCR_LSERDY)) ;

    GPIOC->CRH |=
          (0<<GPIO_CRH_CNF13_Pos) | (2<<GPIO_CRH_MODE13_Pos);  /* PC13 - LED */
    GPIOC->ODR |= 1<<13;

    rtc_init();
    rtc_set_alarm_rel_sec(2);

    SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Use deep sleep mode */

    GPIOC->ODR &= ~(1<<13);
    for (int i=0; i<100000; i++)
        asm volatile ("nop");
    GPIOC->ODR |= 1<<13;

    asm volatile ("wfe");
    return 42;
}

void gdb_dump(void) {
    /* debugger hook */
}

void NMI_Handler(void) {
    asm volatile ("bkpt");
}

void HardFault_Handler(void) __attribute__((naked));
void HardFault_Handler() {
    asm volatile ("bkpt");
}

void SVC_Handler(void) {
    asm volatile ("bkpt");
}


void PendSV_Handler(void) {
    asm volatile ("bkpt");
}

void SysTick_Handler(void) {
    asm volatile ("bkpt");
}