summaryrefslogtreecommitdiff
path: root/pcb/footprints.pretty/USB_A_FEMALE_THT.kicad_mod
blob: e486caf5936f4caf8d4170914a4e7ed7b130785b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
(module USB_A_FEMALE_THT (layer F.Cu) (tedit 5BF3A730)
  (fp_text reference REF** (at 0 0.5) (layer F.SilkS)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_text value USB_A_FEMALE_THT (at 0 -0.5) (layer F.Fab)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_line (start -6.6 -3.71) (end 6.6 -3.71) (layer F.SilkS) (width 0.15))
  (fp_line (start -6.6 -3.71) (end -6.6 10.5) (layer F.SilkS) (width 0.15))
  (fp_line (start 6.6 -3.71) (end 6.6 10.5) (layer F.SilkS) (width 0.15))
  (fp_line (start -6.6 10.5) (end 6.6 10.5) (layer F.SilkS) (width 0.15))
  (fp_line (start -4.5 4.5) (end -4.5 7.5) (layer F.SilkS) (width 0.15))
  (fp_line (start -4.5 7.5) (end -2 7.5) (layer F.SilkS) (width 0.15))
  (fp_line (start -2 7.5) (end -2 4.5) (layer F.SilkS) (width 0.15))
  (fp_line (start -2 4.5) (end -4.5 4.5) (layer F.SilkS) (width 0.15))
  (fp_line (start 2 7.5) (end 4.5 7.5) (layer F.SilkS) (width 0.15))
  (fp_line (start 4.5 4.5) (end 2 4.5) (layer F.SilkS) (width 0.15))
  (fp_line (start 4.5 7.5) (end 4.5 4.5) (layer F.SilkS) (width 0.15))
  (fp_line (start 2 4.5) (end 2 7.5) (layer F.SilkS) (width 0.15))
  (pad 2 thru_hole oval (at -1 -2.71) (size 1.5 2.5) (drill 1) (layers *.Cu *.Mask))
  (pad 3 thru_hole oval (at 1 -2.71) (size 1.5 2.5) (drill 1) (layers *.Cu *.Mask))
  (pad 4 thru_hole oval (at 3.5 -2.71) (size 1.8 2.5) (drill 1) (layers *.Cu *.Mask))
  (pad 1 thru_hole oval (at -3.5 -2.71) (size 1.8 2.5) (drill 1) (layers *.Cu *.Mask))
  (pad 5 thru_hole oval (at 7.3 0) (size 3 4) (drill 2) (layers *.Cu *.Mask))
  (pad 5 thru_hole oval (at -7.3 0) (size 3 4) (drill 2) (layers *.Cu *.Mask))
)