From 80201a7666aa6a6e59d6c9f0f3d4c7d81011067e Mon Sep 17 00:00:00 2001
From: jaseg <git@jaseg.net>
Date: Tue, 11 Dec 2018 23:34:11 +0900
Subject: Make a really fancy diagram

---
 pcb/securehid.bak           | 5 +++--
 pcb/securehid.kicad_pcb     | 8 +++++++-
 pcb/securehid.kicad_pcb-bak | 8 ++++++--
 pcb/securehid.sch           | 5 +++--
 4 files changed, 19 insertions(+), 7 deletions(-)

(limited to 'pcb')

diff --git a/pcb/securehid.bak b/pcb/securehid.bak
index c80b951..90378ff 100644
--- a/pcb/securehid.bak
+++ b/pcb/securehid.bak
@@ -1364,7 +1364,7 @@ F 1 "AO3400" H 11856 9745 50  0000 L CNN
 F 2 "TO_SOT_Packages_SMD:SOT-23" H 11850 9625 50  0001 L CIN
 F 3 "https://www.fairchildsemi.com/datasheets/2N/2N7002.pdf" H 11650 9700 50  0001 L CNN
 	1    11650 9700
-	-1   0    0    1   
+	-1   0    0    -1  
 $EndComp
 $Comp
 L device:LED D10
@@ -4062,7 +4062,7 @@ F 3 "" H 14400 3700 50  0001 C CNN
 	1    0    0    -1  
 $EndComp
 Text Notes 12150 6300 0    50   ~ 0
-Todo:\n- Fix 32kHz crystal footprint to something available\n- Fix CR2032 holder footprint to top-loading type\n- Fix MicroUSB footprint (cross-check)
+Todo:\nConsider flipping some components to match top-mount case
 Connection ~ 7950 10750
 Wire Wire Line
 	10700 7200 10700 7250
@@ -4084,4 +4084,5 @@ Wire Wire Line
 Connection ~ 11150 7050
 Wire Wire Line
 	11150 7050 11150 7250
+NoConn ~ 1950 400 
 $EndSCHEMATC
diff --git a/pcb/securehid.kicad_pcb b/pcb/securehid.kicad_pcb
index 66b155c..e002cc2 100644
--- a/pcb/securehid.kicad_pcb
+++ b/pcb/securehid.kicad_pcb
@@ -2,7 +2,7 @@
 
   (general
     (thickness 1.6)
-    (drawings 273)
+    (drawings 279)
     (tracks 1614)
     (zones 0)
     (modules 200)
@@ -7610,6 +7610,12 @@
     )
   )
 
+  (gr_circle (center 134.5 76.5) (end 135 77) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 62.5 76) (end 62 75.5) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 80.5 78.5) (end 81 78.5) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 80.5 78.5) (end 81 77.5) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 87.5 84.5) (end 88 84) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 93.5 88.5) (end 94 88) (layer F.SilkS) (width 0.2))
   (dimension 69 (width 0.3) (layer Cmts.User)
     (gr_text "69.000 mm" (at 20.4 81 270) (layer Cmts.User)
       (effects (font (size 1.5 1.5) (thickness 0.3)))
diff --git a/pcb/securehid.kicad_pcb-bak b/pcb/securehid.kicad_pcb-bak
index f059399..4d4c4cd 100644
--- a/pcb/securehid.kicad_pcb-bak
+++ b/pcb/securehid.kicad_pcb-bak
@@ -2,7 +2,7 @@
 
   (general
     (thickness 1.6)
-    (drawings 273)
+    (drawings 277)
     (tracks 1614)
     (zones 0)
     (modules 200)
@@ -7610,6 +7610,10 @@
     )
   )
 
+  (gr_circle (center 80.5 78.5) (end 81 78.5) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 80.5 78.5) (end 81 77.5) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 87.5 84.5) (end 88 84) (layer F.SilkS) (width 0.2))
+  (gr_circle (center 93.5 88.5) (end 94 88) (layer F.SilkS) (width 0.2))
   (dimension 69 (width 0.3) (layer Cmts.User)
     (gr_text "69.000 mm" (at 20.4 81 270) (layer Cmts.User)
       (effects (font (size 1.5 1.5) (thickness 0.3)))
@@ -7634,7 +7638,7 @@
     (arrow2a (pts (xy 163.5 123.5) (xy 162.373496 122.913579)))
     (arrow2b (pts (xy 163.5 123.5) (xy 162.373496 124.086421)))
   )
-  (gr_text "SecureHID v0.1\ngithub.com/jaseg/securehid\n(c)2018 Jan GOETTE\ncc-by-sa" (at 149.6 101.7) (layer B.SilkS)
+  (gr_text "SecureHID v0.2\ngithub.com/jaseg/securehid\n(c)2018 Jan GOETTE\ncc-by-sa" (at 149.6 101.7) (layer B.SilkS)
     (effects (font (size 1.5 1.5) (thickness 0.3)) (justify left mirror))
   )
   (gr_line (start 55.4 53.5) (end 56.8 51.1) (layer B.SilkS) (width 0.2))
diff --git a/pcb/securehid.sch b/pcb/securehid.sch
index 334d3ce..d244432 100644
--- a/pcb/securehid.sch
+++ b/pcb/securehid.sch
@@ -1364,7 +1364,7 @@ F 1 "AO3400" H 11856 9745 50  0000 L CNN
 F 2 "TO_SOT_Packages_SMD:SOT-23" H 11850 9625 50  0001 L CIN
 F 3 "https://www.fairchildsemi.com/datasheets/2N/2N7002.pdf" H 11650 9700 50  0001 L CNN
 	1    11650 9700
-	-1   0    0    1   
+	-1   0    0    -1  
 $EndComp
 $Comp
 L device:LED D10
@@ -4062,7 +4062,7 @@ F 3 "" H 14400 3700 50  0001 C CNN
 	1    0    0    -1  
 $EndComp
 Text Notes 12150 6300 0    50   ~ 0
-Todo:\n[all done!]
+Todo:\nConsider flipping some components to match top-mount case\nUSB hub chip doesn't work and gets warm\nQ1 or Q2 wasn't oriented correctly. Fixed in schematic, needs to be fixed in PCB
 Connection ~ 7950 10750
 Wire Wire Line
 	10700 7200 10700 7250
@@ -4084,4 +4084,5 @@ Wire Wire Line
 Connection ~ 11150 7050
 Wire Wire Line
 	11150 7050 11150 7250
+NoConn ~ 1950 400 
 $EndSCHEMATC
-- 
cgit