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2018-12-11Make a really fancy diagramjaseg4-7/+19
2018-11-29pcb: Fix a bunch of kicady layout errorsjaseg28-10926/+10986
2018-11-29Some small fixes, add silk artworkjaseg33-14137/+165325
2018-11-27pcb: Add BOMjaseg11-10/+3645
2018-11-27pcb: Add project info to silk and do gerber exportjaseg14-621/+78194
2018-11-22PCB silk: hide testpoint referencesjaseg1-77/+77
2018-11-22Further PCB cleanup, initial silk cleanupjaseg4-4188/+4740
2018-11-21Some cleanupsjaseg5-5176/+5594
2018-11-21Initial PCB draftjaseg8-1656/+32396
2018-11-17Initial schematic commitjaseg9-0/+5500