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author | jaseg <git@jaseg.net> | 2018-11-21 22:18:37 +0900 |
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committer | jaseg <git@jaseg.net> | 2018-11-21 22:18:37 +0900 |
commit | bd93c5e229b02b8db600c5a92233ca4e1d01cdff (patch) | |
tree | 077ba5207b3951a29ffd54f563d6c355400cccc9 /pcb/securehid-cache.lib | |
parent | f07540c36796713c374feb628903fdbfa8fd7f84 (diff) | |
download | secure-hid-bd93c5e229b02b8db600c5a92233ca4e1d01cdff.tar.gz secure-hid-bd93c5e229b02b8db600c5a92233ca4e1d01cdff.tar.bz2 secure-hid-bd93c5e229b02b8db600c5a92233ca4e1d01cdff.zip |
Initial PCB draft
Diffstat (limited to 'pcb/securehid-cache.lib')
-rw-r--r-- | pcb/securehid-cache.lib | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/pcb/securehid-cache.lib b/pcb/securehid-cache.lib index 3fe54b3..7b57af3 100644 --- a/pcb/securehid-cache.lib +++ b/pcb/securehid-cache.lib @@ -59,6 +59,23 @@ X Pin_9 9 -200 -200 150 R 50 50 1 1 P ENDDRAW ENDDEF # +# Connector_TestPoint_Alt +# +DEF Connector_TestPoint_Alt TP 0 30 N N 1 F N +F0 "TP" 0 270 50 H V C CNN +F1 "Connector_TestPoint_Alt" 0 200 50 H V C CNN +F2 "" 200 0 50 H I C CNN +F3 "" 200 0 50 H I C CNN +$FPLIST + Pin* + Test* +$ENDFPLIST +DRAW +P 5 0 1 0 0 100 -30 130 0 160 30 130 0 100 N +X 1 1 0 0 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# # Connector_USB_B_Micro # DEF Connector_USB_B_Micro J 0 40 Y Y 1 F N @@ -602,6 +619,21 @@ X +3V3 1 0 0 0 U 50 50 1 1 W N ENDDRAW ENDDEF # +# power_+3.3VA +# +DEF power_+3.3VA #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "power_+3.3VA" 0 140 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +3.3VA 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# # power_GND # DEF power_GND #PWR 0 0 Y Y 1 F P @@ -615,6 +647,19 @@ X GND 1 0 0 0 D 50 50 1 1 W N ENDDRAW ENDDEF # +# power_GNDA +# +DEF power_GNDA #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power_GNDA" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GNDA 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# # power_VBUS # DEF power_VBUS #PWR 0 0 Y Y 1 F P |