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authorjaseg <git@jaseg.net>2018-11-21 22:18:37 +0900
committerjaseg <git@jaseg.net>2018-11-21 22:18:37 +0900
commitbd93c5e229b02b8db600c5a92233ca4e1d01cdff (patch)
tree077ba5207b3951a29ffd54f563d6c355400cccc9 /pcb/footprints.pretty/USB_A_FEMALE_THT.kicad_mod
parentf07540c36796713c374feb628903fdbfa8fd7f84 (diff)
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Initial PCB draft
Diffstat (limited to 'pcb/footprints.pretty/USB_A_FEMALE_THT.kicad_mod')
-rw-r--r--pcb/footprints.pretty/USB_A_FEMALE_THT.kicad_mod26
1 files changed, 26 insertions, 0 deletions
diff --git a/pcb/footprints.pretty/USB_A_FEMALE_THT.kicad_mod b/pcb/footprints.pretty/USB_A_FEMALE_THT.kicad_mod
new file mode 100644
index 0000000..e486caf
--- /dev/null
+++ b/pcb/footprints.pretty/USB_A_FEMALE_THT.kicad_mod
@@ -0,0 +1,26 @@
+(module USB_A_FEMALE_THT (layer F.Cu) (tedit 5BF3A730)
+ (fp_text reference REF** (at 0 0.5) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value USB_A_FEMALE_THT (at 0 -0.5) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -6.6 -3.71) (end 6.6 -3.71) (layer F.SilkS) (width 0.15))
+ (fp_line (start -6.6 -3.71) (end -6.6 10.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start 6.6 -3.71) (end 6.6 10.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start -6.6 10.5) (end 6.6 10.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start -4.5 4.5) (end -4.5 7.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start -4.5 7.5) (end -2 7.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2 7.5) (end -2 4.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start -2 4.5) (end -4.5 4.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start 2 7.5) (end 4.5 7.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start 4.5 4.5) (end 2 4.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start 4.5 7.5) (end 4.5 4.5) (layer F.SilkS) (width 0.15))
+ (fp_line (start 2 4.5) (end 2 7.5) (layer F.SilkS) (width 0.15))
+ (pad 2 thru_hole oval (at -1 -2.71) (size 1.5 2.5) (drill 1) (layers *.Cu *.Mask))
+ (pad 3 thru_hole oval (at 1 -2.71) (size 1.5 2.5) (drill 1) (layers *.Cu *.Mask))
+ (pad 4 thru_hole oval (at 3.5 -2.71) (size 1.8 2.5) (drill 1) (layers *.Cu *.Mask))
+ (pad 1 thru_hole oval (at -3.5 -2.71) (size 1.8 2.5) (drill 1) (layers *.Cu *.Mask))
+ (pad 5 thru_hole oval (at 7.3 0) (size 3 4) (drill 2) (layers *.Cu *.Mask))
+ (pad 5 thru_hole oval (at -7.3 0) (size 3 4) (drill 2) (layers *.Cu *.Mask))
+)