From 0cf7359b78b139981877d0992a843eee1357c79e Mon Sep 17 00:00:00 2001
From: Karl Palsson <karlp@tweak.net.au>
Date: Wed, 25 Oct 2017 23:25:26 +0000
Subject: uart-basic: add functional l0 test code too.
Really need to get the rcc helpers built up and upstream!
---
tests/uart-basic/Makefile.stm32l053disco | 26 +++++++++
tests/uart-basic/main-stm32l053disco.c | 90 ++++++++++++++++++++++++++++++++
2 files changed, 116 insertions(+)
create mode 100644 tests/uart-basic/Makefile.stm32l053disco
create mode 100644 tests/uart-basic/main-stm32l053disco.c
(limited to 'tests')
diff --git a/tests/uart-basic/Makefile.stm32l053disco b/tests/uart-basic/Makefile.stm32l053disco
new file mode 100644
index 0000000..5858eaf
--- /dev/null
+++ b/tests/uart-basic/Makefile.stm32l053disco
@@ -0,0 +1,26 @@
+# This is just a makefile.
+# Consider it released into the public domain, or, where not available,
+# available under your choice of BSD2clause, MIT, X11, ISC or Apache2 licenses
+# Karl Palsson <karlp@tweak.net.au>
+BOARD = stm32l053disco
+PROJECT = uart-basic-$(BOARD)
+BUILD_DIR = bin-$(BOARD)
+
+SHARED_DIR = ../../shared
+
+CFILES = main-$(BOARD).c
+CFILES += uart-basic.c
+
+VPATH += $(SHARED_DIR)
+
+INCLUDES += $(patsubst %,-I%, . $(SHARED_DIR))
+
+OPENCM3_DIR=../../libopencm3/
+
+### This section can go to an arch shared rules eventually...
+DEVICE=stm32l053c8
+#OOCD_INTERFACE = stlink-v2
+#OOCD_TARGET = stm32l0x
+OOCD_FILE = ../../openocd/openocd.$(BOARD).cfg
+
+include ../../rules.mk
diff --git a/tests/uart-basic/main-stm32l053disco.c b/tests/uart-basic/main-stm32l053disco.c
new file mode 100644
index 0000000..40b7682
--- /dev/null
+++ b/tests/uart-basic/main-stm32l053disco.c
@@ -0,0 +1,90 @@
+/*
+ * Oct 2017 Karl Palsson <karlp@tweak.net.au>
+ */
+
+#include <errno.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/stm32/crs.h>
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/rcc.h>
+#include <libopencm3/stm32/syscfg.h>
+#include <libopencm3/stm32/usart.h>
+
+#include "uart-basic.h"
+
+#define LED_DISCO_GREEN_RCC RCC_GPIOB
+#define LED_DISCO_GREEN_PORT GPIOB
+#define LED_DISCO_GREEN_PIN GPIO4
+
+void usart1_isr(void)
+{
+ ub_irq_handler();
+}
+
+static void setup_rcc_hack(void)
+{
+ /* FIXME L0 doesn't have rcc setup helpers (yet) */
+ rcc_osc_on(RCC_HSI16);
+ rcc_wait_for_osc_ready(RCC_HSI16);
+ rcc_set_sysclk_source(RCC_HSI16);
+
+ /* HSI48 needs the vrefint turned on */
+ rcc_periph_clock_enable(RCC_SYSCFG);
+ SYSCFG_CFGR3 |= SYSCFG_CFGR3_ENREF_HSI48 | SYSCFG_CFGR3_EN_VREFINT;
+ while (!(SYSCFG_CFGR3 & SYSCFG_CFGR3_REF_HSI48_RDYF));
+
+ /* For USB, but can't use HSI48 as a sysclock on L0 */
+ crs_autotrim_usb_enable();
+ rcc_set_hsi48_source_rc48();
+
+ rcc_osc_on(RCC_HSI48);
+ rcc_wait_for_osc_ready(RCC_HSI48);
+
+ /* ok, we manually poked around, let the lib know */
+ rcc_apb1_frequency = rcc_apb2_frequency = 16e6;
+}
+
+static void board_init(void)
+{
+ rcc_periph_clock_enable(RCC_GPIOA);
+ gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9 | GPIO10);
+ /* usart1 is AF4 */
+ gpio_set_af(GPIOA, GPIO_AF4, GPIO9 | GPIO10);
+}
+
+int main(void)
+{
+ int i;
+ int j = 0;
+ setup_rcc_hack();
+ board_init();
+ struct ub_hw ub = {
+ .uart = USART1,
+ .uart_nvic = NVIC_USART1_IRQ,
+ .uart_rcc = RCC_USART1,
+ };
+ ub_init(&ub);
+ printf("hi guys!\n");
+ /* green led for ticking */
+ rcc_periph_clock_enable(LED_DISCO_GREEN_RCC);
+ gpio_mode_setup(LED_DISCO_GREEN_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE,
+ LED_DISCO_GREEN_PIN);
+
+
+ while (1) {
+ gpio_toggle(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
+
+ for (i = 0; i < 0xa0000; i++) { /* Wait a bit. */
+ __asm__("NOP");
+ }
+ ub_task();
+ gpio_toggle(LED_DISCO_GREEN_PORT, LED_DISCO_GREEN_PIN);
+ for (i = 0; i < 0xa0000; i++) { /* Wait a bit. */
+ __asm__("NOP");
+ }
+ }
+
+ return 0;
+}
--
cgit