From 9904ad49f3d18b8af855034a837e671c3c510262 Mon Sep 17 00:00:00 2001 From: jaseg Date: Tue, 26 Sep 2017 23:54:26 +0200 Subject: Serial protocol working --- olsndot/firmware/Makefile | 4 +- olsndot/firmware/main.c | 148 ++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 144 insertions(+), 8 deletions(-) (limited to 'olsndot') diff --git a/olsndot/firmware/Makefile b/olsndot/firmware/Makefile index 625865d..33c1139 100644 --- a/olsndot/firmware/Makefile +++ b/olsndot/firmware/Makefile @@ -10,7 +10,7 @@ SIZE := arm-none-eabi-size CFLAGS = -Wall -g -std=gnu11 -Os CFLAGS += -mlittle-endian -mcpu=cortex-m0 -march=armv6-m -mthumb -CFLAGS += -ffunction-sections -fdata-sections -Wl,--gc-sections +#CFLAGS += -ffunction-sections -fdata-sections -Wl,--gc-sections CFLAGS += -Wl,-Map=main.map # Technically we're using an STM32F030F4, but apart from the TSSOP20 package that one is largely identical to the @@ -31,7 +31,7 @@ all: main.elf cmsis_exports.c: $(CMSIS_DEV_PATH)/Include/stm32f030x6.h $(CMSIS_PATH)/Include/core_cm0.h python3 gen_cmsis_exports.py $^ > $@ -main.elf: main.c startup_stm32f030x6.s system_stm32f0xx.c $(HAL_PATH)/Src/stm32f0xx_ll_utils.c +main.elf: main.c startup_stm32f030x6.s system_stm32f0xx.c $(HAL_PATH)/Src/stm32f0xx_ll_utils.c cmsis_exports.c $(CC) $(CFLAGS) -o $@ $^ $(OBJCOPY) -O ihex $@ $(@:.elf=.hex) $(OBJCOPY) -O binary $@ $(@:.elf=.bin) diff --git a/olsndot/firmware/main.c b/olsndot/firmware/main.c index 1b3e054..5d6c2be 100644 --- a/olsndot/firmware/main.c +++ b/olsndot/firmware/main.c @@ -11,8 +11,22 @@ #define NBITS 12 void do_transpose(void); uint32_t brightness[32]; +uint32_t sys_time = 0; +uint32_t sys_time_seconds = 0; volatile uint32_t brightness_by_bit[NBITS]; +unsigned int stk_start(void) { + return SysTick->VAL; +} + +unsigned int stk_end(unsigned int start) { + return (start - SysTick->VAL) & 0xffffff; +} + +unsigned int stk_microseconds(void) { + return sys_time*1000 + (1000 - (SysTick->VAL / (SystemCoreClock/1000000))); +} + void hsv_set(int idx, int hue, int white) { int i = hue>>NBITS; int j = hue & (~(-1<CR&RCC_CR_PLLRDY)); RCC->CFGR |= (2<AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN; RCC->APB2ENR |= RCC_APB2ENR_SPI1EN | RCC_APB2ENR_TIM1EN | RCC_APB2ENR_USART1EN | RCC_APB2ENR_ADCEN; + RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; GPIOA->MODER |= (3< 1MBd */ SPI1->CR1 = SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE | SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_SPE | (0<CR2 = (0xf<CR1 = TIM_CR1_ARPE; // | TIM_CR1_OPM; // | TIM_CR1_URS; TIM1->PSC = 1; // debug @@ -132,6 +146,37 @@ int main(void) { TIM1->EGR |= TIM_EGR_UG; + TIM3->CR1 = TIM_CR1_OPM; + TIM3->DIER = TIM_DIER_UIE; + TIM3->PSC = 31; + TIM3->ARR = 1000; + + NVIC_EnableIRQ(TIM3_IRQn); + NVIC_SetPriority(TIM3_IRQn, 2); + + TIM3->EGR |= TIM_EGR_UG; + + /* Configure UART for RS485 comm */ + /* 8N1, 1MBd */ + USART1->CR1 = /* 8-bit -> M1, M0 clear */ + /* RTOIE clear */ + (8 << USART_CR1_DEAT_Pos) /* 8 sample cycles/1 bit DE assertion time */ + | (8 << USART_CR1_DEDT_Pos) /* 8 sample cycles/1 bit DE assertion time */ + /* CMIF clear */ + /* WAKE clear */ + /* PCE, PS clear */ + | USART_CR1_RXNEIE + /* other interrupts clear */ + | USART_CR1_TE + | USART_CR1_RE; + //USART1->CR2 = USART_CR2_RTOEN; /* Timeout enable */ + USART1->CR3 = USART_CR3_DEM; /* RS485 DE enable (output on RTS) */ + USART1->BRR = 32; + USART1->CR1 |= USART_CR1_UE; + + //NVIC_EnableIRQ(USART1_IRQn); + NVIC_SetPriority(USART1_IRQn, 2); + while (42) { #define HUE_MAX ((1<SR &= ~TIM_SR_UIF_Msk; } +union packet { + struct { + uint8_t cmd; /* 0x23 */ + uint8_t step; /* 0-12, numbered from bottom */ + union { + uint16_t rgbw[4]; + struct { + uint16_t r, g, b, w; + }; + }; + } set_step; + uint8_t data[0]; +}; + +int rxpos = 0; +void TIM3_IRQHandler(void) { + TIM3->SR &= ~TIM_SR_UIF; + /* if (rxpos != sizeof(union packet)) + asm("bkpt"); + */ + rxpos = 0; +} + +#define USART_OFFX 8 +#define NCHANNELS (sizeof(brightness)/sizeof(brightness[0])) +int last_step = NCHANNELS/4; +void USART1_IRQHandler() { + static union packet rxbuf; + + int isr = USART1->ISR; + USART1->RQR |= USART_RQR_RXFRQ; + /* Overrun detected? */ + if (isr & USART_ISR_ORE) { + USART1->ICR = USART_ICR_ORECF; /* Acknowledge overrun */ + //asm("bkpt"); FIXME + return; + } + + if (!(isr & USART_ISR_RXNE)) { + //asm("bkpt"); FIXME + return; + } + + uint8_t data = USART1->RDR; + rxbuf.data[rxpos] = data; + rxpos++; + + if (rxpos == sizeof(union packet)) { + if (rxbuf.set_step.cmd == 0x23 && + rxbuf.set_step.step >= USART_OFFX && + rxbuf.set_step.step < USART_OFFX+NCHANNELS) { + if (rxbuf.set_step.step != last_step+1) + if (last_step != USART_OFFX+(NCHANNELS/4)-1 && rxbuf.set_step.step != 0) { + //asm("bkpt"); + } + last_step = rxbuf.set_step.step; + + /* + if (rxbuf.set_step.step == 8 && last_step != 15) + asm("bkpt"); + */ + + uint32_t *out = &brightness[(rxbuf.set_step.step - USART_OFFX)*4]; + /* (matti) (treppe) + * weiß blau + * rot weiß + * grün rot + * blau grün + */ + out[1] = rxbuf.set_step.rgbw[0]; + out[2] = rxbuf.set_step.rgbw[1]; + out[3] = rxbuf.set_step.rgbw[2]; + out[0] = rxbuf.set_step.rgbw[3]; + } + rxpos = 0; + } + + TIM3->CNT = 0; + TIM3->CR1 |= TIM_CR1_CEN; +} + void NMI_Handler(void) { } @@ -219,10 +349,16 @@ void PendSV_Handler(void) { } void SysTick_Handler(void) { + static int n = 0; + sys_time++; + if (n++ == 1000) { + n = 0; + sys_time_seconds++; + } } /* FIXME */ -void _exit(void) {} +void _exit(int status) { while (23); } void *__bss_start__; void *__bss_end__; -- cgit