From 94640bdefc964cf22111aa56da4d1db7281676e5 Mon Sep 17 00:00:00 2001 From: ↑←↑↓→↓→←↑ Date: Wed, 14 Dec 2016 20:07:13 +0100 Subject: WIP, add export --- olsndot/PCB_Project/Project Outputs for olsndot/Gerber/led_drv.RUL | 5 +++++ 1 file changed, 5 insertions(+) create mode 100644 olsndot/PCB_Project/Project Outputs for olsndot/Gerber/led_drv.RUL (limited to 'olsndot/PCB_Project/Project Outputs for olsndot/Gerber/led_drv.RUL') diff --git a/olsndot/PCB_Project/Project Outputs for olsndot/Gerber/led_drv.RUL b/olsndot/PCB_Project/Project Outputs for olsndot/Gerber/led_drv.RUL new file mode 100644 index 0000000..e96f1d3 --- /dev/null +++ b/olsndot/PCB_Project/Project Outputs for olsndot/Gerber/led_drv.RUL @@ -0,0 +1,5 @@ +DRC Rules Export File for PCB: C:\Users\jaseg\Documents\GitHub\led_drv\olsndot\PCB_Project\led_drv.PcbDoc +RuleKind=ShortCircuit|RuleName=ShortCircuit|Scope=Board|Allowed=0 +RuleKind=Clearance|RuleName=Clearance|Scope=Board|Minimum=6.00 +RuleKind=Width|RuleName=Width|Scope=Board|Minimum=6.00 +RuleKind=SolderMaskExpansion|RuleName=SolderMaskExpansion|Scope=Board|Minimum=4.00 -- cgit