From 87c874251fe629b296ead673bb0c09db366dabce Mon Sep 17 00:00:00 2001 From: ↑←↑↓→↓→←↑ Date: Mon, 21 Nov 2016 11:53:33 +0100 Subject: layouting along --- .../led_drv PCB ECO 11-20-2016 6-37-14 PM.LOG | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 olsndot/PCB_Project/Project Logs for olsndot/led_drv PCB ECO 11-20-2016 6-37-14 PM.LOG (limited to 'olsndot/PCB_Project/Project Logs for olsndot/led_drv PCB ECO 11-20-2016 6-37-14 PM.LOG') diff --git a/olsndot/PCB_Project/Project Logs for olsndot/led_drv PCB ECO 11-20-2016 6-37-14 PM.LOG b/olsndot/PCB_Project/Project Logs for olsndot/led_drv PCB ECO 11-20-2016 6-37-14 PM.LOG new file mode 100644 index 0000000..aad1063 --- /dev/null +++ b/olsndot/PCB_Project/Project Logs for olsndot/led_drv PCB ECO 11-20-2016 6-37-14 PM.LOG @@ -0,0 +1,16 @@ +Added Component: Designator=C1(ELKO_10mm_RM5) +Added Component: Designator=C2(ELKO_10mm_RM5) +Added Component: Designator=C3(ELKO_10mm_RM5) +Added Component: Designator=C4(ELKO_10mm_RM5) +Added Pin To Net: NetName=+12V Pin=C1-1 +Added Pin To Net: NetName=NetC1_2 Pin=C1-2 +Added Pin To Net: NetName=+12V Pin=C2-1 +Added Pin To Net: NetName=NetC1_2 Pin=C2-2 +Added Pin To Net: NetName=+12V Pin=C3-1 +Added Pin To Net: NetName=NetC1_2 Pin=C3-2 +Added Pin To Net: NetName=+12V Pin=C4-1 +Added Pin To Net: NetName=NetC1_2 Pin=C4-2 +Added Member To Class: ClassName=main Member=Component C1 1000/25 +Added Member To Class: ClassName=main Member=Component C2 1000/25 +Added Member To Class: ClassName=main Member=Component C3 1000/25 +Added Member To Class: ClassName=main Member=Component C4 1000/25 -- cgit