From 9c78e2ae4075a12d9baba1058cee495659a71a61 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Sun, 19 Nov 2017 23:33:38 +0000 Subject: hw1: begin routing. Spun the host, laid most signal tracks. todo: vcc, ground pour, then shuffle all LA connectors for ease of routing. --- hw1/hw1.kicad_pcb | 361 +++++++++++++++++++++++++++++++++--------------------- hw1/hw1.net | 215 ++++++++++++++++---------------- hw1/hw1.sch | 17 +-- 3 files changed, 338 insertions(+), 255 deletions(-) (limited to 'hw1') diff --git a/hw1/hw1.kicad_pcb b/hw1/hw1.kicad_pcb index abb5b61..9eecfec 100644 --- a/hw1/hw1.kicad_pcb +++ b/hw1/hw1.kicad_pcb @@ -1,15 +1,15 @@ (kicad_pcb (version 4) (host pcbnew 4.0.6) (general - (links 70) - (no_connects 70) + (links 71) + (no_connects 53) (area 110.922999 72.949999 179.653001 126.440001) (thickness 1.6) (drawings 27) - (tracks 0) + (tracks 84) (zones 0) (modules 25) - (nets 26) + (nets 25) ) (page A4) @@ -69,7 +69,7 @@ (pad_to_mask_clearance 0) (aux_axis_origin 110.998 126.365) (grid_origin 110.998 126.365) - (visible_elements FFFFFF7F) + (visible_elements FFFEFF7F) (pcbplotparams (layerselection 0x00030_80000001) (usegerberextensions false) @@ -121,8 +121,7 @@ (net 21 /UART_RX_OUT) (net 22 "Net-(JP1-Pad2)") (net 23 "Net-(JP2-Pad2)") - (net 24 "Net-(R1-Pad1)") - (net 25 "Net-(C6-Pad1)") + (net 24 /VLCD) (net_class Default "This is the default net class." (clearance 0.2) @@ -150,12 +149,11 @@ (add_net /UART_TX_OUT) (add_net /USB_DM) (add_net /USB_DP) + (add_net /VLCD) (add_net GND) - (add_net "Net-(C6-Pad1)") (add_net "Net-(JP1-Pad2)") (add_net "Net-(JP2-Pad2)") (add_net "Net-(P10-Pad6)") - (add_net "Net-(R1-Pad1)") ) (module Socket_Arduino_Uno:Socket_Strip_Arduino_1x08 locked (layer F.Cu) (tedit 552168D2) (tstamp 551AF9EA) @@ -385,18 +383,18 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 59F7BF21) - (at 144.399 100.076 180) + (at 152.019 109.093 270) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /58CF4B65) (attr smd) - (fp_text reference C1 (at 0 -1.25 180) (layer F.SilkS) + (fp_text reference C1 (at 0 -1.25 270) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 100n (at 0 1.5 180) (layer F.Fab) + (fp_text value 100n (at 0 1.5 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user %R (at 0 -1.25 180) (layer F.Fab) + (fp_text user %R (at 0 -1.25 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) @@ -409,9 +407,9 @@ (fp_line (start -1.8 -0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end 1.8 -0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) - (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) (net 4 /NRST)) - (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) (net 2 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) @@ -421,18 +419,18 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 59F7BF27) - (at 156.972 108.712 180) + (at 153.797 109.093 270) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /58CF43FF) (attr smd) - (fp_text reference C2 (at 0 -1.25 180) (layer F.SilkS) + (fp_text reference C2 (at 0 -1.25 270) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 100n (at 0 1.5 180) (layer F.Fab) + (fp_text value 100n (at 0 1.5 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user %R (at 0 -1.25 180) (layer F.Fab) + (fp_text user %R (at 0 -1.25 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) @@ -445,9 +443,9 @@ (fp_line (start -1.8 -0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end 1.8 -0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) - (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) (net 3 +3V3)) - (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) (net 2 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) @@ -457,7 +455,7 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 59F7BF2D) - (at 144.399 101.981 180) + (at 144.272 103.759 180) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /58CF69A9) @@ -493,18 +491,18 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 59F7BF33) - (at 149.352 92.964) + (at 146.685 94.742 180) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /58CF69F1) (attr smd) - (fp_text reference C4 (at 0 -1.25) (layer F.SilkS) + (fp_text reference C4 (at 0 -1.25 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 100n (at 0 1.5) (layer F.Fab) + (fp_text value 100n (at 0 1.5 180) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user %R (at 0 -1.25) (layer F.Fab) + (fp_text user %R (at 0 -1.25 180) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) @@ -517,9 +515,9 @@ (fp_line (start -1.8 -0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end 1.8 -0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) - (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) (net 3 +3V3)) - (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) (net 2 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) @@ -529,7 +527,7 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 59F7BF39) - (at 144.399 97.917) + (at 160.147 97.917) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /58CF6A3A) @@ -565,15 +563,15 @@ ) (module Connectors:USB_Micro-B (layer F.Cu) (tedit 5543E447) (tstamp 59F7BF54) - (at 176.784 109.601 90) + (at 113.03 90.932 270) (descr "Micro USB Type B Receptacle") (tags "USB USB_B USB_micro USB_OTG") (path /58CF10AD) (attr smd) - (fp_text reference P10 (at 0 -3.24 90) (layer F.SilkS) + (fp_text reference P10 (at 0 -3.24 270) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value CONTROL (at 0 5.01 90) (layer F.Fab) + (fp_text value CONTROL (at 0 5.01 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -4.6 -2.59) (end 4.6 -2.59) (layer F.CrtYd) (width 0.05)) @@ -585,34 +583,34 @@ (fp_line (start 4.35 -2.38) (end 4.35 4.03) (layer F.SilkS) (width 0.12)) (fp_line (start 4.35 2.8) (end -4.35 2.8) (layer F.SilkS) (width 0.12)) (fp_line (start -4.35 4.03) (end -4.35 -2.38) (layer F.SilkS) (width 0.12)) - (pad 1 smd rect (at -1.3 -1.35 180) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) + (pad 1 smd rect (at -1.3 -1.35) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) (net 1 +5V)) - (pad 2 smd rect (at -0.65 -1.35 180) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) + (pad 2 smd rect (at -0.65 -1.35) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) (net 12 /USB_DM)) - (pad 3 smd rect (at 0 -1.35 180) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) + (pad 3 smd rect (at 0 -1.35) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) (net 13 /USB_DP)) - (pad 4 smd rect (at 0.65 -1.35 180) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)) - (pad 5 smd rect (at 1.3 -1.35 180) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) + (pad 4 smd rect (at 0.65 -1.35) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd rect (at 1.3 -1.35) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask) (net 2 GND)) - (pad 6 thru_hole oval (at -2.5 -1.35 180) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask) + (pad 6 thru_hole oval (at -2.5 -1.35) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask) (net 14 "Net-(P10-Pad6)")) - (pad 6 thru_hole oval (at 2.5 -1.35 180) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask) + (pad 6 thru_hole oval (at 2.5 -1.35) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask) (net 14 "Net-(P10-Pad6)")) - (pad 6 thru_hole oval (at -3.5 1.35 180) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask) + (pad 6 thru_hole oval (at -3.5 1.35) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask) (net 14 "Net-(P10-Pad6)")) - (pad 6 thru_hole oval (at 3.5 1.35 180) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask) + (pad 6 thru_hole oval (at 3.5 1.35) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask) (net 14 "Net-(P10-Pad6)")) ) (module Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm (layer F.Cu) (tedit 5862ED52) (tstamp 59F7C0DF) - (at 172.085 86.36) + (at 137.541 101.219 270) (descr "Through hole straight pin header, 1x06, 2.54mm pitch, single row") (tags "Through hole pin header THT 1x06 2.54mm single row") (path /59F7E088) - (fp_text reference J1 (at 0 -2.39) (layer F.SilkS) + (fp_text reference J1 (at 0 -2.39 270) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value CONN_01X06 (at 0 15.09) (layer F.Fab) + (fp_text value CONN_01X06 (at 0 15.09 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1.27 -1.27) (end -1.27 13.97) (layer F.Fab) (width 0.1)) @@ -629,17 +627,17 @@ (fp_line (start -1.6 14.3) (end 1.6 14.3) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.6 14.3) (end 1.6 -1.6) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.6 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) - (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 3 +3V3)) - (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 15 /SWCLK)) - (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 2 GND)) - (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 16 /SWDIO)) - (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 4 /NRST)) - (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 17 /SWO)) (model Pin_Headers.3dshapes/Pin_Header_Straight_1x06_Pitch2.54mm.wrl (at (xyz 0 -0.25 0)) @@ -649,18 +647,18 @@ ) (module Housings_QFP:TQFP-48_7x7mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 59F7C113) - (at 152.781 100.711) + (at 151.785 100.997 90) (descr "48 LEAD TQFP 7x7mm (see MICREL TQFP7x7-48LD-PL-1.pdf)") (tags "QFP 0.5") (path /58CEFE92) (attr smd) - (fp_text reference U1 (at 0 -6) (layer F.SilkS) + (fp_text reference U1 (at 0 -6 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value STM32L151C6TxA (at 0 6) (layer F.Fab) + (fp_text value STM32L151C6TxA (at 0 6 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user %R (at 0 0) (layer F.Fab) + (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.15)) @@ -681,79 +679,79 @@ (fp_line (start 3.625 3.625) (end 3.1 3.625) (layer F.SilkS) (width 0.15)) (fp_line (start 3.625 -3.625) (end 3.1 -3.625) (layer F.SilkS) (width 0.15)) (fp_line (start -3.625 -3.2) (end -5 -3.2) (layer F.SilkS) (width 0.15)) - (pad 1 smd rect (at -4.35 -2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) - (net 25 "Net-(C6-Pad1)")) - (pad 2 smd rect (at -4.35 -2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 3 smd rect (at -4.35 -1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 4 smd rect (at -4.35 -1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 5 smd rect (at -4.35 -0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 6 smd rect (at -4.35 -0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 7 smd rect (at -4.35 0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 1 smd rect (at -4.35 -2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (net 24 /VLCD)) + (pad 2 smd rect (at -4.35 -2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 3 smd rect (at -4.35 -1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd rect (at -4.35 -1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd rect (at -4.35 -0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 6 smd rect (at -4.35 -0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 7 smd rect (at -4.35 0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 4 /NRST)) - (pad 8 smd rect (at -4.35 0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 8 smd rect (at -4.35 0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 2 GND)) - (pad 9 smd rect (at -4.35 1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 9 smd rect (at -4.35 1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 3 +3V3)) - (pad 10 smd rect (at -4.35 1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 11 smd rect (at -4.35 2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 12 smd rect (at -4.35 2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 10 smd rect (at -4.35 1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 11 smd rect (at -4.35 2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 12 smd rect (at -4.35 2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 20 /UART_TX_OUT)) - (pad 13 smd rect (at -2.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 13 smd rect (at -2.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 21 /UART_RX_OUT)) - (pad 14 smd rect (at -2.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 14 smd rect (at -2.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 18 /DAC1_OUT)) - (pad 15 smd rect (at -1.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 15 smd rect (at -1.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 19 /DAC2_OUT)) - (pad 16 smd rect (at -1.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 16 smd rect (at -1.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 5 /ADC_IN1)) - (pad 17 smd rect (at -0.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 18 smd rect (at -0.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 19 smd rect (at 0.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 20 smd rect (at 0.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 21 smd rect (at 1.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 22 smd rect (at 1.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 23 smd rect (at 2.25 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 17 smd rect (at -0.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 18 smd rect (at -0.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 19 smd rect (at 0.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 20 smd rect (at 0.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 21 smd rect (at 1.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 22 smd rect (at 1.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 23 smd rect (at 2.25 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 2 GND)) - (pad 24 smd rect (at 2.75 4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 24 smd rect (at 2.75 4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 3 +3V3)) - (pad 25 smd rect (at 4.35 2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 25 smd rect (at 4.35 2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 8 /SPI_CS)) - (pad 26 smd rect (at 4.35 2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 26 smd rect (at 4.35 2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 11 /SPI_SCK)) - (pad 27 smd rect (at 4.35 1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 27 smd rect (at 4.35 1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 10 /SPI_MISO)) - (pad 28 smd rect (at 4.35 1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 28 smd rect (at 4.35 1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 9 /SPI_MOSI)) - (pad 29 smd rect (at 4.35 0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 30 smd rect (at 4.35 0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 31 smd rect (at 4.35 -0.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 32 smd rect (at 4.35 -0.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 29 smd rect (at 4.35 0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 30 smd rect (at 4.35 0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 31 smd rect (at 4.35 -0.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 32 smd rect (at 4.35 -0.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 12 /USB_DM)) - (pad 33 smd rect (at 4.35 -1.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 33 smd rect (at 4.35 -1.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 13 /USB_DP)) - (pad 34 smd rect (at 4.35 -1.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 34 smd rect (at 4.35 -1.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 16 /SWDIO)) - (pad 35 smd rect (at 4.35 -2.25) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 35 smd rect (at 4.35 -2.25 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 2 GND)) - (pad 36 smd rect (at 4.35 -2.75) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 36 smd rect (at 4.35 -2.75 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 3 +3V3)) - (pad 37 smd rect (at 2.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 37 smd rect (at 2.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 15 /SWCLK)) - (pad 38 smd rect (at 2.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 39 smd rect (at 1.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 38 smd rect (at 2.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 39 smd rect (at 1.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 17 /SWO)) - (pad 40 smd rect (at 1.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 41 smd rect (at 0.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 42 smd rect (at 0.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 43 smd rect (at -0.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 44 smd rect (at -0.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) - (pad 45 smd rect (at -1.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 40 smd rect (at 1.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 41 smd rect (at 0.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 42 smd rect (at 0.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 43 smd rect (at -0.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 44 smd rect (at -0.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 45 smd rect (at -1.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 7 /I2C_SCL)) - (pad 46 smd rect (at -1.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 46 smd rect (at -1.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 6 /I2C_SDA)) - (pad 47 smd rect (at -2.25 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 47 smd rect (at -2.25 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 2 GND)) - (pad 48 smd rect (at -2.75 -4.35 90) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) + (pad 48 smd rect (at -2.75 -4.35 180) (size 1.3 0.25) (layers F.Cu F.Paste F.Mask) (net 3 +3V3)) (model Housings_QFP.3dshapes/TQFP-48_7x7mm_Pitch0.5mm.wrl (at (xyz 0 0 0)) @@ -763,14 +761,14 @@ ) (module Socket_Strips:Socket_Strip_Angled_2x05_Pitch2.54mm (layer F.Cu) (tedit 588DE958) (tstamp 5A0F5F85) - (at 117.348 105.41) + (at 173.228 104.013 180) (descr "Through hole angled socket strip, 2x05, 2.54mm pitch, 8.51mm socket length, double rows") (tags "Through hole angled socket strip THT 2x05 2.54mm double row") (path /58CF048F) - (fp_text reference P9 (at -5.65 -2.27) (layer F.SilkS) + (fp_text reference P9 (at -5.65 -2.27 180) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value FX2LA (at -5.65 12.43) (layer F.Fab) + (fp_text value FX2LA (at -5.65 12.43 180) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -4.06 -1.27) (end -4.06 1.27) (layer F.Fab) (width 0.1)) @@ -881,24 +879,24 @@ (fp_line (start 1.55 11.7) (end -12.85 11.7) (layer F.CrtYd) (width 0.05)) (fp_line (start -12.85 11.7) (end -12.85 -1.55) (layer F.CrtYd) (width 0.05)) (fp_line (start -12.85 -1.55) (end 1.55 -1.55) (layer F.CrtYd) (width 0.05)) - (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 7 /I2C_SCL)) - (pad 2 thru_hole oval (at -2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 2 thru_hole oval (at -2.54 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 6 /I2C_SDA)) - (pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 3 thru_hole oval (at 0 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 11 /SPI_SCK)) - (pad 4 thru_hole oval (at -2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 4 thru_hole oval (at -2.54 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 10 /SPI_MISO)) - (pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 5 thru_hole oval (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 9 /SPI_MOSI)) - (pad 6 thru_hole oval (at -2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 6 thru_hole oval (at -2.54 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 8 /SPI_CS)) - (pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 7 thru_hole oval (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 21 /UART_RX_OUT)) - (pad 8 thru_hole oval (at -2.54 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 8 thru_hole oval (at -2.54 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 20 /UART_TX_OUT)) - (pad 9 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) - (pad 10 thru_hole oval (at -2.54 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 9 thru_hole oval (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)) + (pad 10 thru_hole oval (at -2.54 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 2 GND)) (model Socket_Strips.3dshapes/Socket_Strip_Angled_2x05_Pitch2.54mm.wrl (at (xyz -0.05 -0.2 0)) @@ -908,15 +906,15 @@ ) (module TO_SOT_Packages_SMD:SOT-23-5_HandSoldering (layer F.Cu) (tedit 583F3A3F) (tstamp 5A0F5F92) - (at 169.545 109.728 180) + (at 122.682 86.233 90) (descr "5-pin SOT23 package") (tags "SOT-23-5 hand-soldering") (path /59F7B611) (attr smd) - (fp_text reference U2 (at 0 -2.9 180) (layer F.SilkS) + (fp_text reference U2 (at 0 -2.9 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value MIC550x-3.3YM5 (at 0 2.9 180) (layer F.Fab) + (fp_text value MIC550x-3.3YM5 (at 0 2.9 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12)) @@ -930,14 +928,14 @@ (fp_line (start -2.38 -1.8) (end -2.38 1.8) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.38 1.8) (end 2.38 -1.8) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.38 1.8) (end -2.38 1.8) (layer F.CrtYd) (width 0.05)) - (pad 1 smd rect (at -1.35 -0.95 180) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) + (pad 1 smd rect (at -1.35 -0.95 90) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) (net 1 +5V)) - (pad 2 smd rect (at -1.35 0 180) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) + (pad 2 smd rect (at -1.35 0 90) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) (net 2 GND)) - (pad 3 smd rect (at -1.35 0.95 180) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) + (pad 3 smd rect (at -1.35 0.95 90) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) (net 1 +5V)) - (pad 4 smd rect (at 1.35 0.95 180) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask)) - (pad 5 smd rect (at 1.35 -0.95 180) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) + (pad 4 smd rect (at 1.35 0.95 90) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd rect (at 1.35 -0.95 90) (size 1.56 0.65) (layers F.Cu F.Paste F.Mask) (net 3 +3V3)) (model TO_SOT_Packages_SMD.3dshapes\SOT-23-5.wrl (at (xyz 0 0 0)) @@ -947,7 +945,7 @@ ) (module Socket_Strips:Socket_Strip_Straight_2x01_Pitch2.54mm (layer F.Cu) (tedit 588DE958) (tstamp 5A0F6297) - (at 170.434 120.015 270) + (at 169.037 120.015 270) (descr "Through hole straight socket strip, 2x01, 2.54mm pitch, double rows") (tags "Through hole socket strip THT 2x01 2.54mm double row") (path /5A0F91B9) @@ -985,7 +983,7 @@ ) (module Socket_Strips:Socket_Strip_Straight_2x01_Pitch2.54mm (layer F.Cu) (tedit 588DE958) (tstamp 5A0F629D) - (at 173.482 120.015 270) + (at 172.339 120.015 270) (descr "Through hole straight socket strip, 2x01, 2.54mm pitch, double rows") (tags "Through hole socket strip THT 2x01 2.54mm double row") (path /5A0F9269) @@ -1023,7 +1021,7 @@ ) (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58AAD9E8) (tstamp 5A0F62A3) - (at 169.291 114.808) + (at 167.894 114.808) (descr "Resistor SMD 0603, hand soldering") (tags "resistor 0603") (path /5A0F8D14) @@ -1048,7 +1046,7 @@ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 24 "Net-(R1-Pad1)")) + (net 3 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 22 "Net-(JP1-Pad2)")) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -1059,7 +1057,7 @@ ) (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58AAD9E8) (tstamp 5A0F62A9) - (at 169.291 113.284) + (at 172.466 114.681) (descr "Resistor SMD 0603, hand soldering") (tags "resistor 0603") (path /5A0F8EF5) @@ -1084,7 +1082,7 @@ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 24 "Net-(R1-Pad1)")) + (net 3 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 23 "Net-(JP2-Pad2)")) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -1095,18 +1093,18 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 5A0F67DC) - (at 144.399 96.393 180) + (at 148.971 108.839 270) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /5A0FB867) (attr smd) - (fp_text reference C6 (at 0 -1.25 180) (layer F.SilkS) + (fp_text reference C6 (at 0 -1.25 270) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 100n (at 0 1.5 180) (layer F.Fab) + (fp_text value 100n (at 0 1.5 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user %R (at 0 -1.25 180) (layer F.Fab) + (fp_text user %R (at 0 -1.25 270) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) @@ -1119,9 +1117,9 @@ (fp_line (start -1.8 -0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end 1.8 -0.65) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.8 0.65) (end -1.8 0.65) (layer F.CrtYd) (width 0.05)) - (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) - (net 25 "Net-(C6-Pad1)")) - (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 24 /VLCD)) + (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) (net 2 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) @@ -1131,7 +1129,7 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 5A0F6D33) - (at 172.085 106.553) + (at 127.889 86.233) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /5A0FC76D) @@ -1167,7 +1165,7 @@ ) (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58AA848B) (tstamp 5A0F6D39) - (at 167.513 106.68) + (at 124.079 81.661) (descr "Capacitor SMD 0603, hand soldering") (tags "capacitor 0603") (path /5A0FC660) @@ -1232,4 +1230,89 @@ (gr_line (start 120.523 82.55) (end 120.523 93.98) (angle 90) (layer Dwgs.User) (width 0.15)) (gr_line (start 104.648 82.55) (end 120.523 82.55) (angle 90) (layer Dwgs.User) (width 0.15)) + (segment (start 147.806 94.571) (end 147.635 94.742) (width 0.25) (layer F.Cu) (net 3) (tstamp 5A1191BA) (status 30)) + (segment (start 145.242 103.739) (end 145.222 103.759) (width 0.25) (layer F.Cu) (net 3) (tstamp 5A10BD95) (status 30)) + (segment (start 127.381 101.219) (end 127.381 104.648) (width 0.25) (layer B.Cu) (net 4)) + (segment (start 151.323 108.839) (end 152.019 108.143) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A12126C)) + (segment (start 131.572 108.839) (end 151.323 108.839) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A121267)) + (segment (start 127.381 104.648) (end 131.572 108.839) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A121266)) + (via (at 127.381 104.648) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 4)) + (segment (start 152.019 108.143) (end 152.035 108.127) (width 0.25) (layer F.Cu) (net 4)) + (segment (start 152.035 108.127) (end 152.035 105.347) (width 0.25) (layer F.Cu) (net 4) (tstamp 5A121199)) + (segment (start 166.878 123.825) (end 162.687 119.634) (width 0.25) (layer F.Cu) (net 5)) + (segment (start 159.905 102.247) (end 156.135 102.247) (width 0.25) (layer F.Cu) (net 5) (tstamp 5A11F07C)) + (segment (start 162.687 105.029) (end 159.905 102.247) (width 0.25) (layer F.Cu) (net 5) (tstamp 5A11F074)) + (segment (start 162.687 119.634) (end 162.687 105.029) (width 0.25) (layer F.Cu) (net 5) (tstamp 5A11F06D)) + (segment (start 147.435 102.747) (end 149.229 102.747) (width 0.25) (layer F.Cu) (net 6)) + (segment (start 166.497 120.015) (end 169.037 120.015) (width 0.25) (layer B.Cu) (net 6) (tstamp 5A1212D3)) + (segment (start 149.606 103.124) (end 166.497 120.015) (width 0.25) (layer B.Cu) (net 6) (tstamp 5A1212D2)) + (via (at 149.606 103.124) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 6)) + (segment (start 149.229 102.747) (end 149.606 103.124) (width 0.25) (layer F.Cu) (net 6) (tstamp 5A1212CB)) + (segment (start 147.435 102.247) (end 150.126 102.247) (width 0.25) (layer F.Cu) (net 7)) + (segment (start 171.069 118.745) (end 172.339 120.015) (width 0.25) (layer B.Cu) (net 7) (tstamp 5A1212F0)) + (segment (start 166.624 118.745) (end 171.069 118.745) (width 0.25) (layer B.Cu) (net 7) (tstamp 5A1212E7)) + (segment (start 150.495 102.616) (end 166.624 118.745) (width 0.25) (layer B.Cu) (net 7) (tstamp 5A1212E6)) + (via (at 150.495 102.616) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 7)) + (segment (start 150.126 102.247) (end 150.495 102.616) (width 0.25) (layer F.Cu) (net 7) (tstamp 5A1212E2)) + (segment (start 154.535 96.647) (end 154.535 85.574) (width 0.25) (layer F.Cu) (net 8)) + (segment (start 137.795 78.486) (end 134.874 75.565) (width 0.25) (layer B.Cu) (net 8) (tstamp 5A11EFD7)) + (segment (start 147.447 78.486) (end 137.795 78.486) (width 0.25) (layer B.Cu) (net 8) (tstamp 5A11EFD6)) + (via (at 147.447 78.486) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 8)) + (segment (start 154.535 85.574) (end 147.447 78.486) (width 0.25) (layer F.Cu) (net 8) (tstamp 5A11EFCC)) + (segment (start 153.035 96.647) (end 153.035 87.378796) (width 0.25) (layer F.Cu) (net 9)) + (segment (start 139.642002 77.793002) (end 137.414 75.565) (width 0.25) (layer F.Cu) (net 9) (tstamp 5A11EFA8)) + (segment (start 143.449206 77.793002) (end 139.642002 77.793002) (width 0.25) (layer F.Cu) (net 9) (tstamp 5A11EFA5)) + (segment (start 153.035 87.378796) (end 143.449206 77.793002) (width 0.25) (layer F.Cu) (net 9) (tstamp 5A11EF9C)) + (segment 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(layer F.Cu) (net 13)) + (segment (start 149.479 90.932) (end 114.38 90.932) (width 0.25) (layer F.Cu) (net 13) (tstamp 5A11F09C)) + (segment (start 150.535 91.988) (end 149.479 90.932) (width 0.25) (layer F.Cu) (net 13) (tstamp 5A11F094)) + (segment (start 147.435 98.247) (end 136.322 98.247) (width 0.25) (layer F.Cu) (net 15)) + (segment (start 135.001 99.568) (end 135.001 101.219) (width 0.25) (layer F.Cu) (net 15) (tstamp 5A121212)) + (segment (start 136.322 98.247) (end 135.001 99.568) (width 0.25) (layer F.Cu) (net 15) (tstamp 5A121211)) + (segment (start 129.921 101.219) (end 138.049 93.091) (width 0.25) (layer F.Cu) (net 16)) + (segment (start 150.035 94.663) (end 150.035 96.647) (width 0.25) (layer F.Cu) (net 16) (tstamp 5A121224)) + (segment (start 148.463 93.091) (end 150.035 94.663) (width 0.25) (layer F.Cu) (net 16) (tstamp 5A121221)) + (segment (start 138.049 93.091) (end 148.463 93.091) (width 0.25) (layer F.Cu) (net 16) (tstamp 5A121218)) + (segment (start 147.435 99.247) (end 143.958 99.247) (width 0.25) (layer F.Cu) (net 17)) + (segment (start 127 103.378) (end 124.841 101.219) (width 0.25) (layer F.Cu) (net 17) (tstamp 5A121257)) + (segment (start 139.827 103.378) (end 127 103.378) (width 0.25) (layer F.Cu) (net 17) (tstamp 5A12124F)) + (segment (start 143.958 99.247) (end 139.827 103.378) (width 0.25) (layer F.Cu) (net 17) (tstamp 5A121246)) + (segment (start 161.798 123.825) (end 160.782 122.809) (width 0.25) (layer F.Cu) (net 18)) + (segment (start 159.127 103.247) (end 156.135 103.247) (width 0.25) (layer F.Cu) (net 18) (tstamp 5A11F050)) + (segment (start 160.782 104.902) (end 159.127 103.247) (width 0.25) (layer F.Cu) (net 18) (tstamp 5A11F04D)) + (segment (start 160.782 122.809) (end 160.782 104.902) (width 0.25) (layer F.Cu) (net 18) (tstamp 5A11F047)) + (segment (start 156.135 102.747) (end 159.389 102.747) (width 0.25) (layer F.Cu) (net 19)) + (segment (start 161.671 121.158) (end 164.338 123.825) (width 0.25) (layer F.Cu) (net 19) (tstamp 5A11F068)) + (segment (start 161.671 105.029) (end 161.671 121.158) (width 0.25) (layer F.Cu) (net 19) (tstamp 5A11F061)) + (segment (start 159.389 102.747) (end 161.671 105.029) (width 0.25) (layer F.Cu) (net 19) (tstamp 5A11F05A)) + (segment (start 164.211 123.825) (end 164.338 123.825) (width 0.25) (layer F.Cu) (net 19) (tstamp 5A10B5E0)) + (segment (start 156.718 75.565) (end 156.718 79.883) (width 0.25) (layer F.Cu) (net 20)) + (segment (start 156.782 105.347) (end 154.535 105.347) (width 0.25) (layer F.Cu) (net 20) (tstamp 5A120FAB)) + (segment (start 157.988 106.553) (end 156.782 105.347) (width 0.25) (layer F.Cu) (net 20) (tstamp 5A120FAA)) + (via (at 157.988 106.553) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 20)) + (segment (start 161.417 106.553) (end 157.988 106.553) (width 0.25) (layer B.Cu) (net 20) (tstamp 5A120FA4)) + (segment (start 164.465 103.505) (end 161.417 106.553) (width 0.25) (layer B.Cu) (net 20) (tstamp 5A120FA3)) + (via (at 164.465 103.505) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 20)) + (segment (start 164.465 87.63) (end 164.465 103.505) (width 0.25) (layer F.Cu) (net 20) (tstamp 5A120F9C)) + (segment (start 156.718 79.883) (end 164.465 87.63) (width 0.25) (layer F.Cu) (net 20) (tstamp 5A120F94)) + (segment (start 156.135 103.747) (end 157.087 103.747) (width 0.25) (layer F.Cu) (net 21)) + (segment (start 159.258 81.026) (end 159.258 75.565) (width 0.25) (layer F.Cu) (net 21) (tstamp 5A121076)) + (segment (start 165.735 87.503) (end 159.258 81.026) (width 0.25) (layer F.Cu) (net 21) (tstamp 5A12106D)) + (segment (start 165.735 102.743) (end 165.735 87.503) (width 0.25) (layer F.Cu) (net 21) (tstamp 5A12106C)) + (via (at 165.735 102.743) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 21)) + (segment (start 160.655 102.743) (end 165.735 102.743) (width 0.25) (layer B.Cu) (net 21) (tstamp 5A121063)) + (segment (start 158.369 105.029) (end 160.655 102.743) (width 0.25) (layer B.Cu) (net 21) (tstamp 5A121062)) + (via (at 158.369 105.029) (size 0.6) (drill 0.4) (layers F.Cu B.Cu) (net 21)) + (segment (start 157.087 103.747) (end 158.369 105.029) (width 0.25) (layer F.Cu) (net 21) (tstamp 5A12105A)) + (segment (start 148.888 107.806) (end 148.971 107.889) (width 0.25) (layer F.Cu) (net 24) (tstamp 5A11914E) (status 30)) + ) diff --git a/hw1/hw1.net b/hw1/hw1.net index 20d44fa..6e55a30 100644 --- a/hw1/hw1.net +++ b/hw1/hw1.net @@ -1,7 +1,7 @@ (export (version D) (design (source /home/karlp/src/libopencm3-tests/hw1/hw1.sch) - (date "Fri 17 Nov 2017 11:13:02 PM GMT") + (date "Sun 19 Nov 2017 02:11:20 PM GMT") (tool "Eeschema 4.0.6") (sheet (number 1) (name /) (tstamps /) (title_block @@ -374,10 +374,10 @@ (pin (num 5) (name GND) (type power_in)) (pin (num 6) (name shield) (type passive))))) (libraries - (library (logical device) - (uri /usr/share/kicad/library/device.lib)) (library (logical hw1-rescue) (uri /home/karlp/src/libopencm3-tests/hw1/hw1-rescue.lib)) + (library (logical device) + (uri /usr/share/kicad/library/device.lib)) (library (logical conn) (uri /usr/share/kicad/library/conn.lib)) (library (logical stm32) @@ -389,48 +389,50 @@ (node (ref J1) (pin 6)) (node (ref U1) (pin 39))) (net (code 2) (name +3V3) - (node (ref U1) (pin 9)) - (node (ref C5) (pin 1)) - (node (ref P1) (pin 4)) + (node (ref U1) (pin 48)) + (node (ref U1) (pin 36)) + (node (ref R2) (pin 1)) + (node (ref U1) (pin 24)) + (node (ref R1) (pin 1)) (node (ref C8) (pin 1)) - (node (ref J1) (pin 1)) + (node (ref P1) (pin 4)) + (node (ref C5) (pin 1)) (node (ref C2) (pin 1)) - (node (ref U2) (pin 5)) - (node (ref U1) (pin 24)) (node (ref C4) (pin 1)) - (node (ref U1) (pin 36)) - (node (ref U1) (pin 48)) + (node (ref J1) (pin 1)) + (node (ref U1) (pin 9)) + (node (ref U2) (pin 5)) (node (ref C3) (pin 1))) (net (code 3) (name GND) + (node (ref U1) (pin 8)) + (node (ref U1) (pin 23)) + (node (ref P3) (pin 7)) (node (ref C2) (pin 2)) - (node (ref C3) (pin 2)) - (node (ref P9) (pin 10)) - (node (ref P10) (pin 5)) + (node (ref C7) (pin 2)) + (node (ref P1) (pin 6)) + (node (ref P1) (pin 7)) (node (ref C8) (pin 2)) (node (ref C6) (pin 2)) - (node (ref C7) (pin 2)) (node (ref J1) (pin 3)) - (node (ref C1) (pin 2)) - (node (ref P3) (pin 7)) - (node (ref U1) (pin 23)) - (node (ref U1) (pin 47)) - (node (ref U1) (pin 8)) (node (ref U1) (pin 35)) + (node (ref C5) (pin 2)) + (node (ref P10) (pin 5)) + (node (ref C1) (pin 2)) + (node (ref P9) (pin 10)) (node (ref U2) (pin 2)) (node (ref C4) (pin 2)) - (node (ref C5) (pin 2)) - (node (ref P1) (pin 7)) - (node (ref P1) (pin 6))) + (node (ref C3) (pin 2)) + (node (ref U1) (pin 47))) (net (code 4) (name /NRST) - (node (ref J1) (pin 5)) (node (ref U1) (pin 7)) + (node (ref J1) (pin 5)) (node (ref C1) (pin 1))) (net (code 5) (name /SWCLK) (node (ref J1) (pin 2)) (node (ref U1) (pin 37))) (net (code 6) (name /SWDIO) - (node (ref J1) (pin 4)) - (node (ref U1) (pin 34))) + (node (ref U1) (pin 34)) + (node (ref J1) (pin 4))) (net (code 7) (name "Net-(U1-Pad40)") (node (ref U1) (pin 40))) (net (code 8) (name "Net-(U1-Pad2)") @@ -443,42 +445,42 @@ (node (ref U1) (pin 19))) (net (code 12) (name "Net-(U1-Pad18)") (node (ref U1) (pin 18))) - (net (code 13) (name /SPI_MOSI) - (node (ref U1) (pin 28)) - (node (ref P3) (pin 4)) - (node (ref P9) (pin 5))) + (net (code 13) (name /SPI_CS) + (node (ref P3) (pin 3)) + (node (ref U1) (pin 25)) + (node (ref P9) (pin 6))) (net (code 14) (name "Net-(U2-Pad4)") (node (ref U2) (pin 4))) (net (code 15) (name /ADC_IN2) (node (ref U1) (pin 17))) (net (code 16) (name /ADC_IN1) - (node (ref U1) (pin 16)) - (node (ref P2) (pin 3))) - (net (code 17) (name /SPI_MISO) - (node (ref P3) (pin 5)) + (node (ref P2) (pin 3)) + (node (ref U1) (pin 16))) + (net (code 17) (name /SPI_MOSI) + (node (ref P3) (pin 4)) + (node (ref P9) (pin 5)) + (node (ref U1) (pin 28))) + (net (code 18) (name /SPI_MISO) + (node (ref P9) (pin 4)) (node (ref U1) (pin 27)) - (node (ref P9) (pin 4))) - (net (code 18) (name /SPI_SCK) + (node (ref P3) (pin 5))) + (net (code 19) (name /SPI_SCK) (node (ref P9) (pin 3)) - (node (ref P3) (pin 6)) - (node (ref U1) (pin 26))) - (net (code 19) (name /SPI_CS) - (node (ref P9) (pin 6)) - (node (ref P3) (pin 3)) - (node (ref U1) (pin 25))) + (node (ref U1) (pin 26)) + (node (ref P3) (pin 6))) (net (code 20) (name /UART_RX_OUT) - (node (ref P4) (pin 2)) (node (ref P9) (pin 7)) - (node (ref U1) (pin 13))) + (node (ref U1) (pin 13)) + (node (ref P4) (pin 2))) (net (code 21) (name /UART_TX_OUT) - (node (ref P4) (pin 1)) + (node (ref P9) (pin 8)) (node (ref U1) (pin 12)) - (node (ref P9) (pin 8))) + (node (ref P4) (pin 1))) (net (code 22) (name "Net-(P9-Pad9)") (node (ref P9) (pin 9))) - (net (code 23) (name /USB_DM) - (node (ref U1) (pin 32)) - (node (ref P10) (pin 2))) + (net (code 23) (name /USB_DP) + (node (ref U1) (pin 33)) + (node (ref P10) (pin 3))) (net (code 24) (name /I2C_SCL) (node (ref P2) (pin 6)) (node (ref JP2) (pin 1)) @@ -486,105 +488,102 @@ (node (ref P3) (pin 10)) (node (ref U1) (pin 45))) (net (code 25) (name /I2C_SDA) - (node (ref U1) (pin 46)) - (node (ref P2) (pin 5)) (node (ref JP1) (pin 1)) (node (ref P9) (pin 2)) - (node (ref P3) (pin 9))) - (net (code 26) (name /USB_DP) - (node (ref P10) (pin 3)) - (node (ref U1) (pin 33))) + (node (ref P3) (pin 9)) + (node (ref P2) (pin 5)) + (node (ref U1) (pin 46))) + (net (code 26) (name /USB_DM) + (node (ref P10) (pin 2)) + (node (ref U1) (pin 32))) (net (code 27) (name "Net-(JP2-Pad2)") (node (ref JP2) (pin 2)) (node (ref R2) (pin 2))) (net (code 28) (name "Net-(JP1-Pad2)") - (node (ref JP1) (pin 2)) - (node (ref R1) (pin 2))) - (net (code 29) (name "Net-(R1-Pad1)") - (node (ref R1) (pin 1)) - (node (ref R2) (pin 1))) - (net (code 30) (name "Net-(U1-Pad41)") - (node (ref U1) (pin 41))) - (net (code 31) (name "Net-(C6-Pad1)") + (node (ref R1) (pin 2)) + (node (ref JP1) (pin 2))) + (net (code 29) (name /VLCD) (node (ref C6) (pin 1)) (node (ref U1) (pin 1))) - (net (code 32) (name "Net-(U1-Pad42)") - (node (ref U1) (pin 42))) - (net (code 33) (name "Net-(U1-Pad44)") + (net (code 30) (name "Net-(U1-Pad41)") + (node (ref U1) (pin 41))) + (net (code 31) (name "Net-(U1-Pad44)") (node (ref U1) (pin 44))) - (net (code 34) (name "Net-(U1-Pad20)") + (net (code 32) (name "Net-(U1-Pad20)") (node (ref U1) (pin 20))) - (net (code 35) (name /Vin) + (net (code 33) (name /Vin) (node (ref P1) (pin 8))) - (net (code 36) (name "Net-(P10-Pad6)") + (net (code 34) (name +5V) + (node (ref P10) (pin 1)) + (node (ref U2) (pin 1)) + (node (ref P1) (pin 5)) + (node (ref U2) (pin 3)) + (node (ref C7) (pin 1))) + (net (code 35) (name "Net-(P10-Pad6)") (node (ref P10) (pin 6))) - (net (code 37) (name "Net-(P10-Pad4)") + (net (code 36) (name "Net-(P10-Pad4)") (node (ref P10) (pin 4))) - (net (code 38) (name "Net-(U1-Pad6)") + (net (code 37) (name "Net-(U1-Pad6)") (node (ref U1) (pin 6))) - (net (code 39) (name "Net-(U1-Pad5)") + (net (code 38) (name "Net-(U1-Pad5)") (node (ref U1) (pin 5))) - (net (code 40) (name +5V) - (node (ref C7) (pin 1)) - (node (ref U2) (pin 1)) - (node (ref U2) (pin 3)) - (node (ref P10) (pin 1)) - (node (ref P1) (pin 5))) - (net (code 41) (name "Net-(U1-Pad43)") + (net (code 39) (name "Net-(U1-Pad42)") + (node (ref U1) (pin 42))) + (net (code 40) (name "Net-(U1-Pad43)") (node (ref U1) (pin 43))) - (net (code 42) (name "Net-(U1-Pad21)") + (net (code 41) (name "Net-(U1-Pad21)") (node (ref U1) (pin 21))) - (net (code 43) (name "Net-(U1-Pad22)") + (net (code 42) (name "Net-(U1-Pad22)") (node (ref U1) (pin 22))) - (net (code 44) (name "Net-(U1-Pad38)") + (net (code 43) (name "Net-(U1-Pad38)") (node (ref U1) (pin 38))) - (net (code 45) (name "Net-(U1-Pad31)") + (net (code 44) (name "Net-(U1-Pad31)") (node (ref U1) (pin 31))) - (net (code 46) (name "Net-(U1-Pad30)") + (net (code 45) (name "Net-(U1-Pad30)") (node (ref U1) (pin 30))) - (net (code 47) (name "Net-(U1-Pad29)") + (net (code 46) (name "Net-(U1-Pad29)") (node (ref U1) (pin 29))) - (net (code 48) (name "Net-(U1-Pad11)") + (net (code 47) (name "Net-(U1-Pad11)") (node (ref U1) (pin 11))) - (net (code 49) (name "Net-(U1-Pad10)") + (net (code 48) (name "Net-(U1-Pad10)") (node (ref U1) (pin 10))) - (net (code 50) (name /AREF) + (net (code 49) (name /AREF) (node (ref P3) (pin 8))) - (net (code 51) (name "Net-(P8-Pad1)") + (net (code 50) (name "Net-(P8-Pad1)") (node (ref P8) (pin 1))) - (net (code 52) (name "Net-(P7-Pad1)") + (net (code 51) (name "Net-(P7-Pad1)") (node (ref P7) (pin 1))) - (net (code 53) (name "Net-(P6-Pad1)") + (net (code 52) (name "Net-(P6-Pad1)") (node (ref P6) (pin 1))) - (net (code 54) (name "Net-(P5-Pad1)") + (net (code 53) (name "Net-(P5-Pad1)") (node (ref P5) (pin 1))) - (net (code 55) (name "/5(**)") + (net (code 54) (name "/5(**)") (node (ref P4) (pin 6))) - (net (code 56) (name "Net-(P1-Pad1)") + (net (code 55) (name "Net-(P1-Pad1)") (node (ref P1) (pin 1))) - (net (code 57) (name "/9(**)") + (net (code 56) (name "/9(**)") (node (ref P3) (pin 2))) - (net (code 58) (name /8) + (net (code 57) (name /8) (node (ref P3) (pin 1))) - (net (code 59) (name /7) + (net (code 58) (name /7) (node (ref P4) (pin 8))) - (net (code 60) (name "/6(**)") + (net (code 59) (name "/6(**)") (node (ref P4) (pin 7))) - (net (code 61) (name /4) + (net (code 60) (name /4) (node (ref P4) (pin 5))) - (net (code 62) (name "/3(**)") + (net (code 61) (name "/3(**)") (node (ref P4) (pin 4))) - (net (code 63) (name /2) + (net (code 62) (name /2) (node (ref P4) (pin 3))) - (net (code 64) (name /A3) + (net (code 63) (name /A3) (node (ref P2) (pin 4))) - (net (code 65) (name /DAC2_OUT) + (net (code 64) (name /DAC2_OUT) (node (ref P2) (pin 2)) (node (ref U1) (pin 15))) - (net (code 66) (name /DAC1_OUT) - (node (ref P2) (pin 1)) - (node (ref U1) (pin 14))) - (net (code 67) (name /RESET_OUT) + (net (code 65) (name /DAC1_OUT) + (node (ref U1) (pin 14)) + (node (ref P2) (pin 1))) + (net (code 66) (name /RESET_OUT) (node (ref P1) (pin 3))) - (net (code 68) (name /IOREF) + (net (code 67) (name /IOREF) (node (ref P1) (pin 2))))) \ No newline at end of file diff --git a/hw1/hw1.sch b/hw1/hw1.sch index 53fa91d..991ee21 100644 --- a/hw1/hw1.sch +++ b/hw1/hw1.sch @@ -866,9 +866,9 @@ F 3 "" H 9650 4050 50 0001 C CNN 1 0 0 -1 $EndComp Wire Wire Line - 9650 3900 9650 3800 + 9650 3800 9650 3900 Wire Wire Line - 9650 3800 9350 3800 + 9350 3800 9650 3800 Wire Wire Line 9350 3800 9350 3900 $Comp @@ -954,12 +954,6 @@ F 3 "" H 700 4000 50 0000 C CNN 1 700 4000 1 0 0 -1 $EndComp -Wire Wire Line - 700 3650 800 3650 -Wire Wire Line - 800 3650 800 3350 -Wire Wire Line - 800 3350 950 3350 Wire Wire Line 700 3950 700 4000 Text Notes -500 3850 0 60 ~ 0 @@ -994,4 +988,11 @@ Connection ~ 5400 7500 Wire Wire Line 6100 7200 6100 7000 Connection ~ 6100 7000 +Connection ~ 9500 3800 +Wire Wire Line + 950 3350 700 3350 +Wire Wire Line + 700 3350 700 3650 +Text Label 950 3350 2 60 ~ 0 +VLCD $EndSCHEMATC -- cgit