From cb376f395911d6face5a107cd4c543d7a03249b8 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Sat, 7 Oct 2017 15:20:00 +0000 Subject: WIP: hardware test partner round 1 Not sure which kicad files are necessary and which are local yet! Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st board, giving access to test: * DAC->ADC (both directions) * I2C (both directions) * SPI (both directions) * Uart (both directions) a socket for a cheap fx2 based logic analyser will be included, so that sigrok can be used to capture tests of the actual line states. --- hw1/Socket_Arduino_Uno.pretty/Arduino_1pin.kicad_mod | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 hw1/Socket_Arduino_Uno.pretty/Arduino_1pin.kicad_mod (limited to 'hw1/Socket_Arduino_Uno.pretty/Arduino_1pin.kicad_mod') diff --git a/hw1/Socket_Arduino_Uno.pretty/Arduino_1pin.kicad_mod b/hw1/Socket_Arduino_Uno.pretty/Arduino_1pin.kicad_mod new file mode 100644 index 0000000..edd95e7 --- /dev/null +++ b/hw1/Socket_Arduino_Uno.pretty/Arduino_1pin.kicad_mod @@ -0,0 +1,12 @@ +(module Arduino_1pin (layer F.Cu) (tedit 0) + (descr "module 1 pin (ou trou mecanique de percage)") + (tags DEV) + (fp_text reference REF** (at 0 -3.048) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1pin (at 0 2.794) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 0 -2.286) (layer F.SilkS) (width 0.15)) + (pad 1 thru_hole circle (at 0 0) (size 4.064 4.064) (drill 3.048) (layers *.Cu *.Mask F.SilkS)) +) -- cgit