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2017-11-17hw1: add in/out caps to 3v3Karl Palsson1-0/+0
2017-11-17hw1: schematic "finished" ?Karl Palsson1-0/+0
have I committed enough files for others to even open this?
2017-10-07WIP: hardware test partner round 1Karl Palsson1-0/+0
Not sure which kicad files are necessary and which are local yet! Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st board, giving access to test: * DAC->ADC (both directions) * I2C (both directions) * SPI (both directions) * Uart (both directions) a socket for a cheap fx2 based logic analyser will be included, so that sigrok can be used to capture tests of the actual line states.