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2018-02-19hw1: update to currentKarl Palsson1-0/+0
Not really sure, did I forget to checkin after shipping out? Something got updated after a dot update of kicad? revision control of pcbs and schematics still sucks hard.
2017-12-27hw1: test points, cleanup 3d viewKarl Palsson1-0/+0
Fixed boot0 to be tied down, will be programmed via swd. Added test points for spare pins where easy Fixed some footprints to make the 3d view pretty.
2017-12-17new pdf for current schematicKarl Palsson1-0/+0
2017-11-17hw1: add in/out caps to 3v3Karl Palsson1-0/+0
2017-11-17hw1: schematic "finished" ?Karl Palsson1-0/+0
have I committed enough files for others to even open this?
2017-10-07WIP: hardware test partner round 1Karl Palsson1-0/+0
Not sure which kicad files are necessary and which are local yet! Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st board, giving access to test: * DAC->ADC (both directions) * I2C (both directions) * SPI (both directions) * Uart (both directions) a socket for a cheap fx2 based logic analyser will be included, so that sigrok can be used to capture tests of the actual line states.