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2018-02-19hw1: gitignore gerbersKarl Palsson1-0/+12
2018-02-19hw1: notes on signal integrityKarl Palsson1-0/+41
2018-02-19hw1: update to currentKarl Palsson6-1050/+637
Not really sure, did I forget to checkin after shipping out? Something got updated after a dot update of kicad? revision control of pcbs and schematics still sucks hard.
2018-02-02hw1: add exampe part number for fx2la part numberKarl Palsson1-0/+1
2017-12-31hw1: use explicit 10103594-0001LF partKarl Palsson3-439/+447
better fit
2017-12-29hw1: commit with filled poursKarl Palsson1-6/+768
2017-12-29hw1: termination watKarl Palsson1-766/+7
2017-12-29hw1: discover reversed numbering on arduino connectorsKarl Palsson3-125/+925
joy. Fixed now against nucleo64 manuals.
2017-12-29hw1: more silk cleanupKarl Palsson3-192/+197
2017-12-28hw1: cleanup silk and start adding labelsKarl Palsson1-43/+79
2017-12-27hw1: shrinking after dropping arduino stuffKarl Palsson1-774/+68
2017-12-27hw1: drop arduinno style holes and board shapeKarl Palsson3-987/+994
More to go, nno need for the silk and dead shapes, we just needed the pin spacings
2017-12-27hw1: test points, cleanup 3d viewKarl Palsson4-212/+376
Fixed boot0 to be tied down, will be programmed via swd. Added test points for spare pins where easy Fixed some footprints to make the 3d view pretty.
2017-12-17new pdf for current schematicKarl Palsson1-0/+0
2017-12-17"fix" grounds by tracks into pourKarl Palsson3-1155/+1380
"finish" routing, ignore DRC violations from disconnected usb shield on pin 6. Add boot0 jumper pad "just in case" but really kinda dumb, we've got a debug header on it. Why bother with this? Change paper size in schema to get more space. TODO: add silk? TODO: replace "arduino" shape with just the pinpoints.
2017-12-11hw1: continued, just intermediate progress saveKarl Palsson3-282/+1284
wtf kicad, why aren't my grounds connected?!
2017-11-20hw1: add crystal, more commentaryKarl Palsson3-172/+247
probably need a crystal for usb :) still needs footrints, will probably be any old 3225 part.
2017-11-19hw1: begin routing.Karl Palsson3-255/+338
Spun the host, laid most signal tracks. todo: vcc, ground pour, then shuffle all LA connectors for ease of routing.
2017-11-17hw1: apparently _actually_ save the fileKarl Palsson1-50/+14
2017-11-17hw1: add in/out caps to 3v3Karl Palsson4-150/+296
2017-11-17git ignore more backupsKarl Palsson1-0/+2
2017-11-17add "klibs" with new regulatorKarl Palsson2-0/+33
2017-11-17gitignore kicad .bak filesKarl Palsson1-0/+1
2017-11-17hw1: schematic "finished" ?Karl Palsson7-1223/+1587
have I committed enough files for others to even open this?
2017-10-26common openocd: use -s to find files from test dirs.Karl Palsson5-4/+18
The sourcing of the common.cfg and the optional local files was failing when invoked from a test directory. Use -s and properly use [find ...] to search paths nicely.
2017-10-26uart-basic: l0: speedup and drop dead codeKarl Palsson1-14/+2
Don't need the HSI48 clocks, that was from a usb demo
2017-10-25uart-basic: add l4Karl Palsson2-0/+103
2017-10-25uart-basic: add functional l0 test code too.Karl Palsson2-0/+116
Really need to get the rcc helpers built up and upstream!
2017-10-24uart-basic: add f0, requires newest code tooKarl Palsson3-1/+91
stupid f072 disco doesn't have usart2 available
2017-10-24basic uart: f4 and f3, prepping tests for usart-v2Karl Palsson6-0/+372
use parity to at least test a little more of the common code
2017-10-07WIP: hardware test partner round 1Karl Palsson23-0/+45578
Not sure which kicad files are necessary and which are local yet! Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st board, giving access to test: * DAC->ADC (both directions) * I2C (both directions) * SPI (both directions) * Uart (both directions) a socket for a cheap fx2 based logic analyser will be included, so that sigrok can be used to capture tests of the actual line states.
2017-09-01awd-timer-dma: initial commit.Karl Palsson5-0/+293
Had to figure out a few screwups before I got the AWD working properly.
2017-09-01spi-master: trivial: names to match sigrok defaultKarl Palsson1-1/+1
2017-09-01lib: update to my staging 2017.4Karl Palsson1-0/+0
2017-04-24lib: update to my staging 2017.4Karl Palsson1-0/+0
2017-04-05i2c: fix uart notes for f0Karl Palsson1-3/+3
2017-04-05openocd: fix gross tcl syntaxKarl Palsson1-1/+1
if you need the ; why do you need the #
2017-04-04move forward to new libopencm3Karl Palsson1-0/+0
2017-04-04i2c-master: f0: fix ledsKarl Palsson1-2/+2
2017-04-04rules.mk: make sure flashing works from other directoriesKarl Palsson1-2/+2
Provide full path when communicating with openocd. This means you can run a permanent openocd session from the ./openocd directory, and still have things working with just "make flash" from whatever test directory you are in.
2017-03-27fix sigrokKarl Palsson1-1/+1
2017-03-27update to latest stagingKarl Palsson1-0/+0
2017-03-27spi-master: initial busy sending test stub.Karl Palsson4-0/+187
Basic framework. now we can build on it.
2017-03-27i2c-master: add pins for f0 discoKarl Palsson1-0/+1
2017-03-24i2c-master: use library form of transfer functionsKarl Palsson2-143/+0
2017-03-23i2c: use speed setting from newer library versionKarl Palsson2-95/+0
2017-03-23i2c-master: add 400k speed support on v1/v2Karl Palsson2-20/+44
2017-03-23i2c-master: cleaned up again on l1Karl Palsson1-168/+81
now has repeated-start and stop/start support, with the same API as v2 Just to decide whether all of it goes up into the library or not.
2017-03-22bump to my latest libKarl Palsson1-0/+0
2017-03-22working temp/humi stop/repeated stuff on f0Karl Palsson1-24/+32
needs cleanup and remerge with f4/l1
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