diff options
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/i2c-master/i2c-master.c | 95 |
1 files changed, 0 insertions, 95 deletions
diff --git a/tests/i2c-master/i2c-master.c b/tests/i2c-master/i2c-master.c index bcaa1db..469e66f 100644 --- a/tests/i2c-master/i2c-master.c +++ b/tests/i2c-master/i2c-master.c @@ -27,101 +27,6 @@ enum sht21_cmd_e { // ------------------ section proposed to go up to libopencm3 -/** - * I2C speed modes. - */ -enum i2c_speeds { - i2c_speed_sm_100k, - i2c_speed_fm_400k, - i2c_speed_fmp_1m, - i2c_speed_unknown -}; - -/* to go to i2c-v1 impl file, with common name.... */ -/** - * Set the i2c communicaton speed. - * @param p i2c peripheral, eg I2C1 - * @param speed one of the listed speed modes @ref i2c_speeds - * @param clock_megahz i2c peripheral clock speed in MHz. Usually, rcc_apb1_frequency / 1e6 - */ -static void i2c_set_speed_v1(uint32_t p, enum i2c_speeds speed, uint32_t clock_megahz) -{ - i2c_set_clock_frequency(p, clock_megahz); - switch(speed) { - case i2c_speed_fm_400k: - i2c_set_fast_mode(p); - i2c_set_ccr(p, clock_megahz * 5 / 6); - i2c_set_trise(p, clock_megahz + 1); - break; - default: - /* fall back to standard mode */ - case i2c_speed_sm_100k: - i2c_set_standard_mode(p); - /* x Mhz / (100kHz * 2) */ - i2c_set_ccr(p, clock_megahz * 5); - /* Sm mode, (100kHz) freqMhz + 1 */ - i2c_set_trise(p, clock_megahz + 1); - break; - } -} - -/* to go to i2c-v2 impl file, with common name.... */ -/** - * Set the i2c communicaton speed. - * NOTE: 1MHz mode not yet implemented! - * Min clock speed: 8MHz for FM, 2Mhz for SM, - * @param p i2c peripheral, eg I2C1 - * @param speed one of the listed speed modes @ref i2c_speeds - * @param clock_megahz i2c peripheral clock speed in MHz. Usually, rcc_apb1_frequency / 1e6 - */ -static void i2c_set_speed_v2(uint32_t p, enum i2c_speeds speed, uint32_t clock_megahz) -{ - int prescaler; - switch(speed) { - case i2c_speed_fmp_1m: - /* FIXME - add support for this mode! */ - break; - case i2c_speed_fm_400k: - /* target 8Mhz input, so tpresc = 125ns */ - prescaler = clock_megahz / 8 - 1; - i2c_set_prescaler(p, prescaler); - i2c_set_scl_low_period(p, 0x9); // 1250ns - i2c_set_scl_high_period(p, 3); // 500ns - i2c_set_data_hold_time(p, 2); // 250ns - i2c_set_data_setup_time(p, 2); // 375ns - break; - default: - /* fall back to standard mode */ - case i2c_speed_sm_100k: - /* target 2Mhz input, so tpresc = 500ns */ - prescaler = clock_megahz / 4 - 1; - i2c_set_prescaler(p, prescaler); - i2c_set_scl_low_period(p, 0x13); // 5usecs - i2c_set_scl_high_period(p, 0xf); // 4usecs - i2c_set_data_hold_time(p, 2); // 0.5usecs - i2c_set_data_setup_time(p, 4); // 1.25usecs - break; - } -} - - -/* requires clock to be a multiple of 2 ! */ -/** - * Set the i2c line speed as optimally as possible - * @param p - * @param speed - * @param clock_megahz _normally_ provide: rcc_apb1_frequency / 1000000 here - * TODO: clock must be a multiple of 2meg for -v2 at least, improve docs here! - */ -static void i2c_set_speed(uint32_t p, enum i2c_speeds speed, uint32_t clock_megahz) -{ -#if defined I2C_SR2 - i2c_set_speed_v1(p, speed, clock_megahz); -#else - i2c_set_speed_v2(p, speed, clock_megahz); -#endif -} - static void i2c_write7_v1(uint32_t i2c, int addr, uint8_t *data, size_t n) { |