From 6ab94e0b318884bbcb95e2ea3835f951502e1d99 Mon Sep 17 00:00:00 2001 From: jaseg Date: Wed, 14 Oct 2020 12:47:28 +0200 Subject: Move firmware into subdirectory --- fw/midi-dials/build/stm32f0xx_hal_dma.lst | 2507 +++++++++++++++++++++++++++++ 1 file changed, 2507 insertions(+) create mode 100644 fw/midi-dials/build/stm32f0xx_hal_dma.lst (limited to 'fw/midi-dials/build/stm32f0xx_hal_dma.lst') diff --git a/fw/midi-dials/build/stm32f0xx_hal_dma.lst b/fw/midi-dials/build/stm32f0xx_hal_dma.lst new file mode 100644 index 0000000..0e4e1aa --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_dma.lst @@ -0,0 +1,2507 @@ +ARM GAS /tmp/ccPStHDw.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_dma.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.DMA_SetConfig,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 DMA_SetConfig: + 23 .LFB52: + 24 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @file stm32f0xx_hal_dma.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Initialization and de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + IO operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Peripheral State and errors functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### How to use this driver ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** necessary). Please refer to Reference manual for connection between peripherals + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and DMA requests . + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters: + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Transfer Direction, Source and Destination data formats, + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode, + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** using HAL_DMA_Init() function. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** detection. + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Polling mode IO operation *** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ================================= + ARM GAS /tmp/ccPStHDw.s page 2 + + + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** address and destination address and the Length of data to be transferred + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Interrupt mode IO operation *** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =================================== + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** In this case the DMA interrupt is configured + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** add his own function by customization of function pointer XferCpltCallback and + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** XferErrorCallback (i.e a member of DMA handle structure). + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** DMA HAL driver macros list *** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================= + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Below the list of most used macros in DMA HAL driver. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @attention + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *

© Copyright (c) 2016 STMicroelectronics. + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * All rights reserved.

+ 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This software component is licensed by ST under BSD 3-Clause license, + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the "License"; You may not use this file except in compliance with the + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * License. You may obtain a copy of the License at: + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * opensource.org/licenses/BSD-3-Clause + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #include "stm32f0xx_hal.h" + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup STM32F0xx_HAL_Driver + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA DMA + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 3 + + + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialization and de-initialization functions + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### Initialization and de-initialization functions ##### + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction, + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** reference manual. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialize the DMA according to the specified + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(NULL == hdma) + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + ARM GAS /tmp/ccPStHDw.s page 4 + + + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the CR register value */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp = hdma->Instance->CCR; + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_DIR)); + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Prepare the DMA Channel configuration */ + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp |= hdma->Init.Direction | + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Write to DMA Channel CR register */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = tmp; + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize DmaBaseAddress and ChannelIndex parameters used + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialise the error code */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize the DMA state*/ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Allocate lock resource and initialize it */ + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED; + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(NULL == hdma) + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + ARM GAS /tmp/ccPStHDw.s page 5 + + + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the selected DMA Channelx */ + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel control register */ + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = 0U; + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel Number of Data to Transfer register */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = 0U; + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel peripheral address register */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = 0U; + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel memory address register */ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = 0U; + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get DMA Base Address */ + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clean callbacks */ + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the error code */ + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the DMA state */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET; + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief I/O operation functions + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### IO operation functions ##### + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] This section provides functions allowing to: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer + ARM GAS /tmp/ccPStHDw.s page 6 + + + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Start DMA transfer with interrupt + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Abort DMA transfer + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Poll for transfer complete + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Handle DMA interrupt request + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer. + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 7 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled. + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the transfer complete, & transfer error interrupts */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer interrupt is optional: enable it only if associated callback is available */ + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(NULL != hdma->XferHalfCpltCallback ) + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + ARM GAS /tmp/ccPStHDw.s page 8 + + + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state*/ + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer in Interrupt mode. + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccPStHDw.s page 9 + + + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Call User Abort callback */ + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferAbortCallback != NULL) + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback(hdma); + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Polling for transfer complete. + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete. + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param Timeout Timeout duration. + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tickstart = 0U; + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Polling mode not supported in circular mode */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the level transfer complete flag */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + ARM GAS /tmp/ccPStHDw.s page 10 + + + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete flag */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_TC1 << hdma->ChannelIndex; + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete flag */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_HT1 << hdma->ChannelIndex; + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get tick */ + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tickstart = HAL_GetTick(); + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** while(RESET == (hdma->DmaBaseAddress->ISR & temp)) + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))) + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_READY; + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check for the Timeout */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(Timeout != HAL_MAX_DELAY) + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 11 + + + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** all transfers are complete) */ + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process unlocked */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Handle DMA interrupt request. + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_ + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt */ + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* State is updated only in Transfer Complete case */ + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferHalfCpltCallback != NULL) + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer callback */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma); + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/ + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the transfer complete & transfer error interrupts */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* if the DMA mode is not CIRCULAR */ + ARM GAS /tmp/ccPStHDw.s page 12 + + + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferCpltCallback != NULL) + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer complete callback */ + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback(hdma); + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & D + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Then, disable all DMA interrupts */ + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferErrorCallback != NULL) + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer error callback */ + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback(hdma); + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Register callbacks + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifer + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param pCallback pointer to private callback function which has pointer to + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter. + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + ARM GAS /tmp/ccPStHDw.s page 13 + + + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = pCallback; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback; + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = pCallback; + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = pCallback; + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief UnRegister callbacks + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifer + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + ARM GAS /tmp/ccPStHDw.s page 14 + + + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID: + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Peripheral State functions + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### State and Errors functions ##### + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This subsection provides functions allowing to + ARM GAS /tmp/ccPStHDw.s page 15 + + + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Check the DMA state + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Get error code + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Returns the DMA state. + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL state + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Return the DMA error code + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval DMA Error Code + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Set the DMA Transfer parameters. + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 25 .loc 1 827 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 .LVL0: + ARM GAS /tmp/ccPStHDw.s page 16 + + + 30 0000 70B5 push {r4, r5, r6, lr} + 31 .LCFI0: + 32 .cfi_def_cfa_offset 16 + 33 .cfi_offset 4, -16 + 34 .cfi_offset 5, -12 + 35 .cfi_offset 6, -8 + 36 .cfi_offset 14, -4 + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 37 .loc 1 829 0 + 38 0002 C56B ldr r5, [r0, #60] + 39 0004 0124 movs r4, #1 + 40 0006 066C ldr r6, [r0, #64] + 41 0008 B440 lsls r4, r4, r6 + 42 000a 6C60 str r4, [r5, #4] + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel data length */ + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength; + 43 .loc 1 832 0 + 44 000c 0468 ldr r4, [r0] + 45 000e 6360 str r3, [r4, #4] + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Memory to Peripheral */ + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) + 46 .loc 1 835 0 + 47 0010 4368 ldr r3, [r0, #4] + 48 .LVL1: + 49 0012 102B cmp r3, #16 + 50 0014 04D0 beq .L4 + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress; + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress; + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Peripheral to Memory */ + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress; + 51 .loc 1 847 0 + 52 0016 0368 ldr r3, [r0] + 53 0018 9960 str r1, [r3, #8] + 54 .LVL2: + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress; + 55 .loc 1 850 0 + 56 001a 0368 ldr r3, [r0] + 57 001c DA60 str r2, [r3, #12] + 58 .L1: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 59 .loc 1 852 0 + 60 @ sp needed + 61 001e 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/ccPStHDw.s page 17 + + + 62 .LVL3: + 63 .L4: + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 64 .loc 1 838 0 + 65 0020 0368 ldr r3, [r0] + 66 0022 9A60 str r2, [r3, #8] + 67 .LVL4: + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 68 .loc 1 841 0 + 69 0024 0368 ldr r3, [r0] + 70 0026 D960 str r1, [r3, #12] + 71 0028 F9E7 b .L1 + 72 .cfi_endproc + 73 .LFE52: + 75 .global __aeabi_uidiv + 76 .section .text.DMA_CalcBaseAndBitshift,"ax",%progbits + 77 .align 1 + 78 .syntax unified + 79 .code 16 + 80 .thumb_func + 81 .fpu softvfp + 83 DMA_CalcBaseAndBitshift: + 84 .LFB53: + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief set the DMA base address and channel index depending on DMA instance + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 85 .loc 1 861 0 + 86 .cfi_startproc + 87 @ args = 0, pretend = 0, frame = 0 + 88 @ frame_needed = 0, uses_anonymous_args = 0 + 89 .LVL5: + 90 0000 10B5 push {r4, lr} + 91 .LCFI1: + 92 .cfi_def_cfa_offset 8 + 93 .cfi_offset 4, -8 + 94 .cfi_offset 14, -4 + 95 0002 0400 movs r4, r0 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #if defined (DMA2) + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA2 */ + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccPStHDw.s page 18 + + + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #else + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chan + 96 .loc 1 879 0 + 97 0004 0368 ldr r3, [r0] + 98 0006 064A ldr r2, .L6 + 99 0008 9446 mov ip, r2 + 100 000a 6344 add r3, r3, ip + 101 000c 1800 movs r0, r3 + 102 .LVL6: + 103 000e 1421 movs r1, #20 + 104 0010 FFF7FEFF bl __aeabi_uidiv + 105 .LVL7: + 106 0014 8000 lsls r0, r0, #2 + 107 0016 2064 str r0, [r4, #64] + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 108 .loc 1 880 0 + 109 0018 024B ldr r3, .L6+4 + 110 001a E363 str r3, [r4, #60] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #endif + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 111 .loc 1 882 0 + 112 @ sp needed + 113 .LVL8: + 114 001c 10BD pop {r4, pc} + 115 .L7: + 116 001e C046 .align 2 + 117 .L6: + 118 0020 F8FFFDBF .word -1073872904 + 119 0024 00000240 .word 1073872896 + 120 .cfi_endproc + 121 .LFE53: + 123 .section .text.HAL_DMA_Init,"ax",%progbits + 124 .align 1 + 125 .global HAL_DMA_Init + 126 .syntax unified + 127 .code 16 + 128 .thumb_func + 129 .fpu softvfp + 131 HAL_DMA_Init: + 132 .LFB40: + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 133 .loc 1 139 0 + 134 .cfi_startproc + 135 @ args = 0, pretend = 0, frame = 0 + 136 @ frame_needed = 0, uses_anonymous_args = 0 + 137 .LVL9: + 138 0000 70B5 push {r4, r5, r6, lr} + 139 .LCFI2: + 140 .cfi_def_cfa_offset 16 + 141 .cfi_offset 4, -16 + 142 .cfi_offset 5, -12 + 143 .cfi_offset 6, -8 + 144 .cfi_offset 14, -4 + 145 0002 041E subs r4, r0, #0 + 146 .LVL10: + ARM GAS /tmp/ccPStHDw.s page 19 + + + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 147 .loc 1 143 0 + 148 0004 20D0 beq .L10 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 149 .loc 1 159 0 + 150 0006 2125 movs r5, #33 + 151 0008 0223 movs r3, #2 + 152 000a 4355 strb r3, [r0, r5] + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 153 .loc 1 162 0 + 154 000c 0168 ldr r1, [r0] + 155 000e 0B68 ldr r3, [r1] + 156 .LVL11: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 157 .loc 1 165 0 + 158 0010 0E4A ldr r2, .L11 + 159 0012 1A40 ands r2, r3 + 160 .LVL12: + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 161 .loc 1 170 0 + 162 0014 4368 ldr r3, [r0, #4] + 163 0016 8068 ldr r0, [r0, #8] + 164 .LVL13: + 165 0018 0343 orrs r3, r0 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 166 .loc 1 171 0 + 167 001a E068 ldr r0, [r4, #12] + 168 001c 0343 orrs r3, r0 + 169 001e 2069 ldr r0, [r4, #16] + 170 0020 0343 orrs r3, r0 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 171 .loc 1 172 0 + 172 0022 6069 ldr r0, [r4, #20] + 173 0024 0343 orrs r3, r0 + 174 0026 A069 ldr r0, [r4, #24] + 175 0028 0343 orrs r3, r0 + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 176 .loc 1 173 0 + 177 002a E069 ldr r0, [r4, #28] + 178 002c 0343 orrs r3, r0 + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 179 .loc 1 170 0 + 180 002e 1343 orrs r3, r2 + 181 .LVL14: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 182 .loc 1 176 0 + 183 0030 0B60 str r3, [r1] + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 184 .loc 1 180 0 + 185 0032 2000 movs r0, r4 + 186 0034 FFF7FEFF bl DMA_CalcBaseAndBitshift + 187 .LVL15: + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 188 .loc 1 183 0 + 189 0038 0023 movs r3, #0 + 190 003a A363 str r3, [r4, #56] + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 20 + + + 191 .loc 1 186 0 + 192 003c 0122 movs r2, #1 + 193 003e 6255 strb r2, [r4, r5] + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 194 .loc 1 189 0 + 195 0040 1F32 adds r2, r2, #31 + 196 0042 A354 strb r3, [r4, r2] + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 197 .loc 1 191 0 + 198 0044 0020 movs r0, #0 + 199 .L9: + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 200 .loc 1 192 0 + 201 @ sp needed + 202 .LVL16: + 203 0046 70BD pop {r4, r5, r6, pc} + 204 .LVL17: + 205 .L10: + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 206 .loc 1 145 0 + 207 0048 0120 movs r0, #1 + 208 .LVL18: + 209 004a FCE7 b .L9 + 210 .L12: + 211 .align 2 + 212 .L11: + 213 004c 0FC0FFFF .word -16369 + 214 .cfi_endproc + 215 .LFE40: + 217 .section .text.HAL_DMA_DeInit,"ax",%progbits + 218 .align 1 + 219 .global HAL_DMA_DeInit + 220 .syntax unified + 221 .code 16 + 222 .thumb_func + 223 .fpu softvfp + 225 HAL_DMA_DeInit: + 226 .LFB41: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 227 .loc 1 201 0 + 228 .cfi_startproc + 229 @ args = 0, pretend = 0, frame = 0 + 230 @ frame_needed = 0, uses_anonymous_args = 0 + 231 .LVL19: + 232 0000 70B5 push {r4, r5, r6, lr} + 233 .LCFI3: + 234 .cfi_def_cfa_offset 16 + 235 .cfi_offset 4, -16 + 236 .cfi_offset 5, -12 + 237 .cfi_offset 6, -8 + 238 .cfi_offset 14, -4 + 239 0002 041E subs r4, r0, #0 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 240 .loc 1 203 0 + 241 0004 1ED0 beq .L15 + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 242 .loc 1 212 0 + ARM GAS /tmp/ccPStHDw.s page 21 + + + 243 0006 0268 ldr r2, [r0] + 244 0008 1368 ldr r3, [r2] + 245 000a 0126 movs r6, #1 + 246 000c B343 bics r3, r6 + 247 000e 1360 str r3, [r2] + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 248 .loc 1 215 0 + 249 0010 0368 ldr r3, [r0] + 250 0012 0025 movs r5, #0 + 251 0014 1D60 str r5, [r3] + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 252 .loc 1 218 0 + 253 0016 0368 ldr r3, [r0] + 254 0018 5D60 str r5, [r3, #4] + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 255 .loc 1 221 0 + 256 001a 0368 ldr r3, [r0] + 257 001c 9D60 str r5, [r3, #8] + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 258 .loc 1 224 0 + 259 001e 0368 ldr r3, [r0] + 260 0020 DD60 str r5, [r3, #12] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 261 .loc 1 227 0 + 262 0022 FFF7FEFF bl DMA_CalcBaseAndBitshift + 263 .LVL20: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 264 .loc 1 230 0 + 265 0026 E36B ldr r3, [r4, #60] + 266 0028 226C ldr r2, [r4, #64] + 267 002a 9640 lsls r6, r6, r2 + 268 002c 5E60 str r6, [r3, #4] + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 269 .loc 1 233 0 + 270 002e A562 str r5, [r4, #40] + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 271 .loc 1 234 0 + 272 0030 E562 str r5, [r4, #44] + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 273 .loc 1 235 0 + 274 0032 2563 str r5, [r4, #48] + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 275 .loc 1 236 0 + 276 0034 6563 str r5, [r4, #52] + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 277 .loc 1 239 0 + 278 0036 A563 str r5, [r4, #56] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 279 .loc 1 242 0 + 280 0038 2123 movs r3, #33 + 281 003a E554 strb r5, [r4, r3] + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 282 .loc 1 245 0 + 283 003c 013B subs r3, r3, #1 + 284 003e E554 strb r5, [r4, r3] + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 285 .loc 1 247 0 + ARM GAS /tmp/ccPStHDw.s page 22 + + + 286 0040 0020 movs r0, #0 + 287 .L14: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 288 .loc 1 248 0 + 289 @ sp needed + 290 .LVL21: + 291 0042 70BD pop {r4, r5, r6, pc} + 292 .LVL22: + 293 .L15: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 294 .loc 1 205 0 + 295 0044 0120 movs r0, #1 + 296 .LVL23: + 297 0046 FCE7 b .L14 + 298 .cfi_endproc + 299 .LFE41: + 301 .section .text.HAL_DMA_Start,"ax",%progbits + 302 .align 1 + 303 .global HAL_DMA_Start + 304 .syntax unified + 305 .code 16 + 306 .thumb_func + 307 .fpu softvfp + 309 HAL_DMA_Start: + 310 .LFB42: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 311 .loc 1 283 0 + 312 .cfi_startproc + 313 @ args = 0, pretend = 0, frame = 0 + 314 @ frame_needed = 0, uses_anonymous_args = 0 + 315 .LVL24: + 316 0000 70B5 push {r4, r5, r6, lr} + 317 .LCFI4: + 318 .cfi_def_cfa_offset 16 + 319 .cfi_offset 4, -16 + 320 .cfi_offset 5, -12 + 321 .cfi_offset 6, -8 + 322 .cfi_offset 14, -4 + 323 0002 0400 movs r4, r0 + 324 .LVL25: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 325 .loc 1 290 0 + 326 0004 2020 movs r0, #32 + 327 .LVL26: + 328 0006 205C ldrb r0, [r4, r0] + 329 0008 0128 cmp r0, #1 + 330 000a 1ED0 beq .L19 + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 331 .loc 1 290 0 is_stmt 0 discriminator 2 + 332 000c 2020 movs r0, #32 + 333 000e 0125 movs r5, #1 + 334 0010 2554 strb r5, [r4, r0] + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 335 .loc 1 292 0 is_stmt 1 discriminator 2 + 336 0012 0130 adds r0, r0, #1 + 337 0014 205C ldrb r0, [r4, r0] + 338 0016 0128 cmp r0, #1 + ARM GAS /tmp/ccPStHDw.s page 23 + + + 339 0018 04D0 beq .L20 + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 340 .loc 1 311 0 + 341 001a 2023 movs r3, #32 + 342 .LVL27: + 343 001c 0022 movs r2, #0 + 344 .LVL28: + 345 001e E254 strb r2, [r4, r3] + 346 .LVL29: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 347 .loc 1 314 0 + 348 0020 0220 movs r0, #2 + 349 .LVL30: + 350 .L17: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 351 .loc 1 318 0 + 352 @ sp needed + 353 .LVL31: + 354 0022 70BD pop {r4, r5, r6, pc} + 355 .LVL32: + 356 .L20: + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 357 .loc 1 295 0 + 358 0024 2030 adds r0, r0, #32 + 359 0026 0135 adds r5, r5, #1 + 360 0028 2554 strb r5, [r4, r0] + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 361 .loc 1 297 0 + 362 002a 0020 movs r0, #0 + 363 002c A063 str r0, [r4, #56] + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 364 .loc 1 300 0 + 365 002e 2668 ldr r6, [r4] + 366 0030 3068 ldr r0, [r6] + 367 0032 013D subs r5, r5, #1 + 368 0034 A843 bics r0, r5 + 369 0036 3060 str r0, [r6] + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 370 .loc 1 303 0 + 371 0038 2000 movs r0, r4 + 372 003a FFF7FEFF bl DMA_SetConfig + 373 .LVL33: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 374 .loc 1 306 0 + 375 003e 2268 ldr r2, [r4] + 376 0040 1368 ldr r3, [r2] + 377 0042 2B43 orrs r3, r5 + 378 0044 1360 str r3, [r2] + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 379 .loc 1 284 0 + 380 0046 0020 movs r0, #0 + 381 0048 EBE7 b .L17 + 382 .LVL34: + 383 .L19: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 384 .loc 1 290 0 + 385 004a 0220 movs r0, #2 + ARM GAS /tmp/ccPStHDw.s page 24 + + + 386 004c E9E7 b .L17 + 387 .cfi_endproc + 388 .LFE42: + 390 .section .text.HAL_DMA_Start_IT,"ax",%progbits + 391 .align 1 + 392 .global HAL_DMA_Start_IT + 393 .syntax unified + 394 .code 16 + 395 .thumb_func + 396 .fpu softvfp + 398 HAL_DMA_Start_IT: + 399 .LFB43: + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 400 .loc 1 330 0 + 401 .cfi_startproc + 402 @ args = 0, pretend = 0, frame = 0 + 403 @ frame_needed = 0, uses_anonymous_args = 0 + 404 .LVL35: + 405 0000 70B5 push {r4, r5, r6, lr} + 406 .LCFI5: + 407 .cfi_def_cfa_offset 16 + 408 .cfi_offset 4, -16 + 409 .cfi_offset 5, -12 + 410 .cfi_offset 6, -8 + 411 .cfi_offset 14, -4 + 412 0002 0400 movs r4, r0 + 413 .LVL36: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 414 .loc 1 337 0 + 415 0004 2020 movs r0, #32 + 416 .LVL37: + 417 0006 205C ldrb r0, [r4, r0] + 418 0008 0128 cmp r0, #1 + 419 000a 32D0 beq .L26 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 420 .loc 1 337 0 is_stmt 0 discriminator 2 + 421 000c 2020 movs r0, #32 + 422 000e 0125 movs r5, #1 + 423 0010 2554 strb r5, [r4, r0] + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 424 .loc 1 339 0 is_stmt 1 discriminator 2 + 425 0012 0130 adds r0, r0, #1 + 426 0014 205C ldrb r0, [r4, r0] + 427 0016 0128 cmp r0, #1 + 428 0018 04D0 beq .L27 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 429 .loc 1 370 0 + 430 001a 2023 movs r3, #32 + 431 .LVL38: + 432 001c 0022 movs r2, #0 + 433 .LVL39: + 434 001e E254 strb r2, [r4, r3] + 435 .LVL40: + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 436 .loc 1 373 0 + 437 0020 0220 movs r0, #2 + 438 .LVL41: + ARM GAS /tmp/ccPStHDw.s page 25 + + + 439 .L22: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 440 .loc 1 377 0 + 441 @ sp needed + 442 .LVL42: + 443 0022 70BD pop {r4, r5, r6, pc} + 444 .LVL43: + 445 .L27: + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 446 .loc 1 342 0 + 447 0024 2030 adds r0, r0, #32 + 448 0026 0135 adds r5, r5, #1 + 449 0028 2554 strb r5, [r4, r0] + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 450 .loc 1 344 0 + 451 002a 0020 movs r0, #0 + 452 002c A063 str r0, [r4, #56] + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 453 .loc 1 347 0 + 454 002e 2568 ldr r5, [r4] + 455 0030 2868 ldr r0, [r5] + 456 0032 0126 movs r6, #1 + 457 0034 B043 bics r0, r6 + 458 0036 2860 str r0, [r5] + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 459 .loc 1 350 0 + 460 0038 2000 movs r0, r4 + 461 003a FFF7FEFF bl DMA_SetConfig + 462 .LVL44: + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 463 .loc 1 354 0 + 464 003e E36A ldr r3, [r4, #44] + 465 0040 002B cmp r3, #0 + 466 0042 0BD0 beq .L24 + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 467 .loc 1 356 0 + 468 0044 2268 ldr r2, [r4] + 469 0046 1368 ldr r3, [r2] + 470 0048 0E21 movs r1, #14 + 471 004a 0B43 orrs r3, r1 + 472 004c 1360 str r3, [r2] + 473 .L25: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 474 .loc 1 365 0 + 475 004e 2268 ldr r2, [r4] + 476 0050 1368 ldr r3, [r2] + 477 0052 0121 movs r1, #1 + 478 0054 0B43 orrs r3, r1 + 479 0056 1360 str r3, [r2] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 480 .loc 1 331 0 + 481 0058 0020 movs r0, #0 + 482 005a E2E7 b .L22 + 483 .L24: + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 484 .loc 1 360 0 + 485 005c 2268 ldr r2, [r4] + ARM GAS /tmp/ccPStHDw.s page 26 + + + 486 005e 1368 ldr r3, [r2] + 487 0060 0A21 movs r1, #10 + 488 0062 0B43 orrs r3, r1 + 489 0064 1360 str r3, [r2] + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 490 .loc 1 361 0 + 491 0066 2268 ldr r2, [r4] + 492 0068 1368 ldr r3, [r2] + 493 006a 0639 subs r1, r1, #6 + 494 006c 8B43 bics r3, r1 + 495 006e 1360 str r3, [r2] + 496 0070 EDE7 b .L25 + 497 .LVL45: + 498 .L26: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 499 .loc 1 337 0 + 500 0072 0220 movs r0, #2 + 501 0074 D5E7 b .L22 + 502 .cfi_endproc + 503 .LFE43: + 505 .section .text.HAL_DMA_Abort,"ax",%progbits + 506 .align 1 + 507 .global HAL_DMA_Abort + 508 .syntax unified + 509 .code 16 + 510 .thumb_func + 511 .fpu softvfp + 513 HAL_DMA_Abort: + 514 .LFB44: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 515 .loc 1 386 0 + 516 .cfi_startproc + 517 @ args = 0, pretend = 0, frame = 0 + 518 @ frame_needed = 0, uses_anonymous_args = 0 + 519 .LVL46: + 520 0000 10B5 push {r4, lr} + 521 .LCFI6: + 522 .cfi_def_cfa_offset 8 + 523 .cfi_offset 4, -8 + 524 .cfi_offset 14, -4 + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 525 .loc 1 387 0 + 526 0002 2123 movs r3, #33 + 527 0004 C35C ldrb r3, [r0, r3] + 528 0006 022B cmp r3, #2 + 529 0008 06D0 beq .L29 + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 530 .loc 1 390 0 + 531 000a 0423 movs r3, #4 + 532 000c 8363 str r3, [r0, #56] + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 533 .loc 1 393 0 + 534 000e 1C33 adds r3, r3, #28 + 535 0010 0022 movs r2, #0 + 536 0012 C254 strb r2, [r0, r3] + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 537 .loc 1 395 0 + ARM GAS /tmp/ccPStHDw.s page 27 + + + 538 0014 0120 movs r0, #1 + 539 .LVL47: + 540 .L30: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 541 .loc 1 415 0 + 542 @ sp needed + 543 0016 10BD pop {r4, pc} + 544 .LVL48: + 545 .L29: + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 546 .loc 1 400 0 + 547 0018 0268 ldr r2, [r0] + 548 001a 1368 ldr r3, [r2] + 549 001c 0E21 movs r1, #14 + 550 001e 8B43 bics r3, r1 + 551 0020 1360 str r3, [r2] + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 552 .loc 1 403 0 + 553 0022 0168 ldr r1, [r0] + 554 0024 0A68 ldr r2, [r1] + 555 0026 0123 movs r3, #1 + 556 0028 9A43 bics r2, r3 + 557 002a 0A60 str r2, [r1] + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 558 .loc 1 406 0 + 559 002c C26B ldr r2, [r0, #60] + 560 002e 1900 movs r1, r3 + 561 0030 046C ldr r4, [r0, #64] + 562 0032 A140 lsls r1, r1, r4 + 563 0034 5160 str r1, [r2, #4] + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 564 .loc 1 409 0 + 565 0036 2122 movs r2, #33 + 566 0038 8354 strb r3, [r0, r2] + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 567 .loc 1 412 0 + 568 003a 1F33 adds r3, r3, #31 + 569 003c 0022 movs r2, #0 + 570 003e C254 strb r2, [r0, r3] + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 571 .loc 1 414 0 + 572 0040 0020 movs r0, #0 + 573 .LVL49: + 574 0042 E8E7 b .L30 + 575 .cfi_endproc + 576 .LFE44: + 578 .section .text.HAL_DMA_Abort_IT,"ax",%progbits + 579 .align 1 + 580 .global HAL_DMA_Abort_IT + 581 .syntax unified + 582 .code 16 + 583 .thumb_func + 584 .fpu softvfp + 586 HAL_DMA_Abort_IT: + 587 .LFB45: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 588 .loc 1 424 0 + ARM GAS /tmp/ccPStHDw.s page 28 + + + 589 .cfi_startproc + 590 @ args = 0, pretend = 0, frame = 0 + 591 @ frame_needed = 0, uses_anonymous_args = 0 + 592 .LVL50: + 593 0000 10B5 push {r4, lr} + 594 .LCFI7: + 595 .cfi_def_cfa_offset 8 + 596 .cfi_offset 4, -8 + 597 .cfi_offset 14, -4 + 598 .LVL51: + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 599 .loc 1 427 0 + 600 0002 2123 movs r3, #33 + 601 0004 C35C ldrb r3, [r0, r3] + 602 0006 022B cmp r3, #2 + 603 0008 03D0 beq .L32 + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 604 .loc 1 430 0 + 605 000a 0423 movs r3, #4 + 606 000c 8363 str r3, [r0, #56] + 607 .LVL52: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 608 .loc 1 432 0 + 609 000e 0120 movs r0, #1 + 610 .LVL53: + 611 .L33: + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 612 .loc 1 459 0 + 613 @ sp needed + 614 0010 10BD pop {r4, pc} + 615 .LVL54: + 616 .L32: + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 617 .loc 1 438 0 + 618 0012 0268 ldr r2, [r0] + 619 0014 1368 ldr r3, [r2] + 620 0016 0E21 movs r1, #14 + 621 0018 8B43 bics r3, r1 + 622 001a 1360 str r3, [r2] + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 623 .loc 1 441 0 + 624 001c 0168 ldr r1, [r0] + 625 001e 0A68 ldr r2, [r1] + 626 0020 0123 movs r3, #1 + 627 0022 9A43 bics r2, r3 + 628 0024 0A60 str r2, [r1] + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 629 .loc 1 444 0 + 630 0026 C26B ldr r2, [r0, #60] + 631 0028 1900 movs r1, r3 + 632 002a 046C ldr r4, [r0, #64] + 633 002c A140 lsls r1, r1, r4 + 634 002e 5160 str r1, [r2, #4] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 635 .loc 1 447 0 + 636 0030 2122 movs r2, #33 + 637 0032 8354 strb r3, [r0, r2] + ARM GAS /tmp/ccPStHDw.s page 29 + + + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 638 .loc 1 450 0 + 639 0034 1F33 adds r3, r3, #31 + 640 0036 0022 movs r2, #0 + 641 0038 C254 strb r2, [r0, r3] + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 642 .loc 1 453 0 + 643 003a 436B ldr r3, [r0, #52] + 644 003c 002B cmp r3, #0 + 645 003e 02D0 beq .L34 + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 646 .loc 1 455 0 + 647 0040 9847 blx r3 + 648 .LVL55: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 649 .loc 1 425 0 + 650 0042 0020 movs r0, #0 + 651 0044 E4E7 b .L33 + 652 .LVL56: + 653 .L34: + 654 0046 0020 movs r0, #0 + 655 .LVL57: + 656 0048 E2E7 b .L33 + 657 .cfi_endproc + 658 .LFE45: + 660 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits + 661 .align 1 + 662 .global HAL_DMA_PollForTransfer + 663 .syntax unified + 664 .code 16 + 665 .thumb_func + 666 .fpu softvfp + 668 HAL_DMA_PollForTransfer: + 669 .LFB46: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 670 .loc 1 470 0 + 671 .cfi_startproc + 672 @ args = 0, pretend = 0, frame = 8 + 673 @ frame_needed = 0, uses_anonymous_args = 0 + 674 .LVL58: + 675 0000 F0B5 push {r4, r5, r6, r7, lr} + 676 .LCFI8: + 677 .cfi_def_cfa_offset 20 + 678 .cfi_offset 4, -20 + 679 .cfi_offset 5, -16 + 680 .cfi_offset 6, -12 + 681 .cfi_offset 7, -8 + 682 .cfi_offset 14, -4 + 683 0002 83B0 sub sp, sp, #12 + 684 .LCFI9: + 685 .cfi_def_cfa_offset 32 + 686 0004 0400 movs r4, r0 + 687 0006 0D00 movs r5, r1 + 688 0008 1700 movs r7, r2 + 689 .LVL59: + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 690 .loc 1 474 0 + ARM GAS /tmp/ccPStHDw.s page 30 + + + 691 000a 2123 movs r3, #33 + 692 000c C35C ldrb r3, [r0, r3] + 693 000e 022B cmp r3, #2 + 694 0010 07D0 beq .L36 + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 695 .loc 1 477 0 + 696 0012 0423 movs r3, #4 + 697 0014 8363 str r3, [r0, #56] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 698 .loc 1 478 0 + 699 0016 1C33 adds r3, r3, #28 + 700 0018 0022 movs r2, #0 + 701 .LVL60: + 702 001a C254 strb r2, [r0, r3] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 703 .loc 1 479 0 + 704 001c 0120 movs r0, #1 + 705 .LVL61: + 706 .L37: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 707 .loc 1 562 0 + 708 001e 03B0 add sp, sp, #12 + 709 @ sp needed + 710 .LVL62: + 711 .LVL63: + 712 .LVL64: + 713 0020 F0BD pop {r4, r5, r6, r7, pc} + 714 .LVL65: + 715 .L36: + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 716 .loc 1 483 0 + 717 0022 0368 ldr r3, [r0] + 718 0024 1B68 ldr r3, [r3] + 719 0026 9B06 lsls r3, r3, #26 + 720 0028 24D4 bmi .L48 + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 721 .loc 1 490 0 + 722 002a 0029 cmp r1, #0 + 723 002c 27D1 bne .L39 + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 724 .loc 1 493 0 + 725 002e 0226 movs r6, #2 + 726 0030 036C ldr r3, [r0, #64] + 727 0032 9E40 lsls r6, r6, r3 + 728 .LVL66: + 729 .L40: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 730 .loc 1 502 0 + 731 0034 FFF7FEFF bl HAL_GetTick + 732 .LVL67: + 733 0038 0190 str r0, [sp, #4] + 734 .LVL68: + 735 .L43: + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 736 .loc 1 504 0 + 737 003a E26B ldr r2, [r4, #60] + 738 003c 1368 ldr r3, [r2] + ARM GAS /tmp/ccPStHDw.s page 31 + + + 739 003e 1E42 tst r6, r3 + 740 0040 2DD1 bne .L49 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 741 .loc 1 506 0 + 742 0042 1068 ldr r0, [r2] + 743 0044 216C ldr r1, [r4, #64] + 744 0046 0823 movs r3, #8 + 745 0048 8B40 lsls r3, r3, r1 + 746 004a 0342 tst r3, r0 + 747 004c 1BD1 bne .L50 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 748 .loc 1 525 0 + 749 004e 7B1C adds r3, r7, #1 + 750 0050 F3D0 beq .L43 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 751 .loc 1 527 0 + 752 0052 002F cmp r7, #0 + 753 0054 05D0 beq .L44 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 754 .loc 1 527 0 is_stmt 0 discriminator 1 + 755 0056 FFF7FEFF bl HAL_GetTick + 756 .LVL69: + 757 005a 019B ldr r3, [sp, #4] + 758 005c C01A subs r0, r0, r3 + 759 005e B842 cmp r0, r7 + 760 0060 EBD9 bls .L43 + 761 .L44: + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 762 .loc 1 530 0 is_stmt 1 + 763 0062 2023 movs r3, #32 + 764 0064 A363 str r3, [r4, #56] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 765 .loc 1 533 0 + 766 0066 2122 movs r2, #33 + 767 0068 0121 movs r1, #1 + 768 006a A154 strb r1, [r4, r2] + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 769 .loc 1 536 0 + 770 006c 0022 movs r2, #0 + 771 006e E254 strb r2, [r4, r3] + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 772 .loc 1 538 0 + 773 0070 0120 movs r0, #1 + 774 0072 D4E7 b .L37 + 775 .LVL70: + 776 .L48: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 777 .loc 1 485 0 + 778 0074 8023 movs r3, #128 + 779 0076 5B00 lsls r3, r3, #1 + 780 0078 8363 str r3, [r0, #56] + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 781 .loc 1 486 0 + 782 007a 0120 movs r0, #1 + 783 .LVL71: + 784 007c CFE7 b .L37 + 785 .LVL72: + ARM GAS /tmp/ccPStHDw.s page 32 + + + 786 .L39: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 787 .loc 1 498 0 + 788 007e 0426 movs r6, #4 + 789 0080 036C ldr r3, [r0, #64] + 790 0082 9E40 lsls r6, r6, r3 + 791 .LVL73: + 792 0084 D6E7 b .L40 + 793 .LVL74: + 794 .L50: + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 795 .loc 1 511 0 + 796 0086 0123 movs r3, #1 + 797 0088 1800 movs r0, r3 + 798 008a 8840 lsls r0, r0, r1 + 799 008c 5060 str r0, [r2, #4] + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 800 .loc 1 514 0 + 801 008e A363 str r3, [r4, #56] + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 802 .loc 1 517 0 + 803 0090 2122 movs r2, #33 + 804 0092 A354 strb r3, [r4, r2] + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 805 .loc 1 520 0 + 806 0094 1F33 adds r3, r3, #31 + 807 0096 0022 movs r2, #0 + 808 0098 E254 strb r2, [r4, r3] + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 809 .loc 1 522 0 + 810 009a 0120 movs r0, #1 + 811 009c BFE7 b .L37 + 812 .L49: + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 813 .loc 1 543 0 + 814 009e 002D cmp r5, #0 + 815 00a0 0BD1 bne .L46 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 816 .loc 1 546 0 + 817 00a2 0223 movs r3, #2 + 818 00a4 216C ldr r1, [r4, #64] + 819 00a6 8B40 lsls r3, r3, r1 + 820 00a8 5360 str r3, [r2, #4] + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 821 .loc 1 550 0 + 822 00aa 2123 movs r3, #33 + 823 00ac 0122 movs r2, #1 + 824 00ae E254 strb r2, [r4, r3] + 825 .L47: + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 826 .loc 1 559 0 + 827 00b0 2023 movs r3, #32 + 828 00b2 0022 movs r2, #0 + 829 00b4 E254 strb r2, [r4, r3] + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 830 .loc 1 561 0 + 831 00b6 0020 movs r0, #0 + ARM GAS /tmp/ccPStHDw.s page 33 + + + 832 00b8 B1E7 b .L37 + 833 .L46: + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 834 .loc 1 555 0 + 835 00ba 0423 movs r3, #4 + 836 00bc 216C ldr r1, [r4, #64] + 837 00be 8B40 lsls r3, r3, r1 + 838 00c0 5360 str r3, [r2, #4] + 839 00c2 F5E7 b .L47 + 840 .cfi_endproc + 841 .LFE46: + 843 .section .text.HAL_DMA_IRQHandler,"ax",%progbits + 844 .align 1 + 845 .global HAL_DMA_IRQHandler + 846 .syntax unified + 847 .code 16 + 848 .thumb_func + 849 .fpu softvfp + 851 HAL_DMA_IRQHandler: + 852 .LFB47: + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 853 .loc 1 571 0 + 854 .cfi_startproc + 855 @ args = 0, pretend = 0, frame = 0 + 856 @ frame_needed = 0, uses_anonymous_args = 0 + 857 .LVL75: + 858 0000 70B5 push {r4, r5, r6, lr} + 859 .LCFI10: + 860 .cfi_def_cfa_offset 16 + 861 .cfi_offset 4, -16 + 862 .cfi_offset 5, -12 + 863 .cfi_offset 6, -8 + 864 .cfi_offset 14, -4 + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 865 .loc 1 572 0 + 866 0002 C36B ldr r3, [r0, #60] + 867 0004 1A68 ldr r2, [r3] + 868 .LVL76: + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 869 .loc 1 573 0 + 870 0006 0468 ldr r4, [r0] + 871 0008 2568 ldr r5, [r4] + 872 .LVL77: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 873 .loc 1 576 0 + 874 000a 016C ldr r1, [r0, #64] + 875 000c 0423 movs r3, #4 + 876 000e 8B40 lsls r3, r3, r1 + 877 0010 1A42 tst r2, r3 + 878 0012 12D0 beq .L52 + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 879 .loc 1 576 0 is_stmt 0 discriminator 1 + 880 0014 6B07 lsls r3, r5, #29 + 881 0016 10D5 bpl .L52 + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 882 .loc 1 579 0 is_stmt 1 + 883 0018 2368 ldr r3, [r4] + ARM GAS /tmp/ccPStHDw.s page 34 + + + 884 001a 9B06 lsls r3, r3, #26 + 885 001c 03D4 bmi .L53 + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 886 .loc 1 582 0 + 887 001e 2368 ldr r3, [r4] + 888 0020 0422 movs r2, #4 + 889 .LVL78: + 890 0022 9343 bics r3, r2 + 891 0024 2360 str r3, [r4] + 892 .L53: + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 893 .loc 1 586 0 + 894 0026 C26B ldr r2, [r0, #60] + 895 0028 0423 movs r3, #4 + 896 002a 016C ldr r1, [r0, #64] + 897 002c 8B40 lsls r3, r3, r1 + 898 002e 5360 str r3, [r2, #4] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 899 .loc 1 591 0 + 900 0030 C36A ldr r3, [r0, #44] + 901 0032 002B cmp r3, #0 + 902 0034 00D0 beq .L51 + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 903 .loc 1 594 0 + 904 0036 9847 blx r3 + 905 .LVL79: + 906 .L51: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 907 .loc 1 650 0 + 908 @ sp needed + 909 .LVL80: + 910 0038 70BD pop {r4, r5, r6, pc} + 911 .LVL81: + 912 .L52: + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 913 .loc 1 599 0 + 914 003a 0223 movs r3, #2 + 915 003c 8B40 lsls r3, r3, r1 + 916 003e 1A42 tst r2, r3 + 917 0040 18D0 beq .L55 + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 918 .loc 1 599 0 is_stmt 0 discriminator 1 + 919 0042 AB07 lsls r3, r5, #30 + 920 0044 16D5 bpl .L55 + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 921 .loc 1 601 0 is_stmt 1 + 922 0046 2368 ldr r3, [r4] + 923 0048 9B06 lsls r3, r3, #26 + 924 004a 06D4 bmi .L56 + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 925 .loc 1 605 0 + 926 004c 2368 ldr r3, [r4] + 927 004e 0A22 movs r2, #10 + 928 .LVL82: + 929 0050 9343 bics r3, r2 + 930 0052 2360 str r3, [r4] + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccPStHDw.s page 35 + + + 931 .loc 1 608 0 + 932 0054 2123 movs r3, #33 + 933 0056 093A subs r2, r2, #9 + 934 0058 C254 strb r2, [r0, r3] + 935 .L56: + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 936 .loc 1 612 0 + 937 005a C26B ldr r2, [r0, #60] + 938 005c 0223 movs r3, #2 + 939 005e 016C ldr r1, [r0, #64] + 940 0060 8B40 lsls r3, r3, r1 + 941 0062 5360 str r3, [r2, #4] + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 942 .loc 1 615 0 + 943 0064 2023 movs r3, #32 + 944 0066 0022 movs r2, #0 + 945 0068 C254 strb r2, [r0, r3] + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 946 .loc 1 617 0 + 947 006a 836A ldr r3, [r0, #40] + 948 006c 002B cmp r3, #0 + 949 006e E3D0 beq .L51 + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 950 .loc 1 620 0 + 951 0070 9847 blx r3 + 952 .LVL83: + 953 0072 E1E7 b .L51 + 954 .LVL84: + 955 .L55: + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 956 .loc 1 625 0 + 957 0074 0823 movs r3, #8 + 958 0076 8B40 lsls r3, r3, r1 + 959 0078 1A42 tst r2, r3 + 960 007a DDD0 beq .L51 + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 961 .loc 1 625 0 is_stmt 0 discriminator 1 + 962 007c 2B07 lsls r3, r5, #28 + 963 007e DBD5 bpl .L51 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 964 .loc 1 630 0 is_stmt 1 + 965 0080 2368 ldr r3, [r4] + 966 0082 0E22 movs r2, #14 + 967 .LVL85: + 968 0084 9343 bics r3, r2 + 969 0086 2360 str r3, [r4] + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 970 .loc 1 633 0 + 971 0088 C26B ldr r2, [r0, #60] + 972 008a 0123 movs r3, #1 + 973 008c 1900 movs r1, r3 + 974 008e 046C ldr r4, [r0, #64] + 975 0090 A140 lsls r1, r1, r4 + 976 0092 5160 str r1, [r2, #4] + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 977 .loc 1 636 0 + 978 0094 8363 str r3, [r0, #56] + ARM GAS /tmp/ccPStHDw.s page 36 + + + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 979 .loc 1 639 0 + 980 0096 2122 movs r2, #33 + 981 0098 8354 strb r3, [r0, r2] + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 982 .loc 1 642 0 + 983 009a 1F33 adds r3, r3, #31 + 984 009c 0022 movs r2, #0 + 985 009e C254 strb r2, [r0, r3] + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 986 .loc 1 644 0 + 987 00a0 036B ldr r3, [r0, #48] + 988 00a2 002B cmp r3, #0 + 989 00a4 C8D0 beq .L51 + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 990 .loc 1 647 0 + 991 00a6 9847 blx r3 + 992 .LVL86: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 993 .loc 1 650 0 + 994 00a8 C6E7 b .L51 + 995 .cfi_endproc + 996 .LFE47: + 998 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits + 999 .align 1 + 1000 .global HAL_DMA_RegisterCallback + 1001 .syntax unified + 1002 .code 16 + 1003 .thumb_func + 1004 .fpu softvfp + 1006 HAL_DMA_RegisterCallback: + 1007 .LFB48: + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1008 .loc 1 663 0 + 1009 .cfi_startproc + 1010 @ args = 0, pretend = 0, frame = 0 + 1011 @ frame_needed = 0, uses_anonymous_args = 0 + 1012 .LVL87: + 1013 0000 10B5 push {r4, lr} + 1014 .LCFI11: + 1015 .cfi_def_cfa_offset 8 + 1016 .cfi_offset 4, -8 + 1017 .cfi_offset 14, -4 + 1018 .LVL88: + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1019 .loc 1 667 0 + 1020 0002 2023 movs r3, #32 + 1021 0004 C35C ldrb r3, [r0, r3] + 1022 0006 012B cmp r3, #1 + 1023 0008 22D0 beq .L64 + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1024 .loc 1 667 0 is_stmt 0 discriminator 2 + 1025 000a 2023 movs r3, #32 + 1026 000c 0124 movs r4, #1 + 1027 000e C454 strb r4, [r0, r3] + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1028 .loc 1 669 0 is_stmt 1 discriminator 2 + ARM GAS /tmp/ccPStHDw.s page 37 + + + 1029 0010 0133 adds r3, r3, #1 + 1030 0012 C35C ldrb r3, [r0, r3] + 1031 0014 012B cmp r3, #1 + 1032 0016 05D0 beq .L68 + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1033 .loc 1 696 0 + 1034 0018 0123 movs r3, #1 + 1035 .L59: + 1036 .LVL89: + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1037 .loc 1 700 0 + 1038 001a 2022 movs r2, #32 + 1039 .LVL90: + 1040 001c 0021 movs r1, #0 + 1041 .LVL91: + 1042 001e 8154 strb r1, [r0, r2] + 1043 .LVL92: + 1044 .L58: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1045 .loc 1 703 0 + 1046 0020 1800 movs r0, r3 + 1047 .LVL93: + 1048 @ sp needed + 1049 0022 10BD pop {r4, pc} + 1050 .LVL94: + 1051 .L68: + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1052 .loc 1 671 0 + 1053 0024 0129 cmp r1, #1 + 1054 0026 0AD0 beq .L60 + 1055 0028 0029 cmp r1, #0 + 1056 002a 05D0 beq .L61 + 1057 002c 0229 cmp r1, #2 + 1058 002e 09D0 beq .L62 + 1059 0030 0329 cmp r1, #3 + 1060 0032 0AD0 beq .L63 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1061 .loc 1 690 0 + 1062 0034 0123 movs r3, #1 + 1063 0036 F0E7 b .L59 + 1064 .L61: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1065 .loc 1 674 0 + 1066 0038 8262 str r2, [r0, #40] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1067 .loc 1 664 0 + 1068 003a 0023 movs r3, #0 + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1069 .loc 1 675 0 + 1070 003c EDE7 b .L59 + 1071 .L60: + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1072 .loc 1 678 0 + 1073 003e C262 str r2, [r0, #44] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1074 .loc 1 664 0 + 1075 0040 0023 movs r3, #0 + ARM GAS /tmp/ccPStHDw.s page 38 + + + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1076 .loc 1 679 0 + 1077 0042 EAE7 b .L59 + 1078 .L62: + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1079 .loc 1 682 0 + 1080 0044 0263 str r2, [r0, #48] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1081 .loc 1 664 0 + 1082 0046 0023 movs r3, #0 + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1083 .loc 1 683 0 + 1084 0048 E7E7 b .L59 + 1085 .L63: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1086 .loc 1 686 0 + 1087 004a 4263 str r2, [r0, #52] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1088 .loc 1 664 0 + 1089 004c 0023 movs r3, #0 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1090 .loc 1 687 0 + 1091 004e E4E7 b .L59 + 1092 .L64: + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1093 .loc 1 667 0 + 1094 0050 0223 movs r3, #2 + 1095 0052 E5E7 b .L58 + 1096 .cfi_endproc + 1097 .LFE48: + 1099 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits + 1100 .align 1 + 1101 .global HAL_DMA_UnRegisterCallback + 1102 .syntax unified + 1103 .code 16 + 1104 .thumb_func + 1105 .fpu softvfp + 1107 HAL_DMA_UnRegisterCallback: + 1108 .LFB49: + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1109 .loc 1 714 0 + 1110 .cfi_startproc + 1111 @ args = 0, pretend = 0, frame = 0 + 1112 @ frame_needed = 0, uses_anonymous_args = 0 + 1113 @ link register save eliminated. + 1114 .LVL95: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1115 .loc 1 718 0 + 1116 0000 2023 movs r3, #32 + 1117 0002 C35C ldrb r3, [r0, r3] + 1118 0004 012B cmp r3, #1 + 1119 0006 26D0 beq .L78 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1120 .loc 1 718 0 is_stmt 0 discriminator 2 + 1121 0008 2023 movs r3, #32 + 1122 000a 0122 movs r2, #1 + 1123 000c C254 strb r2, [r0, r3] + ARM GAS /tmp/ccPStHDw.s page 39 + + + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1124 .loc 1 720 0 is_stmt 1 discriminator 2 + 1125 000e 0133 adds r3, r3, #1 + 1126 0010 C35C ldrb r3, [r0, r3] + 1127 0012 012B cmp r3, #1 + 1128 0014 05D0 beq .L81 + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1129 .loc 1 754 0 + 1130 0016 0123 movs r3, #1 + 1131 .LVL96: + 1132 .L71: + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1133 .loc 1 758 0 + 1134 0018 2022 movs r2, #32 + 1135 001a 0021 movs r1, #0 + 1136 001c 8154 strb r1, [r0, r2] + 1137 .LVL97: + 1138 .L70: + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1139 .loc 1 761 0 + 1140 001e 1800 movs r0, r3 + 1141 .LVL98: + 1142 @ sp needed + 1143 0020 7047 bx lr + 1144 .LVL99: + 1145 .L81: + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1146 .loc 1 722 0 + 1147 0022 0429 cmp r1, #4 + 1148 0024 15D8 bhi .L80 + 1149 0026 8900 lsls r1, r1, #2 + 1150 .LVL100: + 1151 0028 0C4B ldr r3, .L82 + 1152 002a 5B58 ldr r3, [r3, r1] + 1153 002c 9F46 mov pc, r3 + 1154 .section .rodata.HAL_DMA_UnRegisterCallback,"a",%progbits + 1155 .align 2 + 1156 .L73: + 1157 0000 2E000000 .word .L72 + 1158 0004 34000000 .word .L74 + 1159 0008 3A000000 .word .L75 + 1160 000c 40000000 .word .L76 + 1161 0010 46000000 .word .L77 + 1162 .section .text.HAL_DMA_UnRegisterCallback + 1163 .L72: + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1164 .loc 1 725 0 + 1165 002e 0023 movs r3, #0 + 1166 0030 8362 str r3, [r0, #40] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1167 .loc 1 726 0 + 1168 0032 F1E7 b .L71 + 1169 .L74: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1170 .loc 1 729 0 + 1171 0034 0023 movs r3, #0 + 1172 0036 C362 str r3, [r0, #44] + ARM GAS /tmp/ccPStHDw.s page 40 + + + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1173 .loc 1 730 0 + 1174 0038 EEE7 b .L71 + 1175 .L75: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1176 .loc 1 733 0 + 1177 003a 0023 movs r3, #0 + 1178 003c 0363 str r3, [r0, #48] + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1179 .loc 1 734 0 + 1180 003e EBE7 b .L71 + 1181 .L76: + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1182 .loc 1 737 0 + 1183 0040 0023 movs r3, #0 + 1184 0042 4363 str r3, [r0, #52] + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1185 .loc 1 738 0 + 1186 0044 E8E7 b .L71 + 1187 .L77: + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1188 .loc 1 741 0 + 1189 0046 0023 movs r3, #0 + 1190 0048 8362 str r3, [r0, #40] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1191 .loc 1 742 0 + 1192 004a C362 str r3, [r0, #44] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1193 .loc 1 743 0 + 1194 004c 0363 str r3, [r0, #48] + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1195 .loc 1 744 0 + 1196 004e 4363 str r3, [r0, #52] + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1197 .loc 1 745 0 + 1198 0050 E2E7 b .L71 + 1199 .LVL101: + 1200 .L80: + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1201 .loc 1 748 0 + 1202 0052 0123 movs r3, #1 + 1203 0054 E0E7 b .L71 + 1204 .L78: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1205 .loc 1 718 0 + 1206 0056 0223 movs r3, #2 + 1207 0058 E1E7 b .L70 + 1208 .L83: + 1209 005a C046 .align 2 + 1210 .L82: + 1211 005c 00000000 .word .L73 + 1212 .cfi_endproc + 1213 .LFE49: + 1215 .section .text.HAL_DMA_GetState,"ax",%progbits + 1216 .align 1 + 1217 .global HAL_DMA_GetState + 1218 .syntax unified + ARM GAS /tmp/ccPStHDw.s page 41 + + + 1219 .code 16 + 1220 .thumb_func + 1221 .fpu softvfp + 1223 HAL_DMA_GetState: + 1224 .LFB50: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 1225 .loc 1 790 0 + 1226 .cfi_startproc + 1227 @ args = 0, pretend = 0, frame = 0 + 1228 @ frame_needed = 0, uses_anonymous_args = 0 + 1229 @ link register save eliminated. + 1230 .LVL102: + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1231 .loc 1 791 0 + 1232 0000 2123 movs r3, #33 + 1233 0002 C05C ldrb r0, [r0, r3] + 1234 .LVL103: + 1235 0004 C0B2 uxtb r0, r0 + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1236 .loc 1 792 0 + 1237 @ sp needed + 1238 0006 7047 bx lr + 1239 .cfi_endproc + 1240 .LFE50: + 1242 .section .text.HAL_DMA_GetError,"ax",%progbits + 1243 .align 1 + 1244 .global HAL_DMA_GetError + 1245 .syntax unified + 1246 .code 16 + 1247 .thumb_func + 1248 .fpu softvfp + 1250 HAL_DMA_GetError: + 1251 .LFB51: + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 1252 .loc 1 801 0 + 1253 .cfi_startproc + 1254 @ args = 0, pretend = 0, frame = 0 + 1255 @ frame_needed = 0, uses_anonymous_args = 0 + 1256 @ link register save eliminated. + 1257 .LVL104: + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1258 .loc 1 802 0 + 1259 0000 806B ldr r0, [r0, #56] + 1260 .LVL105: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1261 .loc 1 803 0 + 1262 @ sp needed + 1263 0002 7047 bx lr + 1264 .cfi_endproc + 1265 .LFE51: + 1267 .text + 1268 .Letext0: + 1269 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1270 .file 3 "/usr/include/newlib/sys/_stdint.h" + 1271 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1272 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 1273 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + ARM GAS /tmp/ccPStHDw.s page 42 + + + 1274 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1275 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 1276 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccPStHDw.s page 43 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_dma.c + /tmp/ccPStHDw.s:16 .text.DMA_SetConfig:0000000000000000 $t + /tmp/ccPStHDw.s:22 .text.DMA_SetConfig:0000000000000000 DMA_SetConfig + /tmp/ccPStHDw.s:77 .text.DMA_CalcBaseAndBitshift:0000000000000000 $t + /tmp/ccPStHDw.s:83 .text.DMA_CalcBaseAndBitshift:0000000000000000 DMA_CalcBaseAndBitshift + /tmp/ccPStHDw.s:118 .text.DMA_CalcBaseAndBitshift:0000000000000020 $d + /tmp/ccPStHDw.s:124 .text.HAL_DMA_Init:0000000000000000 $t + /tmp/ccPStHDw.s:131 .text.HAL_DMA_Init:0000000000000000 HAL_DMA_Init + /tmp/ccPStHDw.s:213 .text.HAL_DMA_Init:000000000000004c $d + /tmp/ccPStHDw.s:218 .text.HAL_DMA_DeInit:0000000000000000 $t + /tmp/ccPStHDw.s:225 .text.HAL_DMA_DeInit:0000000000000000 HAL_DMA_DeInit + /tmp/ccPStHDw.s:302 .text.HAL_DMA_Start:0000000000000000 $t + /tmp/ccPStHDw.s:309 .text.HAL_DMA_Start:0000000000000000 HAL_DMA_Start + /tmp/ccPStHDw.s:391 .text.HAL_DMA_Start_IT:0000000000000000 $t + /tmp/ccPStHDw.s:398 .text.HAL_DMA_Start_IT:0000000000000000 HAL_DMA_Start_IT + /tmp/ccPStHDw.s:506 .text.HAL_DMA_Abort:0000000000000000 $t + /tmp/ccPStHDw.s:513 .text.HAL_DMA_Abort:0000000000000000 HAL_DMA_Abort + /tmp/ccPStHDw.s:579 .text.HAL_DMA_Abort_IT:0000000000000000 $t + /tmp/ccPStHDw.s:586 .text.HAL_DMA_Abort_IT:0000000000000000 HAL_DMA_Abort_IT + /tmp/ccPStHDw.s:661 .text.HAL_DMA_PollForTransfer:0000000000000000 $t + /tmp/ccPStHDw.s:668 .text.HAL_DMA_PollForTransfer:0000000000000000 HAL_DMA_PollForTransfer + /tmp/ccPStHDw.s:844 .text.HAL_DMA_IRQHandler:0000000000000000 $t + /tmp/ccPStHDw.s:851 .text.HAL_DMA_IRQHandler:0000000000000000 HAL_DMA_IRQHandler + /tmp/ccPStHDw.s:999 .text.HAL_DMA_RegisterCallback:0000000000000000 $t + /tmp/ccPStHDw.s:1006 .text.HAL_DMA_RegisterCallback:0000000000000000 HAL_DMA_RegisterCallback + /tmp/ccPStHDw.s:1100 .text.HAL_DMA_UnRegisterCallback:0000000000000000 $t + /tmp/ccPStHDw.s:1107 .text.HAL_DMA_UnRegisterCallback:0000000000000000 HAL_DMA_UnRegisterCallback + /tmp/ccPStHDw.s:1155 .rodata.HAL_DMA_UnRegisterCallback:0000000000000000 $d + /tmp/ccPStHDw.s:1211 .text.HAL_DMA_UnRegisterCallback:000000000000005c $d + /tmp/ccPStHDw.s:1216 .text.HAL_DMA_GetState:0000000000000000 $t + /tmp/ccPStHDw.s:1223 .text.HAL_DMA_GetState:0000000000000000 HAL_DMA_GetState + /tmp/ccPStHDw.s:1243 .text.HAL_DMA_GetError:0000000000000000 $t + /tmp/ccPStHDw.s:1250 .text.HAL_DMA_GetError:0000000000000000 HAL_DMA_GetError + +UNDEFINED SYMBOLS +__aeabi_uidiv +HAL_GetTick -- cgit