From 74507f4c364d9cfac39df98fdfaf7eb2de107230 Mon Sep 17 00:00:00 2001
From: jaseg <git@jaseg.de>
Date: Mon, 21 Dec 2020 17:09:13 +0100
Subject: update submodule-cache example

---
 fw/STM32F072CBUx_FLASH.ld | 71 ++---------------------------------------------
 submodule-cache.py        |  2 +-
 2 files changed, 4 insertions(+), 69 deletions(-)

diff --git a/fw/STM32F072CBUx_FLASH.ld b/fw/STM32F072CBUx_FLASH.ld
index ea1b89e..622a604 100644
--- a/fw/STM32F072CBUx_FLASH.ld
+++ b/fw/STM32F072CBUx_FLASH.ld
@@ -1,55 +1,4 @@
-/*
-******************************************************************************
-**
-
-**  File        : LinkerScript.ld
-**
-**  Author		: Auto-generated by System Workbench for STM32
-**
-**  Abstract    : Linker script for STM32F072CBUx series
-**                128Kbytes FLASH and 16Kbytes RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**  Distribution: The file is distributed “as is,” without any warranty
-**                of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
-**
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
-**   1. Redistributions of source code must retain the above copyright notice,
-**      this list of conditions and the following disclaimer.
-**   2. Redistributions in binary form must reproduce the above copyright notice,
-**      this list of conditions and the following disclaimer in the documentation
-**      and/or other materials provided with the distribution.
-**   3. Neither the name of STMicroelectronics nor the names of its contributors
-**      may be used to endorse or promote products derived from this software
-**      without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
+
 ENTRY(Reset_Handler)
 
 /* Highest address of the user mode stack */
@@ -58,16 +7,12 @@ _estack = 0x20004000;    /* end of RAM */
 _Min_Heap_Size = 0x200;      /* required amount of heap  */
 _Min_Stack_Size = 0x400; /* required amount of stack */
 
-/* Specify the memory areas */
-MEMORY
-{
+MEMORY {
 RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 16K
 FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 128K
 }
 
-/* Define output sections */
-SECTIONS
-{
+SECTIONS {
   /* The startup code goes first into FLASH */
   .isr_vector :
   {
@@ -173,16 +118,6 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
-
-  /* Remove information from the standard libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
 
diff --git a/submodule-cache.py b/submodule-cache.py
index b1b2c18..a9ed0bb 100644
--- a/submodule-cache.py
+++ b/submodule-cache.py
@@ -31,7 +31,7 @@ def list_submodule_prop(prop):
     proc = subprocess.run('git config --file .gitmodules --get-regexp'.split() + [f'\.{prop}$'], check=True, capture_output=True)
     for line in proc.stdout.splitlines():
         key, value = line.split()
-        #example key: submodule.fw/hid-dials/upstream/st-hal-f0.url
+        #example key: submodule.fw/upstream/st-hal-f0.url
         _, cfg_name, _ = key.split(b'.')
 
         cfg_id = cfg_name.decode('utf-8')
-- 
cgit