summaryrefslogtreecommitdiff
path: root/controller
AgeCommit message (Expand)AuthorFilesLines
2020-03-13prettify linkmemjaseg3-27/+57
2020-03-12Add size tracing tooljaseg5-0/+596
2020-03-11Prettify makefilejaseg1-25/+44
2020-03-11Start with integration of everythingjaseg22-147/+2300
2020-03-10Crypto v2 draft workingjaseg7-133/+205
2020-03-09WIP cryptographic designjaseg8-5/+291
2020-03-09Fix a bunch of compiler warningsjaseg4-20/+22
2020-03-09DSSS sequence matcher worksjaseg1-19/+2
2020-03-09foojaseg3-26/+35
2020-03-09demod wipjaseg4-46/+175
2020-03-09decoding WIPjaseg4-22/+117
2020-03-06Finish DSSS demodulation stage 1jaseg4-52/+68
2020-03-06Correlator seems to be workingjaseg5-18/+33
2020-03-06WIP DSSS decodingjaseg6-35/+94
2020-03-05Working on DSSS demodulator simjaseg9-34/+468
2020-03-04Fix frequency measurement simulationjaseg7-174/+289
2020-03-03wipjaseg1-14/+24
2020-03-03working on testingjaseg3-50/+172
2020-03-03cmsis: fix exporting of fft symbolsjaseg1-0/+0
2020-03-02foojaseg3-0/+0
2020-03-02foojaseg4-0/+269
2020-03-02Finishing up freq measjaseg11-5/+250
2020-02-28LDPC decoder fully workingjaseg3-48/+108
2020-02-28embedded ldpc decoder 50% workingjaseg5-62/+542
2020-02-28ldpc decoder: wipjaseg1-0/+152
2020-02-27Add missing filesjaseg9-0/+620
2020-02-27Build workingjaseg2-15/+9
2020-02-27MUSL experimentsjaseg1-14/+21
2020-02-27Add a bunch of depsjaseg10-563/+62
2020-02-26demo: SPI Flash interface workingjaseg4-53/+88
2020-02-25Add beginnings of a SPI flash driverjaseg4-37/+245
2020-02-24controller-fw: initial jtag programming draftjaseg5-13/+122
2020-02-24Initial reset controller firmwarejaseg4-0/+292
generated by cgit (git 2.34.1) at 2024-11-25 10:02:44 +0000