Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2020-03-21 | Basic JTAG working | jaseg | 1 | -16/+0 | |
2020-03-17 | Debugging signal capture subsystem | jaseg | 1 | -0/+2 | |
2020-03-16 | Fix serial | jaseg | 1 | -11/+9 | |
2020-03-15 | Add end-to-end simulation | jaseg | 1 | -2/+10 | |
2020-03-14 | Fixup clock config | jaseg | 1 | -18/+23 | |
2020-03-13 | having problems with dma m2m mode | jaseg | 1 | -8/+11 | |
2020-03-13 | prettify linkmem | jaseg | 1 | -3/+10 | |
2020-03-11 | Start with integration of everything | jaseg | 1 | -0/+93 | |