master-thesis.git - Safety Reset: My master thesis on how to reset smart meters during a cyberwar through a signal encoded in the grid frequency

Age	Commit message (Expand)	Author	Files	Lines
2020-03-15	Add end-to-end simulation	jaseg	12	-53/+286
2020-03-14	Fixup clock config	jaseg	3	-36/+87
2020-03-13	having problems with dma m2m mode	jaseg	3	-10/+20
2020-03-13	linkmem: add subdir size contribution calculation	jaseg	1	-0/+13
2020-03-13	Fix data symbol handling	jaseg	1	-11/+21
2020-03-13	Prettify linkmap output	jaseg	1	-4/+5
2020-03-13	linkmem: Add subdir highlighting	jaseg	2	-7/+38
2020-03-13	prettify linkmem	jaseg	3	-27/+57
2020-03-12	Add size tracing tool	jaseg	5	-0/+596
2020-03-11	Prettify makefile	jaseg	1	-25/+44
2020-03-11	Start with integration of everything	jaseg	22	-147/+2300
2020-03-10	Crypto v2 draft working	jaseg	8	-133/+208
2020-03-09	WIP cryptographic design	jaseg	9	-6/+292
2020-03-09	Fix a bunch of compiler warnings	jaseg	4	-20/+22
2020-03-09	DSSS sequence matcher works	jaseg	1	-19/+2
2020-03-09	foo	jaseg	4	-40/+40
2020-03-09	demod wip	jaseg	5	-59/+288
2020-03-09	decoding WIP	jaseg	5	-25/+120
2020-03-06	Finish DSSS demodulation stage 1	jaseg	5	-57/+166
2020-03-06	Correlator seems to be working	jaseg	5	-18/+33
2020-03-06	WIP DSSS decoding	jaseg	18	-31750/+575
2020-03-05	Working on DSSS demodulator sim	jaseg	14	-62/+94312
2020-03-04	Fix frequency measurement simulation	jaseg	22	-174/+1211
2020-03-03	wip	jaseg	1	-14/+24
2020-03-03	working on testing	jaseg	3	-50/+172
2020-03-03	cmsis: fix exporting of fft symbols	jaseg	1	-0/+0
2020-03-02	foo	jaseg	3	-0/+0
2020-03-02	foo	jaseg	4	-0/+269
2020-03-02	foo	jaseg	1	-3/+0
2020-03-02	Finishing up freq meas	jaseg	14	-47/+295
2020-02-28	LDPC decoder fully working	jaseg	3	-48/+108
2020-02-28	embedded ldpc decoder 50% working	jaseg	6	-95/+925
2020-02-28	ldpc decoder: wip	jaseg	1	-0/+152
2020-02-27	Add missing files	jaseg	9	-0/+620
2020-02-27	Build working	jaseg	3	-15/+12
2020-02-27	MUSL experiments	jaseg	1	-14/+21
2020-02-27	Add a bunch of deps	jaseg	13	-616/+189
2020-02-26	demo: SPI Flash interface working	jaseg	4	-53/+88
2020-02-25	Add beginnings of a SPI flash driver	jaseg	4	-37/+245
2020-02-24	controller-fw: initial jtag programming draft	jaseg	6	-13/+128
2020-02-24	Initial reset controller firmware	jaseg	4	-0/+292
2020-02-21	Add cryptography experiments nb	jaseg	1	-0/+130
2020-02-21	Add more data	jaseg	3	-0/+3
2020-02-21	More BER curves, initial FEC experiements	jaseg	5	-64/+316
2020-02-21	BER plots: Fix latest decimation data import	jaseg	1	-181/+67
2020-02-20	Prettify fft comparisons	jaseg	3	-64/+180
2020-02-20	Add calculated data results	jaseg	10	-0/+3
2020-02-20	Add some graphs, add frequency spectra comparison	jaseg	3	-26/+1214
2020-02-20	Prototype receiver: add more plots	jaseg	11	-804/+1753
2020-02-19	Add 5/6 bit symbol error rate plot	jaseg	1	-0/+1204