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-rw-r--r--controller/fw/Makefile2
-rw-r--r--controller/fw/main.c73
-rw-r--r--controller/fw/spi_flash.c184
-rw-r--r--controller/fw/spi_flash.h23
4 files changed, 245 insertions, 37 deletions
diff --git a/controller/fw/Makefile b/controller/fw/Makefile
index 8a6d0da..5672f8a 100644
--- a/controller/fw/Makefile
+++ b/controller/fw/Makefile
@@ -1,5 +1,5 @@
-SOURCES := main.c mspdebug_wrapper.c
+SOURCES := main.c mspdebug_wrapper.c spi_flash.c
SOURCES += mspdebug/drivers/jtaglib.c
BUILDDIR ?= build
diff --git a/controller/fw/main.c b/controller/fw/main.c
index 7359c59..846aa8c 100644
--- a/controller/fw/main.c
+++ b/controller/fw/main.c
@@ -1,53 +1,54 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
- * Copyright (C) 2011 Damjan Marion <damjan.marion@gmail.com>
- * Copyright (C) 2011 Mark Panajotovic <marko@electrontube.org>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
+
+#include <stdbool.h>
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
-/* Set STM32 to 168 MHz. */
+static struct spi_flash_if spif;
+
static void clock_setup(void)
{
- rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
- rcc_periph_clock_enable(RCC_GPIOA);
+ rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+ rcc_periph_clock_enable(RCC_GPIOA);
+ rcc_periph_clock_enable(RCC_GPIOB);
+ rcc_periph_clock_enable(RCC_SPI1);
}
-static void gpio_setup(void)
+static void led_setup(void)
{
- gpio_mode_setup(GPIOA, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO6 | GPIO7);
+ gpio_mode_setup(GPIOA, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO6 | GPIO7);
}
-int main(void)
+static void spi_flash_if_set_cs(bool val) {
+ if (val)
+ gpio_set(GPIOB, GPIO0);
+ else
+ gpio_clear(GPIOB, GPIO0);
+}
+
+static void spi_flash_setup(void)
{
- int i;
+ gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO3 | GPIO4 | GPIO5); /* SPI flash SCK/MISO/MOSI */
+ gpio_mode_setup(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO0); /* SPI flash CS */
+ gpio_set_output_options(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO0 | GPIO3 | GPIO4 | GPIO5);
+ gpio_set_af(GPIOB, 5, GPIO3 | GPIO4 | GPIO5);
- clock_setup();
- gpio_setup();
+ spi_init(&spif, SPI1, &spi_flash_if_set_cs);
+}
+
+int main(void)
+{
+ clock_setup();
+ led_setup();
+ spi_flash_setup();
- gpio_set(GPIOA, GPIO6);
+ gpio_set(GPIOA, GPIO6);
- while (1) {
- gpio_toggle(GPIOA, GPIO6 | GPIO7);
- for (i = 0; i < 6000000; i++)
- __asm__("nop");
- }
+ while (1) {
+ gpio_toggle(GPIOA, GPIO6 | GPIO7);
+ for (int i = 0; i < 6000000; i++)
+ __asm__("nop");
+ }
- return 0;
+ return 0;
}
diff --git a/controller/fw/spi_flash.c b/controller/fw/spi_flash.c
new file mode 100644
index 0000000..26ba774
--- /dev/null
+++ b/controller/fw/spi_flash.c
@@ -0,0 +1,184 @@
+/* Library for SPI flash 25* devices.
+ * Copyright (c) 2014 Multi-Tech Systems
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+enum {
+ WRITE_ENABLE = 0x06,
+ WRITE_DISABLE = 0x04,
+ READ_IDENTIFICATION = 0x9F,
+ READ_STATUS = 0x05,
+ WRITE_STATUS = 0x01,
+ READ_DATA = 0x03,
+ READ_DATA_FAST = 0x0B,
+ PAGE_PROGRAM = 0x02,
+ SECTOR_ERASE = 0xD8,
+ BULK_ERASE = 0xC7,
+ DEEP_POWER_DOWN = 0xB9,
+ DEEP_POWER_DOWN_RELEASE = 0xAB,
+};
+
+enum {
+ STATUS_SRWD = 0x80, // 0b 1000 0000
+ STATUS_BP2 = 0x10, // 0b 0001 0000
+ STATUS_BP1 = 0x08, // 0b 0000 1000
+ STATUS_BP0 = 0x04, // 0b 0000 0100
+ STATUS_WEL = 0x02, // 0b 0000 0010
+ STATUS_WIP = 0x01, // 0b 0000 0001
+};
+
+
+static void enable_write(struct spi_flash_if *spif);
+static void wait_for_write(struct spi_flash_if *spif);
+
+#define low_byte(x) (x&0xff)
+#define mid_byte(x) ((x>>8)&0xff)
+#define high_byte(x) ((x>>16)&0xff)
+
+
+void spif_init(struct spi_flash_if *spif, uint32_t spi_base, void (*cs)(bool val)) {
+
+ spif->spi_base = spi_base;
+ spif->cs = cs;
+
+ spi_reset(spif->spi_base);
+ spi_init_master(spif->spi_base,
+ SPI_CR1_BAUDRATE_FPCLK_DIV_1,
+ SPI_CR1_CPOL_CLK_TO_1_WHEN_IDLE,
+ CPI_CR1_CPHA_CLK_TRANSITION_2,
+ SPI_CR1_DFF_8BIT,
+ CPI_CR1_MSBFIRST);
+
+ spi_enable_software_slave_management(spif->spi_base);
+ spi_set_nss_high(spif->spi_base);
+
+ spi_enable(spif->spi_base);
+
+ spif->cs(0)
+ spi_send(spif->spi_base, READ_IDENTIFICATION);
+ spif->id.mfg_id = spi_read(SPI1);
+ spif->id.type = spi_read(SPI1);
+ spif->id.size = 1<<spi_read(SPI1);
+ spif->cs(1)
+}
+
+void spif_read(struct spi_flash_if *spif, int addr, int len, char* data) {
+ spif_enable_write(spif);
+
+ spif->cs(0)
+ spi_write(spif->spi_base, READ_DATA);
+ spi_write(spif->spi_base, high_byte(addr));
+ spi_write(spif->spi_base, mid_byte(addr));
+ spi_write(spif->spi_base, low_byte(addr));
+
+ for (size_t i = 0; i < len; i++)
+ data[i] = spi_read(spif->spi_base);
+
+ spif->cs(1);
+}
+
+void spif_write(spi_flash_if *spif, size_t addr, size_t len, const char* data) {
+ size_t written = 0;
+ size_t write_size = 0;
+
+ while (written < len) {
+ write_size = _page_size - ((addr + written) % _page_size);
+ if (written + write_size > len) {
+ write_size = len - written;
+ }
+
+ write_page(addr + written, write_size, data + written);
+ written += write_size;
+ }
+}
+
+uint8_t spif_read_status(spi_flash_if *spif) {
+ spif->cs(0);
+ spi_write(spif->spi_base, READ_STATUS);
+ uint8_t status = spi_read(spif->spi_base);
+ spif->cs(1);
+
+ return status;
+}
+
+void spif_clear_sector(spi_flash_if *spif, size_t addr) {
+ spif_enable_write(spif);
+
+ spif->cs(0);
+ spi_write(spif->spi_abse, SECTOR_ERASE);
+ spi_write(spif->spi_abse, high_byte(addr));
+ spi_write(spif->spi_abse, mid_byte(addr));
+ spi_write(spif->spi_abse, low_byte(addr));
+ spif->cs(1);
+
+ wait_for_write(spif);
+}
+
+void spif_clear_mem(spi_flash_if *spif) {
+ spif_enable_write(spif);
+
+ spif->cs(0);
+ spi_write(spif->spi_base, BULK_ERASE);
+ spif->cs(1);
+
+ spif_wait_for_write(spif);
+}
+
+void spif_write_page(struct spi_flash_if *spif, size_t addr, size_t len, const char* data) {
+ spif_enable_write();
+
+ spif->cs(0);
+ spi_write(spif->base, PAGE_PROGRAM);
+ spi_write(spif->base, high_byte(addr));
+ spi_write(spif->base, mid_byte(addr));
+ spi_write(spif->base, low_byte(addr));
+
+ for (int i = 0; i < len; i++) {
+ spi_write(spif->spi_base, data[i]);
+ }
+
+ spif->cs(1);
+ spif_wait_for_write(spif);
+}
+
+static void spif_enable_write(struct spi_flash_if *spif) {
+ spif->cs(0);
+ spi_write(spif->spi_base, WRITE_ENABLE);
+ spif->cs(1);
+}
+
+static void spif_wait_for_write(struct spi_flash_if *spif) {
+ while (spif_read_status(spif) & STATUS_WIP)
+ for (int i = 0; i < 800; i++)
+ ;
+}
+
+void spif_deep_power_down(struct spi_flash_if *spif) {
+ spif->cs(0);
+ spi_write(spif->spi_base, DEEP_POWER_DOWN);
+ spif->cs(1)
+}
+
+void spif_wakeup(struct spi_flash_if *spif) {
+ spif->cs(0);
+ spi_write(spif->spi_base, DEEP_POWER_DOWN_RELEASE);
+ spif->cs(1)
+}
diff --git a/controller/fw/spi_flash.h b/controller/fw/spi_flash.h
new file mode 100644
index 0000000..933d8c9
--- /dev/null
+++ b/controller/fw/spi_flash.h
@@ -0,0 +1,23 @@
+#ifndef __SPI_FLASH_H__
+#define __SPI_FLASH_H__
+
+#include <stdbool.h>
+#include <stdint.h>
+
+struct spi_mem_id {
+ size_t size;
+ uint8_t mfg_id;
+ uint8_t type;
+};
+
+struct spi_flash_if {
+ struct spi_mem_id id;
+ uint32_t spi_base;
+ void (*cs)(bool val);
+};
+
+int spif_init(struct spi_mem_id *mem_data);
+void spif_deep_power_down(struct spi_flash_if *spif);
+void spif_wakeup(struct spi_flash_if *spif);
+
+#endif /* __SPI_FLASH_H__ */
generated by cgit (git 2.34.1) at 2024-11-21 23:17:27 +0000