diff options
Diffstat (limited to 'controller/fw/src/adc.c')
| -rw-r--r-- | controller/fw/src/adc.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/controller/fw/src/adc.c b/controller/fw/src/adc.c index 74f0aa9..81f5ac1 100644 --- a/controller/fw/src/adc.c +++ b/controller/fw/src/adc.c @@ -1,8 +1,7 @@ +#include <assert.h> #include <string.h> - -#include <stm32f407xx.h> -#include <stm32f4_isr.h> +#include <stdint.h> #include "adc.h" #include "sr_global.h" @@ -58,9 +57,10 @@ void adc_init() { TIM1->CR2 = (2<<TIM_CR2_MMS_Pos); /* Enable update event on TRGO to provide a 1ms reference to rest of system */ TIM1->CCMR1 = (6<<TIM_CCMR1_OC1M_Pos) | (0<<TIM_CCMR1_CC1S_Pos); TIM1->CCER = TIM_CCER_CC1E; - TIM1->PSC = 84-1; /* 1us ticks @ f_APB2=84MHz */ - TIM1->ARR = 1000-1; /* 1ms period */ - TIM1->CCR1 = 500-1; + assert(apb2_timer_speed%1000000 == 0); + TIM1->PSC = 1000-1; + TIM1->ARR = (apb2_timer_speed/1000000)-1; /* 1ms period */ + TIM1->CCR1 = 1; TIM1->BDTR = TIM_BDTR_MOE; /* DEBUG */ @@ -85,14 +85,12 @@ void TIM1_CC_IRQHandler(void) { void DMA2_Stream0_IRQHandler(void) { uint8_t isr = (DMA2->LISR >> DMA_LISR_FEIF0_Pos) & 0x3f; - - GPIOA->ODR ^= 1<<7; - GPIOA->BSRR = 1<<10; + GPIOA->BSRR = 1<<11; if (isr & DMA_LISR_TCIF0) { /* Transfer complete */ /* Check we're done processing the old buffer */ if (adc_fft_buf_ready_idx != -1) { /* FIXME DEBUG */ - GPIOA->BSRR = 1<<10<<16; + GPIOA->BSRR = 1<<11<<16; /* clear all flags */ adc_dma->LIFCR = isr<<DMA_LISR_FEIF0_Pos; return; @@ -110,7 +108,7 @@ void DMA2_Stream0_IRQHandler(void) { if (isr & DMA_LISR_TEIF0) /* Transfer error */ panic(); - GPIOA->BSRR = 1<<10<<16; + GPIOA->BSRR = 1<<11<<16; /* clear all flags */ adc_dma->LIFCR = isr<<DMA_LISR_FEIF0_Pos; } |