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authorjaseg <git-bigdata-wsl-arch@jaseg.de>2021-04-09 18:38:02 +0200
committerjaseg <git-bigdata-wsl-arch@jaseg.de>2021-04-09 18:38:57 +0200
commit50998fcfb916ae251309bd4b464f2c122e8cb30d (patch)
tree4ecf7a7443b75ab51c4dc0c0fc9289342dc7d6a0 /reset-controller/fw/src/con_usart.c
parent312fee491cfab436d52db4b6265107e20f3e1293 (diff)
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Repo re-org
Diffstat (limited to 'reset-controller/fw/src/con_usart.c')
-rw-r--r--reset-controller/fw/src/con_usart.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/reset-controller/fw/src/con_usart.c b/reset-controller/fw/src/con_usart.c
new file mode 100644
index 0000000..f80fa79
--- /dev/null
+++ b/reset-controller/fw/src/con_usart.c
@@ -0,0 +1,33 @@
+
+#include <stm32f4_isr.h>
+#include "con_usart.h"
+
+volatile struct usart_desc con_usart = {
+ .le_usart = USART1,
+ .le_usart_irqn = USART1_IRQn,
+ .tx_dmas = DMA2_Stream7,
+ .tx_dma_sn = 7,
+ .tx_dma_ch = 4,
+ .tx_dma = DMA2,
+ .tx_dma_irqn = DMA2_Stream7_IRQn,
+};
+
+void con_usart_init() {
+ RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_DMA2EN;
+ RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
+
+ /* GPIO config: A9 (TX), A10 (RX) */
+ GPIOA->MODER &= ~GPIO_MODER_MODER9_Msk & ~GPIO_MODER_MODER10_Msk;
+ GPIOA->MODER |= (2<<GPIO_MODER_MODER9_Pos) | (2<<GPIO_MODER_MODER10_Pos);
+ GPIOA->OSPEEDR &= ~GPIO_OSPEEDR_OSPEED9_Msk & ~GPIO_OSPEEDR_OSPEED10_Msk;
+ GPIOA->OSPEEDR |= (2<<GPIO_OSPEEDR_OSPEED9_Pos) | (2<<GPIO_OSPEEDR_OSPEED10_Pos);
+ GPIOA->AFR[1] &= ~GPIO_AFRH_AFSEL9_Msk & ~GPIO_AFRH_AFSEL10_Msk;
+ GPIOA->AFR[1] |= (7<<GPIO_AFRH_AFSEL9_Pos) | (7<<GPIO_AFRH_AFSEL10_Pos);
+
+ usart_dma_init(&con_usart, CON_USART_BAUDRATE);
+}
+
+void DMA2_Stream7_IRQHandler(void) {
+ usart_dma_stream_irq(&con_usart);
+}
+