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author | jaseg <git@jaseg.net> | 2020-01-23 14:38:36 +0100 |
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committer | jaseg <git@jaseg.net> | 2020-01-23 14:38:36 +0100 |
commit | 410e38651052038e34843b17269d61e75720f0ba (patch) | |
tree | 987d1853c55b152d5e1362af4420fa52fcd56a81 /gm_platform/platform/platform.sch | |
parent | 6a49b8399fb156d427b5d15746de877ac933ba3d (diff) | |
download | master-thesis-410e38651052038e34843b17269d61e75720f0ba.tar.gz master-thesis-410e38651052038e34843b17269d61e75720f0ba.tar.bz2 master-thesis-410e38651052038e34843b17269d61e75720f0ba.zip |
board bringup: adc, usart working
Diffstat (limited to 'gm_platform/platform/platform.sch')
-rw-r--r-- | gm_platform/platform/platform.sch | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gm_platform/platform/platform.sch b/gm_platform/platform/platform.sch index 77c2a6f..8c0fc7d 100644 --- a/gm_platform/platform/platform.sch +++ b/gm_platform/platform/platform.sch @@ -3020,4 +3020,6 @@ F 5 "SDCIT/8GB" H 12700 7050 50 0001 C CNN "Reichelt" 1 12700 7050 1 0 0 -1 $EndComp +Text Notes 850 11050 0 50 ~ 0 +TO-DO\n* Add adc buffer op amp\n* join input resistors, adjust divider\n* earth secondary side\n* add slots for large isolation barrier\n* add slots for small isolation barrier\n* fixup/remove ocxo footprint\n* fixup converter footprint, use smaller part? use 5V one and power raspi?\n* remove uart isolation?\n* fix fuse rating\n* remove one fuse\n* remove lid switches?\n* fixup incorrect bom items $EndSCHEMATC |