diff options
author | jaseg <git-bigdata-wsl-arch@jaseg.de> | 2020-02-26 13:40:37 +0100 |
---|---|---|
committer | jaseg <git-bigdata-wsl-arch@jaseg.de> | 2020-02-26 13:40:37 +0100 |
commit | fcbdab4ab27e83acf0ed721583db4ddbf6222341 (patch) | |
tree | 4961086fc593dd734619ebd4a3ad79b005dca934 /controller/fw | |
parent | 2964bda23c98b81b6853f542e98fb3d55dafa14c (diff) | |
download | master-thesis-fcbdab4ab27e83acf0ed721583db4ddbf6222341.tar.gz master-thesis-fcbdab4ab27e83acf0ed721583db4ddbf6222341.tar.bz2 master-thesis-fcbdab4ab27e83acf0ed721583db4ddbf6222341.zip |
demo: SPI Flash interface working
Diffstat (limited to 'controller/fw')
-rw-r--r-- | controller/fw/Makefile | 2 | ||||
-rw-r--r-- | controller/fw/main.c | 24 | ||||
-rw-r--r-- | controller/fw/spi_flash.c | 103 | ||||
-rw-r--r-- | controller/fw/spi_flash.h | 12 |
4 files changed, 88 insertions, 53 deletions
diff --git a/controller/fw/Makefile b/controller/fw/Makefile index 5672f8a..52951b1 100644 --- a/controller/fw/Makefile +++ b/controller/fw/Makefile @@ -24,7 +24,7 @@ GDB := $(PREFIX)gdb CFLAGS += -I$(OPENCM3_DIR)/include -Imspdebug/util -Imspdebug/drivers -CFLAGS += -Os -std=c11 -g -DSTM32F4 +CFLAGS += -Os -std=gnu11 -g -DSTM32F4 # Note: libopencm3 requires some standard libc definitions from stdint.h and stdbool.h, so we don't pass -nostdinc here. CFLAGS += -nostdlib -ffreestanding CFLAGS += -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -g diff --git a/controller/fw/main.c b/controller/fw/main.c index 846aa8c..3131df1 100644 --- a/controller/fw/main.c +++ b/controller/fw/main.c @@ -2,8 +2,11 @@ #include <stdbool.h> #include <libopencm3/stm32/rcc.h> +#include <libopencm3/stm32/spi.h> #include <libopencm3/stm32/gpio.h> +#include "spi_flash.h" + static struct spi_flash_if spif; static void clock_setup(void) @@ -33,8 +36,27 @@ static void spi_flash_setup(void) gpio_set_output_options(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO0 | GPIO3 | GPIO4 | GPIO5); gpio_set_af(GPIOB, 5, GPIO3 | GPIO4 | GPIO5); - spi_init(&spif, SPI1, &spi_flash_if_set_cs); + spif_init(&spif, 256, SPI1, &spi_flash_if_set_cs); +} + +/* +void spi_flash_test(void) { + spif_clear_mem(&spif); + + uint32_t buf[1024]; + for (size_t addr=0; addr<0x10000; addr += sizeof(buf)) { + for (size_t i=0; i<sizeof(buf); i+= sizeof(buf[0])) + buf[i/sizeof(buf[0])] = addr + i; + + spif_write(&spif, addr, sizeof(buf), (char *)buf); + } + + for (size_t i=0; i<sizeof(buf)/sizeof(buf[0]); i++) + buf[i] = 0; + spif_read(&spif, 0x1030, sizeof(buf), (char *)buf); + asm volatile ("bkpt"); } +*/ int main(void) { diff --git a/controller/fw/spi_flash.c b/controller/fw/spi_flash.c index 26ba774..98c773f 100644 --- a/controller/fw/spi_flash.c +++ b/controller/fw/spi_flash.c @@ -1,5 +1,6 @@ /* Library for SPI flash 25* devices. * Copyright (c) 2014 Multi-Tech Systems + * Copyright (c) 2020 Jan Goette <ma@jaseg.de> * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -20,6 +21,8 @@ * SOFTWARE. */ +#include "spi_flash.h" +#include <libopencm3/stm32/spi.h> enum { WRITE_ENABLE = 0x06, @@ -46,113 +49,115 @@ enum { }; -static void enable_write(struct spi_flash_if *spif); -static void wait_for_write(struct spi_flash_if *spif); +static void spif_write_page(struct spi_flash_if *spif, size_t addr, size_t len, const char* data); +static uint8_t spif_read_status(struct spi_flash_if *spif); +static void spif_enable_write(struct spi_flash_if *spif); +static void spif_wait_for_write(struct spi_flash_if *spif); #define low_byte(x) (x&0xff) #define mid_byte(x) ((x>>8)&0xff) #define high_byte(x) ((x>>16)&0xff) -void spif_init(struct spi_flash_if *spif, uint32_t spi_base, void (*cs)(bool val)) { +void spif_init(struct spi_flash_if *spif, size_t page_size, uint32_t spi_base, void (*cs)(bool val)) { spif->spi_base = spi_base; + spif->page_size = page_size; spif->cs = cs; + spif->cs(1); spi_reset(spif->spi_base); spi_init_master(spif->spi_base, - SPI_CR1_BAUDRATE_FPCLK_DIV_1, + SPI_CR1_BAUDRATE_FPCLK_DIV_2, SPI_CR1_CPOL_CLK_TO_1_WHEN_IDLE, - CPI_CR1_CPHA_CLK_TRANSITION_2, + SPI_CR1_CPHA_CLK_TRANSITION_2, SPI_CR1_DFF_8BIT, - CPI_CR1_MSBFIRST); + SPI_CR1_MSBFIRST); spi_enable_software_slave_management(spif->spi_base); spi_set_nss_high(spif->spi_base); spi_enable(spif->spi_base); - spif->cs(0) + spif->cs(0); spi_send(spif->spi_base, READ_IDENTIFICATION); - spif->id.mfg_id = spi_read(SPI1); - spif->id.type = spi_read(SPI1); - spif->id.size = 1<<spi_read(SPI1); - spif->cs(1) + spif->id.mfg_id = spi_xfer(spif->spi_base, 0); + spif->id.type = spi_xfer(spif->spi_base, 0); + spif->id.size = 1<<spi_xfer(spif->spi_base, 0); + spif->cs(1); } -void spif_read(struct spi_flash_if *spif, int addr, int len, char* data) { +void spif_read(struct spi_flash_if *spif, size_t addr, size_t len, char* data) { spif_enable_write(spif); - spif->cs(0) - spi_write(spif->spi_base, READ_DATA); - spi_write(spif->spi_base, high_byte(addr)); - spi_write(spif->spi_base, mid_byte(addr)); - spi_write(spif->spi_base, low_byte(addr)); + spif->cs(0); + spi_xfer(spif->spi_base, READ_DATA); + spi_xfer(spif->spi_base, high_byte(addr)); + spi_xfer(spif->spi_base, mid_byte(addr)); + spi_xfer(spif->spi_base, low_byte(addr)); for (size_t i = 0; i < len; i++) - data[i] = spi_read(spif->spi_base); + data[i] = spi_xfer(spif->spi_base, 0); spif->cs(1); } -void spif_write(spi_flash_if *spif, size_t addr, size_t len, const char* data) { - size_t written = 0; - size_t write_size = 0; +void spif_write(struct spi_flash_if *spif, size_t addr, size_t len, const char* data) { + size_t written = 0, write_size = 0; while (written < len) { - write_size = _page_size - ((addr + written) % _page_size); - if (written + write_size > len) { + write_size = spif->page_size - ((addr + written) % spif->page_size); + if (written + write_size > len) write_size = len - written; - } - write_page(addr + written, write_size, data + written); + spif_write_page(spif, addr + written, write_size, data + written); written += write_size; } } -uint8_t spif_read_status(spi_flash_if *spif) { +static uint8_t spif_read_status(struct spi_flash_if *spif) { spif->cs(0); - spi_write(spif->spi_base, READ_STATUS); - uint8_t status = spi_read(spif->spi_base); + spi_xfer(spif->spi_base, READ_STATUS); + uint8_t status = spi_xfer(spif->spi_base, 0); spif->cs(1); return status; } -void spif_clear_sector(spi_flash_if *spif, size_t addr) { +void spif_clear_sector(struct spi_flash_if *spif, size_t addr) { spif_enable_write(spif); spif->cs(0); - spi_write(spif->spi_abse, SECTOR_ERASE); - spi_write(spif->spi_abse, high_byte(addr)); - spi_write(spif->spi_abse, mid_byte(addr)); - spi_write(spif->spi_abse, low_byte(addr)); + spi_xfer(spif->spi_base, SECTOR_ERASE); + spi_xfer(spif->spi_base, high_byte(addr)); + spi_xfer(spif->spi_base, mid_byte(addr)); + spi_xfer(spif->spi_base, low_byte(addr)); spif->cs(1); - wait_for_write(spif); + spif_wait_for_write(spif); } -void spif_clear_mem(spi_flash_if *spif) { +void spif_clear_mem(struct spi_flash_if *spif) { spif_enable_write(spif); spif->cs(0); - spi_write(spif->spi_base, BULK_ERASE); + spi_xfer(spif->spi_base, BULK_ERASE); spif->cs(1); spif_wait_for_write(spif); } -void spif_write_page(struct spi_flash_if *spif, size_t addr, size_t len, const char* data) { - spif_enable_write(); +static void spif_write_page(struct spi_flash_if *spif, size_t addr, size_t len, const char* data) { + spif_enable_write(spif); spif->cs(0); - spi_write(spif->base, PAGE_PROGRAM); - spi_write(spif->base, high_byte(addr)); - spi_write(spif->base, mid_byte(addr)); - spi_write(spif->base, low_byte(addr)); + spi_xfer(spif->spi_base, PAGE_PROGRAM); + spi_xfer(spif->spi_base, high_byte(addr)); + spi_xfer(spif->spi_base, mid_byte(addr)); + spi_xfer(spif->spi_base, low_byte(addr)); - for (int i = 0; i < len; i++) { - spi_write(spif->spi_base, data[i]); + for (size_t i = 0; i < len; i++) { + spi_xfer(spif->spi_base, data[i]); } spif->cs(1); @@ -161,7 +166,7 @@ void spif_write_page(struct spi_flash_if *spif, size_t addr, size_t len, const c static void spif_enable_write(struct spi_flash_if *spif) { spif->cs(0); - spi_write(spif->spi_base, WRITE_ENABLE); + spi_xfer(spif->spi_base, WRITE_ENABLE); spif->cs(1); } @@ -173,12 +178,12 @@ static void spif_wait_for_write(struct spi_flash_if *spif) { void spif_deep_power_down(struct spi_flash_if *spif) { spif->cs(0); - spi_write(spif->spi_base, DEEP_POWER_DOWN); - spif->cs(1) + spi_xfer(spif->spi_base, DEEP_POWER_DOWN); + spif->cs(1); } void spif_wakeup(struct spi_flash_if *spif) { spif->cs(0); - spi_write(spif->spi_base, DEEP_POWER_DOWN_RELEASE); - spif->cs(1) + spi_xfer(spif->spi_base, DEEP_POWER_DOWN_RELEASE); + spif->cs(1); } diff --git a/controller/fw/spi_flash.h b/controller/fw/spi_flash.h index 933d8c9..e647c6a 100644 --- a/controller/fw/spi_flash.h +++ b/controller/fw/spi_flash.h @@ -2,7 +2,7 @@ #define __SPI_FLASH_H__ #include <stdbool.h> -#include <stdint.h> +#include <unistd.h> struct spi_mem_id { size_t size; @@ -13,10 +13,18 @@ struct spi_mem_id { struct spi_flash_if { struct spi_mem_id id; uint32_t spi_base; + size_t page_size; void (*cs)(bool val); }; -int spif_init(struct spi_mem_id *mem_data); +void spif_init(struct spi_flash_if *spif, size_t page_size, uint32_t spi_base, void (*cs)(bool val)); + +void spif_write(struct spi_flash_if *spif, size_t addr, size_t len, const char* data); +void spif_read(struct spi_flash_if *spif, size_t addr, size_t len, char* data); + +void spif_clear_mem(struct spi_flash_if *spif); +void spif_clear_sector(struct spi_flash_if *spif, size_t addr); + void spif_deep_power_down(struct spi_flash_if *spif); void spif_wakeup(struct spi_flash_if *spif); |