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authorjaseg <git-bigdata-wsl-arch@jaseg.de>2020-03-21 14:19:01 +0100
committerjaseg <git-bigdata-wsl-arch@jaseg.de>2020-03-21 14:19:01 +0100
commit3beecbc4fa60773ffbdf04ce1908a86be5908551 (patch)
tree3a470e3e86662804a090141d8843c46ce8620191 /controller/fw/src/adc.c
parent37338e2ad8ca226119121432b65f6c61134e60ac (diff)
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Basic JTAG working
Diffstat (limited to 'controller/fw/src/adc.c')
-rw-r--r--controller/fw/src/adc.c16
1 files changed, 0 insertions, 16 deletions
diff --git a/controller/fw/src/adc.c b/controller/fw/src/adc.c
index 027fd11..02d729a 100644
--- a/controller/fw/src/adc.c
+++ b/controller/fw/src/adc.c
@@ -64,26 +64,10 @@ void adc_init() {
TIM1->CCR1 = 1;
TIM1->BDTR = TIM_BDTR_MOE;
- /* DEBUG */
- TIM1->DIER = TIM_DIER_CC1IE;
- NVIC_EnableIRQ(TIM1_CC_IRQn);
- NVIC_SetPriority(TIM1_CC_IRQn, 130);
- /* END DEBUG */
-
TIM1->CR1 = TIM_CR1_CEN;
TIM1->EGR = TIM_EGR_UG;
}
-void TIM1_CC_IRQHandler(void) {
- TIM1->SR &= ~TIM_SR_CC1IF;
- static int foo=0;
- foo++;
- if (foo == 500) {
- foo = 0;
- GPIOA->ODR ^= 1<<6;
- }
-}
-
void DMA2_Stream0_IRQHandler(void) {
uint8_t isr = (DMA2->LISR >> DMA_LISR_FEIF0_Pos) & 0x3f;
GPIOA->BSRR = 1<<11;