path: root/gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP

Layer Pairs Export File for PCB: E:\Saniok\Lime Micro\Lime PCBs\LimeSDR-QPCIe_1v2\AltiumDesigner Design files\PCB\LimeSDR-QPCIe_1v2.PcbDoc
LayersSetName=Top_Bot_Thru_Holes|DrillFile=limesdr-qpcie_1v2-roundholes.txt|DrillLayers=gtl,g1,g2,g3,g4,g5,g6,g7,g8,g9,g10,g11,g12,gbl
LayersSetName=Top_Bot_Slot_Holes|DrillFile=limesdr-qpcie_1v2-slotholes.txt|DrillLayers=gtl,g1,g2,g3,g4,g5,g6,g7,g8,g9,g10,g11,g12,gbl