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authorjaseg <git@jaseg.de>2023-09-20 14:24:15 +0200
committerjaseg <git@jaseg.de>2023-09-20 14:24:15 +0200
commit5f1350d4f4e1c190bf0b2db12b8183519b2d3413 (patch)
treea9f2220b7b9142c0e2181918f4d925269fd97632 /gerbonara/tests/resources/Target3001/IRNASIoTbank1.2.Apr
parent5ff40e0ad1ec2ebad7633b11df373b06334f20e2 (diff)
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coil gen: add kicad pcb export
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